Modifications in 4DGL library. Added CDU_hw_sw.h for version info. Added pins.h for hardware pin remapping
Dependencies: 4DGL-UC MODSERIAL mbed mbos
Fork of CDU_Mbed_30 by
keyboard.h@21:f348e6f0f7d4, 2014-10-10 (annotated)
- Committer:
- WillemBraat
- Date:
- Fri Oct 10 18:23:36 2014 +0000
- Revision:
- 21:f348e6f0f7d4
- Parent:
- 20:150afde94910
Additional files: CDU_Maintenance.cpp / mbps_def3.h
; Rewrite of main() function for power checks
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
WillemBraat | 20:150afde94910 | 1 | /*Backlighting scale factor*/ |
WillemBraat | 21:f348e6f0f7d4 | 2 | #define BGL_SCALE 50 //Percentage between 0 and 100 |
WillemBraat | 20:150afde94910 | 3 | |
LvdK | 7:6576a287e563 | 4 | /* Keyboard TCA8418 declarations */ |
LvdK | 7:6576a287e563 | 5 | |
LvdK | 7:6576a287e563 | 6 | /* TCA8418 hardware limits */ |
LvdK | 7:6576a287e563 | 7 | #define TCA8418_MAX_ROWS 8 |
LvdK | 7:6576a287e563 | 8 | #define TCA8418_MAX_COLS 10 |
LvdK | 7:6576a287e563 | 9 | |
LvdK | 7:6576a287e563 | 10 | /* TCA8418 register offsets */ |
LvdK | 7:6576a287e563 | 11 | #define REG_CFG 0x01 |
LvdK | 7:6576a287e563 | 12 | #define REG_INT_STAT 0x02 |
LvdK | 7:6576a287e563 | 13 | #define REG_KEY_LCK_EC 0x03 |
LvdK | 7:6576a287e563 | 14 | #define REG_KEY_EVENT_A 0x04 |
LvdK | 7:6576a287e563 | 15 | #define REG_KEY_EVENT_B 0x05 |
LvdK | 7:6576a287e563 | 16 | #define REG_KEY_EVENT_C 0x06 |
LvdK | 7:6576a287e563 | 17 | #define REG_KEY_EVENT_D 0x07 |
LvdK | 7:6576a287e563 | 18 | #define REG_KEY_EVENT_E 0x08 |
LvdK | 7:6576a287e563 | 19 | #define REG_KEY_EVENT_F 0x09 |
LvdK | 7:6576a287e563 | 20 | #define REG_KEY_EVENT_G 0x0A |
LvdK | 7:6576a287e563 | 21 | #define REG_KEY_EVENT_H 0x0B |
LvdK | 7:6576a287e563 | 22 | #define REG_KEY_EVENT_I 0x0C |
LvdK | 7:6576a287e563 | 23 | #define REG_KEY_EVENT_J 0x0D |
LvdK | 7:6576a287e563 | 24 | #define REG_KP_LCK_TIMER 0x0E |
LvdK | 7:6576a287e563 | 25 | #define REG_UNLOCK1 0x0F |
LvdK | 7:6576a287e563 | 26 | #define REG_UNLOCK2 0x10 |
LvdK | 7:6576a287e563 | 27 | #define REG_GPIO_INT_STAT1 0x11 |
LvdK | 7:6576a287e563 | 28 | #define REG_GPIO_INT_STAT2 0x12 |
LvdK | 7:6576a287e563 | 29 | #define REG_GPIO_INT_STAT3 0x13 |
LvdK | 7:6576a287e563 | 30 | #define REG_GPIO_DAT_STAT1 0x14 |
LvdK | 7:6576a287e563 | 31 | #define REG_GPIO_DAT_STAT2 0x15 |
LvdK | 7:6576a287e563 | 32 | #define REG_GPIO_DAT_STAT3 0x16 |
LvdK | 7:6576a287e563 | 33 | #define REG_GPIO_DAT_OUT1 0x17 |
LvdK | 7:6576a287e563 | 34 | #define REG_GPIO_DAT_OUT2 0x18 |
LvdK | 7:6576a287e563 | 35 | #define REG_GPIO_DAT_OUT3 0x19 |
LvdK | 7:6576a287e563 | 36 | #define REG_GPIO_INT_EN1 0x1A |
LvdK | 7:6576a287e563 | 37 | #define REG_GPIO_INT_EN2 0x1B |
LvdK | 7:6576a287e563 | 38 | #define REG_GPIO_INT_EN3 0x1C |
LvdK | 7:6576a287e563 | 39 | #define REG_KP_GPIO1 0x1D |
LvdK | 7:6576a287e563 | 40 | #define REG_KP_GPIO2 0x1E |
LvdK | 7:6576a287e563 | 41 | #define REG_KP_GPIO3 0x1F |
LvdK | 7:6576a287e563 | 42 | #define REG_GPI_EM1 0x20 |
LvdK | 7:6576a287e563 | 43 | #define REG_GPI_EM2 0x21 |
LvdK | 7:6576a287e563 | 44 | #define REG_GPI_EM3 0x22 |
LvdK | 7:6576a287e563 | 45 | #define REG_GPIO_DIR1 0x23 |
LvdK | 7:6576a287e563 | 46 | #define REG_GPIO_DIR2 0x24 |
LvdK | 7:6576a287e563 | 47 | #define REG_GPIO_DIR3 0x25 |
LvdK | 7:6576a287e563 | 48 | #define REG_GPIO_INT_LVL1 0x26 |
LvdK | 7:6576a287e563 | 49 | #define REG_GPIO_INT_LVL2 0x27 |
LvdK | 7:6576a287e563 | 50 | #define REG_GPIO_INT_LVL3 0x28 |
LvdK | 7:6576a287e563 | 51 | #define REG_DEBOUNCE_DIS1 0x29 |
LvdK | 7:6576a287e563 | 52 | #define REG_DEBOUNCE_DIS2 0x2A |
LvdK | 7:6576a287e563 | 53 | #define REG_DEBOUNCE_DIS3 0x2B |
LvdK | 7:6576a287e563 | 54 | #define REG_GPIO_PULL1 0x2C |
LvdK | 7:6576a287e563 | 55 | #define REG_GPIO_PULL2 0x2D |
LvdK | 7:6576a287e563 | 56 | #define REG_GPIO_PULL3 0x2E |
LvdK | 7:6576a287e563 | 57 | |
LvdK | 7:6576a287e563 | 58 | /* TCA8418 bit definitions */ |
LvdK | 7:6576a287e563 | 59 | #define CFG_AI BIT(7) |
LvdK | 7:6576a287e563 | 60 | #define CFG_GPI_E_CFG BIT(6) |
LvdK | 7:6576a287e563 | 61 | #define CFG_OVR_FLOW_M BIT(5) |
LvdK | 7:6576a287e563 | 62 | #define CFG_INT_CFG BIT(4) |
LvdK | 7:6576a287e563 | 63 | #define CFG_OVR_FLOW_IEN BIT(3) |
LvdK | 7:6576a287e563 | 64 | #define CFG_K_LCK_IEN BIT(2) |
LvdK | 7:6576a287e563 | 65 | #define CFG_GPI_IEN BIT(1) |
LvdK | 7:6576a287e563 | 66 | #define CFG_KE_IEN BIT(0) |
LvdK | 7:6576a287e563 | 67 | |
LvdK | 7:6576a287e563 | 68 | #define INT_STAT_CAD_INT BIT(4) |
LvdK | 7:6576a287e563 | 69 | #define INT_STAT_OVR_FLOW_INT BIT(3) |
LvdK | 7:6576a287e563 | 70 | #define INT_STAT_K_LCK_INT BIT(2) |
LvdK | 7:6576a287e563 | 71 | #define INT_STAT_GPI_INT BIT(1) |
LvdK | 7:6576a287e563 | 72 | #define INT_STAT_K_INT BIT(0) |
LvdK | 7:6576a287e563 | 73 | |
LvdK | 7:6576a287e563 | 74 | /* TCA8418 register masks */ |
LvdK | 7:6576a287e563 | 75 | #define KEY_LCK_EC_KEC 0x7 |
LvdK | 7:6576a287e563 | 76 | #define KEY_EVENT_CODE 0x7f |
LvdK | 7:6576a287e563 | 77 | #define KEY_EVENT_VALUE 0x80 |
LvdK | 7:6576a287e563 | 78 |