E&R S3 prime / BSP_DISCO_L476VG
Committer:
bcostm
Date:
Wed Jan 17 14:57:52 2018 +0100
Revision:
3:4c7d003a8259
Parent:
1:917af0ca86df
Child:
5:4943b15cce9f
Update BSP files with CubeL4 V1.11.0

Who changed what in which revision?

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Jerome Coutant 1:917af0ca86df 1 /**
Jerome Coutant 1:917af0ca86df 2 ******************************************************************************
Jerome Coutant 1:917af0ca86df 3 * @file stm32l476g_discovery.h
Jerome Coutant 1:917af0ca86df 4 * @author MCD Application Team
bcostm 3:4c7d003a8259 5 * @brief This file contains definitions for STM32L476G_DISCOVERY's LEDs,
Jerome Coutant 1:917af0ca86df 6 * push-buttons hardware resources (MB1184).
Jerome Coutant 1:917af0ca86df 7 ******************************************************************************
Jerome Coutant 1:917af0ca86df 8 * @attention
Jerome Coutant 1:917af0ca86df 9 *
Jerome Coutant 1:917af0ca86df 10 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Jerome Coutant 1:917af0ca86df 11 *
Jerome Coutant 1:917af0ca86df 12 * Redistribution and use in source and binary forms, with or without modification,
Jerome Coutant 1:917af0ca86df 13 * are permitted provided that the following conditions are met:
Jerome Coutant 1:917af0ca86df 14 * 1. Redistributions of source code must retain the above copyright notice,
Jerome Coutant 1:917af0ca86df 15 * this list of conditions and the following disclaimer.
Jerome Coutant 1:917af0ca86df 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
Jerome Coutant 1:917af0ca86df 17 * this list of conditions and the following disclaimer in the documentation
Jerome Coutant 1:917af0ca86df 18 * and/or other materials provided with the distribution.
Jerome Coutant 1:917af0ca86df 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Jerome Coutant 1:917af0ca86df 20 * may be used to endorse or promote products derived from this software
Jerome Coutant 1:917af0ca86df 21 * without specific prior written permission.
Jerome Coutant 1:917af0ca86df 22 *
Jerome Coutant 1:917af0ca86df 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Jerome Coutant 1:917af0ca86df 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Jerome Coutant 1:917af0ca86df 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Jerome Coutant 1:917af0ca86df 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Jerome Coutant 1:917af0ca86df 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Jerome Coutant 1:917af0ca86df 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Jerome Coutant 1:917af0ca86df 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Jerome Coutant 1:917af0ca86df 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Jerome Coutant 1:917af0ca86df 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Jerome Coutant 1:917af0ca86df 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Jerome Coutant 1:917af0ca86df 33 *
Jerome Coutant 1:917af0ca86df 34 ******************************************************************************
Jerome Coutant 1:917af0ca86df 35 */
Jerome Coutant 1:917af0ca86df 36
Jerome Coutant 1:917af0ca86df 37 /* Define to prevent recursive inclusion -------------------------------------*/
Jerome Coutant 1:917af0ca86df 38 #ifndef __STM32L476G_DISCOVERY_H
Jerome Coutant 1:917af0ca86df 39 #define __STM32L476G_DISCOVERY_H
Jerome Coutant 1:917af0ca86df 40
Jerome Coutant 1:917af0ca86df 41 #ifdef __cplusplus
bcostm 3:4c7d003a8259 42 extern "C" {
Jerome Coutant 1:917af0ca86df 43 #endif
Jerome Coutant 1:917af0ca86df 44
bcostm 3:4c7d003a8259 45 /**
Jerome Coutant 1:917af0ca86df 46 * @brief Define for STM32L476G_DISCOVERY board
Jerome Coutant 1:917af0ca86df 47 */
Jerome Coutant 1:917af0ca86df 48 #if !defined (USE_STM32L476G_DISCO_REVC) && !defined (USE_STM32L476G_DISCO_REVB) && !defined (USE_STM32L476G_DISCO_REVA)
Jerome Coutant 1:917af0ca86df 49 #define USE_STM32L476G_DISCO_REVC
Jerome Coutant 1:917af0ca86df 50 #endif
Jerome Coutant 1:917af0ca86df 51
Jerome Coutant 1:917af0ca86df 52
Jerome Coutant 1:917af0ca86df 53 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 1:917af0ca86df 54 #include "stm32l4xx_hal.h"
Jerome Coutant 1:917af0ca86df 55
Jerome Coutant 1:917af0ca86df 56 /** @addtogroup BSP
Jerome Coutant 1:917af0ca86df 57 * @{
Jerome Coutant 1:917af0ca86df 58 */
Jerome Coutant 1:917af0ca86df 59
Jerome Coutant 1:917af0ca86df 60 /** @addtogroup STM32L476G_DISCOVERY
Jerome Coutant 1:917af0ca86df 61 * @{
Jerome Coutant 1:917af0ca86df 62 */
Jerome Coutant 1:917af0ca86df 63
Jerome Coutant 1:917af0ca86df 64 /** @addtogroup STM32L476G_DISCOVERY_Common
Jerome Coutant 1:917af0ca86df 65 * @{
Jerome Coutant 1:917af0ca86df 66 */
Jerome Coutant 1:917af0ca86df 67
Jerome Coutant 1:917af0ca86df 68 /** @defgroup STM32L476G_DISCOVERY_Exported_Types Exported Types
Jerome Coutant 1:917af0ca86df 69 * @{
Jerome Coutant 1:917af0ca86df 70 */
Jerome Coutant 1:917af0ca86df 71
Jerome Coutant 1:917af0ca86df 72 /**
Jerome Coutant 1:917af0ca86df 73 * @brief LED Types Definition
Jerome Coutant 1:917af0ca86df 74 */
Jerome Coutant 1:917af0ca86df 75 #if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
Jerome Coutant 1:917af0ca86df 76 typedef enum
Jerome Coutant 1:917af0ca86df 77 {
Jerome Coutant 1:917af0ca86df 78 DISCO_LED4 = 0,
Jerome Coutant 1:917af0ca86df 79 DISCO_LED5 = 1,
Jerome Coutant 1:917af0ca86df 80 LED_RED = DISCO_LED4,
Jerome Coutant 1:917af0ca86df 81 LED_GREEN = DISCO_LED5
bcostm 3:4c7d003a8259 82 }
bcostm 3:4c7d003a8259 83 Led_TypeDef;
Jerome Coutant 1:917af0ca86df 84 #elif defined (USE_STM32L476G_DISCO_REVA)
Jerome Coutant 1:917af0ca86df 85 typedef enum
Jerome Coutant 1:917af0ca86df 86 {
Jerome Coutant 1:917af0ca86df 87 DISCO_LED3 = 0,
Jerome Coutant 1:917af0ca86df 88 DISCO_LED4 = 1,
Jerome Coutant 1:917af0ca86df 89 LED_RED = DISCO_LED3,
Jerome Coutant 1:917af0ca86df 90 LED_GREEN = DISCO_LED4
bcostm 3:4c7d003a8259 91 }
bcostm 3:4c7d003a8259 92 Led_TypeDef;
Jerome Coutant 1:917af0ca86df 93 #endif
Jerome Coutant 1:917af0ca86df 94
Jerome Coutant 1:917af0ca86df 95 /**
Jerome Coutant 1:917af0ca86df 96 * @brief JOYSTICK Types Definition
Jerome Coutant 1:917af0ca86df 97 */
bcostm 3:4c7d003a8259 98 typedef enum
bcostm 3:4c7d003a8259 99 {
Jerome Coutant 1:917af0ca86df 100 JOY_SEL = 0,
Jerome Coutant 1:917af0ca86df 101 JOY_LEFT = 1,
Jerome Coutant 1:917af0ca86df 102 JOY_RIGHT = 2,
Jerome Coutant 1:917af0ca86df 103 JOY_DOWN = 3,
Jerome Coutant 1:917af0ca86df 104 JOY_UP = 4,
Jerome Coutant 1:917af0ca86df 105 JOY_NONE = 5
bcostm 3:4c7d003a8259 106 } JOYState_TypeDef;
Jerome Coutant 1:917af0ca86df 107
bcostm 3:4c7d003a8259 108 typedef enum
bcostm 3:4c7d003a8259 109 {
Jerome Coutant 1:917af0ca86df 110 JOY_MODE_GPIO = 0,
Jerome Coutant 1:917af0ca86df 111 JOY_MODE_EXTI = 1
bcostm 3:4c7d003a8259 112 } JOYMode_TypeDef;
Jerome Coutant 1:917af0ca86df 113
bcostm 3:4c7d003a8259 114 typedef enum
bcostm 3:4c7d003a8259 115 {
Jerome Coutant 1:917af0ca86df 116 SUPPLY_MODE_ERROR = 0,
Jerome Coutant 1:917af0ca86df 117 SUPPLY_MODE_EXTERNAL = 1,
Jerome Coutant 1:917af0ca86df 118 SUPPLY_MODE_BATTERY = 2
bcostm 3:4c7d003a8259 119 } SupplyMode_TypeDef;
Jerome Coutant 1:917af0ca86df 120
Jerome Coutant 1:917af0ca86df 121 /**
Jerome Coutant 1:917af0ca86df 122 * @}
Jerome Coutant 1:917af0ca86df 123 */
Jerome Coutant 1:917af0ca86df 124
Jerome Coutant 1:917af0ca86df 125 /** @defgroup STM32L476G_DISCOVERY_Exported_Constants Exported Constants
Jerome Coutant 1:917af0ca86df 126 * @{
Jerome Coutant 1:917af0ca86df 127 */
Jerome Coutant 1:917af0ca86df 128
Jerome Coutant 1:917af0ca86df 129 /** @defgroup STM32L476G_DISCOVERY_BATTERY BATTERY Detection Constants
Jerome Coutant 1:917af0ca86df 130 * @{
Jerome Coutant 1:917af0ca86df 131 */
Jerome Coutant 1:917af0ca86df 132 #define BATTERY_DETECTION_PIN GPIO_PIN_3
Jerome Coutant 1:917af0ca86df 133 #define BATTERY_DETECTION_GPIO_PORT GPIOB
Jerome Coutant 1:917af0ca86df 134 #define BATTERY_DETECTION_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 135 #define BATTERY_DETECTION_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 136 /**
Jerome Coutant 1:917af0ca86df 137 * @}
bcostm 3:4c7d003a8259 138 */
Jerome Coutant 1:917af0ca86df 139
Jerome Coutant 1:917af0ca86df 140 /** @defgroup STM32L476G_DISCOVERY_LED LED Constants
Jerome Coutant 1:917af0ca86df 141 * @{
Jerome Coutant 1:917af0ca86df 142 */
Jerome Coutant 1:917af0ca86df 143 #define LEDn 2
Jerome Coutant 1:917af0ca86df 144
Jerome Coutant 1:917af0ca86df 145 #if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
Jerome Coutant 1:917af0ca86df 146 #define LED4_PIN GPIO_PIN_2
Jerome Coutant 1:917af0ca86df 147 #define LED4_GPIO_PORT GPIOB
Jerome Coutant 1:917af0ca86df 148 #define LED4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 149 #define LED4_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 150
Jerome Coutant 1:917af0ca86df 151 #define LED5_PIN GPIO_PIN_8
Jerome Coutant 1:917af0ca86df 152 #define LED5_GPIO_PORT GPIOE
Jerome Coutant 1:917af0ca86df 153 #define LED5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 154 #define LED5_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 155
Jerome Coutant 1:917af0ca86df 156 #define LEDx_GPIO_CLK_ENABLE(__LED__) do { if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_ENABLE(); } else \
Jerome Coutant 1:917af0ca86df 157 if((__LED__) == DISCO_LED5) { LED5_GPIO_CLK_ENABLE(); } } while(0)
Jerome Coutant 1:917af0ca86df 158
Jerome Coutant 1:917af0ca86df 159 #define LEDx_GPIO_CLK_DISABLE(__LED__) do { if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_DISABLE(); } else \
Jerome Coutant 1:917af0ca86df 160 if((__LED__) == DISCO_LED5) { LED5_GPIO_CLK_DISABLE(); } } while(0)
Jerome Coutant 1:917af0ca86df 161
Jerome Coutant 1:917af0ca86df 162 #elif defined (USE_STM32L476G_DISCO_REVA)
Jerome Coutant 1:917af0ca86df 163 #define LED3_PIN GPIO_PIN_2
Jerome Coutant 1:917af0ca86df 164 #define LED3_GPIO_PORT GPIOB
Jerome Coutant 1:917af0ca86df 165 #define LED3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 166 #define LED3_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 167
Jerome Coutant 1:917af0ca86df 168 #define LED4_PIN GPIO_PIN_8
Jerome Coutant 1:917af0ca86df 169 #define LED4_GPIO_PORT GPIOE
Jerome Coutant 1:917af0ca86df 170 #define LED4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 171 #define LED4_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 172
Jerome Coutant 1:917af0ca86df 173 #define LEDx_GPIO_CLK_ENABLE(__LED__) do { if((__LED__) == DISCO_LED3) { LED3_GPIO_CLK_ENABLE(); } else \
Jerome Coutant 1:917af0ca86df 174 if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_ENABLE(); } } while(0)
Jerome Coutant 1:917af0ca86df 175
Jerome Coutant 1:917af0ca86df 176 #define LEDx_GPIO_CLK_DISABLE(__LED__) do { if((__LED__) == DISCO_LED3) { LED3_GPIO_CLK_DISABLE(); } else \
Jerome Coutant 1:917af0ca86df 177 if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_DISABLE(); } } while(0)
Jerome Coutant 1:917af0ca86df 178
Jerome Coutant 1:917af0ca86df 179 #endif
Jerome Coutant 1:917af0ca86df 180 /**
Jerome Coutant 1:917af0ca86df 181 * @}
Jerome Coutant 1:917af0ca86df 182 */
Jerome Coutant 1:917af0ca86df 183
Jerome Coutant 1:917af0ca86df 184 /** @defgroup STM32L476G_DISCOVERY_BUTTON BUTTON Constants
Jerome Coutant 1:917af0ca86df 185 * @{
Jerome Coutant 1:917af0ca86df 186 */
Jerome Coutant 1:917af0ca86df 187 #define JOYn 5
Jerome Coutant 1:917af0ca86df 188
Jerome Coutant 1:917af0ca86df 189 /**
Jerome Coutant 1:917af0ca86df 190 * @brief Joystick Right push-button
Jerome Coutant 1:917af0ca86df 191 */
Jerome Coutant 1:917af0ca86df 192 #define RIGHT_JOY_PIN GPIO_PIN_2 /* PA.02 */
Jerome Coutant 1:917af0ca86df 193 #define RIGHT_JOY_GPIO_PORT GPIOA
Jerome Coutant 1:917af0ca86df 194 #define RIGHT_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 195 #define RIGHT_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 196 #define RIGHT_JOY_EXTI_IRQn EXTI2_IRQn
Jerome Coutant 1:917af0ca86df 197
Jerome Coutant 1:917af0ca86df 198 /**
Jerome Coutant 1:917af0ca86df 199 * @brief Joystick Left push-button
Jerome Coutant 1:917af0ca86df 200 */
Jerome Coutant 1:917af0ca86df 201 #define LEFT_JOY_PIN GPIO_PIN_1 /* PA.01 */
Jerome Coutant 1:917af0ca86df 202 #define LEFT_JOY_GPIO_PORT GPIOA
Jerome Coutant 1:917af0ca86df 203 #define LEFT_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 204 #define LEFT_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
bcostm 3:4c7d003a8259 205 #define LEFT_JOY_EXTI_IRQn EXTI1_IRQn
Jerome Coutant 1:917af0ca86df 206
Jerome Coutant 1:917af0ca86df 207 /**
Jerome Coutant 1:917af0ca86df 208 * @brief Joystick Up push-button
Jerome Coutant 1:917af0ca86df 209 */
Jerome Coutant 1:917af0ca86df 210 #define UP_JOY_PIN GPIO_PIN_3 /* PA.03 */
Jerome Coutant 1:917af0ca86df 211 #define UP_JOY_GPIO_PORT GPIOA
Jerome Coutant 1:917af0ca86df 212 #define UP_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 213 #define UP_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 214 #define UP_JOY_EXTI_IRQn EXTI3_IRQn
Jerome Coutant 1:917af0ca86df 215
Jerome Coutant 1:917af0ca86df 216 /**
Jerome Coutant 1:917af0ca86df 217 * @brief Joystick Down push-button
bcostm 3:4c7d003a8259 218 */
Jerome Coutant 1:917af0ca86df 219 #define DOWN_JOY_PIN GPIO_PIN_5 /* PA.05 */
Jerome Coutant 1:917af0ca86df 220 #define DOWN_JOY_GPIO_PORT GPIOA
Jerome Coutant 1:917af0ca86df 221 #define DOWN_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 222 #define DOWN_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 223 #define DOWN_JOY_EXTI_IRQn EXTI9_5_IRQn
Jerome Coutant 1:917af0ca86df 224
Jerome Coutant 1:917af0ca86df 225 /**
Jerome Coutant 1:917af0ca86df 226 * @brief Joystick Sel push-button
Jerome Coutant 1:917af0ca86df 227 */
Jerome Coutant 1:917af0ca86df 228 #define SEL_JOY_PIN GPIO_PIN_0 /* PA.00 */
Jerome Coutant 1:917af0ca86df 229 #define SEL_JOY_GPIO_PORT GPIOA
Jerome Coutant 1:917af0ca86df 230 #define SEL_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 231 #define SEL_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
bcostm 3:4c7d003a8259 232 #define SEL_JOY_EXTI_IRQn EXTI0_IRQn
Jerome Coutant 1:917af0ca86df 233
Jerome Coutant 1:917af0ca86df 234 #define JOYx_GPIO_CLK_ENABLE(__JOY__) do { if((__JOY__) == JOY_SEL) { SEL_JOY_GPIO_CLK_ENABLE(); } else \
Jerome Coutant 1:917af0ca86df 235 if((__JOY__) == JOY_DOWN) { DOWN_JOY_GPIO_CLK_ENABLE(); } else \
Jerome Coutant 1:917af0ca86df 236 if((__JOY__) == JOY_LEFT) { LEFT_JOY_GPIO_CLK_ENABLE(); } else \
Jerome Coutant 1:917af0ca86df 237 if((__JOY__) == JOY_RIGHT) { RIGHT_JOY_GPIO_CLK_ENABLE(); } else \
Jerome Coutant 1:917af0ca86df 238 if((__JOY__) == JOY_UP) { UP_JOY_GPIO_CLK_ENABLE(); } } while(0)
Jerome Coutant 1:917af0ca86df 239
Jerome Coutant 1:917af0ca86df 240 #define JOYx_GPIO_CLK_DISABLE(__JOY__) do { if((__JOY__) == JOY_SEL) { SEL_JOY_GPIO_CLK_DISABLE(); } else \
Jerome Coutant 1:917af0ca86df 241 if((__JOY__) == JOY_DOWN) { DOWN_JOY_GPIO_CLK_DISABLE(); } else \
Jerome Coutant 1:917af0ca86df 242 if((__JOY__) == JOY_LEFT) { LEFT_JOY_GPIO_CLK_DISABLE(); } else \
Jerome Coutant 1:917af0ca86df 243 if((__JOY__) == JOY_RIGHT) { RIGHT_JOY_GPIO_CLK_DISABLE(); } else \
Jerome Coutant 1:917af0ca86df 244 if((__JOY__) == JOY_UP) { UP_JOY_GPIO_CLK_DISABLE(); } } while(0)
Jerome Coutant 1:917af0ca86df 245
Jerome Coutant 1:917af0ca86df 246 #define JOY_ALL_PINS (RIGHT_JOY_PIN | LEFT_JOY_PIN | UP_JOY_PIN | DOWN_JOY_PIN | SEL_JOY_PIN)
Jerome Coutant 1:917af0ca86df 247
Jerome Coutant 1:917af0ca86df 248 /**
Jerome Coutant 1:917af0ca86df 249 * @}
Jerome Coutant 1:917af0ca86df 250 */
Jerome Coutant 1:917af0ca86df 251
Jerome Coutant 1:917af0ca86df 252 /** @defgroup STM32L476G_DISCOVERY_BUS BUS Constants
Jerome Coutant 1:917af0ca86df 253 * @{
Jerome Coutant 1:917af0ca86df 254 */
Jerome Coutant 1:917af0ca86df 255 #if defined(HAL_SPI_MODULE_ENABLED)
Jerome Coutant 1:917af0ca86df 256 /*##################### SPI2 ###################################*/
Jerome Coutant 1:917af0ca86df 257 #define DISCOVERY_SPIx SPI2
Jerome Coutant 1:917af0ca86df 258 #define DISCOVERY_SPIx_CLOCK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 259 #define DISCOVERY_SPIx_CLOCK_DISABLE() __HAL_RCC_SPI2_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 260 #define DISCOVERY_SPIx_GPIO_PORT GPIOD /* GPIOD */
Jerome Coutant 1:917af0ca86df 261 #define DISCOVERY_SPIx_AF GPIO_AF5_SPI2
Jerome Coutant 1:917af0ca86df 262 #define DISCOVERY_SPIx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 263 #define DISCOVERY_SPIx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 264 #define DISCOVERY_SPIx_GPIO_FORCE_RESET() __HAL_RCC_SPI2_FORCE_RESET()
Jerome Coutant 1:917af0ca86df 265 #define DISCOVERY_SPIx_GPIO_RELEASE_RESET() __HAL_RCC_SPI2_RELEASE_RESET()
Jerome Coutant 1:917af0ca86df 266 #define DISCOVERY_SPIx_SCK_PIN GPIO_PIN_1 /* PD.01*/
Jerome Coutant 1:917af0ca86df 267 #define DISCOVERY_SPIx_MISO_PIN GPIO_PIN_3 /* PD.03 */
Jerome Coutant 1:917af0ca86df 268 #define DISCOVERY_SPIx_MOSI_PIN GPIO_PIN_4 /* PD.04 */
Jerome Coutant 1:917af0ca86df 269
Jerome Coutant 1:917af0ca86df 270 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
Jerome Coutant 1:917af0ca86df 271 on accurate values, they just guarantee that the application will not remain
Jerome Coutant 1:917af0ca86df 272 stuck if the SPI communication is corrupted.
Jerome Coutant 1:917af0ca86df 273 You may modify these timeout values depending on CPU frequency and application
Jerome Coutant 1:917af0ca86df 274 conditions (interrupts routines ...). */
Jerome Coutant 1:917af0ca86df 275 #define SPIx_TIMEOUT_MAX ((uint32_t)0x1000)
Jerome Coutant 1:917af0ca86df 276 /* Read/Write command */
bcostm 3:4c7d003a8259 277 #define READWRITE_CMD ((uint8_t)0x80)
bcostm 3:4c7d003a8259 278 /* Multiple byte read/write command */
Jerome Coutant 1:917af0ca86df 279 #define MULTIPLEBYTE_CMD ((uint8_t)0x40)
Jerome Coutant 1:917af0ca86df 280 /* Dummy Byte Send by the SPI Master device in order to generate the Clock to the Slave device */
Jerome Coutant 1:917af0ca86df 281 #define DUMMY_BYTE ((uint8_t)0x00)
Jerome Coutant 1:917af0ca86df 282
Jerome Coutant 1:917af0ca86df 283 #endif /* HAL_SPI_MODULE_ENABLED */
Jerome Coutant 1:917af0ca86df 284
Jerome Coutant 1:917af0ca86df 285 #if defined(HAL_I2C_MODULE_ENABLED)
Jerome Coutant 1:917af0ca86df 286 /*##################### I2C1 ###################################*/
bcostm 3:4c7d003a8259 287 /* User can use this section to tailor I2C1 instance used and associated
Jerome Coutant 1:917af0ca86df 288 resources */
Jerome Coutant 1:917af0ca86df 289 /* Definition for I2C1 Pins */
Jerome Coutant 1:917af0ca86df 290 #define DISCOVERY_I2C1_SCL_GPIO_PORT GPIOB
Jerome Coutant 1:917af0ca86df 291 #define DISCOVERY_I2C1_SDA_GPIO_PORT GPIOB
Jerome Coutant 1:917af0ca86df 292 #if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
Jerome Coutant 1:917af0ca86df 293 #define DISCOVERY_I2C1_SCL_PIN GPIO_PIN_6
Jerome Coutant 1:917af0ca86df 294 #define DISCOVERY_I2C1_SDA_PIN GPIO_PIN_7
Jerome Coutant 1:917af0ca86df 295 #elif defined (USE_STM32L476G_DISCO_REVA)
Jerome Coutant 1:917af0ca86df 296 #define DISCOVERY_I2C1_SCL_PIN GPIO_PIN_8
Jerome Coutant 1:917af0ca86df 297 #define DISCOVERY_I2C1_SDA_PIN GPIO_PIN_9
Jerome Coutant 1:917af0ca86df 298 #endif
Jerome Coutant 1:917af0ca86df 299 #define DISCOVERY_I2C1_SCL_SDA_AF GPIO_AF4_I2C1
Jerome Coutant 1:917af0ca86df 300
Jerome Coutant 1:917af0ca86df 301 /* Definition for I2C1 clock resources */
Jerome Coutant 1:917af0ca86df 302 #define DISCOVERY_I2C1 I2C1
Jerome Coutant 1:917af0ca86df 303 #define DISCOVERY_I2C1_CLK_ENABLE() __HAL_RCC_I2C1_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 304 #define DISCOVERY_I2C1_CLK_DISABLE() __HAL_RCC_I2C1_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 305 #define DISCOVERY_I2C1_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 306 #define DISCOVERY_I2C1_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 307 #define DISCOVERY_I2C1_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 308 #define DISCOVERY_I2C1_SCL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 309 #define DISCOVERY_I2C1_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
Jerome Coutant 1:917af0ca86df 310 #define DISCOVERY_I2C1_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
bcostm 3:4c7d003a8259 311
Jerome Coutant 1:917af0ca86df 312 /* Definition for I2C1's NVIC */
Jerome Coutant 1:917af0ca86df 313 #define DISCOVERY_I2C1_EV_IRQn I2C1_EV_IRQn
Jerome Coutant 1:917af0ca86df 314 #define DISCOVERY_I2C1_EV_IRQHandler I2C1_EV_IRQHandler
Jerome Coutant 1:917af0ca86df 315 #define DISCOVERY_I2C1_ER_IRQn I2C1_ER_IRQn
Jerome Coutant 1:917af0ca86df 316 #define DISCOVERY_I2C1_ER_IRQHandler I2C1_ER_IRQHandler
Jerome Coutant 1:917af0ca86df 317
Jerome Coutant 1:917af0ca86df 318 /* I2C TIMING Register define when I2C clock source is SYSCLK */
Jerome Coutant 1:917af0ca86df 319 /* I2C TIMING is calculated in case of the I2C Clock source is the SYSCLK = 80 MHz */
Jerome Coutant 1:917af0ca86df 320 /* Set 0x90112626 value to reach 100 KHz speed (Rise time = 640ns, Fall time = 20ns) */
Jerome Coutant 1:917af0ca86df 321 #ifndef DISCOVERY_I2C1_TIMING
bcostm 3:4c7d003a8259 322 #define DISCOVERY_I2C1_TIMING 0x90112626
Jerome Coutant 1:917af0ca86df 323 #endif /* DISCOVERY_I2C1_TIMING */
Jerome Coutant 1:917af0ca86df 324
bcostm 3:4c7d003a8259 325 /* I2C clock speed configuration (in Hz)
bcostm 3:4c7d003a8259 326 WARNING:
bcostm 3:4c7d003a8259 327 Make sure that this define is not already declared in other files (ie.
Jerome Coutant 1:917af0ca86df 328 stm324xg_discovery.h file). It can be used in parallel by other modules. */
Jerome Coutant 1:917af0ca86df 329 #ifndef BSP_I2C_SPEED
bcostm 3:4c7d003a8259 330 #define BSP_I2C_SPEED 100000
Jerome Coutant 1:917af0ca86df 331 #endif /* BSP_I2C_SPEED */
Jerome Coutant 1:917af0ca86df 332
Jerome Coutant 1:917af0ca86df 333
Jerome Coutant 1:917af0ca86df 334 /* Audio codec I2C address */
Jerome Coutant 1:917af0ca86df 335 #define AUDIO_I2C_ADDRESS ((uint16_t) 0x94)
Jerome Coutant 1:917af0ca86df 336
Jerome Coutant 1:917af0ca86df 337 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
Jerome Coutant 1:917af0ca86df 338 on accurate values, they just guarantee that the application will not remain
Jerome Coutant 1:917af0ca86df 339 stuck if the I2C communication is corrupted.
Jerome Coutant 1:917af0ca86df 340 You may modify these timeout values depending on CPU frequency and application
bcostm 3:4c7d003a8259 341 conditions (interrupts routines ...). */
Jerome Coutant 1:917af0ca86df 342 #define DISCOVERY_I2C1_TIMEOUT_MAX 3000
Jerome Coutant 1:917af0ca86df 343
Jerome Coutant 1:917af0ca86df 344
Jerome Coutant 1:917af0ca86df 345 /*##################### I2C2 ###################################*/
bcostm 3:4c7d003a8259 346 /* User can use this section to tailor I2C2 instance used and associated
Jerome Coutant 1:917af0ca86df 347 resources */
Jerome Coutant 1:917af0ca86df 348 /* Definition for I2C2 Pins */
Jerome Coutant 1:917af0ca86df 349 #define DISCOVERY_I2C2_SCL_PIN GPIO_PIN_10
Jerome Coutant 1:917af0ca86df 350 #define DISCOVERY_I2C2_SCL_GPIO_PORT GPIOB
Jerome Coutant 1:917af0ca86df 351 #define DISCOVERY_I2C2_SDA_PIN GPIO_PIN_11
Jerome Coutant 1:917af0ca86df 352 #define DISCOVERY_I2C2_SDA_GPIO_PORT GPIOB
Jerome Coutant 1:917af0ca86df 353 #define DISCOVERY_I2C2_SCL_SDA_AF GPIO_AF4_I2C2
Jerome Coutant 1:917af0ca86df 354 /* Definition for I2C2 clock resources */
Jerome Coutant 1:917af0ca86df 355 #define DISCOVERY_I2C2 I2C2
Jerome Coutant 1:917af0ca86df 356 #define DISCOVERY_I2C2_CLK_ENABLE() __HAL_RCC_I2C2_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 357 #define DISCOVERY_I2C2_CLK_DISABLE() __HAL_RCC_I2C2_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 358 #define DISCOVERY_I2C2_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 359 #define DISCOVERY_I2C2_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 360 #define DISCOVERY_I2C2_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 361 #define DISCOVERY_I2C2_SCL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 362 #define DISCOVERY_I2C2_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
Jerome Coutant 1:917af0ca86df 363 #define DISCOVERY_I2C2_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
bcostm 3:4c7d003a8259 364
Jerome Coutant 1:917af0ca86df 365 /* Definition for I2C2's NVIC */
Jerome Coutant 1:917af0ca86df 366 #define DISCOVERY_I2C2_EV_IRQn I2C2_EV_IRQn
Jerome Coutant 1:917af0ca86df 367 #define DISCOVERY_I2C2_ER_IRQn I2C2_ER_IRQn
Jerome Coutant 1:917af0ca86df 368
Jerome Coutant 1:917af0ca86df 369 /* I2C TIMING Register define when I2C clock source is SYSCLK */
Jerome Coutant 1:917af0ca86df 370 /* I2C TIMING is calculated in case of the I2C Clock source is the SYSCLK = 80 MHz */
Jerome Coutant 1:917af0ca86df 371 /* Set 0x90112626 value to reach 100 KHz speed (Rise time = 640ns, Fall time = 20ns) */
Jerome Coutant 1:917af0ca86df 372 #ifndef DISCOVERY_I2C2_TIMING
bcostm 3:4c7d003a8259 373 #define DISCOVERY_I2C2_TIMING 0x90112626
Jerome Coutant 1:917af0ca86df 374 #endif /* DISCOVERY_I2C2_TIMING */
Jerome Coutant 1:917af0ca86df 375
bcostm 3:4c7d003a8259 376 /* I2C clock speed configuration (in Hz)
bcostm 3:4c7d003a8259 377 WARNING:
bcostm 3:4c7d003a8259 378 Make sure that this define is not already declared in other files (ie.
Jerome Coutant 1:917af0ca86df 379 stm324xg_discovery.h file). It can be used in parallel by other modules. */
Jerome Coutant 1:917af0ca86df 380 #ifndef BSP_I2C_SPEED
bcostm 3:4c7d003a8259 381 #define BSP_I2C_SPEED 100000
Jerome Coutant 1:917af0ca86df 382 #endif /* BSP_I2C_SPEED */
Jerome Coutant 1:917af0ca86df 383
Jerome Coutant 1:917af0ca86df 384 #define IDD_I2C_ADDRESS ((uint16_t) 0x84)
Jerome Coutant 1:917af0ca86df 385
Jerome Coutant 1:917af0ca86df 386 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
Jerome Coutant 1:917af0ca86df 387 on accurate values, they just guarantee that the application will not remain
Jerome Coutant 1:917af0ca86df 388 stuck if the I2C communication is corrupted.
Jerome Coutant 1:917af0ca86df 389 You may modify these timeout values depending on CPU frequency and application
bcostm 3:4c7d003a8259 390 conditions (interrupts routines ...). */
Jerome Coutant 1:917af0ca86df 391 #define DISCOVERY_I2C2_TIMEOUT_MAX 3000
Jerome Coutant 1:917af0ca86df 392 #endif /* HAL_I2C_MODULE_ENABLED */
Jerome Coutant 1:917af0ca86df 393
Jerome Coutant 1:917af0ca86df 394 /*##################### Accelerometer ##########################*/
Jerome Coutant 1:917af0ca86df 395 /**
Jerome Coutant 1:917af0ca86df 396 * @brief Accelerometer Chip Select macro definition
Jerome Coutant 1:917af0ca86df 397 */
Jerome Coutant 1:917af0ca86df 398 #define ACCELERO_CS_LOW() HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_RESET)
Jerome Coutant 1:917af0ca86df 399 #define ACCELERO_CS_HIGH() HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_SET)
Jerome Coutant 1:917af0ca86df 400
Jerome Coutant 1:917af0ca86df 401 /**
Jerome Coutant 1:917af0ca86df 402 * @brief Accelerometer SPI Interface pins
Jerome Coutant 1:917af0ca86df 403 */
Jerome Coutant 1:917af0ca86df 404 #define ACCELERO_CS_GPIO_PORT GPIOE /* GPIOE */
Jerome Coutant 1:917af0ca86df 405 #define ACCELERO_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 406 #define ACCELERO_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 407 #define ACCELERO_CS_PIN GPIO_PIN_0 /* PE.00 */
Jerome Coutant 1:917af0ca86df 408
Jerome Coutant 1:917af0ca86df 409 /**
Jerome Coutant 1:917af0ca86df 410 * @brief Accelerometer Interrupt pins
Jerome Coutant 1:917af0ca86df 411 */
Jerome Coutant 1:917af0ca86df 412 #define ACCELERO_XLINT_GPIO_PORT GPIOE /* GPIOE */
Jerome Coutant 1:917af0ca86df 413 #define ACCELERO_XLINT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 414 #define ACCELERO_XLINT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 415 #define ACCELERO_XLINT_PIN GPIO_PIN_1 /* PE.01 */
Jerome Coutant 1:917af0ca86df 416 #define ACCELERO_XLINT_EXTI_IRQn EXTI1_IRQn
Jerome Coutant 1:917af0ca86df 417
Jerome Coutant 1:917af0ca86df 418 /*##################### Magnetometer ##########################*/
Jerome Coutant 1:917af0ca86df 419 /**
Jerome Coutant 1:917af0ca86df 420 * @brief Magnetometer Chip Select macro definition
Jerome Coutant 1:917af0ca86df 421 */
Jerome Coutant 1:917af0ca86df 422 #define MAGNETO_CS_LOW() HAL_GPIO_WritePin(MAGNETO_CS_GPIO_PORT, MAGNETO_CS_PIN, GPIO_PIN_RESET)
Jerome Coutant 1:917af0ca86df 423 #define MAGNETO_CS_HIGH() HAL_GPIO_WritePin(MAGNETO_CS_GPIO_PORT, MAGNETO_CS_PIN, GPIO_PIN_SET)
Jerome Coutant 1:917af0ca86df 424
Jerome Coutant 1:917af0ca86df 425 /**
Jerome Coutant 1:917af0ca86df 426 * @brief Magnetometer SPI Interface pins
Jerome Coutant 1:917af0ca86df 427 */
Jerome Coutant 1:917af0ca86df 428 #define MAGNETO_CS_GPIO_PORT GPIOC /* GPIOC */
Jerome Coutant 1:917af0ca86df 429 #define MAGNETO_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 430 #define MAGNETO_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 431 #define MAGNETO_CS_PIN GPIO_PIN_0 /* PC.00 */
Jerome Coutant 1:917af0ca86df 432
Jerome Coutant 1:917af0ca86df 433
Jerome Coutant 1:917af0ca86df 434 /**
Jerome Coutant 1:917af0ca86df 435 * @brief Magnetometer Interrupt pins
Jerome Coutant 1:917af0ca86df 436 */
Jerome Coutant 1:917af0ca86df 437 #define MAGNETO_INT_GPIO_PORT GPIOC /* GPIOC */
Jerome Coutant 1:917af0ca86df 438 #define MAGNETO_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 439 #define MAGNETO_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 440 #define MAGNETO_INT1_PIN GPIO_PIN_1 /* PC.01 */
Jerome Coutant 1:917af0ca86df 441 #define MAGNETO_INT1_EXTI_IRQn EXTI1_IRQn
Jerome Coutant 1:917af0ca86df 442
Jerome Coutant 1:917af0ca86df 443 #define MAGNETO_DRDY_GPIO_PORT GPIOC /* GPIOC */
Jerome Coutant 1:917af0ca86df 444 #define MAGNETO_DRDY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 445 #define MAGNETO_DRDY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 446 #define MAGNETO_DRDY_PIN GPIO_PIN_2 /* PC.01 */
Jerome Coutant 1:917af0ca86df 447
Jerome Coutant 1:917af0ca86df 448
Jerome Coutant 1:917af0ca86df 449 /*##################### Audio Codec ##########################*/
Jerome Coutant 1:917af0ca86df 450 /**
Jerome Coutant 1:917af0ca86df 451 * @brief Audio codec chip reset definition
Jerome Coutant 1:917af0ca86df 452 */
Jerome Coutant 1:917af0ca86df 453 /* Audio codec power on/off macro definition */
Jerome Coutant 1:917af0ca86df 454 #define CODEC_AUDIO_POWER_OFF() HAL_GPIO_WritePin(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, GPIO_PIN_RESET)
Jerome Coutant 1:917af0ca86df 455 #define CODEC_AUDIO_POWER_ON() HAL_GPIO_WritePin(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, GPIO_PIN_SET)
Jerome Coutant 1:917af0ca86df 456
Jerome Coutant 1:917af0ca86df 457 /* Audio Reset Pin definition */
Jerome Coutant 1:917af0ca86df 458 #define AUDIO_RESET_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 459 #define AUDIO_RESET_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 460 #define AUDIO_RESET_PIN GPIO_PIN_3
Jerome Coutant 1:917af0ca86df 461 #define AUDIO_RESET_GPIO GPIOE
Jerome Coutant 1:917af0ca86df 462
Jerome Coutant 1:917af0ca86df 463 /*##################### Gyroscope ##########################*/
Jerome Coutant 1:917af0ca86df 464 /**
Jerome Coutant 1:917af0ca86df 465 * @brief Gyroscope Chip Select macro definition
Jerome Coutant 1:917af0ca86df 466 */
Jerome Coutant 1:917af0ca86df 467 #define GYRO_CS_LOW() HAL_GPIO_WritePin(GYRO_CS_GPIO_PORT, GYRO_CS_PIN, GPIO_PIN_RESET)
Jerome Coutant 1:917af0ca86df 468 #define GYRO_CS_HIGH() HAL_GPIO_WritePin(GYRO_CS_GPIO_PORT, GYRO_CS_PIN, GPIO_PIN_SET)
bcostm 3:4c7d003a8259 469
Jerome Coutant 1:917af0ca86df 470 /**
Jerome Coutant 1:917af0ca86df 471 * @brief Gyroscope SPI Interface pins
Jerome Coutant 1:917af0ca86df 472 */
Jerome Coutant 1:917af0ca86df 473 #define GYRO_CS_GPIO_PORT GPIOD /* GPIOD */
Jerome Coutant 1:917af0ca86df 474 #define GYRO_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 475 #define GYRO_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 476 #define GYRO_CS_PIN GPIO_PIN_7 /* PD.07 */
Jerome Coutant 1:917af0ca86df 477
Jerome Coutant 1:917af0ca86df 478 /**
Jerome Coutant 1:917af0ca86df 479 * @brief Gyroscope Interrupt pins
Jerome Coutant 1:917af0ca86df 480 */
Jerome Coutant 1:917af0ca86df 481 #if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
Jerome Coutant 1:917af0ca86df 482 #define GYRO_INT1_GPIO_PORT GPIOD /* GPIOD */
Jerome Coutant 1:917af0ca86df 483 #define GYRO_INT1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 484 #define GYRO_INT1_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 485 #define GYRO_INT1_PIN GPIO_PIN_2 /* PD.02 */
Jerome Coutant 1:917af0ca86df 486 #define GYRO_INT1_EXTI_IRQn EXTI2_IRQn
Jerome Coutant 1:917af0ca86df 487 #define GYRO_INT2_GPIO_PORT GPIOB /* GPIOB */
Jerome Coutant 1:917af0ca86df 488 #define GYRO_INT2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 489 #define GYRO_INT2_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 490 #define GYRO_INT2_PIN GPIO_PIN_8 /* PB.08 */
Jerome Coutant 1:917af0ca86df 491 #define GYRO_INT2_EXTI_IRQn EXTI9_5_IRQn
Jerome Coutant 1:917af0ca86df 492 #elif defined (USE_STM32L476G_DISCO_REVA)
Jerome Coutant 1:917af0ca86df 493 #define GYRO_INT1_GPIO_PORT GPIOB /* GPIOB */
Jerome Coutant 1:917af0ca86df 494 #define GYRO_INT1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 495 #define GYRO_INT1_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 496 #define GYRO_INT1_PIN GPIO_PIN_6 /* PB.06 */
Jerome Coutant 1:917af0ca86df 497 #define GYRO_INT1_EXTI_IRQn EXTI9_5_IRQn
Jerome Coutant 1:917af0ca86df 498 #define GYRO_INT2_GPIO_PORT GPIOB /* GPIOB */
Jerome Coutant 1:917af0ca86df 499 #define GYRO_INT2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 500 #define GYRO_INT2_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 501 #define GYRO_INT2_PIN GPIO_PIN_7 /* PB.07 */
Jerome Coutant 1:917af0ca86df 502 #define GYRO_INT2_EXTI_IRQn EXTI9_5_IRQn
Jerome Coutant 1:917af0ca86df 503 #endif
Jerome Coutant 1:917af0ca86df 504
Jerome Coutant 1:917af0ca86df 505 /*##################### Idd ##########################*/
Jerome Coutant 1:917af0ca86df 506 /**
Jerome Coutant 1:917af0ca86df 507 * @brief Idd current measurement interface pins
Jerome Coutant 1:917af0ca86df 508 */
Jerome Coutant 1:917af0ca86df 509 #define IDD_INT_GPIO_PORT GPIOC /* GPIOC */
Jerome Coutant 1:917af0ca86df 510 #define IDD_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 511 #define IDD_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 512 #define IDD_INT_PIN GPIO_PIN_13 /* PC.13 */
Jerome Coutant 1:917af0ca86df 513 #define IDD_INT_EXTI_IRQn EXTI15_10_IRQn
Jerome Coutant 1:917af0ca86df 514
Jerome Coutant 1:917af0ca86df 515 #define IDD_WAKEUP_GPIO_PORT GPIOA /* GPIOA */
Jerome Coutant 1:917af0ca86df 516 #define IDD_WAKEUP_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
Jerome Coutant 1:917af0ca86df 517 #define IDD_WAKEUP_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
Jerome Coutant 1:917af0ca86df 518 #define IDD_WAKEUP_PIN GPIO_PIN_4 /* PA.04 */
Jerome Coutant 1:917af0ca86df 519
Jerome Coutant 1:917af0ca86df 520 /**
Jerome Coutant 1:917af0ca86df 521 * @}
Jerome Coutant 1:917af0ca86df 522 */
Jerome Coutant 1:917af0ca86df 523
Jerome Coutant 1:917af0ca86df 524 /**
Jerome Coutant 1:917af0ca86df 525 * @}
Jerome Coutant 1:917af0ca86df 526 */
Jerome Coutant 1:917af0ca86df 527
Jerome Coutant 1:917af0ca86df 528
Jerome Coutant 1:917af0ca86df 529 /** @defgroup STM32L476G_DISCOVERY_Exported_Functions Exported Functions
Jerome Coutant 1:917af0ca86df 530 * @{
Jerome Coutant 1:917af0ca86df 531 */
Jerome Coutant 1:917af0ca86df 532 uint32_t BSP_GetVersion(void);
Jerome Coutant 1:917af0ca86df 533 SupplyMode_TypeDef BSP_SupplyModeDetection(void);
Jerome Coutant 1:917af0ca86df 534 void BSP_LED_Init(Led_TypeDef Led);
Jerome Coutant 1:917af0ca86df 535 void BSP_LED_DeInit(Led_TypeDef Led);
Jerome Coutant 1:917af0ca86df 536 void BSP_LED_On(Led_TypeDef Led);
Jerome Coutant 1:917af0ca86df 537 void BSP_LED_Off(Led_TypeDef Led);
Jerome Coutant 1:917af0ca86df 538 void BSP_LED_Toggle(Led_TypeDef Led);
Jerome Coutant 1:917af0ca86df 539 uint8_t BSP_JOY_Init(JOYMode_TypeDef Joy_Mode);
Jerome Coutant 1:917af0ca86df 540 void BSP_JOY_DeInit(void);
Jerome Coutant 1:917af0ca86df 541 JOYState_TypeDef BSP_JOY_GetState(void);
Jerome Coutant 1:917af0ca86df 542
Jerome Coutant 1:917af0ca86df 543 /**
Jerome Coutant 1:917af0ca86df 544 * @}
Jerome Coutant 1:917af0ca86df 545 */
Jerome Coutant 1:917af0ca86df 546
Jerome Coutant 1:917af0ca86df 547 /**
Jerome Coutant 1:917af0ca86df 548 * @}
Jerome Coutant 1:917af0ca86df 549 */
Jerome Coutant 1:917af0ca86df 550
Jerome Coutant 1:917af0ca86df 551 /**
Jerome Coutant 1:917af0ca86df 552 * @}
Jerome Coutant 1:917af0ca86df 553 */
Jerome Coutant 1:917af0ca86df 554
Jerome Coutant 1:917af0ca86df 555 /**
Jerome Coutant 1:917af0ca86df 556 * @}
Jerome Coutant 1:917af0ca86df 557 */
Jerome Coutant 1:917af0ca86df 558
Jerome Coutant 1:917af0ca86df 559 #ifdef __cplusplus
Jerome Coutant 1:917af0ca86df 560 }
Jerome Coutant 1:917af0ca86df 561 #endif
Jerome Coutant 1:917af0ca86df 562
Jerome Coutant 1:917af0ca86df 563 #endif /* __STM32L476G_DISCOVERY_H */
Jerome Coutant 1:917af0ca86df 564
Jerome Coutant 1:917af0ca86df 565 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/