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Drivers/BSP/STM32L476G-Discovery/stm32l476g_discovery.h@3:4c7d003a8259, 2018-01-17 (annotated)
- Committer:
- bcostm
- Date:
- Wed Jan 17 14:57:52 2018 +0100
- Revision:
- 3:4c7d003a8259
- Parent:
- 1:917af0ca86df
- Child:
- 5:4943b15cce9f
Update BSP files with CubeL4 V1.11.0
Who changed what in which revision?
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/**
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******************************************************************************
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* @file stm32l476g_discovery.h
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* @author MCD Application Team
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| bcostm | 3:4c7d003a8259 | 5 | * @brief This file contains definitions for STM32L476G_DISCOVERY's LEDs, |
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* push-buttons hardware resources (MB1184).
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L476G_DISCOVERY_H
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#define __STM32L476G_DISCOVERY_H
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#ifdef __cplusplus
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| bcostm | 3:4c7d003a8259 | 42 | extern "C" { |
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#endif
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| bcostm | 3:4c7d003a8259 | 45 | /** |
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* @brief Define for STM32L476G_DISCOVERY board
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*/
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#if !defined (USE_STM32L476G_DISCO_REVC) && !defined (USE_STM32L476G_DISCO_REVB) && !defined (USE_STM32L476G_DISCO_REVA)
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#define USE_STM32L476G_DISCO_REVC
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_hal.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM32L476G_DISCOVERY
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* @{
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*/
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/** @addtogroup STM32L476G_DISCOVERY_Common
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* @{
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*/
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/** @defgroup STM32L476G_DISCOVERY_Exported_Types Exported Types
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* @{
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*/
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/**
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* @brief LED Types Definition
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*/
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#if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
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typedef enum
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{
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DISCO_LED4 = 0,
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DISCO_LED5 = 1,
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LED_RED = DISCO_LED4,
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LED_GREEN = DISCO_LED5
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| bcostm | 3:4c7d003a8259 | 82 | } |
| bcostm | 3:4c7d003a8259 | 83 | Led_TypeDef; |
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#elif defined (USE_STM32L476G_DISCO_REVA)
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typedef enum
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{
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DISCO_LED3 = 0,
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DISCO_LED4 = 1,
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LED_RED = DISCO_LED3,
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LED_GREEN = DISCO_LED4
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| bcostm | 3:4c7d003a8259 | 91 | } |
| bcostm | 3:4c7d003a8259 | 92 | Led_TypeDef; |
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#endif
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/**
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* @brief JOYSTICK Types Definition
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*/
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| bcostm | 3:4c7d003a8259 | 98 | typedef enum |
| bcostm | 3:4c7d003a8259 | 99 | { |
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JOY_SEL = 0,
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JOY_LEFT = 1,
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JOY_RIGHT = 2,
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JOY_DOWN = 3,
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JOY_UP = 4,
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JOY_NONE = 5
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| bcostm | 3:4c7d003a8259 | 106 | } JOYState_TypeDef; |
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| bcostm | 3:4c7d003a8259 | 108 | typedef enum |
| bcostm | 3:4c7d003a8259 | 109 | { |
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JOY_MODE_GPIO = 0,
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JOY_MODE_EXTI = 1
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| bcostm | 3:4c7d003a8259 | 112 | } JOYMode_TypeDef; |
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| bcostm | 3:4c7d003a8259 | 114 | typedef enum |
| bcostm | 3:4c7d003a8259 | 115 | { |
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SUPPLY_MODE_ERROR = 0,
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SUPPLY_MODE_EXTERNAL = 1,
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SUPPLY_MODE_BATTERY = 2
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| bcostm | 3:4c7d003a8259 | 119 | } SupplyMode_TypeDef; |
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/**
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* @}
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*/
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/** @defgroup STM32L476G_DISCOVERY_Exported_Constants Exported Constants
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* @{
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*/
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/** @defgroup STM32L476G_DISCOVERY_BATTERY BATTERY Detection Constants
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* @{
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*/
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#define BATTERY_DETECTION_PIN GPIO_PIN_3
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#define BATTERY_DETECTION_GPIO_PORT GPIOB
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#define BATTERY_DETECTION_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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#define BATTERY_DETECTION_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
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/**
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* @}
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| bcostm | 3:4c7d003a8259 | 138 | */ |
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/** @defgroup STM32L476G_DISCOVERY_LED LED Constants
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*/
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#define LEDn 2
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#if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
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#define LED4_PIN GPIO_PIN_2
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#define LED4_GPIO_PORT GPIOB
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#define LED4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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#define LED4_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
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#define LED5_PIN GPIO_PIN_8
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#define LED5_GPIO_PORT GPIOE
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#define LED5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
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#define LED5_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
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#define LEDx_GPIO_CLK_ENABLE(__LED__) do { if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_ENABLE(); } else \
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if((__LED__) == DISCO_LED5) { LED5_GPIO_CLK_ENABLE(); } } while(0)
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#define LEDx_GPIO_CLK_DISABLE(__LED__) do { if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_DISABLE(); } else \
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if((__LED__) == DISCO_LED5) { LED5_GPIO_CLK_DISABLE(); } } while(0)
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#elif defined (USE_STM32L476G_DISCO_REVA)
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#define LED3_PIN GPIO_PIN_2
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#define LED3_GPIO_PORT GPIOB
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#define LED3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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#define LED3_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
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#define LED4_PIN GPIO_PIN_8
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#define LED4_GPIO_PORT GPIOE
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#define LED4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
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#define LED4_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
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#define LEDx_GPIO_CLK_ENABLE(__LED__) do { if((__LED__) == DISCO_LED3) { LED3_GPIO_CLK_ENABLE(); } else \
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if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_ENABLE(); } } while(0)
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#define LEDx_GPIO_CLK_DISABLE(__LED__) do { if((__LED__) == DISCO_LED3) { LED3_GPIO_CLK_DISABLE(); } else \
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if((__LED__) == DISCO_LED4) { LED4_GPIO_CLK_DISABLE(); } } while(0)
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#endif
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/**
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* @}
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*/
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/** @defgroup STM32L476G_DISCOVERY_BUTTON BUTTON Constants
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* @{
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*/
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#define JOYn 5
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/**
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* @brief Joystick Right push-button
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*/
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#define RIGHT_JOY_PIN GPIO_PIN_2 /* PA.02 */
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#define RIGHT_JOY_GPIO_PORT GPIOA
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#define RIGHT_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define RIGHT_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
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#define RIGHT_JOY_EXTI_IRQn EXTI2_IRQn
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/**
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* @brief Joystick Left push-button
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*/
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#define LEFT_JOY_PIN GPIO_PIN_1 /* PA.01 */
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#define LEFT_JOY_GPIO_PORT GPIOA
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#define LEFT_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define LEFT_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
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/**
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* @brief Joystick Up push-button
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*/
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#define UP_JOY_PIN GPIO_PIN_3 /* PA.03 */
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#define UP_JOY_GPIO_PORT GPIOA
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#define UP_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define UP_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
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#define UP_JOY_EXTI_IRQn EXTI3_IRQn
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/**
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* @brief Joystick Down push-button
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| bcostm | 3:4c7d003a8259 | 218 | */ |
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#define DOWN_JOY_PIN GPIO_PIN_5 /* PA.05 */
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#define DOWN_JOY_GPIO_PORT GPIOA
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#define DOWN_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define DOWN_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
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#define DOWN_JOY_EXTI_IRQn EXTI9_5_IRQn
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/**
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* @brief Joystick Sel push-button
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*/
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#define SEL_JOY_PIN GPIO_PIN_0 /* PA.00 */
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#define SEL_JOY_GPIO_PORT GPIOA
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#define SEL_JOY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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#define SEL_JOY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
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| bcostm | 3:4c7d003a8259 | 232 | #define SEL_JOY_EXTI_IRQn EXTI0_IRQn |
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#define JOYx_GPIO_CLK_ENABLE(__JOY__) do { if((__JOY__) == JOY_SEL) { SEL_JOY_GPIO_CLK_ENABLE(); } else \
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if((__JOY__) == JOY_DOWN) { DOWN_JOY_GPIO_CLK_ENABLE(); } else \
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if((__JOY__) == JOY_LEFT) { LEFT_JOY_GPIO_CLK_ENABLE(); } else \
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if((__JOY__) == JOY_RIGHT) { RIGHT_JOY_GPIO_CLK_ENABLE(); } else \
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if((__JOY__) == JOY_UP) { UP_JOY_GPIO_CLK_ENABLE(); } } while(0)
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#define JOYx_GPIO_CLK_DISABLE(__JOY__) do { if((__JOY__) == JOY_SEL) { SEL_JOY_GPIO_CLK_DISABLE(); } else \
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if((__JOY__) == JOY_DOWN) { DOWN_JOY_GPIO_CLK_DISABLE(); } else \
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if((__JOY__) == JOY_LEFT) { LEFT_JOY_GPIO_CLK_DISABLE(); } else \
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if((__JOY__) == JOY_RIGHT) { RIGHT_JOY_GPIO_CLK_DISABLE(); } else \
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if((__JOY__) == JOY_UP) { UP_JOY_GPIO_CLK_DISABLE(); } } while(0)
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#define JOY_ALL_PINS (RIGHT_JOY_PIN | LEFT_JOY_PIN | UP_JOY_PIN | DOWN_JOY_PIN | SEL_JOY_PIN)
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/**
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* @}
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*/
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/** @defgroup STM32L476G_DISCOVERY_BUS BUS Constants
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* @{
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*/
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#if defined(HAL_SPI_MODULE_ENABLED)
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/*##################### SPI2 ###################################*/
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#define DISCOVERY_SPIx SPI2
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#define DISCOVERY_SPIx_CLOCK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
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#define DISCOVERY_SPIx_CLOCK_DISABLE() __HAL_RCC_SPI2_CLK_DISABLE()
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#define DISCOVERY_SPIx_GPIO_PORT GPIOD /* GPIOD */
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#define DISCOVERY_SPIx_AF GPIO_AF5_SPI2
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#define DISCOVERY_SPIx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
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#define DISCOVERY_SPIx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
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#define DISCOVERY_SPIx_GPIO_FORCE_RESET() __HAL_RCC_SPI2_FORCE_RESET()
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#define DISCOVERY_SPIx_GPIO_RELEASE_RESET() __HAL_RCC_SPI2_RELEASE_RESET()
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|
#define DISCOVERY_SPIx_SCK_PIN GPIO_PIN_1 /* PD.01*/
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#define DISCOVERY_SPIx_MISO_PIN GPIO_PIN_3 /* PD.03 */
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|
#define DISCOVERY_SPIx_MOSI_PIN GPIO_PIN_4 /* PD.04 */
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|
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|
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
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|
on accurate values, they just guarantee that the application will not remain
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stuck if the SPI communication is corrupted.
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You may modify these timeout values depending on CPU frequency and application
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conditions (interrupts routines ...). */
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#define SPIx_TIMEOUT_MAX ((uint32_t)0x1000)
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/* Read/Write command */
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|
| bcostm | 3:4c7d003a8259 | 277 | #define READWRITE_CMD ((uint8_t)0x80) |
| bcostm | 3:4c7d003a8259 | 278 | /* Multiple byte read/write command */ |
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#define MULTIPLEBYTE_CMD ((uint8_t)0x40)
|
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280
|
/* Dummy Byte Send by the SPI Master device in order to generate the Clock to the Slave device */
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|
#define DUMMY_BYTE ((uint8_t)0x00)
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|
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#endif /* HAL_SPI_MODULE_ENABLED */
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|
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#if defined(HAL_I2C_MODULE_ENABLED)
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|
/*##################### I2C1 ###################################*/
|
|
| bcostm | 3:4c7d003a8259 | 287 | /* User can use this section to tailor I2C1 instance used and associated |
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|
resources */
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/* Definition for I2C1 Pins */
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|
#define DISCOVERY_I2C1_SCL_GPIO_PORT GPIOB
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|
#define DISCOVERY_I2C1_SDA_GPIO_PORT GPIOB
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|
#if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
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#define DISCOVERY_I2C1_SCL_PIN GPIO_PIN_6
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#define DISCOVERY_I2C1_SDA_PIN GPIO_PIN_7
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|
#elif defined (USE_STM32L476G_DISCO_REVA)
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#define DISCOVERY_I2C1_SCL_PIN GPIO_PIN_8
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#define DISCOVERY_I2C1_SDA_PIN GPIO_PIN_9
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298
|
#endif
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#define DISCOVERY_I2C1_SCL_SDA_AF GPIO_AF4_I2C1
|
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300
|
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301
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/* Definition for I2C1 clock resources */
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#define DISCOVERY_I2C1 I2C1
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#define DISCOVERY_I2C1_CLK_ENABLE() __HAL_RCC_I2C1_CLK_ENABLE()
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#define DISCOVERY_I2C1_CLK_DISABLE() __HAL_RCC_I2C1_CLK_DISABLE()
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#define DISCOVERY_I2C1_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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#define DISCOVERY_I2C1_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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#define DISCOVERY_I2C1_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
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#define DISCOVERY_I2C1_SCL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
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#define DISCOVERY_I2C1_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
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#define DISCOVERY_I2C1_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
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| bcostm | 3:4c7d003a8259 | 311 | |
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/* Definition for I2C1's NVIC */
|
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#define DISCOVERY_I2C1_EV_IRQn I2C1_EV_IRQn
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|
#define DISCOVERY_I2C1_EV_IRQHandler I2C1_EV_IRQHandler
|
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|
#define DISCOVERY_I2C1_ER_IRQn I2C1_ER_IRQn
|
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|
#define DISCOVERY_I2C1_ER_IRQHandler I2C1_ER_IRQHandler
|
|
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317
|
|
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318
|
/* I2C TIMING Register define when I2C clock source is SYSCLK */
|
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319
|
/* I2C TIMING is calculated in case of the I2C Clock source is the SYSCLK = 80 MHz */
|
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320
|
/* Set 0x90112626 value to reach 100 KHz speed (Rise time = 640ns, Fall time = 20ns) */
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|
#ifndef DISCOVERY_I2C1_TIMING
|
|
| bcostm | 3:4c7d003a8259 | 322 | #define DISCOVERY_I2C1_TIMING 0x90112626 |
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#endif /* DISCOVERY_I2C1_TIMING */
|
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324
|
|
|
| bcostm | 3:4c7d003a8259 | 325 | /* I2C clock speed configuration (in Hz) |
| bcostm | 3:4c7d003a8259 | 326 | WARNING: |
| bcostm | 3:4c7d003a8259 | 327 | Make sure that this define is not already declared in other files (ie. |
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328
|
stm324xg_discovery.h file). It can be used in parallel by other modules. */
|
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329
|
#ifndef BSP_I2C_SPEED
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|
| bcostm | 3:4c7d003a8259 | 330 | #define BSP_I2C_SPEED 100000 |
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331
|
#endif /* BSP_I2C_SPEED */
|
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332
|
|
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333
|
|
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334
|
/* Audio codec I2C address */
|
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|
#define AUDIO_I2C_ADDRESS ((uint16_t) 0x94)
|
|
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336
|
|
|
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337
|
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
|
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338
|
on accurate values, they just guarantee that the application will not remain
|
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339
|
stuck if the I2C communication is corrupted.
|
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340
|
You may modify these timeout values depending on CPU frequency and application
|
|
| bcostm | 3:4c7d003a8259 | 341 | conditions (interrupts routines ...). */ |
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|
#define DISCOVERY_I2C1_TIMEOUT_MAX 3000
|
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343
|
|
|
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344
|
|
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345
|
/*##################### I2C2 ###################################*/
|
|
| bcostm | 3:4c7d003a8259 | 346 | /* User can use this section to tailor I2C2 instance used and associated |
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347
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resources */
|
|
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348
|
/* Definition for I2C2 Pins */
|
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349
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#define DISCOVERY_I2C2_SCL_PIN GPIO_PIN_10
|
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350
|
#define DISCOVERY_I2C2_SCL_GPIO_PORT GPIOB
|
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351
|
#define DISCOVERY_I2C2_SDA_PIN GPIO_PIN_11
|
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352
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#define DISCOVERY_I2C2_SDA_GPIO_PORT GPIOB
|
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353
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#define DISCOVERY_I2C2_SCL_SDA_AF GPIO_AF4_I2C2
|
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1:917af0ca86df
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354
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/* Definition for I2C2 clock resources */
|
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355
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#define DISCOVERY_I2C2 I2C2
|
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356
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#define DISCOVERY_I2C2_CLK_ENABLE() __HAL_RCC_I2C2_CLK_ENABLE()
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#define DISCOVERY_I2C2_CLK_DISABLE() __HAL_RCC_I2C2_CLK_DISABLE()
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#define DISCOVERY_I2C2_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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#define DISCOVERY_I2C2_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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360
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#define DISCOVERY_I2C2_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
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#define DISCOVERY_I2C2_SCL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
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362
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#define DISCOVERY_I2C2_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
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#define DISCOVERY_I2C2_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
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| bcostm | 3:4c7d003a8259 | 364 | |
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365
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/* Definition for I2C2's NVIC */
|
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366
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#define DISCOVERY_I2C2_EV_IRQn I2C2_EV_IRQn
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367
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#define DISCOVERY_I2C2_ER_IRQn I2C2_ER_IRQn
|
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368
|
|
|
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1:917af0ca86df
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369
|
/* I2C TIMING Register define when I2C clock source is SYSCLK */
|
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1:917af0ca86df
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370
|
/* I2C TIMING is calculated in case of the I2C Clock source is the SYSCLK = 80 MHz */
|
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1:917af0ca86df
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371
|
/* Set 0x90112626 value to reach 100 KHz speed (Rise time = 640ns, Fall time = 20ns) */
|
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372
|
#ifndef DISCOVERY_I2C2_TIMING
|
|
| bcostm | 3:4c7d003a8259 | 373 | #define DISCOVERY_I2C2_TIMING 0x90112626 |
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374
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#endif /* DISCOVERY_I2C2_TIMING */
|
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375
|
|
|
| bcostm | 3:4c7d003a8259 | 376 | /* I2C clock speed configuration (in Hz) |
| bcostm | 3:4c7d003a8259 | 377 | WARNING: |
| bcostm | 3:4c7d003a8259 | 378 | Make sure that this define is not already declared in other files (ie. |
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1:917af0ca86df
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379
|
stm324xg_discovery.h file). It can be used in parallel by other modules. */
|
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380
|
#ifndef BSP_I2C_SPEED
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|
| bcostm | 3:4c7d003a8259 | 381 | #define BSP_I2C_SPEED 100000 |
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382
|
#endif /* BSP_I2C_SPEED */
|
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1:917af0ca86df
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383
|
|
|
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384
|
#define IDD_I2C_ADDRESS ((uint16_t) 0x84)
|
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1:917af0ca86df
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385
|
|
|
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1:917af0ca86df
|
386
|
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
|
|
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1:917af0ca86df
|
387
|
on accurate values, they just guarantee that the application will not remain
|
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1:917af0ca86df
|
388
|
stuck if the I2C communication is corrupted.
|
|
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1:917af0ca86df
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389
|
You may modify these timeout values depending on CPU frequency and application
|
|
| bcostm | 3:4c7d003a8259 | 390 | conditions (interrupts routines ...). */ |
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|
#define DISCOVERY_I2C2_TIMEOUT_MAX 3000
|
|
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392
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
|
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1:917af0ca86df
|
393
|
|
|
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394
|
/*##################### Accelerometer ##########################*/
|
|
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1:917af0ca86df
|
395
|
/**
|
|
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1:917af0ca86df
|
396
|
* @brief Accelerometer Chip Select macro definition
|
|
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1:917af0ca86df
|
397
|
*/
|
|
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1:917af0ca86df
|
398
|
#define ACCELERO_CS_LOW() HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_RESET)
|
|
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|
399
|
#define ACCELERO_CS_HIGH() HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_SET)
|
|
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|
400
|
|
|
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1:917af0ca86df
|
401
|
/**
|
|
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1:917af0ca86df
|
402
|
* @brief Accelerometer SPI Interface pins
|
|
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1:917af0ca86df
|
403
|
*/
|
|
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1:917af0ca86df
|
404
|
#define ACCELERO_CS_GPIO_PORT GPIOE /* GPIOE */
|
|
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1:917af0ca86df
|
405
|
#define ACCELERO_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
|
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1:917af0ca86df
|
406
|
#define ACCELERO_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
|
|
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1:917af0ca86df
|
407
|
#define ACCELERO_CS_PIN GPIO_PIN_0 /* PE.00 */
|
|
Jerome Coutant |
1:917af0ca86df
|
408
|
|
|
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1:917af0ca86df
|
409
|
/**
|
|
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1:917af0ca86df
|
410
|
* @brief Accelerometer Interrupt pins
|
|
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1:917af0ca86df
|
411
|
*/
|
|
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1:917af0ca86df
|
412
|
#define ACCELERO_XLINT_GPIO_PORT GPIOE /* GPIOE */
|
|
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1:917af0ca86df
|
413
|
#define ACCELERO_XLINT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
|
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1:917af0ca86df
|
414
|
#define ACCELERO_XLINT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
|
|
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1:917af0ca86df
|
415
|
#define ACCELERO_XLINT_PIN GPIO_PIN_1 /* PE.01 */
|
|
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1:917af0ca86df
|
416
|
#define ACCELERO_XLINT_EXTI_IRQn EXTI1_IRQn
|
|
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1:917af0ca86df
|
417
|
|
|
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1:917af0ca86df
|
418
|
/*##################### Magnetometer ##########################*/
|
|
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1:917af0ca86df
|
419
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
420
|
* @brief Magnetometer Chip Select macro definition
|
|
Jerome Coutant |
1:917af0ca86df
|
421
|
*/
|
|
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1:917af0ca86df
|
422
|
#define MAGNETO_CS_LOW() HAL_GPIO_WritePin(MAGNETO_CS_GPIO_PORT, MAGNETO_CS_PIN, GPIO_PIN_RESET)
|
|
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|
423
|
#define MAGNETO_CS_HIGH() HAL_GPIO_WritePin(MAGNETO_CS_GPIO_PORT, MAGNETO_CS_PIN, GPIO_PIN_SET)
|
|
Jerome Coutant |
1:917af0ca86df
|
424
|
|
|
Jerome Coutant |
1:917af0ca86df
|
425
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
426
|
* @brief Magnetometer SPI Interface pins
|
|
Jerome Coutant |
1:917af0ca86df
|
427
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
428
|
#define MAGNETO_CS_GPIO_PORT GPIOC /* GPIOC */
|
|
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1:917af0ca86df
|
429
|
#define MAGNETO_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
|
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1:917af0ca86df
|
430
|
#define MAGNETO_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
|
|
Jerome Coutant |
1:917af0ca86df
|
431
|
#define MAGNETO_CS_PIN GPIO_PIN_0 /* PC.00 */
|
|
Jerome Coutant |
1:917af0ca86df
|
432
|
|
|
Jerome Coutant |
1:917af0ca86df
|
433
|
|
|
Jerome Coutant |
1:917af0ca86df
|
434
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
435
|
* @brief Magnetometer Interrupt pins
|
|
Jerome Coutant |
1:917af0ca86df
|
436
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
437
|
#define MAGNETO_INT_GPIO_PORT GPIOC /* GPIOC */
|
|
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1:917af0ca86df
|
438
|
#define MAGNETO_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
|
Jerome Coutant |
1:917af0ca86df
|
439
|
#define MAGNETO_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
|
|
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1:917af0ca86df
|
440
|
#define MAGNETO_INT1_PIN GPIO_PIN_1 /* PC.01 */
|
|
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1:917af0ca86df
|
441
|
#define MAGNETO_INT1_EXTI_IRQn EXTI1_IRQn
|
|
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1:917af0ca86df
|
442
|
|
|
Jerome Coutant |
1:917af0ca86df
|
443
|
#define MAGNETO_DRDY_GPIO_PORT GPIOC /* GPIOC */
|
|
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1:917af0ca86df
|
444
|
#define MAGNETO_DRDY_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
|
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1:917af0ca86df
|
445
|
#define MAGNETO_DRDY_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
|
|
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1:917af0ca86df
|
446
|
#define MAGNETO_DRDY_PIN GPIO_PIN_2 /* PC.01 */
|
|
Jerome Coutant |
1:917af0ca86df
|
447
|
|
|
Jerome Coutant |
1:917af0ca86df
|
448
|
|
|
Jerome Coutant |
1:917af0ca86df
|
449
|
/*##################### Audio Codec ##########################*/
|
|
Jerome Coutant |
1:917af0ca86df
|
450
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
451
|
* @brief Audio codec chip reset definition
|
|
Jerome Coutant |
1:917af0ca86df
|
452
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
453
|
/* Audio codec power on/off macro definition */
|
|
Jerome Coutant |
1:917af0ca86df
|
454
|
#define CODEC_AUDIO_POWER_OFF() HAL_GPIO_WritePin(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, GPIO_PIN_RESET)
|
|
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1:917af0ca86df
|
455
|
#define CODEC_AUDIO_POWER_ON() HAL_GPIO_WritePin(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, GPIO_PIN_SET)
|
|
Jerome Coutant |
1:917af0ca86df
|
456
|
|
|
Jerome Coutant |
1:917af0ca86df
|
457
|
/* Audio Reset Pin definition */
|
|
Jerome Coutant |
1:917af0ca86df
|
458
|
#define AUDIO_RESET_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
|
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1:917af0ca86df
|
459
|
#define AUDIO_RESET_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
|
|
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1:917af0ca86df
|
460
|
#define AUDIO_RESET_PIN GPIO_PIN_3
|
|
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1:917af0ca86df
|
461
|
#define AUDIO_RESET_GPIO GPIOE
|
|
Jerome Coutant |
1:917af0ca86df
|
462
|
|
|
Jerome Coutant |
1:917af0ca86df
|
463
|
/*##################### Gyroscope ##########################*/
|
|
Jerome Coutant |
1:917af0ca86df
|
464
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
465
|
* @brief Gyroscope Chip Select macro definition
|
|
Jerome Coutant |
1:917af0ca86df
|
466
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
467
|
#define GYRO_CS_LOW() HAL_GPIO_WritePin(GYRO_CS_GPIO_PORT, GYRO_CS_PIN, GPIO_PIN_RESET)
|
|
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1:917af0ca86df
|
468
|
#define GYRO_CS_HIGH() HAL_GPIO_WritePin(GYRO_CS_GPIO_PORT, GYRO_CS_PIN, GPIO_PIN_SET)
|
|
| bcostm | 3:4c7d003a8259 | 469 | |
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1:917af0ca86df
|
470
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
471
|
* @brief Gyroscope SPI Interface pins
|
|
Jerome Coutant |
1:917af0ca86df
|
472
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
473
|
#define GYRO_CS_GPIO_PORT GPIOD /* GPIOD */
|
|
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1:917af0ca86df
|
474
|
#define GYRO_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
|
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1:917af0ca86df
|
475
|
#define GYRO_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
|
|
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1:917af0ca86df
|
476
|
#define GYRO_CS_PIN GPIO_PIN_7 /* PD.07 */
|
|
Jerome Coutant |
1:917af0ca86df
|
477
|
|
|
Jerome Coutant |
1:917af0ca86df
|
478
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
479
|
* @brief Gyroscope Interrupt pins
|
|
Jerome Coutant |
1:917af0ca86df
|
480
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
481
|
#if defined (USE_STM32L476G_DISCO_REVC) || defined (USE_STM32L476G_DISCO_REVB)
|
|
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1:917af0ca86df
|
482
|
#define GYRO_INT1_GPIO_PORT GPIOD /* GPIOD */
|
|
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1:917af0ca86df
|
483
|
#define GYRO_INT1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
|
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1:917af0ca86df
|
484
|
#define GYRO_INT1_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
|
|
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1:917af0ca86df
|
485
|
#define GYRO_INT1_PIN GPIO_PIN_2 /* PD.02 */
|
|
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1:917af0ca86df
|
486
|
#define GYRO_INT1_EXTI_IRQn EXTI2_IRQn
|
|
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1:917af0ca86df
|
487
|
#define GYRO_INT2_GPIO_PORT GPIOB /* GPIOB */
|
|
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1:917af0ca86df
|
488
|
#define GYRO_INT2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
|
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1:917af0ca86df
|
489
|
#define GYRO_INT2_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
|
|
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1:917af0ca86df
|
490
|
#define GYRO_INT2_PIN GPIO_PIN_8 /* PB.08 */
|
|
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1:917af0ca86df
|
491
|
#define GYRO_INT2_EXTI_IRQn EXTI9_5_IRQn
|
|
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1:917af0ca86df
|
492
|
#elif defined (USE_STM32L476G_DISCO_REVA)
|
|
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1:917af0ca86df
|
493
|
#define GYRO_INT1_GPIO_PORT GPIOB /* GPIOB */
|
|
Jerome Coutant |
1:917af0ca86df
|
494
|
#define GYRO_INT1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
|
Jerome Coutant |
1:917af0ca86df
|
495
|
#define GYRO_INT1_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
|
|
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1:917af0ca86df
|
496
|
#define GYRO_INT1_PIN GPIO_PIN_6 /* PB.06 */
|
|
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1:917af0ca86df
|
497
|
#define GYRO_INT1_EXTI_IRQn EXTI9_5_IRQn
|
|
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1:917af0ca86df
|
498
|
#define GYRO_INT2_GPIO_PORT GPIOB /* GPIOB */
|
|
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1:917af0ca86df
|
499
|
#define GYRO_INT2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
|
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1:917af0ca86df
|
500
|
#define GYRO_INT2_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
|
|
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1:917af0ca86df
|
501
|
#define GYRO_INT2_PIN GPIO_PIN_7 /* PB.07 */
|
|
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1:917af0ca86df
|
502
|
#define GYRO_INT2_EXTI_IRQn EXTI9_5_IRQn
|
|
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1:917af0ca86df
|
503
|
#endif
|
|
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1:917af0ca86df
|
504
|
|
|
Jerome Coutant |
1:917af0ca86df
|
505
|
/*##################### Idd ##########################*/
|
|
Jerome Coutant |
1:917af0ca86df
|
506
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
507
|
* @brief Idd current measurement interface pins
|
|
Jerome Coutant |
1:917af0ca86df
|
508
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
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509
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#define IDD_INT_GPIO_PORT GPIOC /* GPIOC */
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1:917af0ca86df
|
510
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#define IDD_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
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1:917af0ca86df
|
511
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#define IDD_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
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1:917af0ca86df
|
512
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#define IDD_INT_PIN GPIO_PIN_13 /* PC.13 */
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1:917af0ca86df
|
513
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#define IDD_INT_EXTI_IRQn EXTI15_10_IRQn
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1:917af0ca86df
|
514
|
|
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1:917af0ca86df
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515
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#define IDD_WAKEUP_GPIO_PORT GPIOA /* GPIOA */
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1:917af0ca86df
|
516
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#define IDD_WAKEUP_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
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1:917af0ca86df
|
517
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#define IDD_WAKEUP_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
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1:917af0ca86df
|
518
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#define IDD_WAKEUP_PIN GPIO_PIN_4 /* PA.04 */
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|
Jerome Coutant |
1:917af0ca86df
|
519
|
|
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1:917af0ca86df
|
520
|
/**
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|
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1:917af0ca86df
|
521
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* @}
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1:917af0ca86df
|
522
|
*/
|
|
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1:917af0ca86df
|
523
|
|
|
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1:917af0ca86df
|
524
|
/**
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|
Jerome Coutant |
1:917af0ca86df
|
525
|
* @}
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|
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1:917af0ca86df
|
526
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
527
|
|
|
Jerome Coutant |
1:917af0ca86df
|
528
|
|
|
Jerome Coutant |
1:917af0ca86df
|
529
|
/** @defgroup STM32L476G_DISCOVERY_Exported_Functions Exported Functions
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1:917af0ca86df
|
530
|
* @{
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|
Jerome Coutant |
1:917af0ca86df
|
531
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
532
|
uint32_t BSP_GetVersion(void);
|
|
Jerome Coutant |
1:917af0ca86df
|
533
|
SupplyMode_TypeDef BSP_SupplyModeDetection(void);
|
|
Jerome Coutant |
1:917af0ca86df
|
534
|
void BSP_LED_Init(Led_TypeDef Led);
|
|
Jerome Coutant |
1:917af0ca86df
|
535
|
void BSP_LED_DeInit(Led_TypeDef Led);
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|
Jerome Coutant |
1:917af0ca86df
|
536
|
void BSP_LED_On(Led_TypeDef Led);
|
|
Jerome Coutant |
1:917af0ca86df
|
537
|
void BSP_LED_Off(Led_TypeDef Led);
|
|
Jerome Coutant |
1:917af0ca86df
|
538
|
void BSP_LED_Toggle(Led_TypeDef Led);
|
|
Jerome Coutant |
1:917af0ca86df
|
539
|
uint8_t BSP_JOY_Init(JOYMode_TypeDef Joy_Mode);
|
|
Jerome Coutant |
1:917af0ca86df
|
540
|
void BSP_JOY_DeInit(void);
|
|
Jerome Coutant |
1:917af0ca86df
|
541
|
JOYState_TypeDef BSP_JOY_GetState(void);
|
|
Jerome Coutant |
1:917af0ca86df
|
542
|
|
|
Jerome Coutant |
1:917af0ca86df
|
543
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
544
|
* @}
|
|
Jerome Coutant |
1:917af0ca86df
|
545
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
546
|
|
|
Jerome Coutant |
1:917af0ca86df
|
547
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
548
|
* @}
|
|
Jerome Coutant |
1:917af0ca86df
|
549
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
550
|
|
|
Jerome Coutant |
1:917af0ca86df
|
551
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
552
|
* @}
|
|
Jerome Coutant |
1:917af0ca86df
|
553
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
554
|
|
|
Jerome Coutant |
1:917af0ca86df
|
555
|
/**
|
|
Jerome Coutant |
1:917af0ca86df
|
556
|
* @}
|
|
Jerome Coutant |
1:917af0ca86df
|
557
|
*/
|
|
Jerome Coutant |
1:917af0ca86df
|
558
|
|
|
Jerome Coutant |
1:917af0ca86df
|
559
|
#ifdef __cplusplus
|
|
Jerome Coutant |
1:917af0ca86df
|
560
|
}
|
|
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1:917af0ca86df
|
561
|
#endif
|
|
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1:917af0ca86df
|
562
|
|
|
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1:917af0ca86df
|
563
|
#endif /* __STM32L476G_DISCOVERY_H */
|
|
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|
564
|
|
|
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|
565
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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