EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_STM/gpio_irq_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 *******************************************************************************
be_bryan 0:b74591d5ab33 3 * Copyright (c) 2014, STMicroelectronics
be_bryan 0:b74591d5ab33 4 * All rights reserved.
be_bryan 0:b74591d5ab33 5 *
be_bryan 0:b74591d5ab33 6 * Redistribution and use in source and binary forms, with or without
be_bryan 0:b74591d5ab33 7 * modification, are permitted provided that the following conditions are met:
be_bryan 0:b74591d5ab33 8 *
be_bryan 0:b74591d5ab33 9 * 1. Redistributions of source code must retain the above copyright notice,
be_bryan 0:b74591d5ab33 10 * this list of conditions and the following disclaimer.
be_bryan 0:b74591d5ab33 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
be_bryan 0:b74591d5ab33 12 * this list of conditions and the following disclaimer in the documentation
be_bryan 0:b74591d5ab33 13 * and/or other materials provided with the distribution.
be_bryan 0:b74591d5ab33 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
be_bryan 0:b74591d5ab33 15 * may be used to endorse or promote products derived from this software
be_bryan 0:b74591d5ab33 16 * without specific prior written permission.
be_bryan 0:b74591d5ab33 17 *
be_bryan 0:b74591d5ab33 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
be_bryan 0:b74591d5ab33 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
be_bryan 0:b74591d5ab33 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
be_bryan 0:b74591d5ab33 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
be_bryan 0:b74591d5ab33 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
be_bryan 0:b74591d5ab33 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
be_bryan 0:b74591d5ab33 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
be_bryan 0:b74591d5ab33 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
be_bryan 0:b74591d5ab33 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
be_bryan 0:b74591d5ab33 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
be_bryan 0:b74591d5ab33 28 *******************************************************************************
be_bryan 0:b74591d5ab33 29 */
be_bryan 0:b74591d5ab33 30 #include <stddef.h>
be_bryan 0:b74591d5ab33 31 #include "cmsis.h"
be_bryan 0:b74591d5ab33 32 #include "gpio_irq_api.h"
be_bryan 0:b74591d5ab33 33 #include "pinmap.h"
be_bryan 0:b74591d5ab33 34 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 35 #include "gpio_irq_device.h"
be_bryan 0:b74591d5ab33 36
be_bryan 0:b74591d5ab33 37 #define EDGE_NONE (0)
be_bryan 0:b74591d5ab33 38 #define EDGE_RISE (1)
be_bryan 0:b74591d5ab33 39 #define EDGE_FALL (2)
be_bryan 0:b74591d5ab33 40 #define EDGE_BOTH (3)
be_bryan 0:b74591d5ab33 41
be_bryan 0:b74591d5ab33 42
be_bryan 0:b74591d5ab33 43 typedef struct gpio_channel {
be_bryan 0:b74591d5ab33 44 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
be_bryan 0:b74591d5ab33 45 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
be_bryan 0:b74591d5ab33 46 GPIO_TypeDef* channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
be_bryan 0:b74591d5ab33 47 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
be_bryan 0:b74591d5ab33 48 } gpio_channel_t;
be_bryan 0:b74591d5ab33 49
be_bryan 0:b74591d5ab33 50 static gpio_irq_handler irq_handler;
be_bryan 0:b74591d5ab33 51
be_bryan 0:b74591d5ab33 52 static gpio_channel_t channels[CHANNEL_NUM] = {
be_bryan 0:b74591d5ab33 53 #ifdef EXTI_IRQ0_NUM_LINES
be_bryan 0:b74591d5ab33 54 {.pin_mask = 0},
be_bryan 0:b74591d5ab33 55 #endif
be_bryan 0:b74591d5ab33 56 #ifdef EXTI_IRQ1_NUM_LINES
be_bryan 0:b74591d5ab33 57 {.pin_mask = 0},
be_bryan 0:b74591d5ab33 58 #endif
be_bryan 0:b74591d5ab33 59 #ifdef EXTI_IRQ2_NUM_LINES
be_bryan 0:b74591d5ab33 60 {.pin_mask = 0},
be_bryan 0:b74591d5ab33 61 #endif
be_bryan 0:b74591d5ab33 62 #ifdef EXTI_IRQ3_NUM_LINES
be_bryan 0:b74591d5ab33 63 {.pin_mask = 0},
be_bryan 0:b74591d5ab33 64 #endif
be_bryan 0:b74591d5ab33 65 #ifdef EXTI_IRQ4_NUM_LINES
be_bryan 0:b74591d5ab33 66 {.pin_mask = 0},
be_bryan 0:b74591d5ab33 67 #endif
be_bryan 0:b74591d5ab33 68 #ifdef EXTI_IRQ5_NUM_LINES
be_bryan 0:b74591d5ab33 69 {.pin_mask = 0},
be_bryan 0:b74591d5ab33 70 #endif
be_bryan 0:b74591d5ab33 71 #ifdef EXTI_IRQ6_NUM_LINES
be_bryan 0:b74591d5ab33 72 {.pin_mask = 0}
be_bryan 0:b74591d5ab33 73 #endif
be_bryan 0:b74591d5ab33 74 };
be_bryan 0:b74591d5ab33 75
be_bryan 0:b74591d5ab33 76 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
be_bryan 0:b74591d5ab33 77 {
be_bryan 0:b74591d5ab33 78 gpio_channel_t *gpio_channel = &channels[irq_index];
be_bryan 0:b74591d5ab33 79 uint32_t gpio_idx;
be_bryan 0:b74591d5ab33 80
be_bryan 0:b74591d5ab33 81 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
be_bryan 0:b74591d5ab33 82 uint32_t current_mask = (1 << gpio_idx);
be_bryan 0:b74591d5ab33 83
be_bryan 0:b74591d5ab33 84 if (gpio_channel->pin_mask & current_mask) {
be_bryan 0:b74591d5ab33 85 // Retrieve the gpio and pin that generate the irq
be_bryan 0:b74591d5ab33 86 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
be_bryan 0:b74591d5ab33 87 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
be_bryan 0:b74591d5ab33 88
be_bryan 0:b74591d5ab33 89 // Clear interrupt flag
be_bryan 0:b74591d5ab33 90 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
be_bryan 0:b74591d5ab33 91 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
be_bryan 0:b74591d5ab33 92
be_bryan 0:b74591d5ab33 93 if (gpio_channel->channel_ids[gpio_idx] == 0) {
be_bryan 0:b74591d5ab33 94 continue;
be_bryan 0:b74591d5ab33 95 }
be_bryan 0:b74591d5ab33 96
be_bryan 0:b74591d5ab33 97 // Check which edge has generated the irq
be_bryan 0:b74591d5ab33 98 if ((gpio->IDR & pin) == 0) {
be_bryan 0:b74591d5ab33 99 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
be_bryan 0:b74591d5ab33 100 } else {
be_bryan 0:b74591d5ab33 101 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
be_bryan 0:b74591d5ab33 102 }
be_bryan 0:b74591d5ab33 103 return;
be_bryan 0:b74591d5ab33 104 }
be_bryan 0:b74591d5ab33 105 }
be_bryan 0:b74591d5ab33 106 }
be_bryan 0:b74591d5ab33 107 error("Unexpected Spurious interrupt, index %d\r\n", irq_index);
be_bryan 0:b74591d5ab33 108 }
be_bryan 0:b74591d5ab33 109
be_bryan 0:b74591d5ab33 110
be_bryan 0:b74591d5ab33 111 #ifdef EXTI_IRQ0_NUM_LINES
be_bryan 0:b74591d5ab33 112 // EXTI line 0
be_bryan 0:b74591d5ab33 113 static void gpio_irq0(void)
be_bryan 0:b74591d5ab33 114 {
be_bryan 0:b74591d5ab33 115 handle_interrupt_in(0, EXTI_IRQ0_NUM_LINES);
be_bryan 0:b74591d5ab33 116 }
be_bryan 0:b74591d5ab33 117 #endif
be_bryan 0:b74591d5ab33 118 #ifdef EXTI_IRQ1_NUM_LINES
be_bryan 0:b74591d5ab33 119 // EXTI line 1
be_bryan 0:b74591d5ab33 120 static void gpio_irq1(void)
be_bryan 0:b74591d5ab33 121 {
be_bryan 0:b74591d5ab33 122 handle_interrupt_in(1, EXTI_IRQ1_NUM_LINES);
be_bryan 0:b74591d5ab33 123 }
be_bryan 0:b74591d5ab33 124 #endif
be_bryan 0:b74591d5ab33 125 #ifdef EXTI_IRQ2_NUM_LINES
be_bryan 0:b74591d5ab33 126 // EXTI line 2
be_bryan 0:b74591d5ab33 127 static void gpio_irq2(void)
be_bryan 0:b74591d5ab33 128 {
be_bryan 0:b74591d5ab33 129 handle_interrupt_in(2, EXTI_IRQ2_NUM_LINES);
be_bryan 0:b74591d5ab33 130 }
be_bryan 0:b74591d5ab33 131 #endif
be_bryan 0:b74591d5ab33 132 #ifdef EXTI_IRQ3_NUM_LINES
be_bryan 0:b74591d5ab33 133 // EXTI line 3
be_bryan 0:b74591d5ab33 134 static void gpio_irq3(void)
be_bryan 0:b74591d5ab33 135 {
be_bryan 0:b74591d5ab33 136 handle_interrupt_in(3, EXTI_IRQ3_NUM_LINES);
be_bryan 0:b74591d5ab33 137 }
be_bryan 0:b74591d5ab33 138 #endif
be_bryan 0:b74591d5ab33 139 #ifdef EXTI_IRQ4_NUM_LINES
be_bryan 0:b74591d5ab33 140 // EXTI line 4
be_bryan 0:b74591d5ab33 141 static void gpio_irq4(void)
be_bryan 0:b74591d5ab33 142 {
be_bryan 0:b74591d5ab33 143 handle_interrupt_in(4, EXTI_IRQ4_NUM_LINES);
be_bryan 0:b74591d5ab33 144 }
be_bryan 0:b74591d5ab33 145 #endif
be_bryan 0:b74591d5ab33 146 #ifdef EXTI_IRQ5_NUM_LINES
be_bryan 0:b74591d5ab33 147 // EXTI lines 5 to 9
be_bryan 0:b74591d5ab33 148 static void gpio_irq5(void)
be_bryan 0:b74591d5ab33 149 {
be_bryan 0:b74591d5ab33 150 handle_interrupt_in(5, EXTI_IRQ5_NUM_LINES);
be_bryan 0:b74591d5ab33 151 }
be_bryan 0:b74591d5ab33 152 #endif
be_bryan 0:b74591d5ab33 153 #ifdef EXTI_IRQ6_NUM_LINES
be_bryan 0:b74591d5ab33 154 // EXTI lines 10 to 15
be_bryan 0:b74591d5ab33 155 static void gpio_irq6(void)
be_bryan 0:b74591d5ab33 156 {
be_bryan 0:b74591d5ab33 157 handle_interrupt_in(6, EXTI_IRQ6_NUM_LINES);
be_bryan 0:b74591d5ab33 158 }
be_bryan 0:b74591d5ab33 159 #endif
be_bryan 0:b74591d5ab33 160
be_bryan 0:b74591d5ab33 161 extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx);
be_bryan 0:b74591d5ab33 162 extern void pin_function_gpiomode(PinName pin, uint32_t gpiomode);
be_bryan 0:b74591d5ab33 163
be_bryan 0:b74591d5ab33 164 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
be_bryan 0:b74591d5ab33 165 {
be_bryan 0:b74591d5ab33 166 uint32_t vector = 0;
be_bryan 0:b74591d5ab33 167 uint32_t irq_index;
be_bryan 0:b74591d5ab33 168 gpio_channel_t *gpio_channel;
be_bryan 0:b74591d5ab33 169 uint32_t gpio_idx;
be_bryan 0:b74591d5ab33 170
be_bryan 0:b74591d5ab33 171 if (pin == NC) return -1;
be_bryan 0:b74591d5ab33 172
be_bryan 0:b74591d5ab33 173 /* Enable SYSCFG Clock */
be_bryan 0:b74591d5ab33 174 __HAL_RCC_SYSCFG_CLK_ENABLE();
be_bryan 0:b74591d5ab33 175
be_bryan 0:b74591d5ab33 176 uint32_t port_index = STM_PORT(pin);
be_bryan 0:b74591d5ab33 177 uint32_t pin_index = STM_PIN(pin);
be_bryan 0:b74591d5ab33 178 irq_index = pin_lines_desc[pin_index].irq_index;
be_bryan 0:b74591d5ab33 179
be_bryan 0:b74591d5ab33 180 switch (irq_index) {
be_bryan 0:b74591d5ab33 181 #ifdef EXTI_IRQ0_NUM_LINES
be_bryan 0:b74591d5ab33 182 case 0:
be_bryan 0:b74591d5ab33 183 vector = (uint32_t)&gpio_irq0;
be_bryan 0:b74591d5ab33 184 break;
be_bryan 0:b74591d5ab33 185 #endif
be_bryan 0:b74591d5ab33 186 #ifdef EXTI_IRQ1_NUM_LINES
be_bryan 0:b74591d5ab33 187 case 1:
be_bryan 0:b74591d5ab33 188 vector = (uint32_t)&gpio_irq1;
be_bryan 0:b74591d5ab33 189 break;
be_bryan 0:b74591d5ab33 190 #endif
be_bryan 0:b74591d5ab33 191 #ifdef EXTI_IRQ2_NUM_LINES
be_bryan 0:b74591d5ab33 192 case 2:
be_bryan 0:b74591d5ab33 193 vector = (uint32_t)&gpio_irq2;
be_bryan 0:b74591d5ab33 194 break;
be_bryan 0:b74591d5ab33 195 #endif
be_bryan 0:b74591d5ab33 196 #ifdef EXTI_IRQ3_NUM_LINES
be_bryan 0:b74591d5ab33 197 case 3:
be_bryan 0:b74591d5ab33 198 vector = (uint32_t)&gpio_irq3;
be_bryan 0:b74591d5ab33 199 break;
be_bryan 0:b74591d5ab33 200 #endif
be_bryan 0:b74591d5ab33 201 #ifdef EXTI_IRQ4_NUM_LINES
be_bryan 0:b74591d5ab33 202 case 4:
be_bryan 0:b74591d5ab33 203 vector = (uint32_t)&gpio_irq4;
be_bryan 0:b74591d5ab33 204 break;
be_bryan 0:b74591d5ab33 205 #endif
be_bryan 0:b74591d5ab33 206 #ifdef EXTI_IRQ5_NUM_LINES
be_bryan 0:b74591d5ab33 207 case 5:
be_bryan 0:b74591d5ab33 208 vector = (uint32_t)&gpio_irq5;
be_bryan 0:b74591d5ab33 209 break;
be_bryan 0:b74591d5ab33 210 #endif
be_bryan 0:b74591d5ab33 211 #ifdef EXTI_IRQ6_NUM_LINES
be_bryan 0:b74591d5ab33 212 case 6:
be_bryan 0:b74591d5ab33 213 vector = (uint32_t)&gpio_irq6;
be_bryan 0:b74591d5ab33 214 break;
be_bryan 0:b74591d5ab33 215 #endif
be_bryan 0:b74591d5ab33 216 default:
be_bryan 0:b74591d5ab33 217 error("InterruptIn error: pin not supported.\n");
be_bryan 0:b74591d5ab33 218 return -1;
be_bryan 0:b74591d5ab33 219 }
be_bryan 0:b74591d5ab33 220
be_bryan 0:b74591d5ab33 221 // Enable GPIO clock
be_bryan 0:b74591d5ab33 222 GPIO_TypeDef *gpio_add = Set_GPIO_Clock(port_index);
be_bryan 0:b74591d5ab33 223
be_bryan 0:b74591d5ab33 224 // Save informations for future use
be_bryan 0:b74591d5ab33 225 obj->irq_n = pin_lines_desc[pin_index].irq_n;
be_bryan 0:b74591d5ab33 226 obj->irq_index = pin_lines_desc[pin_index].irq_index;
be_bryan 0:b74591d5ab33 227 obj->event = EDGE_NONE;
be_bryan 0:b74591d5ab33 228 obj->pin = pin;
be_bryan 0:b74591d5ab33 229
be_bryan 0:b74591d5ab33 230 gpio_channel = &channels[irq_index];
be_bryan 0:b74591d5ab33 231 gpio_idx = pin_lines_desc[pin_index].gpio_idx;
be_bryan 0:b74591d5ab33 232 gpio_channel->pin_mask |= (1 << gpio_idx);
be_bryan 0:b74591d5ab33 233 gpio_channel->channel_ids[gpio_idx] = id;
be_bryan 0:b74591d5ab33 234 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
be_bryan 0:b74591d5ab33 235 gpio_channel->channel_pin[gpio_idx] = pin_index;
be_bryan 0:b74591d5ab33 236
be_bryan 0:b74591d5ab33 237 irq_handler = handler;
be_bryan 0:b74591d5ab33 238
be_bryan 0:b74591d5ab33 239 // Enable EXTI interrupt
be_bryan 0:b74591d5ab33 240 NVIC_SetVector(obj->irq_n, vector);
be_bryan 0:b74591d5ab33 241 gpio_irq_enable(obj);
be_bryan 0:b74591d5ab33 242
be_bryan 0:b74591d5ab33 243 return 0;
be_bryan 0:b74591d5ab33 244 }
be_bryan 0:b74591d5ab33 245
be_bryan 0:b74591d5ab33 246 void gpio_irq_free(gpio_irq_t *obj)
be_bryan 0:b74591d5ab33 247 {
be_bryan 0:b74591d5ab33 248 uint32_t gpio_idx = pin_lines_desc[STM_PIN(obj->pin)].gpio_idx;
be_bryan 0:b74591d5ab33 249 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
be_bryan 0:b74591d5ab33 250
be_bryan 0:b74591d5ab33 251 gpio_irq_disable(obj);
be_bryan 0:b74591d5ab33 252 gpio_channel->pin_mask &= ~(1 << gpio_idx);
be_bryan 0:b74591d5ab33 253 gpio_channel->channel_ids[gpio_idx] = 0;
be_bryan 0:b74591d5ab33 254 gpio_channel->channel_gpio[gpio_idx] = 0;
be_bryan 0:b74591d5ab33 255 gpio_channel->channel_pin[gpio_idx] = 0;
be_bryan 0:b74591d5ab33 256 }
be_bryan 0:b74591d5ab33 257
be_bryan 0:b74591d5ab33 258 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
be_bryan 0:b74591d5ab33 259 {
be_bryan 0:b74591d5ab33 260 /* Enable / Disable Edge triggered interrupt and store event */
be_bryan 0:b74591d5ab33 261 if (event == IRQ_RISE) {
be_bryan 0:b74591d5ab33 262 if (enable) {
be_bryan 0:b74591d5ab33 263 LL_EXTI_EnableRisingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 264 obj->event |= IRQ_RISE;
be_bryan 0:b74591d5ab33 265 } else {
be_bryan 0:b74591d5ab33 266 LL_EXTI_DisableRisingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 267 obj->event &= ~IRQ_RISE;
be_bryan 0:b74591d5ab33 268 }
be_bryan 0:b74591d5ab33 269 }
be_bryan 0:b74591d5ab33 270 if (event == IRQ_FALL) {
be_bryan 0:b74591d5ab33 271 if (enable) {
be_bryan 0:b74591d5ab33 272 LL_EXTI_EnableFallingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 273 obj->event |= IRQ_FALL;
be_bryan 0:b74591d5ab33 274 } else {
be_bryan 0:b74591d5ab33 275 LL_EXTI_DisableFallingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 276 obj->event &= ~IRQ_FALL;
be_bryan 0:b74591d5ab33 277 }
be_bryan 0:b74591d5ab33 278 }
be_bryan 0:b74591d5ab33 279 }
be_bryan 0:b74591d5ab33 280
be_bryan 0:b74591d5ab33 281 void gpio_irq_enable(gpio_irq_t *obj)
be_bryan 0:b74591d5ab33 282 {
be_bryan 0:b74591d5ab33 283 uint32_t temp = 0;
be_bryan 0:b74591d5ab33 284 uint32_t port_index = STM_PORT(obj->pin);
be_bryan 0:b74591d5ab33 285 uint32_t pin_index = STM_PIN(obj->pin);
be_bryan 0:b74591d5ab33 286
be_bryan 0:b74591d5ab33 287 /* Select Source */
be_bryan 0:b74591d5ab33 288 temp = SYSCFG->EXTICR[pin_index >> 2];
be_bryan 0:b74591d5ab33 289 CLEAR_BIT(temp, (0x0FU) << (4U * (pin_index & 0x03U)));
be_bryan 0:b74591d5ab33 290 SET_BIT(temp, port_index << (4U * (pin_index & 0x03U)));
be_bryan 0:b74591d5ab33 291 SYSCFG->EXTICR[pin_index >> 2] = temp;
be_bryan 0:b74591d5ab33 292
be_bryan 0:b74591d5ab33 293 LL_EXTI_EnableIT_0_31(1 << pin_index);
be_bryan 0:b74591d5ab33 294
be_bryan 0:b74591d5ab33 295 /* Restore previous edge interrupt configuration if applicable */
be_bryan 0:b74591d5ab33 296 if (obj->event & IRQ_RISE) {
be_bryan 0:b74591d5ab33 297 LL_EXTI_EnableRisingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 298 }
be_bryan 0:b74591d5ab33 299 if (obj->event & IRQ_FALL) {
be_bryan 0:b74591d5ab33 300 LL_EXTI_EnableFallingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 301 }
be_bryan 0:b74591d5ab33 302
be_bryan 0:b74591d5ab33 303 NVIC_EnableIRQ(obj->irq_n);
be_bryan 0:b74591d5ab33 304 }
be_bryan 0:b74591d5ab33 305
be_bryan 0:b74591d5ab33 306 void gpio_irq_disable(gpio_irq_t *obj)
be_bryan 0:b74591d5ab33 307 {
be_bryan 0:b74591d5ab33 308 /* Clear EXTI line configuration */
be_bryan 0:b74591d5ab33 309 LL_EXTI_DisableRisingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 310 LL_EXTI_DisableFallingTrig_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 311 LL_EXTI_DisableIT_0_31(1 << STM_PIN(obj->pin));
be_bryan 0:b74591d5ab33 312 NVIC_DisableIRQ(obj->irq_n);
be_bryan 0:b74591d5ab33 313 NVIC_ClearPendingIRQ(obj->irq_n);
be_bryan 0:b74591d5ab33 314 }