mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 *******************************************************************************
be_bryan 0:b74591d5ab33 3 * Copyright (c) 2015, STMicroelectronics
be_bryan 0:b74591d5ab33 4 * All rights reserved.
be_bryan 0:b74591d5ab33 5 *
be_bryan 0:b74591d5ab33 6 * Redistribution and use in source and binary forms, with or without
be_bryan 0:b74591d5ab33 7 * modification, are permitted provided that the following conditions are met:
be_bryan 0:b74591d5ab33 8 *
be_bryan 0:b74591d5ab33 9 * 1. Redistributions of source code must retain the above copyright notice,
be_bryan 0:b74591d5ab33 10 * this list of conditions and the following disclaimer.
be_bryan 0:b74591d5ab33 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
be_bryan 0:b74591d5ab33 12 * this list of conditions and the following disclaimer in the documentation
be_bryan 0:b74591d5ab33 13 * and/or other materials provided with the distribution.
be_bryan 0:b74591d5ab33 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
be_bryan 0:b74591d5ab33 15 * may be used to endorse or promote products derived from this software
be_bryan 0:b74591d5ab33 16 * without specific prior written permission.
be_bryan 0:b74591d5ab33 17 *
be_bryan 0:b74591d5ab33 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
be_bryan 0:b74591d5ab33 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
be_bryan 0:b74591d5ab33 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
be_bryan 0:b74591d5ab33 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
be_bryan 0:b74591d5ab33 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
be_bryan 0:b74591d5ab33 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
be_bryan 0:b74591d5ab33 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
be_bryan 0:b74591d5ab33 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
be_bryan 0:b74591d5ab33 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
be_bryan 0:b74591d5ab33 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
be_bryan 0:b74591d5ab33 28 *******************************************************************************
be_bryan 0:b74591d5ab33 29 */
be_bryan 0:b74591d5ab33 30
be_bryan 0:b74591d5ab33 31
be_bryan 0:b74591d5ab33 32 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 33 #include "i2c_api.h"
be_bryan 0:b74591d5ab33 34 #include "platform/mbed_wait_api.h"
be_bryan 0:b74591d5ab33 35
be_bryan 0:b74591d5ab33 36 #if DEVICE_I2C
be_bryan 0:b74591d5ab33 37
be_bryan 0:b74591d5ab33 38 #include "cmsis.h"
be_bryan 0:b74591d5ab33 39 #include "pinmap.h"
be_bryan 0:b74591d5ab33 40 #include "PeripheralPins.h"
be_bryan 0:b74591d5ab33 41 #include "i2c_device.h" // family specific defines
be_bryan 0:b74591d5ab33 42
be_bryan 0:b74591d5ab33 43 #ifndef DEBUG_STDIO
be_bryan 0:b74591d5ab33 44 # define DEBUG_STDIO 0
be_bryan 0:b74591d5ab33 45 #endif
be_bryan 0:b74591d5ab33 46
be_bryan 0:b74591d5ab33 47 #if DEBUG_STDIO
be_bryan 0:b74591d5ab33 48 # include <stdio.h>
be_bryan 0:b74591d5ab33 49 # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0)
be_bryan 0:b74591d5ab33 50 #else
be_bryan 0:b74591d5ab33 51 # define DEBUG_PRINTF(...) {}
be_bryan 0:b74591d5ab33 52 #endif
be_bryan 0:b74591d5ab33 53
be_bryan 0:b74591d5ab33 54 #if DEVICE_I2C_ASYNCH
be_bryan 0:b74591d5ab33 55 #define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c))
be_bryan 0:b74591d5ab33 56 #else
be_bryan 0:b74591d5ab33 57 #define I2C_S(obj) (struct i2c_s *) (obj)
be_bryan 0:b74591d5ab33 58 #endif
be_bryan 0:b74591d5ab33 59
be_bryan 0:b74591d5ab33 60 /* Family specific description for I2C */
be_bryan 0:b74591d5ab33 61 #define I2C_NUM (5)
be_bryan 0:b74591d5ab33 62 static I2C_HandleTypeDef* i2c_handles[I2C_NUM];
be_bryan 0:b74591d5ab33 63
be_bryan 0:b74591d5ab33 64 /* Timeout values are based on core clock and I2C clock.
be_bryan 0:b74591d5ab33 65 The BYTE_TIMEOUT is computed as twice the number of cycles it would
be_bryan 0:b74591d5ab33 66 take to send 10 bits over I2C. Most Flags should take less than that.
be_bryan 0:b74591d5ab33 67 This is for immediate FLAG or ACK check.
be_bryan 0:b74591d5ab33 68 */
be_bryan 0:b74591d5ab33 69 #define BYTE_TIMEOUT ((SystemCoreClock / obj_s->hz) * 2 * 10)
be_bryan 0:b74591d5ab33 70 /* Timeout values based on I2C clock.
be_bryan 0:b74591d5ab33 71 The BYTE_TIMEOUT_US is computed as 3x the time in us it would
be_bryan 0:b74591d5ab33 72 take to send 10 bits over I2C. Most Flags should take less than that.
be_bryan 0:b74591d5ab33 73 This is for complete transfers check.
be_bryan 0:b74591d5ab33 74 */
be_bryan 0:b74591d5ab33 75 #define BYTE_TIMEOUT_US ((SystemCoreClock / obj_s->hz) * 3 * 10)
be_bryan 0:b74591d5ab33 76 /* Timeout values for flags and events waiting loops. These timeouts are
be_bryan 0:b74591d5ab33 77 not based on accurate values, they just guarantee that the application will
be_bryan 0:b74591d5ab33 78 not remain stuck if the I2C communication is corrupted.
be_bryan 0:b74591d5ab33 79 */
be_bryan 0:b74591d5ab33 80 #define FLAG_TIMEOUT ((int)0x1000)
be_bryan 0:b74591d5ab33 81
be_bryan 0:b74591d5ab33 82 /* GENERIC INIT and HELPERS FUNCTIONS */
be_bryan 0:b74591d5ab33 83
be_bryan 0:b74591d5ab33 84 #if defined(I2C1_BASE)
be_bryan 0:b74591d5ab33 85 static void i2c1_irq(void)
be_bryan 0:b74591d5ab33 86 {
be_bryan 0:b74591d5ab33 87 I2C_HandleTypeDef * handle = i2c_handles[0];
be_bryan 0:b74591d5ab33 88 HAL_I2C_EV_IRQHandler(handle);
be_bryan 0:b74591d5ab33 89 HAL_I2C_ER_IRQHandler(handle);
be_bryan 0:b74591d5ab33 90 }
be_bryan 0:b74591d5ab33 91 #endif
be_bryan 0:b74591d5ab33 92 #if defined(I2C2_BASE)
be_bryan 0:b74591d5ab33 93 static void i2c2_irq(void)
be_bryan 0:b74591d5ab33 94 {
be_bryan 0:b74591d5ab33 95 I2C_HandleTypeDef * handle = i2c_handles[1];
be_bryan 0:b74591d5ab33 96 HAL_I2C_EV_IRQHandler(handle);
be_bryan 0:b74591d5ab33 97 HAL_I2C_ER_IRQHandler(handle);
be_bryan 0:b74591d5ab33 98 }
be_bryan 0:b74591d5ab33 99 #endif
be_bryan 0:b74591d5ab33 100 #if defined(I2C3_BASE)
be_bryan 0:b74591d5ab33 101 static void i2c3_irq(void)
be_bryan 0:b74591d5ab33 102 {
be_bryan 0:b74591d5ab33 103 I2C_HandleTypeDef * handle = i2c_handles[2];
be_bryan 0:b74591d5ab33 104 HAL_I2C_EV_IRQHandler(handle);
be_bryan 0:b74591d5ab33 105 HAL_I2C_ER_IRQHandler(handle);
be_bryan 0:b74591d5ab33 106 }
be_bryan 0:b74591d5ab33 107 #endif
be_bryan 0:b74591d5ab33 108 #if defined(I2C4_BASE)
be_bryan 0:b74591d5ab33 109 static void i2c4_irq(void)
be_bryan 0:b74591d5ab33 110 {
be_bryan 0:b74591d5ab33 111 I2C_HandleTypeDef * handle = i2c_handles[3];
be_bryan 0:b74591d5ab33 112 HAL_I2C_EV_IRQHandler(handle);
be_bryan 0:b74591d5ab33 113 HAL_I2C_ER_IRQHandler(handle);
be_bryan 0:b74591d5ab33 114 }
be_bryan 0:b74591d5ab33 115 #endif
be_bryan 0:b74591d5ab33 116 #if defined(FMPI2C1_BASE)
be_bryan 0:b74591d5ab33 117 static void i2c5_irq(void)
be_bryan 0:b74591d5ab33 118 {
be_bryan 0:b74591d5ab33 119 I2C_HandleTypeDef * handle = i2c_handles[4];
be_bryan 0:b74591d5ab33 120 HAL_I2C_EV_IRQHandler(handle);
be_bryan 0:b74591d5ab33 121 HAL_I2C_ER_IRQHandler(handle);
be_bryan 0:b74591d5ab33 122 }
be_bryan 0:b74591d5ab33 123 #endif
be_bryan 0:b74591d5ab33 124
be_bryan 0:b74591d5ab33 125 void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) {
be_bryan 0:b74591d5ab33 126 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 127 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
be_bryan 0:b74591d5ab33 128 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
be_bryan 0:b74591d5ab33 129 /* default prio in master case is set to 2 */
be_bryan 0:b74591d5ab33 130 uint32_t prio = 2;
be_bryan 0:b74591d5ab33 131
be_bryan 0:b74591d5ab33 132 /* Set up ITs using IRQ and handler tables */
be_bryan 0:b74591d5ab33 133 NVIC_SetVector(irq_event_n, handler);
be_bryan 0:b74591d5ab33 134 NVIC_SetVector(irq_error_n, handler);
be_bryan 0:b74591d5ab33 135
be_bryan 0:b74591d5ab33 136 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 137 /* Set higher priority to slave device than master.
be_bryan 0:b74591d5ab33 138 * In case a device makes use of both master and slave, the
be_bryan 0:b74591d5ab33 139 * slave needs higher responsiveness.
be_bryan 0:b74591d5ab33 140 */
be_bryan 0:b74591d5ab33 141 if (obj_s->slave) {
be_bryan 0:b74591d5ab33 142 prio = 1;
be_bryan 0:b74591d5ab33 143 }
be_bryan 0:b74591d5ab33 144 #endif
be_bryan 0:b74591d5ab33 145
be_bryan 0:b74591d5ab33 146 NVIC_SetPriority(irq_event_n, prio);
be_bryan 0:b74591d5ab33 147 NVIC_SetPriority(irq_error_n, prio);
be_bryan 0:b74591d5ab33 148 NVIC_EnableIRQ(irq_event_n);
be_bryan 0:b74591d5ab33 149 NVIC_EnableIRQ(irq_error_n);
be_bryan 0:b74591d5ab33 150 }
be_bryan 0:b74591d5ab33 151
be_bryan 0:b74591d5ab33 152 void i2c_ev_err_disable(i2c_t *obj) {
be_bryan 0:b74591d5ab33 153 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 154 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
be_bryan 0:b74591d5ab33 155 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
be_bryan 0:b74591d5ab33 156
be_bryan 0:b74591d5ab33 157 HAL_NVIC_DisableIRQ(irq_event_n);
be_bryan 0:b74591d5ab33 158 HAL_NVIC_DisableIRQ(irq_error_n);
be_bryan 0:b74591d5ab33 159 }
be_bryan 0:b74591d5ab33 160
be_bryan 0:b74591d5ab33 161 uint32_t i2c_get_irq_handler(i2c_t *obj)
be_bryan 0:b74591d5ab33 162 {
be_bryan 0:b74591d5ab33 163 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 164 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 165 uint32_t handler = 0;
be_bryan 0:b74591d5ab33 166
be_bryan 0:b74591d5ab33 167 switch (obj_s->index) {
be_bryan 0:b74591d5ab33 168 #if defined(I2C1_BASE)
be_bryan 0:b74591d5ab33 169 case 0:
be_bryan 0:b74591d5ab33 170 handler = (uint32_t)&i2c1_irq;
be_bryan 0:b74591d5ab33 171 break;
be_bryan 0:b74591d5ab33 172 #endif
be_bryan 0:b74591d5ab33 173 #if defined(I2C2_BASE)
be_bryan 0:b74591d5ab33 174 case 1:
be_bryan 0:b74591d5ab33 175 handler = (uint32_t)&i2c2_irq;
be_bryan 0:b74591d5ab33 176 break;
be_bryan 0:b74591d5ab33 177 #endif
be_bryan 0:b74591d5ab33 178 #if defined(I2C3_BASE)
be_bryan 0:b74591d5ab33 179 case 2:
be_bryan 0:b74591d5ab33 180 handler = (uint32_t)&i2c3_irq;
be_bryan 0:b74591d5ab33 181 break;
be_bryan 0:b74591d5ab33 182 #endif
be_bryan 0:b74591d5ab33 183 #if defined(I2C4_BASE)
be_bryan 0:b74591d5ab33 184 case 3:
be_bryan 0:b74591d5ab33 185 handler = (uint32_t)&i2c4_irq;
be_bryan 0:b74591d5ab33 186 break;
be_bryan 0:b74591d5ab33 187 #endif
be_bryan 0:b74591d5ab33 188 #if defined(FMPI2C1_BASE)
be_bryan 0:b74591d5ab33 189 case 4:
be_bryan 0:b74591d5ab33 190 handler = (uint32_t)&i2c5_irq;
be_bryan 0:b74591d5ab33 191 break;
be_bryan 0:b74591d5ab33 192 #endif
be_bryan 0:b74591d5ab33 193 }
be_bryan 0:b74591d5ab33 194
be_bryan 0:b74591d5ab33 195 i2c_handles[obj_s->index] = handle;
be_bryan 0:b74591d5ab33 196 return handler;
be_bryan 0:b74591d5ab33 197 }
be_bryan 0:b74591d5ab33 198
be_bryan 0:b74591d5ab33 199 void i2c_hw_reset(i2c_t *obj) {
be_bryan 0:b74591d5ab33 200 int timeout;
be_bryan 0:b74591d5ab33 201 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 202 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 203
be_bryan 0:b74591d5ab33 204 handle->Instance = (I2C_TypeDef *)(obj_s->i2c);
be_bryan 0:b74591d5ab33 205
be_bryan 0:b74591d5ab33 206 // wait before reset
be_bryan 0:b74591d5ab33 207 timeout = BYTE_TIMEOUT;
be_bryan 0:b74591d5ab33 208 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
be_bryan 0:b74591d5ab33 209 #if defined I2C1_BASE
be_bryan 0:b74591d5ab33 210 if (obj_s->i2c == I2C_1) {
be_bryan 0:b74591d5ab33 211 __HAL_RCC_I2C1_FORCE_RESET();
be_bryan 0:b74591d5ab33 212 __HAL_RCC_I2C1_RELEASE_RESET();
be_bryan 0:b74591d5ab33 213 }
be_bryan 0:b74591d5ab33 214 #endif
be_bryan 0:b74591d5ab33 215 #if defined I2C2_BASE
be_bryan 0:b74591d5ab33 216 if (obj_s->i2c == I2C_2) {
be_bryan 0:b74591d5ab33 217 __HAL_RCC_I2C2_FORCE_RESET();
be_bryan 0:b74591d5ab33 218 __HAL_RCC_I2C2_RELEASE_RESET();
be_bryan 0:b74591d5ab33 219 }
be_bryan 0:b74591d5ab33 220 #endif
be_bryan 0:b74591d5ab33 221 #if defined I2C3_BASE
be_bryan 0:b74591d5ab33 222 if (obj_s->i2c == I2C_3) {
be_bryan 0:b74591d5ab33 223 __HAL_RCC_I2C3_FORCE_RESET();
be_bryan 0:b74591d5ab33 224 __HAL_RCC_I2C3_RELEASE_RESET();
be_bryan 0:b74591d5ab33 225 }
be_bryan 0:b74591d5ab33 226 #endif
be_bryan 0:b74591d5ab33 227 #if defined I2C4_BASE
be_bryan 0:b74591d5ab33 228 if (obj_s->i2c == I2C_4) {
be_bryan 0:b74591d5ab33 229 __HAL_RCC_I2C4_FORCE_RESET();
be_bryan 0:b74591d5ab33 230 __HAL_RCC_I2C4_RELEASE_RESET();
be_bryan 0:b74591d5ab33 231 }
be_bryan 0:b74591d5ab33 232 #endif
be_bryan 0:b74591d5ab33 233 #if defined FMPI2C1_BASE
be_bryan 0:b74591d5ab33 234 if (obj_s->i2c == FMPI2C_1) {
be_bryan 0:b74591d5ab33 235 __HAL_RCC_FMPI2C1_FORCE_RESET();
be_bryan 0:b74591d5ab33 236 __HAL_RCC_FMPI2C1_RELEASE_RESET();
be_bryan 0:b74591d5ab33 237 }
be_bryan 0:b74591d5ab33 238 #endif
be_bryan 0:b74591d5ab33 239 }
be_bryan 0:b74591d5ab33 240
be_bryan 0:b74591d5ab33 241 void i2c_sw_reset(i2c_t *obj)
be_bryan 0:b74591d5ab33 242 {
be_bryan 0:b74591d5ab33 243 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 244 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 245 /* SW reset procedure:
be_bryan 0:b74591d5ab33 246 * PE must be kept low during at least 3 APB clock cycles
be_bryan 0:b74591d5ab33 247 * in order to perform the software reset.
be_bryan 0:b74591d5ab33 248 * This is ensured by writing the following software sequence:
be_bryan 0:b74591d5ab33 249 * - Write PE=0
be_bryan 0:b74591d5ab33 250 * - Check PE=0
be_bryan 0:b74591d5ab33 251 * - Write PE=1.
be_bryan 0:b74591d5ab33 252 */
be_bryan 0:b74591d5ab33 253 handle->Instance->CR1 &= ~I2C_CR1_PE;
be_bryan 0:b74591d5ab33 254 while(handle->Instance->CR1 & I2C_CR1_PE);
be_bryan 0:b74591d5ab33 255 handle->Instance->CR1 |= I2C_CR1_PE;
be_bryan 0:b74591d5ab33 256 }
be_bryan 0:b74591d5ab33 257
be_bryan 0:b74591d5ab33 258 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
be_bryan 0:b74591d5ab33 259
be_bryan 0:b74591d5ab33 260 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 261
be_bryan 0:b74591d5ab33 262 // Determine the I2C to use
be_bryan 0:b74591d5ab33 263 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 264 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 265 obj_s->sda = sda;
be_bryan 0:b74591d5ab33 266 obj_s->scl = scl;
be_bryan 0:b74591d5ab33 267
be_bryan 0:b74591d5ab33 268 obj_s->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
be_bryan 0:b74591d5ab33 269 MBED_ASSERT(obj_s->i2c != (I2CName)NC);
be_bryan 0:b74591d5ab33 270
be_bryan 0:b74591d5ab33 271 #if defined I2C1_BASE
be_bryan 0:b74591d5ab33 272 // Enable I2C1 clock and pinout if not done
be_bryan 0:b74591d5ab33 273 if (obj_s->i2c == I2C_1) {
be_bryan 0:b74591d5ab33 274 obj_s->index = 0;
be_bryan 0:b74591d5ab33 275 __HAL_RCC_I2C1_CLK_ENABLE();
be_bryan 0:b74591d5ab33 276 // Configure I2C pins
be_bryan 0:b74591d5ab33 277 obj_s->event_i2cIRQ = I2C1_EV_IRQn;
be_bryan 0:b74591d5ab33 278 obj_s->error_i2cIRQ = I2C1_ER_IRQn;
be_bryan 0:b74591d5ab33 279 }
be_bryan 0:b74591d5ab33 280 #endif
be_bryan 0:b74591d5ab33 281 #if defined I2C2_BASE
be_bryan 0:b74591d5ab33 282 // Enable I2C2 clock and pinout if not done
be_bryan 0:b74591d5ab33 283 if (obj_s->i2c == I2C_2) {
be_bryan 0:b74591d5ab33 284 obj_s->index = 1;
be_bryan 0:b74591d5ab33 285 __HAL_RCC_I2C2_CLK_ENABLE();
be_bryan 0:b74591d5ab33 286 obj_s->event_i2cIRQ = I2C2_EV_IRQn;
be_bryan 0:b74591d5ab33 287 obj_s->error_i2cIRQ = I2C2_ER_IRQn;
be_bryan 0:b74591d5ab33 288 }
be_bryan 0:b74591d5ab33 289 #endif
be_bryan 0:b74591d5ab33 290 #if defined I2C3_BASE
be_bryan 0:b74591d5ab33 291 // Enable I2C3 clock and pinout if not done
be_bryan 0:b74591d5ab33 292 if (obj_s->i2c == I2C_3) {
be_bryan 0:b74591d5ab33 293 obj_s->index = 2;
be_bryan 0:b74591d5ab33 294 __HAL_RCC_I2C3_CLK_ENABLE();
be_bryan 0:b74591d5ab33 295 obj_s->event_i2cIRQ = I2C3_EV_IRQn;
be_bryan 0:b74591d5ab33 296 obj_s->error_i2cIRQ = I2C3_ER_IRQn;
be_bryan 0:b74591d5ab33 297 }
be_bryan 0:b74591d5ab33 298 #endif
be_bryan 0:b74591d5ab33 299 #if defined I2C4_BASE
be_bryan 0:b74591d5ab33 300 // Enable I2C3 clock and pinout if not done
be_bryan 0:b74591d5ab33 301 if (obj_s->i2c == I2C_4) {
be_bryan 0:b74591d5ab33 302 obj_s->index = 3;
be_bryan 0:b74591d5ab33 303 __HAL_RCC_I2C4_CLK_ENABLE();
be_bryan 0:b74591d5ab33 304 obj_s->event_i2cIRQ = I2C4_EV_IRQn;
be_bryan 0:b74591d5ab33 305 obj_s->error_i2cIRQ = I2C4_ER_IRQn;
be_bryan 0:b74591d5ab33 306 }
be_bryan 0:b74591d5ab33 307 #endif
be_bryan 0:b74591d5ab33 308 #if defined FMPI2C1_BASE
be_bryan 0:b74591d5ab33 309 // Enable I2C3 clock and pinout if not done
be_bryan 0:b74591d5ab33 310 if (obj_s->i2c == FMPI2C_1) {
be_bryan 0:b74591d5ab33 311 obj_s->index = 4;
be_bryan 0:b74591d5ab33 312 __HAL_RCC_FMPI2C1_CLK_ENABLE();
be_bryan 0:b74591d5ab33 313 obj_s->event_i2cIRQ = FMPI2C1_EV_IRQn;
be_bryan 0:b74591d5ab33 314 obj_s->error_i2cIRQ = FMPI2C1_ER_IRQn;
be_bryan 0:b74591d5ab33 315 }
be_bryan 0:b74591d5ab33 316 #endif
be_bryan 0:b74591d5ab33 317
be_bryan 0:b74591d5ab33 318 // Configure I2C pins
be_bryan 0:b74591d5ab33 319 pinmap_pinout(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 320 pinmap_pinout(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 321 pin_mode(sda, OpenDrainNoPull);
be_bryan 0:b74591d5ab33 322 pin_mode(scl, OpenDrainNoPull);
be_bryan 0:b74591d5ab33 323
be_bryan 0:b74591d5ab33 324 // I2C configuration
be_bryan 0:b74591d5ab33 325 // Default hz value used for timeout computation
be_bryan 0:b74591d5ab33 326 if(!obj_s->hz)
be_bryan 0:b74591d5ab33 327 obj_s->hz = 100000; // 100 kHz per default
be_bryan 0:b74591d5ab33 328
be_bryan 0:b74591d5ab33 329 // Reset to clear pending flags if any
be_bryan 0:b74591d5ab33 330 i2c_hw_reset(obj);
be_bryan 0:b74591d5ab33 331 i2c_frequency(obj, obj_s->hz );
be_bryan 0:b74591d5ab33 332
be_bryan 0:b74591d5ab33 333 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 334 // I2C master by default
be_bryan 0:b74591d5ab33 335 obj_s->slave = 0;
be_bryan 0:b74591d5ab33 336 obj_s->pending_slave_tx_master_rx = 0;
be_bryan 0:b74591d5ab33 337 obj_s->pending_slave_rx_maxter_tx = 0;
be_bryan 0:b74591d5ab33 338 #endif
be_bryan 0:b74591d5ab33 339
be_bryan 0:b74591d5ab33 340 // I2C Xfer operation init
be_bryan 0:b74591d5ab33 341 obj_s->event = 0;
be_bryan 0:b74591d5ab33 342 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 343 #ifdef I2C_IP_VERSION_V2
be_bryan 0:b74591d5ab33 344 obj_s->pending_start = 0;
be_bryan 0:b74591d5ab33 345 #endif
be_bryan 0:b74591d5ab33 346 }
be_bryan 0:b74591d5ab33 347
be_bryan 0:b74591d5ab33 348 void i2c_frequency(i2c_t *obj, int hz)
be_bryan 0:b74591d5ab33 349 {
be_bryan 0:b74591d5ab33 350 int timeout;
be_bryan 0:b74591d5ab33 351 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 352 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 353
be_bryan 0:b74591d5ab33 354 // wait before init
be_bryan 0:b74591d5ab33 355 timeout = BYTE_TIMEOUT;
be_bryan 0:b74591d5ab33 356 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
be_bryan 0:b74591d5ab33 357
be_bryan 0:b74591d5ab33 358 #ifdef I2C_IP_VERSION_V1
be_bryan 0:b74591d5ab33 359 handle->Init.ClockSpeed = hz;
be_bryan 0:b74591d5ab33 360 handle->Init.DutyCycle = I2C_DUTYCYCLE_2;
be_bryan 0:b74591d5ab33 361 #endif
be_bryan 0:b74591d5ab33 362 #ifdef I2C_IP_VERSION_V2
be_bryan 0:b74591d5ab33 363 /* Only predefined timing for below frequencies are supported */
be_bryan 0:b74591d5ab33 364 MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000));
be_bryan 0:b74591d5ab33 365 handle->Init.Timing = get_i2c_timing(hz);
be_bryan 0:b74591d5ab33 366
be_bryan 0:b74591d5ab33 367 // Enable the Fast Mode Plus capability
be_bryan 0:b74591d5ab33 368 if (hz == 1000000) {
be_bryan 0:b74591d5ab33 369 #if defined(I2C1_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C1)
be_bryan 0:b74591d5ab33 370 if (obj_s->i2c == I2C_1) {
be_bryan 0:b74591d5ab33 371 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C1);
be_bryan 0:b74591d5ab33 372 }
be_bryan 0:b74591d5ab33 373 #endif
be_bryan 0:b74591d5ab33 374 #if defined(I2C2_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C2)
be_bryan 0:b74591d5ab33 375 if (obj_s->i2c == I2C_2) {
be_bryan 0:b74591d5ab33 376 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C2);
be_bryan 0:b74591d5ab33 377 }
be_bryan 0:b74591d5ab33 378 #endif
be_bryan 0:b74591d5ab33 379 #if defined(I2C3_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C3)
be_bryan 0:b74591d5ab33 380 if (obj_s->i2c == I2C_3) {
be_bryan 0:b74591d5ab33 381 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C3);
be_bryan 0:b74591d5ab33 382 }
be_bryan 0:b74591d5ab33 383 #endif
be_bryan 0:b74591d5ab33 384 #if defined(I2C4_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C4)
be_bryan 0:b74591d5ab33 385 if (obj_s->i2c == I2C_4) {
be_bryan 0:b74591d5ab33 386 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C4);
be_bryan 0:b74591d5ab33 387 }
be_bryan 0:b74591d5ab33 388 #endif
be_bryan 0:b74591d5ab33 389 }
be_bryan 0:b74591d5ab33 390 #endif //I2C_IP_VERSION_V2
be_bryan 0:b74591d5ab33 391
be_bryan 0:b74591d5ab33 392 /*##-1- Configure the I2C clock source. The clock is derived from the SYSCLK #*/
be_bryan 0:b74591d5ab33 393 #if defined(I2C1_BASE) && defined (__HAL_RCC_I2C1_CONFIG)
be_bryan 0:b74591d5ab33 394 if (obj_s->i2c == I2C_1) {
be_bryan 0:b74591d5ab33 395 __HAL_RCC_I2C1_CONFIG(I2CAPI_I2C1_CLKSRC);
be_bryan 0:b74591d5ab33 396 }
be_bryan 0:b74591d5ab33 397 #endif
be_bryan 0:b74591d5ab33 398 #if defined(I2C2_BASE) && defined(__HAL_RCC_I2C2_CONFIG)
be_bryan 0:b74591d5ab33 399 if (obj_s->i2c == I2C_2) {
be_bryan 0:b74591d5ab33 400 __HAL_RCC_I2C2_CONFIG(I2CAPI_I2C2_CLKSRC);
be_bryan 0:b74591d5ab33 401 }
be_bryan 0:b74591d5ab33 402 #endif
be_bryan 0:b74591d5ab33 403 #if defined(I2C3_BASE) && defined(__HAL_RCC_I2C3_CONFIG)
be_bryan 0:b74591d5ab33 404 if (obj_s->i2c == I2C_3) {
be_bryan 0:b74591d5ab33 405 __HAL_RCC_I2C3_CONFIG(I2CAPI_I2C3_CLKSRC);
be_bryan 0:b74591d5ab33 406 }
be_bryan 0:b74591d5ab33 407 #endif
be_bryan 0:b74591d5ab33 408 #if defined(I2C4_BASE) && defined(__HAL_RCC_I2C4_CONFIG)
be_bryan 0:b74591d5ab33 409 if (obj_s->i2c == I2C_4) {
be_bryan 0:b74591d5ab33 410 __HAL_RCC_I2C4_CONFIG(I2CAPI_I2C4_CLKSRC);
be_bryan 0:b74591d5ab33 411 }
be_bryan 0:b74591d5ab33 412 #endif
be_bryan 0:b74591d5ab33 413
be_bryan 0:b74591d5ab33 414 #ifdef I2C_ANALOGFILTER_ENABLE
be_bryan 0:b74591d5ab33 415 /* Enable the Analog I2C Filter */
be_bryan 0:b74591d5ab33 416 HAL_I2CEx_AnalogFilter_Config(handle,I2C_ANALOGFILTER_ENABLE);
be_bryan 0:b74591d5ab33 417 #endif
be_bryan 0:b74591d5ab33 418
be_bryan 0:b74591d5ab33 419 // I2C configuration
be_bryan 0:b74591d5ab33 420 handle->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
be_bryan 0:b74591d5ab33 421 handle->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
be_bryan 0:b74591d5ab33 422 handle->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
be_bryan 0:b74591d5ab33 423 handle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
be_bryan 0:b74591d5ab33 424 handle->Init.OwnAddress1 = 0;
be_bryan 0:b74591d5ab33 425 handle->Init.OwnAddress2 = 0;
be_bryan 0:b74591d5ab33 426 HAL_I2C_Init(handle);
be_bryan 0:b74591d5ab33 427
be_bryan 0:b74591d5ab33 428 /* store frequency for timeout computation */
be_bryan 0:b74591d5ab33 429 obj_s->hz = hz;
be_bryan 0:b74591d5ab33 430 }
be_bryan 0:b74591d5ab33 431
be_bryan 0:b74591d5ab33 432 i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c){
be_bryan 0:b74591d5ab33 433 /* Aim of the function is to get i2c_s pointer using hi2c pointer */
be_bryan 0:b74591d5ab33 434 /* Highly inspired from magical linux kernel's "container_of" */
be_bryan 0:b74591d5ab33 435 /* (which was not directly used since not compatible with IAR toolchain) */
be_bryan 0:b74591d5ab33 436 struct i2c_s *obj_s;
be_bryan 0:b74591d5ab33 437 i2c_t *obj;
be_bryan 0:b74591d5ab33 438
be_bryan 0:b74591d5ab33 439 obj_s = (struct i2c_s *)( (char *)hi2c - offsetof(struct i2c_s,handle));
be_bryan 0:b74591d5ab33 440 obj = (i2c_t *)( (char *)obj_s - offsetof(i2c_t,i2c));
be_bryan 0:b74591d5ab33 441
be_bryan 0:b74591d5ab33 442 return (obj);
be_bryan 0:b74591d5ab33 443 }
be_bryan 0:b74591d5ab33 444
be_bryan 0:b74591d5ab33 445 void i2c_reset(i2c_t *obj) {
be_bryan 0:b74591d5ab33 446 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 447 /* As recommended in i2c_api.h, mainly send stop */
be_bryan 0:b74591d5ab33 448 i2c_stop(obj);
be_bryan 0:b74591d5ab33 449 /* then re-init */
be_bryan 0:b74591d5ab33 450 i2c_init(obj, obj_s->sda, obj_s->scl);
be_bryan 0:b74591d5ab33 451 }
be_bryan 0:b74591d5ab33 452
be_bryan 0:b74591d5ab33 453 /*
be_bryan 0:b74591d5ab33 454 * UNITARY APIS.
be_bryan 0:b74591d5ab33 455 * For very basic operations, direct registers access is needed
be_bryan 0:b74591d5ab33 456 * There are 2 different IPs version that need to be supported
be_bryan 0:b74591d5ab33 457 */
be_bryan 0:b74591d5ab33 458 #ifdef I2C_IP_VERSION_V1
be_bryan 0:b74591d5ab33 459 int i2c_start(i2c_t *obj) {
be_bryan 0:b74591d5ab33 460
be_bryan 0:b74591d5ab33 461 int timeout;
be_bryan 0:b74591d5ab33 462 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 463 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 464
be_bryan 0:b74591d5ab33 465 // Clear Acknowledge failure flag
be_bryan 0:b74591d5ab33 466 __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_AF);
be_bryan 0:b74591d5ab33 467
be_bryan 0:b74591d5ab33 468 // Wait the STOP condition has been previously correctly sent
be_bryan 0:b74591d5ab33 469 // This timeout can be avoid in some specific cases by simply clearing the STOP bit
be_bryan 0:b74591d5ab33 470 timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 471 while ((handle->Instance->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) {
be_bryan 0:b74591d5ab33 472 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 473 return 1;
be_bryan 0:b74591d5ab33 474 }
be_bryan 0:b74591d5ab33 475 }
be_bryan 0:b74591d5ab33 476
be_bryan 0:b74591d5ab33 477 // Generate the START condition
be_bryan 0:b74591d5ab33 478 handle->Instance->CR1 |= I2C_CR1_START;
be_bryan 0:b74591d5ab33 479
be_bryan 0:b74591d5ab33 480 // Wait the START condition has been correctly sent
be_bryan 0:b74591d5ab33 481 timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 482 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_SB) == RESET) {
be_bryan 0:b74591d5ab33 483 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 484 return 1;
be_bryan 0:b74591d5ab33 485 }
be_bryan 0:b74591d5ab33 486 }
be_bryan 0:b74591d5ab33 487
be_bryan 0:b74591d5ab33 488 return 0;
be_bryan 0:b74591d5ab33 489 }
be_bryan 0:b74591d5ab33 490
be_bryan 0:b74591d5ab33 491 int i2c_stop(i2c_t *obj) {
be_bryan 0:b74591d5ab33 492 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 493 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
be_bryan 0:b74591d5ab33 494
be_bryan 0:b74591d5ab33 495 // Generate the STOP condition
be_bryan 0:b74591d5ab33 496 i2c->CR1 |= I2C_CR1_STOP;
be_bryan 0:b74591d5ab33 497
be_bryan 0:b74591d5ab33 498 /* In case of mixed usage of the APIs (unitary + SYNC)
be_bryan 0:b74591d5ab33 499 * re-init HAL state
be_bryan 0:b74591d5ab33 500 */
be_bryan 0:b74591d5ab33 501 if(obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME)
be_bryan 0:b74591d5ab33 502 i2c_init(obj, obj_s->sda, obj_s->scl);
be_bryan 0:b74591d5ab33 503
be_bryan 0:b74591d5ab33 504 return 0;
be_bryan 0:b74591d5ab33 505 }
be_bryan 0:b74591d5ab33 506
be_bryan 0:b74591d5ab33 507 int i2c_byte_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 508
be_bryan 0:b74591d5ab33 509 int timeout;
be_bryan 0:b74591d5ab33 510 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 511 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 512
be_bryan 0:b74591d5ab33 513 if (last) {
be_bryan 0:b74591d5ab33 514 // Don't acknowledge the last byte
be_bryan 0:b74591d5ab33 515 handle->Instance->CR1 &= ~I2C_CR1_ACK;
be_bryan 0:b74591d5ab33 516 } else {
be_bryan 0:b74591d5ab33 517 // Acknowledge the byte
be_bryan 0:b74591d5ab33 518 handle->Instance->CR1 |= I2C_CR1_ACK;
be_bryan 0:b74591d5ab33 519 }
be_bryan 0:b74591d5ab33 520
be_bryan 0:b74591d5ab33 521 // Wait until the byte is received
be_bryan 0:b74591d5ab33 522 timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 523 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE) == RESET) {
be_bryan 0:b74591d5ab33 524 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 525 return -1;
be_bryan 0:b74591d5ab33 526 }
be_bryan 0:b74591d5ab33 527 }
be_bryan 0:b74591d5ab33 528
be_bryan 0:b74591d5ab33 529 return (int)handle->Instance->DR;
be_bryan 0:b74591d5ab33 530 }
be_bryan 0:b74591d5ab33 531
be_bryan 0:b74591d5ab33 532 int i2c_byte_write(i2c_t *obj, int data) {
be_bryan 0:b74591d5ab33 533
be_bryan 0:b74591d5ab33 534 int timeout;
be_bryan 0:b74591d5ab33 535 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 536 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 537
be_bryan 0:b74591d5ab33 538 handle->Instance->DR = (uint8_t)data;
be_bryan 0:b74591d5ab33 539
be_bryan 0:b74591d5ab33 540 // Wait until the byte (might be the address) is transmitted
be_bryan 0:b74591d5ab33 541 timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 542 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE) == RESET) &&
be_bryan 0:b74591d5ab33 543 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BTF) == RESET) &&
be_bryan 0:b74591d5ab33 544 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) {
be_bryan 0:b74591d5ab33 545 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 546 return 2;
be_bryan 0:b74591d5ab33 547 }
be_bryan 0:b74591d5ab33 548 }
be_bryan 0:b74591d5ab33 549
be_bryan 0:b74591d5ab33 550 if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET)
be_bryan 0:b74591d5ab33 551 {
be_bryan 0:b74591d5ab33 552 __HAL_I2C_CLEAR_ADDRFLAG(handle);
be_bryan 0:b74591d5ab33 553 }
be_bryan 0:b74591d5ab33 554
be_bryan 0:b74591d5ab33 555 return 1;
be_bryan 0:b74591d5ab33 556 }
be_bryan 0:b74591d5ab33 557 #endif //I2C_IP_VERSION_V1
be_bryan 0:b74591d5ab33 558 #ifdef I2C_IP_VERSION_V2
be_bryan 0:b74591d5ab33 559
be_bryan 0:b74591d5ab33 560 int i2c_start(i2c_t *obj) {
be_bryan 0:b74591d5ab33 561 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 562 /* This I2C IP doesn't */
be_bryan 0:b74591d5ab33 563 obj_s->pending_start = 1;
be_bryan 0:b74591d5ab33 564 return 0;
be_bryan 0:b74591d5ab33 565 }
be_bryan 0:b74591d5ab33 566
be_bryan 0:b74591d5ab33 567 int i2c_stop(i2c_t *obj) {
be_bryan 0:b74591d5ab33 568 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 569 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 570 int timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 571 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 572 if (obj_s->slave) {
be_bryan 0:b74591d5ab33 573 /* re-init slave when stop is requested */
be_bryan 0:b74591d5ab33 574 i2c_init(obj, obj_s->sda, obj_s->scl);
be_bryan 0:b74591d5ab33 575 return 0;
be_bryan 0:b74591d5ab33 576 }
be_bryan 0:b74591d5ab33 577 #endif
be_bryan 0:b74591d5ab33 578 // Disable reload mode
be_bryan 0:b74591d5ab33 579 handle->Instance->CR2 &= (uint32_t)~I2C_CR2_RELOAD;
be_bryan 0:b74591d5ab33 580 // Generate the STOP condition
be_bryan 0:b74591d5ab33 581 handle->Instance->CR2 |= I2C_CR2_STOP;
be_bryan 0:b74591d5ab33 582
be_bryan 0:b74591d5ab33 583 timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 584 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_STOPF)) {
be_bryan 0:b74591d5ab33 585 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 586 return I2C_ERROR_BUS_BUSY;
be_bryan 0:b74591d5ab33 587 }
be_bryan 0:b74591d5ab33 588 }
be_bryan 0:b74591d5ab33 589
be_bryan 0:b74591d5ab33 590 /* Clear STOP Flag */
be_bryan 0:b74591d5ab33 591 __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_STOPF);
be_bryan 0:b74591d5ab33 592
be_bryan 0:b74591d5ab33 593 /* Erase slave address, this wiil be used as a marker
be_bryan 0:b74591d5ab33 594 * to know when we need to prepare next start */
be_bryan 0:b74591d5ab33 595 handle->Instance->CR2 &= ~I2C_CR2_SADD;
be_bryan 0:b74591d5ab33 596
be_bryan 0:b74591d5ab33 597 /*
be_bryan 0:b74591d5ab33 598 * V2 IP is meant for automatic STOP, not user STOP
be_bryan 0:b74591d5ab33 599 * SW reset the IP state machine before next transaction
be_bryan 0:b74591d5ab33 600 */
be_bryan 0:b74591d5ab33 601 i2c_sw_reset(obj);
be_bryan 0:b74591d5ab33 602
be_bryan 0:b74591d5ab33 603 /* In case of mixed usage of the APIs (unitary + SYNC)
be_bryan 0:b74591d5ab33 604 * re-init HAL state */
be_bryan 0:b74591d5ab33 605 if (obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) {
be_bryan 0:b74591d5ab33 606 i2c_init(obj, obj_s->sda, obj_s->scl);
be_bryan 0:b74591d5ab33 607 }
be_bryan 0:b74591d5ab33 608
be_bryan 0:b74591d5ab33 609 return 0;
be_bryan 0:b74591d5ab33 610 }
be_bryan 0:b74591d5ab33 611
be_bryan 0:b74591d5ab33 612 int i2c_byte_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 613 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 614 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 615 int timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 616 uint32_t tmpreg = handle->Instance->CR2;
be_bryan 0:b74591d5ab33 617 char data;
be_bryan 0:b74591d5ab33 618 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 619 if (obj_s->slave) {
be_bryan 0:b74591d5ab33 620 return i2c_slave_read(obj, &data, 1);
be_bryan 0:b74591d5ab33 621 }
be_bryan 0:b74591d5ab33 622 #endif
be_bryan 0:b74591d5ab33 623 /* Then send data when there's room in the TX fifo */
be_bryan 0:b74591d5ab33 624 if ((tmpreg & I2C_CR2_RELOAD) != 0) {
be_bryan 0:b74591d5ab33 625 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) {
be_bryan 0:b74591d5ab33 626 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 627 DEBUG_PRINTF("timeout in byte_read\r\n");
be_bryan 0:b74591d5ab33 628 return -1;
be_bryan 0:b74591d5ab33 629 }
be_bryan 0:b74591d5ab33 630 }
be_bryan 0:b74591d5ab33 631 }
be_bryan 0:b74591d5ab33 632
be_bryan 0:b74591d5ab33 633 /* Enable reload mode as we don't know how many bytes will be sent */
be_bryan 0:b74591d5ab33 634 /* and set transfer size to 1 */
be_bryan 0:b74591d5ab33 635 tmpreg |= I2C_CR2_RELOAD | (I2C_CR2_NBYTES & (1 << 16));
be_bryan 0:b74591d5ab33 636 /* Set the prepared configuration */
be_bryan 0:b74591d5ab33 637 handle->Instance->CR2 = tmpreg;
be_bryan 0:b74591d5ab33 638
be_bryan 0:b74591d5ab33 639 timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 640 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE)) {
be_bryan 0:b74591d5ab33 641 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 642 return -1;
be_bryan 0:b74591d5ab33 643 }
be_bryan 0:b74591d5ab33 644 }
be_bryan 0:b74591d5ab33 645
be_bryan 0:b74591d5ab33 646 /* Then Get Byte */
be_bryan 0:b74591d5ab33 647 data = handle->Instance->RXDR;
be_bryan 0:b74591d5ab33 648
be_bryan 0:b74591d5ab33 649 if (last) {
be_bryan 0:b74591d5ab33 650 /* Disable Address Acknowledge */
be_bryan 0:b74591d5ab33 651 handle->Instance->CR2 |= I2C_CR2_NACK;
be_bryan 0:b74591d5ab33 652 }
be_bryan 0:b74591d5ab33 653
be_bryan 0:b74591d5ab33 654 return data;
be_bryan 0:b74591d5ab33 655 }
be_bryan 0:b74591d5ab33 656
be_bryan 0:b74591d5ab33 657 int i2c_byte_write(i2c_t *obj, int data) {
be_bryan 0:b74591d5ab33 658 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 659 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 660 int timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 661 uint32_t tmpreg = handle->Instance->CR2;
be_bryan 0:b74591d5ab33 662 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 663 if (obj_s->slave) {
be_bryan 0:b74591d5ab33 664 return i2c_slave_write(obj, (char *) &data, 1);
be_bryan 0:b74591d5ab33 665 }
be_bryan 0:b74591d5ab33 666 #endif
be_bryan 0:b74591d5ab33 667 if (obj_s->pending_start) {
be_bryan 0:b74591d5ab33 668 obj_s->pending_start = 0;
be_bryan 0:b74591d5ab33 669 //* First byte after the start is the address */
be_bryan 0:b74591d5ab33 670 tmpreg |= (uint32_t)((uint32_t)data & I2C_CR2_SADD);
be_bryan 0:b74591d5ab33 671 if (data & 0x01) {
be_bryan 0:b74591d5ab33 672 tmpreg |= I2C_CR2_START | I2C_CR2_RD_WRN;
be_bryan 0:b74591d5ab33 673 } else {
be_bryan 0:b74591d5ab33 674 tmpreg |= I2C_CR2_START;
be_bryan 0:b74591d5ab33 675 tmpreg &= ~I2C_CR2_RD_WRN;
be_bryan 0:b74591d5ab33 676 }
be_bryan 0:b74591d5ab33 677 /* Disable reload first to use it later */
be_bryan 0:b74591d5ab33 678 tmpreg &= ~I2C_CR2_RELOAD;
be_bryan 0:b74591d5ab33 679 /* Disable Autoend */
be_bryan 0:b74591d5ab33 680 tmpreg &= ~I2C_CR2_AUTOEND;
be_bryan 0:b74591d5ab33 681 /* Do not set any transfer size for now */
be_bryan 0:b74591d5ab33 682 tmpreg |= (I2C_CR2_NBYTES & (1 << 16));
be_bryan 0:b74591d5ab33 683 /* Set the prepared configuration */
be_bryan 0:b74591d5ab33 684 handle->Instance->CR2 = tmpreg;
be_bryan 0:b74591d5ab33 685 } else {
be_bryan 0:b74591d5ab33 686 /* Set the prepared configuration */
be_bryan 0:b74591d5ab33 687 tmpreg = handle->Instance->CR2;
be_bryan 0:b74591d5ab33 688
be_bryan 0:b74591d5ab33 689 /* Then send data when there's room in the TX fifo */
be_bryan 0:b74591d5ab33 690 if ((tmpreg & I2C_CR2_RELOAD) != 0) {
be_bryan 0:b74591d5ab33 691 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) {
be_bryan 0:b74591d5ab33 692 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 693 DEBUG_PRINTF("timeout in byte_write\r\n");
be_bryan 0:b74591d5ab33 694 return 2;
be_bryan 0:b74591d5ab33 695 }
be_bryan 0:b74591d5ab33 696 }
be_bryan 0:b74591d5ab33 697 }
be_bryan 0:b74591d5ab33 698 /* Enable reload mode as we don't know how many bytes will eb sent */
be_bryan 0:b74591d5ab33 699 tmpreg |= I2C_CR2_RELOAD;
be_bryan 0:b74591d5ab33 700 /* Set transfer size to 1 */
be_bryan 0:b74591d5ab33 701 tmpreg |= (I2C_CR2_NBYTES & (1 << 16));
be_bryan 0:b74591d5ab33 702 /* Set the prepared configuration */
be_bryan 0:b74591d5ab33 703 handle->Instance->CR2 = tmpreg;
be_bryan 0:b74591d5ab33 704 /* Prepare next write */
be_bryan 0:b74591d5ab33 705 timeout = FLAG_TIMEOUT;
be_bryan 0:b74591d5ab33 706 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE)) {
be_bryan 0:b74591d5ab33 707 if ((timeout--) == 0) {
be_bryan 0:b74591d5ab33 708 return 2;
be_bryan 0:b74591d5ab33 709 }
be_bryan 0:b74591d5ab33 710 }
be_bryan 0:b74591d5ab33 711 /* Write byte */
be_bryan 0:b74591d5ab33 712 handle->Instance->TXDR = data;
be_bryan 0:b74591d5ab33 713 }
be_bryan 0:b74591d5ab33 714
be_bryan 0:b74591d5ab33 715 return 1;
be_bryan 0:b74591d5ab33 716 }
be_bryan 0:b74591d5ab33 717 #endif //I2C_IP_VERSION_V2
be_bryan 0:b74591d5ab33 718
be_bryan 0:b74591d5ab33 719 /*
be_bryan 0:b74591d5ab33 720 * SYNC APIS
be_bryan 0:b74591d5ab33 721 */
be_bryan 0:b74591d5ab33 722 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 723 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 724 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 725 int count = I2C_ERROR_BUS_BUSY, ret = 0;
be_bryan 0:b74591d5ab33 726 uint32_t timeout = 0;
be_bryan 0:b74591d5ab33 727
be_bryan 0:b74591d5ab33 728 // Trick to remove compiler warning "left and right operands are identical" in some cases
be_bryan 0:b74591d5ab33 729 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 730 uint32_t op2 = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 731 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
be_bryan 0:b74591d5ab33 732 if (stop)
be_bryan 0:b74591d5ab33 733 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 734 else
be_bryan 0:b74591d5ab33 735 obj_s->XferOperation = I2C_FIRST_FRAME;
be_bryan 0:b74591d5ab33 736 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
be_bryan 0:b74591d5ab33 737 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
be_bryan 0:b74591d5ab33 738 if (stop)
be_bryan 0:b74591d5ab33 739 obj_s->XferOperation = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 740 else
be_bryan 0:b74591d5ab33 741 obj_s->XferOperation = I2C_NEXT_FRAME;
be_bryan 0:b74591d5ab33 742 }
be_bryan 0:b74591d5ab33 743
be_bryan 0:b74591d5ab33 744 obj_s->event = 0;
be_bryan 0:b74591d5ab33 745
be_bryan 0:b74591d5ab33 746 /* Activate default IRQ handlers for sync mode
be_bryan 0:b74591d5ab33 747 * which would be overwritten in async mode
be_bryan 0:b74591d5ab33 748 */
be_bryan 0:b74591d5ab33 749 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
be_bryan 0:b74591d5ab33 750
be_bryan 0:b74591d5ab33 751 ret = HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
be_bryan 0:b74591d5ab33 752
be_bryan 0:b74591d5ab33 753 if(ret == HAL_OK) {
be_bryan 0:b74591d5ab33 754 timeout = BYTE_TIMEOUT_US * (length + 1);
be_bryan 0:b74591d5ab33 755 /* transfer started : wait completion or timeout */
be_bryan 0:b74591d5ab33 756 while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
be_bryan 0:b74591d5ab33 757 wait_us(1);
be_bryan 0:b74591d5ab33 758 }
be_bryan 0:b74591d5ab33 759
be_bryan 0:b74591d5ab33 760 i2c_ev_err_disable(obj);
be_bryan 0:b74591d5ab33 761
be_bryan 0:b74591d5ab33 762 if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
be_bryan 0:b74591d5ab33 763 DEBUG_PRINTF(" TIMEOUT or error in i2c_read\r\n");
be_bryan 0:b74591d5ab33 764 /* re-init IP to try and get back in a working state */
be_bryan 0:b74591d5ab33 765 i2c_init(obj, obj_s->sda, obj_s->scl);
be_bryan 0:b74591d5ab33 766 } else {
be_bryan 0:b74591d5ab33 767 count = length;
be_bryan 0:b74591d5ab33 768 }
be_bryan 0:b74591d5ab33 769 } else {
be_bryan 0:b74591d5ab33 770 DEBUG_PRINTF("ERROR in i2c_read:%d\r\n", ret);
be_bryan 0:b74591d5ab33 771 }
be_bryan 0:b74591d5ab33 772
be_bryan 0:b74591d5ab33 773 return count;
be_bryan 0:b74591d5ab33 774 }
be_bryan 0:b74591d5ab33 775
be_bryan 0:b74591d5ab33 776 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 777 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 778 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 779 int count = I2C_ERROR_BUS_BUSY, ret = 0;
be_bryan 0:b74591d5ab33 780 uint32_t timeout = 0;
be_bryan 0:b74591d5ab33 781
be_bryan 0:b74591d5ab33 782 // Trick to remove compiler warning "left and right operands are identical" in some cases
be_bryan 0:b74591d5ab33 783 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 784 uint32_t op2 = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 785 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
be_bryan 0:b74591d5ab33 786 if (stop)
be_bryan 0:b74591d5ab33 787 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 788 else
be_bryan 0:b74591d5ab33 789 obj_s->XferOperation = I2C_FIRST_FRAME;
be_bryan 0:b74591d5ab33 790 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
be_bryan 0:b74591d5ab33 791 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
be_bryan 0:b74591d5ab33 792 if (stop)
be_bryan 0:b74591d5ab33 793 obj_s->XferOperation = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 794 else
be_bryan 0:b74591d5ab33 795 obj_s->XferOperation = I2C_NEXT_FRAME;
be_bryan 0:b74591d5ab33 796 }
be_bryan 0:b74591d5ab33 797
be_bryan 0:b74591d5ab33 798 obj_s->event = 0;
be_bryan 0:b74591d5ab33 799
be_bryan 0:b74591d5ab33 800 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
be_bryan 0:b74591d5ab33 801
be_bryan 0:b74591d5ab33 802 ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
be_bryan 0:b74591d5ab33 803
be_bryan 0:b74591d5ab33 804 if(ret == HAL_OK) {
be_bryan 0:b74591d5ab33 805 timeout = BYTE_TIMEOUT_US * (length + 1);
be_bryan 0:b74591d5ab33 806 /* transfer started : wait completion or timeout */
be_bryan 0:b74591d5ab33 807 while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
be_bryan 0:b74591d5ab33 808 wait_us(1);
be_bryan 0:b74591d5ab33 809 }
be_bryan 0:b74591d5ab33 810
be_bryan 0:b74591d5ab33 811 i2c_ev_err_disable(obj);
be_bryan 0:b74591d5ab33 812
be_bryan 0:b74591d5ab33 813 if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
be_bryan 0:b74591d5ab33 814 DEBUG_PRINTF(" TIMEOUT or error in i2c_write\r\n");
be_bryan 0:b74591d5ab33 815 /* re-init IP to try and get back in a working state */
be_bryan 0:b74591d5ab33 816 i2c_init(obj, obj_s->sda, obj_s->scl);
be_bryan 0:b74591d5ab33 817 } else {
be_bryan 0:b74591d5ab33 818 count = length;
be_bryan 0:b74591d5ab33 819 }
be_bryan 0:b74591d5ab33 820 } else {
be_bryan 0:b74591d5ab33 821 DEBUG_PRINTF("ERROR in i2c_read\r\n");
be_bryan 0:b74591d5ab33 822 }
be_bryan 0:b74591d5ab33 823
be_bryan 0:b74591d5ab33 824 return count;
be_bryan 0:b74591d5ab33 825 }
be_bryan 0:b74591d5ab33 826
be_bryan 0:b74591d5ab33 827 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c){
be_bryan 0:b74591d5ab33 828 /* Get object ptr based on handler ptr */
be_bryan 0:b74591d5ab33 829 i2c_t *obj = get_i2c_obj(hi2c);
be_bryan 0:b74591d5ab33 830 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 831
be_bryan 0:b74591d5ab33 832 #if DEVICE_I2C_ASYNCH
be_bryan 0:b74591d5ab33 833 /* Handle potential Tx/Rx use case */
be_bryan 0:b74591d5ab33 834 if ((obj->tx_buff.length) && (obj->rx_buff.length)) {
be_bryan 0:b74591d5ab33 835 if (obj_s->stop) {
be_bryan 0:b74591d5ab33 836 obj_s->XferOperation = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 837 } else {
be_bryan 0:b74591d5ab33 838 obj_s->XferOperation = I2C_NEXT_FRAME;
be_bryan 0:b74591d5ab33 839 }
be_bryan 0:b74591d5ab33 840
be_bryan 0:b74591d5ab33 841 HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t*)obj->rx_buff.buffer , obj->rx_buff.length, obj_s->XferOperation);
be_bryan 0:b74591d5ab33 842 }
be_bryan 0:b74591d5ab33 843 else
be_bryan 0:b74591d5ab33 844 #endif
be_bryan 0:b74591d5ab33 845 {
be_bryan 0:b74591d5ab33 846 /* Set event flag */
be_bryan 0:b74591d5ab33 847 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
be_bryan 0:b74591d5ab33 848 }
be_bryan 0:b74591d5ab33 849 }
be_bryan 0:b74591d5ab33 850
be_bryan 0:b74591d5ab33 851 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c){
be_bryan 0:b74591d5ab33 852 /* Get object ptr based on handler ptr */
be_bryan 0:b74591d5ab33 853 i2c_t *obj = get_i2c_obj(hi2c);
be_bryan 0:b74591d5ab33 854 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 855
be_bryan 0:b74591d5ab33 856 /* Set event flag */
be_bryan 0:b74591d5ab33 857 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
be_bryan 0:b74591d5ab33 858 }
be_bryan 0:b74591d5ab33 859
be_bryan 0:b74591d5ab33 860 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c){
be_bryan 0:b74591d5ab33 861 /* Get object ptr based on handler ptr */
be_bryan 0:b74591d5ab33 862 i2c_t *obj = get_i2c_obj(hi2c);
be_bryan 0:b74591d5ab33 863 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 864 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 865 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 866 uint32_t address = 0;
be_bryan 0:b74591d5ab33 867 /* Store address to handle it after reset */
be_bryan 0:b74591d5ab33 868 if(obj_s->slave)
be_bryan 0:b74591d5ab33 869 address = handle->Init.OwnAddress1;
be_bryan 0:b74591d5ab33 870 #endif
be_bryan 0:b74591d5ab33 871
be_bryan 0:b74591d5ab33 872 DEBUG_PRINTF("HAL_I2C_ErrorCallback:%d, index=%d\r\n", (int) hi2c->ErrorCode, obj_s->index);
be_bryan 0:b74591d5ab33 873
be_bryan 0:b74591d5ab33 874 /* re-init IP to try and get back in a working state */
be_bryan 0:b74591d5ab33 875 i2c_init(obj, obj_s->sda, obj_s->scl);
be_bryan 0:b74591d5ab33 876
be_bryan 0:b74591d5ab33 877 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 878 /* restore slave address */
be_bryan 0:b74591d5ab33 879 if (address != 0) {
be_bryan 0:b74591d5ab33 880 obj_s->slave = 1;
be_bryan 0:b74591d5ab33 881 i2c_slave_address(obj, 0, address, 0);
be_bryan 0:b74591d5ab33 882 }
be_bryan 0:b74591d5ab33 883 #endif
be_bryan 0:b74591d5ab33 884
be_bryan 0:b74591d5ab33 885 /* Keep Set event flag */
be_bryan 0:b74591d5ab33 886 obj_s->event = I2C_EVENT_ERROR;
be_bryan 0:b74591d5ab33 887 }
be_bryan 0:b74591d5ab33 888
be_bryan 0:b74591d5ab33 889 #if DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 890 /* SLAVE API FUNCTIONS */
be_bryan 0:b74591d5ab33 891 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
be_bryan 0:b74591d5ab33 892 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 893 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 894
be_bryan 0:b74591d5ab33 895 // I2C configuration
be_bryan 0:b74591d5ab33 896 handle->Init.OwnAddress1 = address;
be_bryan 0:b74591d5ab33 897 HAL_I2C_Init(handle);
be_bryan 0:b74591d5ab33 898
be_bryan 0:b74591d5ab33 899 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
be_bryan 0:b74591d5ab33 900
be_bryan 0:b74591d5ab33 901 HAL_I2C_EnableListen_IT(handle);
be_bryan 0:b74591d5ab33 902 }
be_bryan 0:b74591d5ab33 903
be_bryan 0:b74591d5ab33 904 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
be_bryan 0:b74591d5ab33 905
be_bryan 0:b74591d5ab33 906 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 907 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 908
be_bryan 0:b74591d5ab33 909 if (enable_slave) {
be_bryan 0:b74591d5ab33 910 obj_s->slave = 1;
be_bryan 0:b74591d5ab33 911 HAL_I2C_EnableListen_IT(handle);
be_bryan 0:b74591d5ab33 912 } else {
be_bryan 0:b74591d5ab33 913 obj_s->slave = 0;
be_bryan 0:b74591d5ab33 914 HAL_I2C_DisableListen_IT(handle);
be_bryan 0:b74591d5ab33 915 }
be_bryan 0:b74591d5ab33 916 }
be_bryan 0:b74591d5ab33 917
be_bryan 0:b74591d5ab33 918 // See I2CSlave.h
be_bryan 0:b74591d5ab33 919 #define NoData 0 // the slave has not been addressed
be_bryan 0:b74591d5ab33 920 #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
be_bryan 0:b74591d5ab33 921 #define WriteGeneral 2 // the master is writing to all slave
be_bryan 0:b74591d5ab33 922 #define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
be_bryan 0:b74591d5ab33 923
be_bryan 0:b74591d5ab33 924
be_bryan 0:b74591d5ab33 925 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) {
be_bryan 0:b74591d5ab33 926 /* Get object ptr based on handler ptr */
be_bryan 0:b74591d5ab33 927 i2c_t *obj = get_i2c_obj(hi2c);
be_bryan 0:b74591d5ab33 928 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 929
be_bryan 0:b74591d5ab33 930 /* Transfer direction in HAL is from Master point of view */
be_bryan 0:b74591d5ab33 931 if(TransferDirection == I2C_DIRECTION_RECEIVE) {
be_bryan 0:b74591d5ab33 932 obj_s->pending_slave_tx_master_rx = 1;
be_bryan 0:b74591d5ab33 933 }
be_bryan 0:b74591d5ab33 934
be_bryan 0:b74591d5ab33 935 if(TransferDirection == I2C_DIRECTION_TRANSMIT) {
be_bryan 0:b74591d5ab33 936 obj_s->pending_slave_rx_maxter_tx = 1;
be_bryan 0:b74591d5ab33 937 }
be_bryan 0:b74591d5ab33 938 }
be_bryan 0:b74591d5ab33 939
be_bryan 0:b74591d5ab33 940 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle){
be_bryan 0:b74591d5ab33 941 /* Get object ptr based on handler ptr */
be_bryan 0:b74591d5ab33 942 i2c_t *obj = get_i2c_obj(I2cHandle);
be_bryan 0:b74591d5ab33 943 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 944 obj_s->pending_slave_tx_master_rx = 0;
be_bryan 0:b74591d5ab33 945 }
be_bryan 0:b74591d5ab33 946
be_bryan 0:b74591d5ab33 947 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle){
be_bryan 0:b74591d5ab33 948 /* Get object ptr based on handler ptr */
be_bryan 0:b74591d5ab33 949 i2c_t *obj = get_i2c_obj(I2cHandle);
be_bryan 0:b74591d5ab33 950 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 951 obj_s->pending_slave_rx_maxter_tx = 0;
be_bryan 0:b74591d5ab33 952 }
be_bryan 0:b74591d5ab33 953
be_bryan 0:b74591d5ab33 954 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
be_bryan 0:b74591d5ab33 955 {
be_bryan 0:b74591d5ab33 956 /* restart listening for master requests */
be_bryan 0:b74591d5ab33 957 HAL_I2C_EnableListen_IT(hi2c);
be_bryan 0:b74591d5ab33 958 }
be_bryan 0:b74591d5ab33 959
be_bryan 0:b74591d5ab33 960 int i2c_slave_receive(i2c_t *obj) {
be_bryan 0:b74591d5ab33 961
be_bryan 0:b74591d5ab33 962 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 963 int retValue = NoData;
be_bryan 0:b74591d5ab33 964
be_bryan 0:b74591d5ab33 965 if(obj_s->pending_slave_rx_maxter_tx) {
be_bryan 0:b74591d5ab33 966 retValue = WriteAddressed;
be_bryan 0:b74591d5ab33 967 }
be_bryan 0:b74591d5ab33 968
be_bryan 0:b74591d5ab33 969 if(obj_s->pending_slave_tx_master_rx) {
be_bryan 0:b74591d5ab33 970 retValue = ReadAddressed;
be_bryan 0:b74591d5ab33 971 }
be_bryan 0:b74591d5ab33 972
be_bryan 0:b74591d5ab33 973 return (retValue);
be_bryan 0:b74591d5ab33 974 }
be_bryan 0:b74591d5ab33 975
be_bryan 0:b74591d5ab33 976 int i2c_slave_read(i2c_t *obj, char *data, int length) {
be_bryan 0:b74591d5ab33 977 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 978 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 979 int count = 0;
be_bryan 0:b74591d5ab33 980 int ret = 0;
be_bryan 0:b74591d5ab33 981 uint32_t timeout = 0;
be_bryan 0:b74591d5ab33 982
be_bryan 0:b74591d5ab33 983 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
be_bryan 0:b74591d5ab33 984 ret = HAL_I2C_Slave_Sequential_Receive_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
be_bryan 0:b74591d5ab33 985
be_bryan 0:b74591d5ab33 986 if(ret == HAL_OK) {
be_bryan 0:b74591d5ab33 987 timeout = BYTE_TIMEOUT_US * (length + 1);
be_bryan 0:b74591d5ab33 988 while(obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) {
be_bryan 0:b74591d5ab33 989 wait_us(1);
be_bryan 0:b74591d5ab33 990 }
be_bryan 0:b74591d5ab33 991
be_bryan 0:b74591d5ab33 992 if(timeout != 0) {
be_bryan 0:b74591d5ab33 993 count = length;
be_bryan 0:b74591d5ab33 994 } else {
be_bryan 0:b74591d5ab33 995 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n");
be_bryan 0:b74591d5ab33 996 }
be_bryan 0:b74591d5ab33 997 }
be_bryan 0:b74591d5ab33 998 return count;
be_bryan 0:b74591d5ab33 999 }
be_bryan 0:b74591d5ab33 1000
be_bryan 0:b74591d5ab33 1001 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
be_bryan 0:b74591d5ab33 1002 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 1003 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 1004 int count = 0;
be_bryan 0:b74591d5ab33 1005 int ret = 0;
be_bryan 0:b74591d5ab33 1006 uint32_t timeout = 0;
be_bryan 0:b74591d5ab33 1007
be_bryan 0:b74591d5ab33 1008 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
be_bryan 0:b74591d5ab33 1009 ret = HAL_I2C_Slave_Sequential_Transmit_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
be_bryan 0:b74591d5ab33 1010
be_bryan 0:b74591d5ab33 1011 if(ret == HAL_OK) {
be_bryan 0:b74591d5ab33 1012 timeout = BYTE_TIMEOUT_US * (length + 1);
be_bryan 0:b74591d5ab33 1013 while(obj_s->pending_slave_tx_master_rx && (--timeout != 0)) {
be_bryan 0:b74591d5ab33 1014 wait_us(1);
be_bryan 0:b74591d5ab33 1015 }
be_bryan 0:b74591d5ab33 1016
be_bryan 0:b74591d5ab33 1017 if(timeout != 0) {
be_bryan 0:b74591d5ab33 1018 count = length;
be_bryan 0:b74591d5ab33 1019 } else {
be_bryan 0:b74591d5ab33 1020 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n");
be_bryan 0:b74591d5ab33 1021 }
be_bryan 0:b74591d5ab33 1022 }
be_bryan 0:b74591d5ab33 1023
be_bryan 0:b74591d5ab33 1024 return count;
be_bryan 0:b74591d5ab33 1025 }
be_bryan 0:b74591d5ab33 1026 #endif // DEVICE_I2CSLAVE
be_bryan 0:b74591d5ab33 1027
be_bryan 0:b74591d5ab33 1028 #if DEVICE_I2C_ASYNCH
be_bryan 0:b74591d5ab33 1029 /* ASYNCH MASTER API FUNCTIONS */
be_bryan 0:b74591d5ab33 1030 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c){
be_bryan 0:b74591d5ab33 1031 /* Get object ptr based on handler ptr */
be_bryan 0:b74591d5ab33 1032 i2c_t *obj = get_i2c_obj(hi2c);
be_bryan 0:b74591d5ab33 1033 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 1034 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 1035
be_bryan 0:b74591d5ab33 1036 /* Disable IT. Not always done before calling macro */
be_bryan 0:b74591d5ab33 1037 __HAL_I2C_DISABLE_IT(handle, I2C_IT_ALL);
be_bryan 0:b74591d5ab33 1038 i2c_ev_err_disable(obj);
be_bryan 0:b74591d5ab33 1039
be_bryan 0:b74591d5ab33 1040 /* Set event flag */
be_bryan 0:b74591d5ab33 1041 obj_s->event = I2C_EVENT_ERROR;
be_bryan 0:b74591d5ab33 1042 }
be_bryan 0:b74591d5ab33 1043
be_bryan 0:b74591d5ab33 1044 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint) {
be_bryan 0:b74591d5ab33 1045
be_bryan 0:b74591d5ab33 1046 // TODO: DMA usage is currently ignored by this way
be_bryan 0:b74591d5ab33 1047 (void) hint;
be_bryan 0:b74591d5ab33 1048
be_bryan 0:b74591d5ab33 1049 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 1050 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 1051
be_bryan 0:b74591d5ab33 1052 /* Update object */
be_bryan 0:b74591d5ab33 1053 obj->tx_buff.buffer = (void *)tx;
be_bryan 0:b74591d5ab33 1054 obj->tx_buff.length = tx_length;
be_bryan 0:b74591d5ab33 1055 obj->tx_buff.pos = 0;
be_bryan 0:b74591d5ab33 1056 obj->tx_buff.width = 8;
be_bryan 0:b74591d5ab33 1057
be_bryan 0:b74591d5ab33 1058 obj->rx_buff.buffer = (void *)rx;
be_bryan 0:b74591d5ab33 1059 obj->rx_buff.length = rx_length;
be_bryan 0:b74591d5ab33 1060 obj->rx_buff.pos = SIZE_MAX;
be_bryan 0:b74591d5ab33 1061 obj->rx_buff.width = 8;
be_bryan 0:b74591d5ab33 1062
be_bryan 0:b74591d5ab33 1063 obj_s->available_events = event;
be_bryan 0:b74591d5ab33 1064 obj_s->event = 0;
be_bryan 0:b74591d5ab33 1065 obj_s->address = address;
be_bryan 0:b74591d5ab33 1066 obj_s->stop = stop;
be_bryan 0:b74591d5ab33 1067
be_bryan 0:b74591d5ab33 1068 i2c_ev_err_enable(obj, handler);
be_bryan 0:b74591d5ab33 1069
be_bryan 0:b74591d5ab33 1070 /* Set operation step depending if stop sending required or not */
be_bryan 0:b74591d5ab33 1071 if ((tx_length && !rx_length) || (!tx_length && rx_length)) {
be_bryan 0:b74591d5ab33 1072 // Trick to remove compiler warning "left and right operands are identical" in some cases
be_bryan 0:b74591d5ab33 1073 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 1074 uint32_t op2 = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 1075 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
be_bryan 0:b74591d5ab33 1076 if (stop)
be_bryan 0:b74591d5ab33 1077 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 1078 else
be_bryan 0:b74591d5ab33 1079 obj_s->XferOperation = I2C_FIRST_FRAME;
be_bryan 0:b74591d5ab33 1080 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
be_bryan 0:b74591d5ab33 1081 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
be_bryan 0:b74591d5ab33 1082 if (stop)
be_bryan 0:b74591d5ab33 1083 obj_s->XferOperation = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 1084 else
be_bryan 0:b74591d5ab33 1085 obj_s->XferOperation = I2C_NEXT_FRAME;
be_bryan 0:b74591d5ab33 1086 }
be_bryan 0:b74591d5ab33 1087
be_bryan 0:b74591d5ab33 1088 if (tx_length > 0) {
be_bryan 0:b74591d5ab33 1089 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, obj_s->XferOperation);
be_bryan 0:b74591d5ab33 1090 }
be_bryan 0:b74591d5ab33 1091 if (rx_length > 0) {
be_bryan 0:b74591d5ab33 1092 HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t*)rx, rx_length, obj_s->XferOperation);
be_bryan 0:b74591d5ab33 1093 }
be_bryan 0:b74591d5ab33 1094 }
be_bryan 0:b74591d5ab33 1095 else if (tx_length && rx_length) {
be_bryan 0:b74591d5ab33 1096 /* Two steps operation, don't modify XferOperation, keep it for next step */
be_bryan 0:b74591d5ab33 1097 // Trick to remove compiler warning "left and right operands are identical" in some cases
be_bryan 0:b74591d5ab33 1098 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
be_bryan 0:b74591d5ab33 1099 uint32_t op2 = I2C_LAST_FRAME;
be_bryan 0:b74591d5ab33 1100 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
be_bryan 0:b74591d5ab33 1101 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_FIRST_FRAME);
be_bryan 0:b74591d5ab33 1102 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
be_bryan 0:b74591d5ab33 1103 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
be_bryan 0:b74591d5ab33 1104 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_NEXT_FRAME);
be_bryan 0:b74591d5ab33 1105 }
be_bryan 0:b74591d5ab33 1106 }
be_bryan 0:b74591d5ab33 1107 }
be_bryan 0:b74591d5ab33 1108
be_bryan 0:b74591d5ab33 1109
be_bryan 0:b74591d5ab33 1110 uint32_t i2c_irq_handler_asynch(i2c_t *obj) {
be_bryan 0:b74591d5ab33 1111
be_bryan 0:b74591d5ab33 1112 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 1113 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 1114
be_bryan 0:b74591d5ab33 1115 HAL_I2C_EV_IRQHandler(handle);
be_bryan 0:b74591d5ab33 1116 HAL_I2C_ER_IRQHandler(handle);
be_bryan 0:b74591d5ab33 1117
be_bryan 0:b74591d5ab33 1118 /* Return I2C event status */
be_bryan 0:b74591d5ab33 1119 return (obj_s->event & obj_s->available_events);
be_bryan 0:b74591d5ab33 1120 }
be_bryan 0:b74591d5ab33 1121
be_bryan 0:b74591d5ab33 1122 uint8_t i2c_active(i2c_t *obj) {
be_bryan 0:b74591d5ab33 1123
be_bryan 0:b74591d5ab33 1124 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 1125 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 1126
be_bryan 0:b74591d5ab33 1127 if (handle->State == HAL_I2C_STATE_READY) {
be_bryan 0:b74591d5ab33 1128 return 0;
be_bryan 0:b74591d5ab33 1129 }
be_bryan 0:b74591d5ab33 1130 else {
be_bryan 0:b74591d5ab33 1131 return 1;
be_bryan 0:b74591d5ab33 1132 }
be_bryan 0:b74591d5ab33 1133 }
be_bryan 0:b74591d5ab33 1134
be_bryan 0:b74591d5ab33 1135 void i2c_abort_asynch(i2c_t *obj) {
be_bryan 0:b74591d5ab33 1136
be_bryan 0:b74591d5ab33 1137 struct i2c_s *obj_s = I2C_S(obj);
be_bryan 0:b74591d5ab33 1138 I2C_HandleTypeDef *handle = &(obj_s->handle);
be_bryan 0:b74591d5ab33 1139
be_bryan 0:b74591d5ab33 1140 /* Abort HAL requires DevAddress, but is not used. Use Dummy */
be_bryan 0:b74591d5ab33 1141 uint16_t Dummy_DevAddress = 0x00;
be_bryan 0:b74591d5ab33 1142
be_bryan 0:b74591d5ab33 1143 HAL_I2C_Master_Abort_IT(handle, Dummy_DevAddress);
be_bryan 0:b74591d5ab33 1144 }
be_bryan 0:b74591d5ab33 1145
be_bryan 0:b74591d5ab33 1146 #endif // DEVICE_I2C_ASYNCH
be_bryan 0:b74591d5ab33 1147
be_bryan 0:b74591d5ab33 1148 #endif // DEVICE_I2C