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Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_ONSEMI/TARGET_NCS36510/reset_map.h@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /**
be_bryan 0:b74591d5ab33 2 ******************************************************************************
be_bryan 0:b74591d5ab33 3 * @file reset_map.h
be_bryan 0:b74591d5ab33 4 * @brief Reset hw module register map
be_bryan 0:b74591d5ab33 5 * @internal
be_bryan 0:b74591d5ab33 6 * @author ON Semiconductor
be_bryan 0:b74591d5ab33 7 * $Rev: 2848 $
be_bryan 0:b74591d5ab33 8 * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
be_bryan 0:b74591d5ab33 9 ******************************************************************************
be_bryan 0:b74591d5ab33 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
be_bryan 0:b74591d5ab33 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
be_bryan 0:b74591d5ab33 12 * under limited terms and conditions. The terms and conditions pertaining to the software
be_bryan 0:b74591d5ab33 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
be_bryan 0:b74591d5ab33 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
be_bryan 0:b74591d5ab33 15 * if applicable the software license agreement. Do not use this software and/or
be_bryan 0:b74591d5ab33 16 * documentation unless you have carefully read and you agree to the limited terms and
be_bryan 0:b74591d5ab33 17 * conditions. By using this software and/or documentation, you agree to the limited
be_bryan 0:b74591d5ab33 18 * terms and conditions.
be_bryan 0:b74591d5ab33 19 *
be_bryan 0:b74591d5ab33 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
be_bryan 0:b74591d5ab33 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
be_bryan 0:b74591d5ab33 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
be_bryan 0:b74591d5ab33 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
be_bryan 0:b74591d5ab33 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
be_bryan 0:b74591d5ab33 25 * @endinternal
be_bryan 0:b74591d5ab33 26 *
be_bryan 0:b74591d5ab33 27 * @ingroup reset
be_bryan 0:b74591d5ab33 28 *
be_bryan 0:b74591d5ab33 29 * @details
be_bryan 0:b74591d5ab33 30 */
be_bryan 0:b74591d5ab33 31
be_bryan 0:b74591d5ab33 32 #ifndef RESET_MAP_H_
be_bryan 0:b74591d5ab33 33 #define RESET_MAP_H_
be_bryan 0:b74591d5ab33 34
be_bryan 0:b74591d5ab33 35 /*************************************************************************************************
be_bryan 0:b74591d5ab33 36 * *
be_bryan 0:b74591d5ab33 37 * Header files *
be_bryan 0:b74591d5ab33 38 * *
be_bryan 0:b74591d5ab33 39 *************************************************************************************************/
be_bryan 0:b74591d5ab33 40
be_bryan 0:b74591d5ab33 41 #include "architecture.h"
be_bryan 0:b74591d5ab33 42
be_bryan 0:b74591d5ab33 43 /**************************************************************************************************
be_bryan 0:b74591d5ab33 44 * *
be_bryan 0:b74591d5ab33 45 * Type definitions *
be_bryan 0:b74591d5ab33 46 * *
be_bryan 0:b74591d5ab33 47 **************************************************************************************************/
be_bryan 0:b74591d5ab33 48
be_bryan 0:b74591d5ab33 49 /** Reset status and clear register.
be_bryan 0:b74591d5ab33 50 * Also contains HW revision ID.
be_bryan 0:b74591d5ab33 51 */
be_bryan 0:b74591d5ab33 52 typedef struct {
be_bryan 0:b74591d5ab33 53 union {
be_bryan 0:b74591d5ab33 54 struct {
be_bryan 0:b74591d5ab33 55 __I uint32_t LOCKUP:1; /**< 1:Core did lock up */
be_bryan 0:b74591d5ab33 56 __I uint32_t WDOGRES:1; /**< 1:Watchdog reset occurred */
be_bryan 0:b74591d5ab33 57 __I uint32_t EXTRESET:1; /**< 1:External reset occurred */
be_bryan 0:b74591d5ab33 58 __I uint32_t SYSRESETREQ:1; /**< 1:System reset occurred */
be_bryan 0:b74591d5ab33 59 __I uint32_t POR:1; /**< 1:POR reset occurred */
be_bryan 0:b74591d5ab33 60 } BITS;
be_bryan 0:b74591d5ab33 61 __I uint32_t WORD;
be_bryan 0:b74591d5ab33 62 } SOURCE;
be_bryan 0:b74591d5ab33 63 __O uint32_t CLEARSOURCE; /**< writing any value to this register will clear the reset source register */
be_bryan 0:b74591d5ab33 64 __I uint32_t HWREVID; /**< Hardware ID, 0x80215400 */
be_bryan 0:b74591d5ab33 65 __IO uint32_t CONTROL; /**< External Reset & Watchdog behavior: 0 – External Reset & Watchdog will reset debug logic 1 – External Reset & Watchdog will not reset debug logic */
be_bryan 0:b74591d5ab33 66
be_bryan 0:b74591d5ab33 67 } ResetReg_t, *ResetReg_pt;
be_bryan 0:b74591d5ab33 68
be_bryan 0:b74591d5ab33 69 #endif /* RESET_MAP_H_ */