EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC43XX/spi_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 *
be_bryan 0:b74591d5ab33 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
be_bryan 0:b74591d5ab33 17 */
be_bryan 0:b74591d5ab33 18 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 19 #include <math.h>
be_bryan 0:b74591d5ab33 20
be_bryan 0:b74591d5ab33 21 #include "spi_api.h"
be_bryan 0:b74591d5ab33 22 #include "cmsis.h"
be_bryan 0:b74591d5ab33 23 #include "pinmap.h"
be_bryan 0:b74591d5ab33 24 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 25
be_bryan 0:b74591d5ab33 26 // SCU mode for SPI pins
be_bryan 0:b74591d5ab33 27 #define SCU_PINIO_SPI SCU_PINIO_FAST
be_bryan 0:b74591d5ab33 28
be_bryan 0:b74591d5ab33 29 static const PinMap PinMap_SPI_SCLK[] = {
be_bryan 0:b74591d5ab33 30 {P1_19, SPI_1, (SCU_PINIO_SPI | 1)},
be_bryan 0:b74591d5ab33 31 {P3_0, SPI_0, (SCU_PINIO_SPI | 4)},
be_bryan 0:b74591d5ab33 32 {P3_3, SPI_0, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 33 {PF_0, SPI_0, (SCU_PINIO_SPI | 0)},
be_bryan 0:b74591d5ab33 34 {PF_4, SPI_1, (SCU_PINIO_SPI | 0)},
be_bryan 0:b74591d5ab33 35 {NC, NC, 0}
be_bryan 0:b74591d5ab33 36 };
be_bryan 0:b74591d5ab33 37
be_bryan 0:b74591d5ab33 38 static const PinMap PinMap_SPI_MOSI[] = {
be_bryan 0:b74591d5ab33 39 {P0_1, SPI_1, (SCU_PINIO_SPI | 1)},
be_bryan 0:b74591d5ab33 40 {P1_2, SPI_0, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 41 {P1_4, SPI_1, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 42 {P3_7, SPI_0, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 43 {P3_8, SPI_0, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 44 {P9_2, SPI_0, (SCU_PINIO_SPI | 7)},
be_bryan 0:b74591d5ab33 45 {PF_3, SPI_0, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 46 {PF_7, SPI_1, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 47 {NC, NC, 0}
be_bryan 0:b74591d5ab33 48 };
be_bryan 0:b74591d5ab33 49
be_bryan 0:b74591d5ab33 50 static const PinMap PinMap_SPI_MISO[] = {
be_bryan 0:b74591d5ab33 51 {P0_0, SPI_1, (SCU_PINIO_SPI | 1)},
be_bryan 0:b74591d5ab33 52 {P1_1, SPI_0, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 53 {P1_3, SPI_1, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 54 {P3_6, SPI_0, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 55 {P3_7, SPI_0, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 56 {P9_1, SPI_0, (SCU_PINIO_SPI | 7)},
be_bryan 0:b74591d5ab33 57 {PF_2, SPI_0, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 58 {PF_6, SPI_1, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 59 {NC, NC, 0}
be_bryan 0:b74591d5ab33 60 };
be_bryan 0:b74591d5ab33 61
be_bryan 0:b74591d5ab33 62 static const PinMap PinMap_SPI_SSEL[] = {
be_bryan 0:b74591d5ab33 63 {P1_0, SPI_0, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 64 {P1_5, SPI_1, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 65 {P1_20, SPI_1, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 66 {P3_6, SPI_0, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 67 {P3_8, SPI_0, (SCU_PINIO_SPI | 5)},
be_bryan 0:b74591d5ab33 68 {P9_0, SPI_0, (SCU_PINIO_SPI | 7)},
be_bryan 0:b74591d5ab33 69 {PF_1, SPI_0, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 70 {PF_5, SPI_1, (SCU_PINIO_SPI | 2)},
be_bryan 0:b74591d5ab33 71 {NC, NC, 0}
be_bryan 0:b74591d5ab33 72 };
be_bryan 0:b74591d5ab33 73
be_bryan 0:b74591d5ab33 74 static inline int ssp_disable(spi_t *obj);
be_bryan 0:b74591d5ab33 75 static inline int ssp_enable(spi_t *obj);
be_bryan 0:b74591d5ab33 76
be_bryan 0:b74591d5ab33 77 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
be_bryan 0:b74591d5ab33 78 // determine the SPI to use
be_bryan 0:b74591d5ab33 79 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
be_bryan 0:b74591d5ab33 80 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
be_bryan 0:b74591d5ab33 81 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
be_bryan 0:b74591d5ab33 82 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
be_bryan 0:b74591d5ab33 83 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
be_bryan 0:b74591d5ab33 84 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
be_bryan 0:b74591d5ab33 85
be_bryan 0:b74591d5ab33 86 obj->spi = (LPC_SSP_T*)pinmap_merge(spi_data, spi_cntl);
be_bryan 0:b74591d5ab33 87 MBED_ASSERT((int)obj->spi != NC);
be_bryan 0:b74591d5ab33 88
be_bryan 0:b74591d5ab33 89 // enable clocking
be_bryan 0:b74591d5ab33 90 switch ((int)obj->spi) {
be_bryan 0:b74591d5ab33 91 case SPI_0: LPC_CGU->BASE_CLK[CLK_BASE_SSP0] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
be_bryan 0:b74591d5ab33 92 case SPI_1: LPC_CGU->BASE_CLK[CLK_BASE_SSP1] = (1 << 11) | (CLKIN_MAINPLL << 24); break;
be_bryan 0:b74591d5ab33 93 }
be_bryan 0:b74591d5ab33 94
be_bryan 0:b74591d5ab33 95 // pin out the spi pins
be_bryan 0:b74591d5ab33 96 pinmap_pinout(mosi, PinMap_SPI_MOSI);
be_bryan 0:b74591d5ab33 97 pinmap_pinout(miso, PinMap_SPI_MISO);
be_bryan 0:b74591d5ab33 98 pinmap_pinout(sclk, PinMap_SPI_SCLK);
be_bryan 0:b74591d5ab33 99 if (ssel != NC) {
be_bryan 0:b74591d5ab33 100 pinmap_pinout(ssel, PinMap_SPI_SSEL);
be_bryan 0:b74591d5ab33 101 }
be_bryan 0:b74591d5ab33 102 }
be_bryan 0:b74591d5ab33 103
be_bryan 0:b74591d5ab33 104 void spi_free(spi_t *obj) {}
be_bryan 0:b74591d5ab33 105
be_bryan 0:b74591d5ab33 106 void spi_format(spi_t *obj, int bits, int mode, int slave) {
be_bryan 0:b74591d5ab33 107 MBED_ASSERT(((bits >= 4) && (bits <= 16)) || ((mode >= 0) && (mode <= 3)));
be_bryan 0:b74591d5ab33 108 ssp_disable(obj);
be_bryan 0:b74591d5ab33 109
be_bryan 0:b74591d5ab33 110 int polarity = (mode & 0x2) ? 1 : 0;
be_bryan 0:b74591d5ab33 111 int phase = (mode & 0x1) ? 1 : 0;
be_bryan 0:b74591d5ab33 112
be_bryan 0:b74591d5ab33 113 // set it up
be_bryan 0:b74591d5ab33 114 int DSS = bits - 1; // DSS (data select size)
be_bryan 0:b74591d5ab33 115 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
be_bryan 0:b74591d5ab33 116 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
be_bryan 0:b74591d5ab33 117
be_bryan 0:b74591d5ab33 118 int FRF = 0; // FRF (frame format) = SPI
be_bryan 0:b74591d5ab33 119 uint32_t tmp = obj->spi->CR0;
be_bryan 0:b74591d5ab33 120 tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
be_bryan 0:b74591d5ab33 121 tmp |= DSS << 0
be_bryan 0:b74591d5ab33 122 | FRF << 4
be_bryan 0:b74591d5ab33 123 | SPO << 6
be_bryan 0:b74591d5ab33 124 | SPH << 7;
be_bryan 0:b74591d5ab33 125 obj->spi->CR0 = tmp;
be_bryan 0:b74591d5ab33 126
be_bryan 0:b74591d5ab33 127 tmp = obj->spi->CR1;
be_bryan 0:b74591d5ab33 128 tmp &= ~(0xD);
be_bryan 0:b74591d5ab33 129 tmp |= 0 << 0 // LBM - loop back mode - off
be_bryan 0:b74591d5ab33 130 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
be_bryan 0:b74591d5ab33 131 | 0 << 3; // SOD - slave output disable - na
be_bryan 0:b74591d5ab33 132 obj->spi->CR1 = tmp;
be_bryan 0:b74591d5ab33 133 ssp_enable(obj);
be_bryan 0:b74591d5ab33 134 }
be_bryan 0:b74591d5ab33 135
be_bryan 0:b74591d5ab33 136 void spi_frequency(spi_t *obj, int hz) {
be_bryan 0:b74591d5ab33 137 ssp_disable(obj);
be_bryan 0:b74591d5ab33 138
be_bryan 0:b74591d5ab33 139 uint32_t PCLK = SystemCoreClock;
be_bryan 0:b74591d5ab33 140
be_bryan 0:b74591d5ab33 141 int prescaler;
be_bryan 0:b74591d5ab33 142
be_bryan 0:b74591d5ab33 143 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
be_bryan 0:b74591d5ab33 144 int prescale_hz = PCLK / prescaler;
be_bryan 0:b74591d5ab33 145
be_bryan 0:b74591d5ab33 146 // calculate the divider
be_bryan 0:b74591d5ab33 147 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
be_bryan 0:b74591d5ab33 148
be_bryan 0:b74591d5ab33 149 // check we can support the divider
be_bryan 0:b74591d5ab33 150 if (divider < 256) {
be_bryan 0:b74591d5ab33 151 // prescaler
be_bryan 0:b74591d5ab33 152 obj->spi->CPSR = prescaler;
be_bryan 0:b74591d5ab33 153
be_bryan 0:b74591d5ab33 154 // divider
be_bryan 0:b74591d5ab33 155 obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
be_bryan 0:b74591d5ab33 156 obj->spi->CR0 |= (divider - 1) << 8;
be_bryan 0:b74591d5ab33 157 ssp_enable(obj);
be_bryan 0:b74591d5ab33 158 return;
be_bryan 0:b74591d5ab33 159 }
be_bryan 0:b74591d5ab33 160 }
be_bryan 0:b74591d5ab33 161 error("Couldn't setup requested SPI frequency");
be_bryan 0:b74591d5ab33 162 }
be_bryan 0:b74591d5ab33 163
be_bryan 0:b74591d5ab33 164 static inline int ssp_disable(spi_t *obj) {
be_bryan 0:b74591d5ab33 165 return obj->spi->CR1 &= ~(1 << 1);
be_bryan 0:b74591d5ab33 166 }
be_bryan 0:b74591d5ab33 167
be_bryan 0:b74591d5ab33 168 static inline int ssp_enable(spi_t *obj) {
be_bryan 0:b74591d5ab33 169 return obj->spi->CR1 |= (1 << 1);
be_bryan 0:b74591d5ab33 170 }
be_bryan 0:b74591d5ab33 171
be_bryan 0:b74591d5ab33 172 static inline int ssp_readable(spi_t *obj) {
be_bryan 0:b74591d5ab33 173 return obj->spi->SR & (1 << 2);
be_bryan 0:b74591d5ab33 174 }
be_bryan 0:b74591d5ab33 175
be_bryan 0:b74591d5ab33 176 static inline int ssp_writeable(spi_t *obj) {
be_bryan 0:b74591d5ab33 177 return obj->spi->SR & (1 << 1);
be_bryan 0:b74591d5ab33 178 }
be_bryan 0:b74591d5ab33 179
be_bryan 0:b74591d5ab33 180 static inline void ssp_write(spi_t *obj, int value) {
be_bryan 0:b74591d5ab33 181 while (!ssp_writeable(obj));
be_bryan 0:b74591d5ab33 182 obj->spi->DR = value;
be_bryan 0:b74591d5ab33 183 }
be_bryan 0:b74591d5ab33 184
be_bryan 0:b74591d5ab33 185 static inline int ssp_read(spi_t *obj) {
be_bryan 0:b74591d5ab33 186 while (!ssp_readable(obj));
be_bryan 0:b74591d5ab33 187 return obj->spi->DR;
be_bryan 0:b74591d5ab33 188 }
be_bryan 0:b74591d5ab33 189
be_bryan 0:b74591d5ab33 190 static inline int ssp_busy(spi_t *obj) {
be_bryan 0:b74591d5ab33 191 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
be_bryan 0:b74591d5ab33 192 }
be_bryan 0:b74591d5ab33 193
be_bryan 0:b74591d5ab33 194 int spi_master_write(spi_t *obj, int value) {
be_bryan 0:b74591d5ab33 195 ssp_write(obj, value);
be_bryan 0:b74591d5ab33 196 return ssp_read(obj);
be_bryan 0:b74591d5ab33 197 }
be_bryan 0:b74591d5ab33 198
be_bryan 0:b74591d5ab33 199 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
be_bryan 0:b74591d5ab33 200 char *rx_buffer, int rx_length, char write_fill) {
be_bryan 0:b74591d5ab33 201 int total = (tx_length > rx_length) ? tx_length : rx_length;
be_bryan 0:b74591d5ab33 202
be_bryan 0:b74591d5ab33 203 for (int i = 0; i < total; i++) {
be_bryan 0:b74591d5ab33 204 char out = (i < tx_length) ? tx_buffer[i] : write_fill;
be_bryan 0:b74591d5ab33 205 char in = spi_master_write(obj, out);
be_bryan 0:b74591d5ab33 206 if (i < rx_length) {
be_bryan 0:b74591d5ab33 207 rx_buffer[i] = in;
be_bryan 0:b74591d5ab33 208 }
be_bryan 0:b74591d5ab33 209 }
be_bryan 0:b74591d5ab33 210
be_bryan 0:b74591d5ab33 211 return total;
be_bryan 0:b74591d5ab33 212 }
be_bryan 0:b74591d5ab33 213
be_bryan 0:b74591d5ab33 214 int spi_slave_receive(spi_t *obj) {
be_bryan 0:b74591d5ab33 215 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
be_bryan 0:b74591d5ab33 216 }
be_bryan 0:b74591d5ab33 217
be_bryan 0:b74591d5ab33 218 int spi_slave_read(spi_t *obj) {
be_bryan 0:b74591d5ab33 219 return obj->spi->DR;
be_bryan 0:b74591d5ab33 220 }
be_bryan 0:b74591d5ab33 221
be_bryan 0:b74591d5ab33 222 void spi_slave_write(spi_t *obj, int value) {
be_bryan 0:b74591d5ab33 223 while (ssp_writeable(obj) == 0) ;
be_bryan 0:b74591d5ab33 224 obj->spi->DR = value;
be_bryan 0:b74591d5ab33 225 }
be_bryan 0:b74591d5ab33 226
be_bryan 0:b74591d5ab33 227 int spi_busy(spi_t *obj) {
be_bryan 0:b74591d5ab33 228 return ssp_busy(obj);
be_bryan 0:b74591d5ab33 229 }