EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC43XX/serial_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 *
be_bryan 0:b74591d5ab33 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
be_bryan 0:b74591d5ab33 17 */
be_bryan 0:b74591d5ab33 18 // math.h required for floating point operations for baud rate calculation
be_bryan 0:b74591d5ab33 19 #include <math.h>
be_bryan 0:b74591d5ab33 20 #include <string.h>
be_bryan 0:b74591d5ab33 21 #include <stdlib.h>
be_bryan 0:b74591d5ab33 22
be_bryan 0:b74591d5ab33 23 #include "serial_api.h"
be_bryan 0:b74591d5ab33 24 #include "cmsis.h"
be_bryan 0:b74591d5ab33 25 #include "pinmap.h"
be_bryan 0:b74591d5ab33 26 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 27 #include "gpio_api.h"
be_bryan 0:b74591d5ab33 28
be_bryan 0:b74591d5ab33 29 /******************************************************************************
be_bryan 0:b74591d5ab33 30 * INITIALIZATION
be_bryan 0:b74591d5ab33 31 ******************************************************************************/
be_bryan 0:b74591d5ab33 32 #define UART_NUM 4
be_bryan 0:b74591d5ab33 33
be_bryan 0:b74591d5ab33 34 // SCU mode for UART pins
be_bryan 0:b74591d5ab33 35 #define SCU_PINIO_UART_TX SCU_MODE_PULLDOWN
be_bryan 0:b74591d5ab33 36 #define SCU_PINIO_UART_RX SCU_PINIO_PULLNONE
be_bryan 0:b74591d5ab33 37
be_bryan 0:b74591d5ab33 38 static const PinMap PinMap_UART_TX[] = {
be_bryan 0:b74591d5ab33 39 {P1_13, UART_1, (SCU_PINIO_UART_TX | 1)},
be_bryan 0:b74591d5ab33 40 {P1_15, UART_2, (SCU_PINIO_UART_TX | 1)},
be_bryan 0:b74591d5ab33 41 {P2_0, UART_0, (SCU_PINIO_UART_TX | 1)},
be_bryan 0:b74591d5ab33 42 {P2_3, UART_3, (SCU_PINIO_UART_TX | 2)},
be_bryan 0:b74591d5ab33 43 {P2_10, UART_2, (SCU_PINIO_UART_TX | 2)},
be_bryan 0:b74591d5ab33 44 {P3_4, UART_1, (SCU_PINIO_UART_TX | 4)},
be_bryan 0:b74591d5ab33 45 {P4_1, UART_3, (SCU_PINIO_UART_TX | 6)},
be_bryan 0:b74591d5ab33 46 {P5_6, UART_1, (SCU_PINIO_UART_TX | 4)},
be_bryan 0:b74591d5ab33 47 {P6_4, UART_0, (SCU_PINIO_UART_TX | 2)},
be_bryan 0:b74591d5ab33 48 {P7_1, UART_2, (SCU_PINIO_UART_TX | 6)},
be_bryan 0:b74591d5ab33 49 {P9_3, UART_3, (SCU_PINIO_UART_TX | 7)},
be_bryan 0:b74591d5ab33 50 {P9_5, UART_0, (SCU_PINIO_UART_TX | 7)},
be_bryan 0:b74591d5ab33 51 {PA_1, UART_2, (SCU_PINIO_UART_TX | 3)},
be_bryan 0:b74591d5ab33 52 {PC_13, UART_1, (SCU_PINIO_UART_TX | 2)},
be_bryan 0:b74591d5ab33 53 {PE_11, UART_1, (SCU_PINIO_UART_TX | 2)},
be_bryan 0:b74591d5ab33 54 {PF_2, UART_3, (SCU_PINIO_UART_TX | 1)},
be_bryan 0:b74591d5ab33 55 {PF_10, UART_0, (SCU_PINIO_UART_TX | 1)},
be_bryan 0:b74591d5ab33 56 {NC, NC, 0}
be_bryan 0:b74591d5ab33 57 };
be_bryan 0:b74591d5ab33 58
be_bryan 0:b74591d5ab33 59 static const PinMap PinMap_UART_RX[] = {
be_bryan 0:b74591d5ab33 60 {P1_14, UART_1, (SCU_PINIO_UART_RX | 1)},
be_bryan 0:b74591d5ab33 61 {P1_16, UART_2, (SCU_PINIO_UART_RX | 1)},
be_bryan 0:b74591d5ab33 62 {P2_1, UART_0, (SCU_PINIO_UART_RX | 1)},
be_bryan 0:b74591d5ab33 63 {P2_4, UART_3, (SCU_PINIO_UART_RX | 2)},
be_bryan 0:b74591d5ab33 64 {P2_11, UART_2, (SCU_PINIO_UART_RX | 2)},
be_bryan 0:b74591d5ab33 65 {P3_5, UART_1, (SCU_PINIO_UART_RX | 4)},
be_bryan 0:b74591d5ab33 66 {P4_2, UART_3, (SCU_PINIO_UART_RX | 6)},
be_bryan 0:b74591d5ab33 67 {P5_7, UART_1, (SCU_PINIO_UART_RX | 4)},
be_bryan 0:b74591d5ab33 68 {P6_5, UART_0, (SCU_PINIO_UART_RX | 2)},
be_bryan 0:b74591d5ab33 69 {P7_2, UART_2, (SCU_PINIO_UART_RX | 6)},
be_bryan 0:b74591d5ab33 70 {P9_4, UART_3, (SCU_PINIO_UART_RX | 7)},
be_bryan 0:b74591d5ab33 71 {P9_6, UART_0, (SCU_PINIO_UART_RX | 7)},
be_bryan 0:b74591d5ab33 72 {PA_2, UART_2, (SCU_PINIO_UART_RX | 3)},
be_bryan 0:b74591d5ab33 73 {PC_14, UART_1, (SCU_PINIO_UART_RX | 2)},
be_bryan 0:b74591d5ab33 74 {PE_12, UART_1, (SCU_PINIO_UART_RX | 2)},
be_bryan 0:b74591d5ab33 75 {PF_3, UART_3, (SCU_PINIO_UART_RX | 1)},
be_bryan 0:b74591d5ab33 76 {PF_11, UART_0, (SCU_PINIO_UART_RX | 1)},
be_bryan 0:b74591d5ab33 77 {NC, NC, 0}
be_bryan 0:b74591d5ab33 78 };
be_bryan 0:b74591d5ab33 79
be_bryan 0:b74591d5ab33 80 #if (DEVICE_SERIAL_FC)
be_bryan 0:b74591d5ab33 81 // RTS/CTS PinMap for flow control
be_bryan 0:b74591d5ab33 82 static const PinMap PinMap_UART_RTS[] = {
be_bryan 0:b74591d5ab33 83 {P1_9, UART_1, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 84 {P5_2, UART_1, (SCU_PINIO_FAST | 4)},
be_bryan 0:b74591d5ab33 85 {PC_3, UART_1, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 86 {PE_5, UART_1, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 87 {NC, NC, 0}
be_bryan 0:b74591d5ab33 88 };
be_bryan 0:b74591d5ab33 89
be_bryan 0:b74591d5ab33 90 static const PinMap PinMap_UART_CTS[] = {
be_bryan 0:b74591d5ab33 91 {P1_11, UART_1, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 92 {P5_4, UART_1, (SCU_PINIO_FAST | 4),
be_bryan 0:b74591d5ab33 93 {PC_2, UART_1, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 94 {PE_7, UART_1, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 95 {NC, NC, 0}
be_bryan 0:b74591d5ab33 96 };
be_bryan 0:b74591d5ab33 97 #endif
be_bryan 0:b74591d5ab33 98
be_bryan 0:b74591d5ab33 99 static uart_irq_handler irq_handler;
be_bryan 0:b74591d5ab33 100
be_bryan 0:b74591d5ab33 101 int stdio_uart_inited = 0;
be_bryan 0:b74591d5ab33 102 serial_t stdio_uart;
be_bryan 0:b74591d5ab33 103
be_bryan 0:b74591d5ab33 104 struct serial_global_data_s {
be_bryan 0:b74591d5ab33 105 uint32_t serial_irq_id;
be_bryan 0:b74591d5ab33 106 gpio_t sw_rts, sw_cts;
be_bryan 0:b74591d5ab33 107 uint8_t count, rx_irq_set_flow, rx_irq_set_api;
be_bryan 0:b74591d5ab33 108 };
be_bryan 0:b74591d5ab33 109
be_bryan 0:b74591d5ab33 110 static struct serial_global_data_s uart_data[UART_NUM];
be_bryan 0:b74591d5ab33 111
be_bryan 0:b74591d5ab33 112 void serial_init(serial_t *obj, PinName tx, PinName rx) {
be_bryan 0:b74591d5ab33 113 int is_stdio_uart = 0;
be_bryan 0:b74591d5ab33 114
be_bryan 0:b74591d5ab33 115 // determine the UART to use
be_bryan 0:b74591d5ab33 116 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 117 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
be_bryan 0:b74591d5ab33 118 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
be_bryan 0:b74591d5ab33 119 if ((int)uart == NC) {
be_bryan 0:b74591d5ab33 120 error("Serial pinout mapping failed");
be_bryan 0:b74591d5ab33 121 }
be_bryan 0:b74591d5ab33 122
be_bryan 0:b74591d5ab33 123 obj->uart = (LPC_USART_T *)uart;
be_bryan 0:b74591d5ab33 124
be_bryan 0:b74591d5ab33 125 // enable fifos and default rx trigger level
be_bryan 0:b74591d5ab33 126 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
be_bryan 0:b74591d5ab33 127 | 0 << 1 // Rx Fifo Reset
be_bryan 0:b74591d5ab33 128 | 0 << 2 // Tx Fifo Reset
be_bryan 0:b74591d5ab33 129 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
be_bryan 0:b74591d5ab33 130
be_bryan 0:b74591d5ab33 131 // disable irqs
be_bryan 0:b74591d5ab33 132 obj->uart->IER = 0 << 0 // Rx Data available irq enable
be_bryan 0:b74591d5ab33 133 | 0 << 1 // Tx Fifo empty irq enable
be_bryan 0:b74591d5ab33 134 | 0 << 2; // Rx Line Status irq enable
be_bryan 0:b74591d5ab33 135
be_bryan 0:b74591d5ab33 136 // set default baud rate and format
be_bryan 0:b74591d5ab33 137 serial_baud (obj, 9600);
be_bryan 0:b74591d5ab33 138 serial_format(obj, 8, ParityNone, 1);
be_bryan 0:b74591d5ab33 139
be_bryan 0:b74591d5ab33 140 // pinout the chosen uart
be_bryan 0:b74591d5ab33 141 pinmap_pinout(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 142 pinmap_pinout(rx, PinMap_UART_RX);
be_bryan 0:b74591d5ab33 143
be_bryan 0:b74591d5ab33 144 // set rx/tx pins in PullUp mode
be_bryan 0:b74591d5ab33 145 if (tx != NC) {
be_bryan 0:b74591d5ab33 146 pin_mode(tx, PullUp);
be_bryan 0:b74591d5ab33 147 }
be_bryan 0:b74591d5ab33 148 if (rx != NC) {
be_bryan 0:b74591d5ab33 149 pin_mode(rx, PullUp);
be_bryan 0:b74591d5ab33 150 }
be_bryan 0:b74591d5ab33 151
be_bryan 0:b74591d5ab33 152 switch (uart) {
be_bryan 0:b74591d5ab33 153 case UART_0: obj->index = 0; break;
be_bryan 0:b74591d5ab33 154 case UART_1: obj->index = 1; break;
be_bryan 0:b74591d5ab33 155 case UART_2: obj->index = 2; break;
be_bryan 0:b74591d5ab33 156 case UART_3: obj->index = 3; break;
be_bryan 0:b74591d5ab33 157 }
be_bryan 0:b74591d5ab33 158 uart_data[obj->index].sw_rts.pin = NC;
be_bryan 0:b74591d5ab33 159 uart_data[obj->index].sw_cts.pin = NC;
be_bryan 0:b74591d5ab33 160 serial_set_flow_control(obj, FlowControlNone, NC, NC);
be_bryan 0:b74591d5ab33 161
be_bryan 0:b74591d5ab33 162 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
be_bryan 0:b74591d5ab33 163
be_bryan 0:b74591d5ab33 164 if (is_stdio_uart) {
be_bryan 0:b74591d5ab33 165 stdio_uart_inited = 1;
be_bryan 0:b74591d5ab33 166 serial_baud (obj, STDIO_BAUD);
be_bryan 0:b74591d5ab33 167 memcpy(&stdio_uart, obj, sizeof(serial_t));
be_bryan 0:b74591d5ab33 168 }
be_bryan 0:b74591d5ab33 169 }
be_bryan 0:b74591d5ab33 170
be_bryan 0:b74591d5ab33 171 void serial_free(serial_t *obj) {
be_bryan 0:b74591d5ab33 172 uart_data[obj->index].serial_irq_id = 0;
be_bryan 0:b74591d5ab33 173 }
be_bryan 0:b74591d5ab33 174
be_bryan 0:b74591d5ab33 175 // serial_baud
be_bryan 0:b74591d5ab33 176 // set the baud rate, taking in to account the current SystemFrequency
be_bryan 0:b74591d5ab33 177 void serial_baud(serial_t *obj, int baudrate) {
be_bryan 0:b74591d5ab33 178 uint32_t PCLK = SystemCoreClock;
be_bryan 0:b74591d5ab33 179
be_bryan 0:b74591d5ab33 180 // First we check to see if the basic divide with no DivAddVal/MulVal
be_bryan 0:b74591d5ab33 181 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
be_bryan 0:b74591d5ab33 182 // MulVal = 1. Otherwise, we search the valid ratio value range to find
be_bryan 0:b74591d5ab33 183 // the closest match. This could be more elegant, using search methods
be_bryan 0:b74591d5ab33 184 // and/or lookup tables, but the brute force method is not that much
be_bryan 0:b74591d5ab33 185 // slower, and is more maintainable.
be_bryan 0:b74591d5ab33 186 uint16_t DL = PCLK / (16 * baudrate);
be_bryan 0:b74591d5ab33 187
be_bryan 0:b74591d5ab33 188 uint8_t DivAddVal = 0;
be_bryan 0:b74591d5ab33 189 uint8_t MulVal = 1;
be_bryan 0:b74591d5ab33 190 int hit = 0;
be_bryan 0:b74591d5ab33 191 uint16_t dlv;
be_bryan 0:b74591d5ab33 192 uint8_t mv, dav;
be_bryan 0:b74591d5ab33 193 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
be_bryan 0:b74591d5ab33 194 int err_best = baudrate, b;
be_bryan 0:b74591d5ab33 195 for (mv = 1; mv < 16 && !hit; mv++)
be_bryan 0:b74591d5ab33 196 {
be_bryan 0:b74591d5ab33 197 for (dav = 0; dav < mv; dav++)
be_bryan 0:b74591d5ab33 198 {
be_bryan 0:b74591d5ab33 199 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
be_bryan 0:b74591d5ab33 200 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
be_bryan 0:b74591d5ab33 201 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
be_bryan 0:b74591d5ab33 202 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
be_bryan 0:b74591d5ab33 203 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
be_bryan 0:b74591d5ab33 204
be_bryan 0:b74591d5ab33 205 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
be_bryan 0:b74591d5ab33 206 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
be_bryan 0:b74591d5ab33 207 else // 2 bits headroom, use more precision
be_bryan 0:b74591d5ab33 208 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
be_bryan 0:b74591d5ab33 209
be_bryan 0:b74591d5ab33 210 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
be_bryan 0:b74591d5ab33 211 if (dlv == 0)
be_bryan 0:b74591d5ab33 212 dlv = 1;
be_bryan 0:b74591d5ab33 213
be_bryan 0:b74591d5ab33 214 // datasheet says if dav > 0 then DL must be >= 2
be_bryan 0:b74591d5ab33 215 if ((dav > 0) && (dlv < 2))
be_bryan 0:b74591d5ab33 216 dlv = 2;
be_bryan 0:b74591d5ab33 217
be_bryan 0:b74591d5ab33 218 // integer rearrangement of the baudrate equation (with rounding)
be_bryan 0:b74591d5ab33 219 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
be_bryan 0:b74591d5ab33 220
be_bryan 0:b74591d5ab33 221 // check to see how we went
be_bryan 0:b74591d5ab33 222 b = abs(b - baudrate);
be_bryan 0:b74591d5ab33 223 if (b < err_best)
be_bryan 0:b74591d5ab33 224 {
be_bryan 0:b74591d5ab33 225 err_best = b;
be_bryan 0:b74591d5ab33 226
be_bryan 0:b74591d5ab33 227 DL = dlv;
be_bryan 0:b74591d5ab33 228 MulVal = mv;
be_bryan 0:b74591d5ab33 229 DivAddVal = dav;
be_bryan 0:b74591d5ab33 230
be_bryan 0:b74591d5ab33 231 if (b == baudrate)
be_bryan 0:b74591d5ab33 232 {
be_bryan 0:b74591d5ab33 233 hit = 1;
be_bryan 0:b74591d5ab33 234 break;
be_bryan 0:b74591d5ab33 235 }
be_bryan 0:b74591d5ab33 236 }
be_bryan 0:b74591d5ab33 237 }
be_bryan 0:b74591d5ab33 238 }
be_bryan 0:b74591d5ab33 239 }
be_bryan 0:b74591d5ab33 240
be_bryan 0:b74591d5ab33 241 // set LCR[DLAB] to enable writing to divider registers
be_bryan 0:b74591d5ab33 242 obj->uart->LCR |= (1 << 7);
be_bryan 0:b74591d5ab33 243
be_bryan 0:b74591d5ab33 244 // set divider values
be_bryan 0:b74591d5ab33 245 obj->uart->DLM = (DL >> 8) & 0xFF;
be_bryan 0:b74591d5ab33 246 obj->uart->DLL = (DL >> 0) & 0xFF;
be_bryan 0:b74591d5ab33 247 obj->uart->FDR = (uint32_t) DivAddVal << 0
be_bryan 0:b74591d5ab33 248 | (uint32_t) MulVal << 4;
be_bryan 0:b74591d5ab33 249
be_bryan 0:b74591d5ab33 250 // clear LCR[DLAB]
be_bryan 0:b74591d5ab33 251 obj->uart->LCR &= ~(1 << 7);
be_bryan 0:b74591d5ab33 252 }
be_bryan 0:b74591d5ab33 253
be_bryan 0:b74591d5ab33 254 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
be_bryan 0:b74591d5ab33 255 // 0: 1 stop bits, 1: 2 stop bits
be_bryan 0:b74591d5ab33 256 if (stop_bits != 1 && stop_bits != 2) {
be_bryan 0:b74591d5ab33 257 error("Invalid stop bits specified");
be_bryan 0:b74591d5ab33 258 }
be_bryan 0:b74591d5ab33 259 stop_bits -= 1;
be_bryan 0:b74591d5ab33 260
be_bryan 0:b74591d5ab33 261 // 0: 5 data bits ... 3: 8 data bits
be_bryan 0:b74591d5ab33 262 if (data_bits < 5 || data_bits > 8) {
be_bryan 0:b74591d5ab33 263 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
be_bryan 0:b74591d5ab33 264 }
be_bryan 0:b74591d5ab33 265 data_bits -= 5;
be_bryan 0:b74591d5ab33 266
be_bryan 0:b74591d5ab33 267 int parity_enable, parity_select;
be_bryan 0:b74591d5ab33 268 switch (parity) {
be_bryan 0:b74591d5ab33 269 case ParityNone: parity_enable = 0; parity_select = 0; break;
be_bryan 0:b74591d5ab33 270 case ParityOdd : parity_enable = 1; parity_select = 0; break;
be_bryan 0:b74591d5ab33 271 case ParityEven: parity_enable = 1; parity_select = 1; break;
be_bryan 0:b74591d5ab33 272 case ParityForced1: parity_enable = 1; parity_select = 2; break;
be_bryan 0:b74591d5ab33 273 case ParityForced0: parity_enable = 1; parity_select = 3; break;
be_bryan 0:b74591d5ab33 274 default:
be_bryan 0:b74591d5ab33 275 error("Invalid serial parity setting");
be_bryan 0:b74591d5ab33 276 return;
be_bryan 0:b74591d5ab33 277 }
be_bryan 0:b74591d5ab33 278
be_bryan 0:b74591d5ab33 279 obj->uart->LCR = data_bits << 0
be_bryan 0:b74591d5ab33 280 | stop_bits << 2
be_bryan 0:b74591d5ab33 281 | parity_enable << 3
be_bryan 0:b74591d5ab33 282 | parity_select << 4;
be_bryan 0:b74591d5ab33 283 }
be_bryan 0:b74591d5ab33 284
be_bryan 0:b74591d5ab33 285 /******************************************************************************
be_bryan 0:b74591d5ab33 286 * INTERRUPTS HANDLING
be_bryan 0:b74591d5ab33 287 ******************************************************************************/
be_bryan 0:b74591d5ab33 288 static inline void uart_irq(uint32_t iir, uint32_t index, LPC_USART_T *puart) {
be_bryan 0:b74591d5ab33 289 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
be_bryan 0:b74591d5ab33 290 SerialIrq irq_type;
be_bryan 0:b74591d5ab33 291 switch (iir) {
be_bryan 0:b74591d5ab33 292 case 1: irq_type = TxIrq; break;
be_bryan 0:b74591d5ab33 293 case 2: irq_type = RxIrq; break;
be_bryan 0:b74591d5ab33 294 default: return;
be_bryan 0:b74591d5ab33 295 }
be_bryan 0:b74591d5ab33 296 if ((RxIrq == irq_type) && (NC != uart_data[index].sw_rts.pin)) {
be_bryan 0:b74591d5ab33 297 gpio_write(&uart_data[index].sw_rts, 1);
be_bryan 0:b74591d5ab33 298 // Disable interrupt if it wasn't enabled by other part of the application
be_bryan 0:b74591d5ab33 299 if (!uart_data[index].rx_irq_set_api)
be_bryan 0:b74591d5ab33 300 puart->IER &= ~(1 << RxIrq);
be_bryan 0:b74591d5ab33 301 }
be_bryan 0:b74591d5ab33 302 if (uart_data[index].serial_irq_id != 0)
be_bryan 0:b74591d5ab33 303 if ((irq_type != RxIrq) || (uart_data[index].rx_irq_set_api))
be_bryan 0:b74591d5ab33 304 irq_handler(uart_data[index].serial_irq_id, irq_type);
be_bryan 0:b74591d5ab33 305 }
be_bryan 0:b74591d5ab33 306
be_bryan 0:b74591d5ab33 307 void uart0_irq() {uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0, (LPC_USART_T*)LPC_USART0);}
be_bryan 0:b74591d5ab33 308 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1, (LPC_USART_T*)LPC_UART1);}
be_bryan 0:b74591d5ab33 309 void uart2_irq() {uart_irq((LPC_USART2->IIR >> 1) & 0x7, 2, (LPC_USART_T*)LPC_USART2);}
be_bryan 0:b74591d5ab33 310 void uart3_irq() {uart_irq((LPC_USART3->IIR >> 1) & 0x7, 3, (LPC_USART_T*)LPC_USART3);}
be_bryan 0:b74591d5ab33 311
be_bryan 0:b74591d5ab33 312 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
be_bryan 0:b74591d5ab33 313 irq_handler = handler;
be_bryan 0:b74591d5ab33 314 uart_data[obj->index].serial_irq_id = id;
be_bryan 0:b74591d5ab33 315 }
be_bryan 0:b74591d5ab33 316
be_bryan 0:b74591d5ab33 317 static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
be_bryan 0:b74591d5ab33 318 IRQn_Type irq_n = (IRQn_Type)0;
be_bryan 0:b74591d5ab33 319 uint32_t vector = 0;
be_bryan 0:b74591d5ab33 320 switch ((int)obj->uart) {
be_bryan 0:b74591d5ab33 321 case UART_0: irq_n=USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
be_bryan 0:b74591d5ab33 322 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
be_bryan 0:b74591d5ab33 323 case UART_2: irq_n=USART2_IRQn; vector = (uint32_t)&uart2_irq; break;
be_bryan 0:b74591d5ab33 324 case UART_3: irq_n=USART3_IRQn; vector = (uint32_t)&uart3_irq; break;
be_bryan 0:b74591d5ab33 325 }
be_bryan 0:b74591d5ab33 326
be_bryan 0:b74591d5ab33 327 if (enable) {
be_bryan 0:b74591d5ab33 328 obj->uart->IER |= 1 << irq;
be_bryan 0:b74591d5ab33 329 NVIC_SetVector(irq_n, vector);
be_bryan 0:b74591d5ab33 330 NVIC_EnableIRQ(irq_n);
be_bryan 0:b74591d5ab33 331 } else if ((TxIrq == irq) || (uart_data[obj->index].rx_irq_set_api + uart_data[obj->index].rx_irq_set_flow == 0)) { // disable
be_bryan 0:b74591d5ab33 332 int all_disabled = 0;
be_bryan 0:b74591d5ab33 333 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
be_bryan 0:b74591d5ab33 334 obj->uart->IER &= ~(1 << irq);
be_bryan 0:b74591d5ab33 335 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
be_bryan 0:b74591d5ab33 336 if (all_disabled)
be_bryan 0:b74591d5ab33 337 NVIC_DisableIRQ(irq_n);
be_bryan 0:b74591d5ab33 338 }
be_bryan 0:b74591d5ab33 339 }
be_bryan 0:b74591d5ab33 340
be_bryan 0:b74591d5ab33 341 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
be_bryan 0:b74591d5ab33 342 if (RxIrq == irq)
be_bryan 0:b74591d5ab33 343 uart_data[obj->index].rx_irq_set_api = enable;
be_bryan 0:b74591d5ab33 344 serial_irq_set_internal(obj, irq, enable);
be_bryan 0:b74591d5ab33 345 }
be_bryan 0:b74591d5ab33 346
be_bryan 0:b74591d5ab33 347 #if (DEVICE_SERIAL_FC)
be_bryan 0:b74591d5ab33 348 static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
be_bryan 0:b74591d5ab33 349 uart_data[obj->index].rx_irq_set_flow = enable;
be_bryan 0:b74591d5ab33 350 serial_irq_set_internal(obj, RxIrq, enable);
be_bryan 0:b74591d5ab33 351 }
be_bryan 0:b74591d5ab33 352 #endif
be_bryan 0:b74591d5ab33 353
be_bryan 0:b74591d5ab33 354 /******************************************************************************
be_bryan 0:b74591d5ab33 355 * READ/WRITE
be_bryan 0:b74591d5ab33 356 ******************************************************************************/
be_bryan 0:b74591d5ab33 357 int serial_getc(serial_t *obj) {
be_bryan 0:b74591d5ab33 358 while (!serial_readable(obj));
be_bryan 0:b74591d5ab33 359 int data = obj->uart->RBR;
be_bryan 0:b74591d5ab33 360 if (NC != uart_data[obj->index].sw_rts.pin) {
be_bryan 0:b74591d5ab33 361 gpio_write(&uart_data[obj->index].sw_rts, 0);
be_bryan 0:b74591d5ab33 362 obj->uart->IER |= 1 << RxIrq;
be_bryan 0:b74591d5ab33 363 }
be_bryan 0:b74591d5ab33 364 return data;
be_bryan 0:b74591d5ab33 365 }
be_bryan 0:b74591d5ab33 366
be_bryan 0:b74591d5ab33 367 void serial_putc(serial_t *obj, int c) {
be_bryan 0:b74591d5ab33 368 while (!serial_writable(obj));
be_bryan 0:b74591d5ab33 369 obj->uart->THR = c;
be_bryan 0:b74591d5ab33 370 uart_data[obj->index].count++;
be_bryan 0:b74591d5ab33 371 }
be_bryan 0:b74591d5ab33 372
be_bryan 0:b74591d5ab33 373 int serial_readable(serial_t *obj) {
be_bryan 0:b74591d5ab33 374 return obj->uart->LSR & 0x01;
be_bryan 0:b74591d5ab33 375 }
be_bryan 0:b74591d5ab33 376
be_bryan 0:b74591d5ab33 377 int serial_writable(serial_t *obj) {
be_bryan 0:b74591d5ab33 378 int isWritable = 1;
be_bryan 0:b74591d5ab33 379 if (NC != uart_data[obj->index].sw_cts.pin)
be_bryan 0:b74591d5ab33 380 isWritable = (gpio_read(&uart_data[obj->index].sw_cts) == 0) && (obj->uart->LSR & 0x40); //If flow control: writable if CTS low + UART done
be_bryan 0:b74591d5ab33 381 else {
be_bryan 0:b74591d5ab33 382 if (obj->uart->LSR & 0x20)
be_bryan 0:b74591d5ab33 383 uart_data[obj->index].count = 0;
be_bryan 0:b74591d5ab33 384 else if (uart_data[obj->index].count >= 16)
be_bryan 0:b74591d5ab33 385 isWritable = 0;
be_bryan 0:b74591d5ab33 386 }
be_bryan 0:b74591d5ab33 387 return isWritable;
be_bryan 0:b74591d5ab33 388 }
be_bryan 0:b74591d5ab33 389
be_bryan 0:b74591d5ab33 390 void serial_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 391 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
be_bryan 0:b74591d5ab33 392 | 1 << 1 // rx FIFO reset
be_bryan 0:b74591d5ab33 393 | 1 << 2 // tx FIFO reset
be_bryan 0:b74591d5ab33 394 | 0 << 6; // interrupt depth
be_bryan 0:b74591d5ab33 395 }
be_bryan 0:b74591d5ab33 396
be_bryan 0:b74591d5ab33 397 void serial_pinout_tx(PinName tx) {
be_bryan 0:b74591d5ab33 398 pinmap_pinout(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 399 }
be_bryan 0:b74591d5ab33 400
be_bryan 0:b74591d5ab33 401 void serial_break_set(serial_t *obj) {
be_bryan 0:b74591d5ab33 402 obj->uart->LCR |= (1 << 6);
be_bryan 0:b74591d5ab33 403 }
be_bryan 0:b74591d5ab33 404
be_bryan 0:b74591d5ab33 405 void serial_break_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 406 obj->uart->LCR &= ~(1 << 6);
be_bryan 0:b74591d5ab33 407 }
be_bryan 0:b74591d5ab33 408
be_bryan 0:b74591d5ab33 409 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
be_bryan 0:b74591d5ab33 410 #if (DEVICE_SERIAL_FC)
be_bryan 0:b74591d5ab33 411 #endif
be_bryan 0:b74591d5ab33 412 }