EL4121 Embedded System / mbed-os

mbed-os

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targets/TARGET_NXP/TARGET_LPC43XX/pwmout_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 *
be_bryan 0:b74591d5ab33 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
be_bryan 0:b74591d5ab33 17 */
be_bryan 0:b74591d5ab33 18 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 19 #include "pwmout_api.h"
be_bryan 0:b74591d5ab33 20 #include "cmsis.h"
be_bryan 0:b74591d5ab33 21 #include "pinmap.h"
be_bryan 0:b74591d5ab33 22 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 23
be_bryan 0:b74591d5ab33 24 // PWM implementation for the LPC43xx using State Configurable Timer (SCT)
be_bryan 0:b74591d5ab33 25 // * PWM_0 to PWM_15 on mbed use CTOUT_0 to CTOUT_15 outputs on LPC43xx
be_bryan 0:b74591d5ab33 26 // * Event 0 is PWM period, events 1 to PWM_EVENT_MAX are PWM channels
be_bryan 0:b74591d5ab33 27 // * Default is unified 32-bit timer, but could be configured to use
be_bryan 0:b74591d5ab33 28 // a 16-bit timer so a timer is available for other SCT functions
be_bryan 0:b74591d5ab33 29
be_bryan 0:b74591d5ab33 30 // configuration options
be_bryan 0:b74591d5ab33 31 #define PWM_FREQ_BASE 1000000 // Base frequency 1 MHz = 1000000
be_bryan 0:b74591d5ab33 32 #ifndef PWM_MODE
be_bryan 0:b74591d5ab33 33 #define PWM_MODE 1 // 0 = 32-bit, 1 = 16-bit low, 2 = 16-bit high
be_bryan 0:b74591d5ab33 34 #endif
be_bryan 0:b74591d5ab33 35
be_bryan 0:b74591d5ab33 36 // macros
be_bryan 0:b74591d5ab33 37 #define PWM_SETCOUNT(x) (x - 1) // set count value
be_bryan 0:b74591d5ab33 38 #define PWM_GETCOUNT(x) (x + 1) // get count value
be_bryan 0:b74591d5ab33 39 #if (PWM_MODE == 0) // unified 32-bit counter, events 1 to 15
be_bryan 0:b74591d5ab33 40 #define PWM_EVENT_MAX (CONFIG_SCT_nEV - 1) // Max PWM channels
be_bryan 0:b74591d5ab33 41 #define PWM_CONFIG SCT_CONFIG_32BIT_COUNTER // default config
be_bryan 0:b74591d5ab33 42 #define PWM_CTRL &LPC_SCT->CTRL_U // control register
be_bryan 0:b74591d5ab33 43 #define PWM_HALT SCT_CTRL_HALT_L // halt counter
be_bryan 0:b74591d5ab33 44 #define PWM_CLEAR SCT_CTRL_CLRCTR_L // clock clear
be_bryan 0:b74591d5ab33 45 #define PWM_PRE(x) SCT_CTRL_PRE_L(x) // clock prescale
be_bryan 0:b74591d5ab33 46 #define PWM_EVT_MASK (1 << 12) // event control mask
be_bryan 0:b74591d5ab33 47 #define PWM_LIMIT &LPC_SCT->LIMIT_L // limit register
be_bryan 0:b74591d5ab33 48 #define PWM_MATCH(x) &LPC_SCT->MATCH[x].U // match register
be_bryan 0:b74591d5ab33 49 #define PWM_MR(x) &LPC_SCT->MATCHREL[x].U // 32-bit match reload register
be_bryan 0:b74591d5ab33 50 #elif (PWM_MODE == 1) // 16-bit low counter, events 1 to 7
be_bryan 0:b74591d5ab33 51 #define PWM_EVENT_MAX (CONFIG_SCT_nEV/2 - 1) // Max PWM channels
be_bryan 0:b74591d5ab33 52 #define PWM_CONFIG SCT_CONFIG_16BIT_COUNTER // default config
be_bryan 0:b74591d5ab33 53 #define PWM_CTRL &LPC_SCT->CTRL_L // control register
be_bryan 0:b74591d5ab33 54 #define PWM_HALT SCT_CTRL_HALT_L // halt counter
be_bryan 0:b74591d5ab33 55 #define PWM_CLEAR SCT_CTRL_CLRCTR_L // clock clear
be_bryan 0:b74591d5ab33 56 #define PWM_PRE(x) SCT_CTRL_PRE_L(x) // clock prescale
be_bryan 0:b74591d5ab33 57 #define PWM_EVT_MASK (1 << 12) // event control mask
be_bryan 0:b74591d5ab33 58 #define PWM_LIMIT &LPC_SCT->LIMIT_L // limit register
be_bryan 0:b74591d5ab33 59 #define PWM_MATCH(x) &LPC_SCT->MATCH[x].L // match register
be_bryan 0:b74591d5ab33 60 #define PWM_MR(x) &LPC_SCT->MATCHREL[x].L // 16-bit match reload register
be_bryan 0:b74591d5ab33 61 #elif (PWM_MODE == 2) // 16-bit high counter, events 1 to 7
be_bryan 0:b74591d5ab33 62 // [TODO] use events 8 to 15 on mode 2
be_bryan 0:b74591d5ab33 63 #define PWM_EVENT_MAX (CONFIG_SCT_nEV/2 - 1) // Max PWM channels
be_bryan 0:b74591d5ab33 64 #define PWM_CONFIG SCT_CONFIG_16BIT_COUNTER // default config
be_bryan 0:b74591d5ab33 65 #define PWM_CTRL &LPC_SCT->CTRL_H // control register
be_bryan 0:b74591d5ab33 66 #define PWM_HALT SCT_CTRL_HALT_L // halt counter
be_bryan 0:b74591d5ab33 67 #define PWM_CLEAR SCT_CTRL_CLRCTR_L // clock clear
be_bryan 0:b74591d5ab33 68 #define PWM_PRE(x) SCT_CTRL_PRE_L(x) // clock prescale
be_bryan 0:b74591d5ab33 69 #define PWM_EVT_MASK ((1 << 4) | (1 << 12)) // event control mask
be_bryan 0:b74591d5ab33 70 #define PWM_LIMIT &LPC_SCT->LIMIT_H // limit register
be_bryan 0:b74591d5ab33 71 #define PWM_MATCH(x) &LPC_SCT->MATCH[x].H // match register
be_bryan 0:b74591d5ab33 72 #define PWM_MR(x) &LPC_SCT->MATCHREL[x].H // 16-bit match reload register
be_bryan 0:b74591d5ab33 73 #else
be_bryan 0:b74591d5ab33 74 #error "PWM mode not implemented"
be_bryan 0:b74591d5ab33 75 #endif
be_bryan 0:b74591d5ab33 76 #define PWM_MR0 PWM_MR(0) // MR register 0 is for period
be_bryan 0:b74591d5ab33 77
be_bryan 0:b74591d5ab33 78 static uint8_t event = 0;
be_bryan 0:b74591d5ab33 79
be_bryan 0:b74591d5ab33 80 // PORT ID, PWM ID, Pin function
be_bryan 0:b74591d5ab33 81 static const PinMap PinMap_PWM[] = {
be_bryan 0:b74591d5ab33 82 {P1_1, PWM_7, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 83 {P1_2, PWM_6, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 84 {P1_3, PWM_8, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 85 {P1_4, PWM_9, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 86 {P1_5, PWM_10, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 87 {P1_7, PWM_13, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 88 {P1_8, PWM_12, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 89 {P1_9, PWM_11, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 90 {P1_10, PWM_14, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 91 {P1_11, PWM_15, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 92 {P2_7, PWM_1, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 93 {P2_8, PWM_0, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 94 {P2_9, PWM_3, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 95 {P2_10, PWM_2, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 96 {P2_11, PWM_5, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 97 {P2_12, PWM_4, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 98 {P4_1, PWM_1, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 99 {P4_2, PWM_0, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 100 {P4_3, PWM_3, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 101 {P4_4, PWM_2, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 102 {P4_5, PWM_5, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 103 {P4_6, PWM_4, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 104 {P6_5, PWM_6, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 105 {P6_12, PWM_7, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 106 {P7_0, PWM_14, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 107 {P7_1, PWM_15, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 108 {P7_4, PWM_13, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 109 {P7_5, PWM_12, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 110 {P7_6, PWM_11, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 111 {P7_7, PWM_8, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 112 {PA_4, PWM_9, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 113 {PB_0, PWM_10, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 114 {PB_1, PWM_6, (SCU_PINIO_FAST | 5)},
be_bryan 0:b74591d5ab33 115 {PB_2, PWM_7, (SCU_PINIO_FAST | 5)},
be_bryan 0:b74591d5ab33 116 {PB_3, PWM_8, (SCU_PINIO_FAST | 5)},
be_bryan 0:b74591d5ab33 117 {PD_0, PWM_15, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 118 {PD_2, PWM_7, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 119 {PD_3, PWM_6, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 120 {PD_4, PWM_8, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 121 {PD_5, PWM_9, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 122 {PD_6, PWM_10, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 123 {PD_9, PWM_13, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 124 {PD_11, PWM_14, (SCU_PINIO_FAST | 6)},
be_bryan 0:b74591d5ab33 125 {PD_12, PWM_10, (SCU_PINIO_FAST | 6)},
be_bryan 0:b74591d5ab33 126 {PD_13, PWM_13, (SCU_PINIO_FAST | 6)},
be_bryan 0:b74591d5ab33 127 {PD_14, PWM_11, (SCU_PINIO_FAST | 6)},
be_bryan 0:b74591d5ab33 128 {PD_15, PWM_8, (SCU_PINIO_FAST | 6)},
be_bryan 0:b74591d5ab33 129 {PD_16, PWM_12, (SCU_PINIO_FAST | 6)},
be_bryan 0:b74591d5ab33 130 {PE_5, PWM_3, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 131 {PE_6, PWM_2, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 132 {PE_7, PWM_5, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 133 {PE_8, PWM_4, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 134 {PE_11, PWM_12, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 135 {PE_12, PWM_11, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 136 {PE_13, PWM_14, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 137 {PE_15, PWM_0, (SCU_PINIO_FAST | 1)},
be_bryan 0:b74591d5ab33 138 {PF_9, PWM_1, (SCU_PINIO_FAST | 2)},
be_bryan 0:b74591d5ab33 139 {NC, NC, 0}
be_bryan 0:b74591d5ab33 140 };
be_bryan 0:b74591d5ab33 141
be_bryan 0:b74591d5ab33 142 static unsigned int pwm_clock_mhz;
be_bryan 0:b74591d5ab33 143
be_bryan 0:b74591d5ab33 144 static void _pwmout_dev_init() {
be_bryan 0:b74591d5ab33 145 uint32_t i;
be_bryan 0:b74591d5ab33 146
be_bryan 0:b74591d5ab33 147 // set SCT clock and config
be_bryan 0:b74591d5ab33 148 LPC_CCU1->CLKCCU[CLK_MX_SCT].CFG = (1 << 0); // enable SCT clock in CCU1
be_bryan 0:b74591d5ab33 149 LPC_SCT->CONFIG |= PWM_CONFIG; // set config options
be_bryan 0:b74591d5ab33 150 *PWM_CTRL |= PWM_HALT; // set HALT bit to stop counter
be_bryan 0:b74591d5ab33 151 // clear counter and set prescaler for desired freq
be_bryan 0:b74591d5ab33 152 *PWM_CTRL |= PWM_CLEAR | PWM_PRE(SystemCoreClock / PWM_FREQ_BASE - 1);
be_bryan 0:b74591d5ab33 153 pwm_clock_mhz = PWM_FREQ_BASE / 1000000;
be_bryan 0:b74591d5ab33 154
be_bryan 0:b74591d5ab33 155 // configure SCT events
be_bryan 0:b74591d5ab33 156 for (i = 0; i < PWM_EVENT_MAX; i++) {
be_bryan 0:b74591d5ab33 157 *PWM_MATCH(i) = 0; // match register
be_bryan 0:b74591d5ab33 158 *PWM_MR(i) = 0; // match reload register
be_bryan 0:b74591d5ab33 159 LPC_SCT->EVENT[i].STATE = 0xFFFFFFFF; // event happens in all states
be_bryan 0:b74591d5ab33 160 LPC_SCT->EVENT[i].CTRL = (i << 0) | PWM_EVT_MASK; // match condition only
be_bryan 0:b74591d5ab33 161 }
be_bryan 0:b74591d5ab33 162 *PWM_LIMIT = (1 << 0) ; // set event 0 as limit
be_bryan 0:b74591d5ab33 163 // initialize period to 20ms: standard for servos, and fine for e.g. brightness control
be_bryan 0:b74591d5ab33 164 *PWM_MR0 = PWM_SETCOUNT((uint32_t)(((20 * PWM_FREQ_BASE) / 1000000) * 1000));
be_bryan 0:b74591d5ab33 165
be_bryan 0:b74591d5ab33 166 // initialize SCT outputs
be_bryan 0:b74591d5ab33 167 for (i = 0; i < CONFIG_SCT_nOU; i++) {
be_bryan 0:b74591d5ab33 168 LPC_SCT->OUT[i].SET = 0; // defer set event until pulsewidth defined
be_bryan 0:b74591d5ab33 169 LPC_SCT->OUT[i].CLR = (1 << 0); // event 0 clears PWM pin
be_bryan 0:b74591d5ab33 170 }
be_bryan 0:b74591d5ab33 171 LPC_SCT->OUTPUT = 0; // default outputs to clear
be_bryan 0:b74591d5ab33 172
be_bryan 0:b74591d5ab33 173 *PWM_CTRL &= ~PWM_HALT; // clear HALT bit to start counter
be_bryan 0:b74591d5ab33 174 }
be_bryan 0:b74591d5ab33 175
be_bryan 0:b74591d5ab33 176 void pwmout_init(pwmout_t* obj, PinName pin) {
be_bryan 0:b74591d5ab33 177 // determine the channel
be_bryan 0:b74591d5ab33 178 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
be_bryan 0:b74591d5ab33 179 MBED_ASSERT((pwm != (PWMName)NC) && (event < PWM_EVENT_MAX));
be_bryan 0:b74591d5ab33 180
be_bryan 0:b74591d5ab33 181 // init SCT clock and outputs on first PWM init
be_bryan 0:b74591d5ab33 182 if (event == 0) {
be_bryan 0:b74591d5ab33 183 _pwmout_dev_init();
be_bryan 0:b74591d5ab33 184 }
be_bryan 0:b74591d5ab33 185 // init PWM object
be_bryan 0:b74591d5ab33 186 event++;
be_bryan 0:b74591d5ab33 187 obj->pwm = pwm; // pwm output
be_bryan 0:b74591d5ab33 188 obj->mr = event; // index of match reload register
be_bryan 0:b74591d5ab33 189
be_bryan 0:b74591d5ab33 190 // initial duty cycle is 0
be_bryan 0:b74591d5ab33 191 pwmout_write(obj, 0);
be_bryan 0:b74591d5ab33 192
be_bryan 0:b74591d5ab33 193 // Wire pinout
be_bryan 0:b74591d5ab33 194 pinmap_pinout(pin, PinMap_PWM);
be_bryan 0:b74591d5ab33 195 }
be_bryan 0:b74591d5ab33 196
be_bryan 0:b74591d5ab33 197 void pwmout_free(pwmout_t* obj) {
be_bryan 0:b74591d5ab33 198 // [TODO]
be_bryan 0:b74591d5ab33 199 }
be_bryan 0:b74591d5ab33 200
be_bryan 0:b74591d5ab33 201 void pwmout_write(pwmout_t* obj, float value) {
be_bryan 0:b74591d5ab33 202 if (value < 0.0f) {
be_bryan 0:b74591d5ab33 203 value = 0.0;
be_bryan 0:b74591d5ab33 204 } else if (value > 1.0f) {
be_bryan 0:b74591d5ab33 205 value = 1.0;
be_bryan 0:b74591d5ab33 206 }
be_bryan 0:b74591d5ab33 207
be_bryan 0:b74591d5ab33 208 // set new pulse width
be_bryan 0:b74591d5ab33 209 uint32_t us = (uint32_t)((float)PWM_GETCOUNT(*PWM_MR0) * value) * pwm_clock_mhz;
be_bryan 0:b74591d5ab33 210 pwmout_pulsewidth_us(obj, us);
be_bryan 0:b74591d5ab33 211 }
be_bryan 0:b74591d5ab33 212
be_bryan 0:b74591d5ab33 213 float pwmout_read(pwmout_t* obj) {
be_bryan 0:b74591d5ab33 214 float v = (float)PWM_GETCOUNT(*PWM_MR(obj->mr)) / (float)PWM_GETCOUNT(*PWM_MR0);
be_bryan 0:b74591d5ab33 215 return (v > 1.0f) ? (1.0f) : (v);
be_bryan 0:b74591d5ab33 216 }
be_bryan 0:b74591d5ab33 217
be_bryan 0:b74591d5ab33 218 void pwmout_period(pwmout_t* obj, float seconds) {
be_bryan 0:b74591d5ab33 219 pwmout_period_us(obj, seconds * 1000000.0f);
be_bryan 0:b74591d5ab33 220 }
be_bryan 0:b74591d5ab33 221
be_bryan 0:b74591d5ab33 222 void pwmout_period_ms(pwmout_t* obj, int ms) {
be_bryan 0:b74591d5ab33 223 pwmout_period_us(obj, ms * 1000);
be_bryan 0:b74591d5ab33 224 }
be_bryan 0:b74591d5ab33 225
be_bryan 0:b74591d5ab33 226 // Set the PWM period, keeping the duty cycle the same.
be_bryan 0:b74591d5ab33 227 void pwmout_period_us(pwmout_t* obj, int us) {
be_bryan 0:b74591d5ab33 228 // calculate number of ticks
be_bryan 0:b74591d5ab33 229 uint32_t ticks = pwm_clock_mhz * us;
be_bryan 0:b74591d5ab33 230 uint32_t old_ticks = PWM_GETCOUNT(*PWM_MR0);
be_bryan 0:b74591d5ab33 231 uint32_t i, v;
be_bryan 0:b74591d5ab33 232
be_bryan 0:b74591d5ab33 233 // set new period
be_bryan 0:b74591d5ab33 234 *PWM_MR0 = PWM_SETCOUNT(ticks);
be_bryan 0:b74591d5ab33 235
be_bryan 0:b74591d5ab33 236 // Scale pulse widths to preserve the duty ratio
be_bryan 0:b74591d5ab33 237 for (i = 1; i < PWM_EVENT_MAX; i++) {
be_bryan 0:b74591d5ab33 238 v = PWM_GETCOUNT(*PWM_MR(i));
be_bryan 0:b74591d5ab33 239 if (v > 1) {
be_bryan 0:b74591d5ab33 240 v = (v * ticks) / old_ticks;
be_bryan 0:b74591d5ab33 241 *PWM_MR(i) = PWM_SETCOUNT(v);
be_bryan 0:b74591d5ab33 242 }
be_bryan 0:b74591d5ab33 243 }
be_bryan 0:b74591d5ab33 244 }
be_bryan 0:b74591d5ab33 245
be_bryan 0:b74591d5ab33 246 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
be_bryan 0:b74591d5ab33 247 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
be_bryan 0:b74591d5ab33 248 }
be_bryan 0:b74591d5ab33 249
be_bryan 0:b74591d5ab33 250 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
be_bryan 0:b74591d5ab33 251 pwmout_pulsewidth_us(obj, ms * 1000);
be_bryan 0:b74591d5ab33 252 }
be_bryan 0:b74591d5ab33 253
be_bryan 0:b74591d5ab33 254 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
be_bryan 0:b74591d5ab33 255 // calculate number of ticks
be_bryan 0:b74591d5ab33 256 uint32_t v = pwm_clock_mhz * us;
be_bryan 0:b74591d5ab33 257 uint32_t i = obj->pwm;
be_bryan 0:b74591d5ab33 258 //MBED_ASSERT(PWM_GETCOUNT(*PWM_MR0) >= v);
be_bryan 0:b74591d5ab33 259
be_bryan 0:b74591d5ab33 260 if (v > 0) {
be_bryan 0:b74591d5ab33 261 // set new match register value and enable SCT output
be_bryan 0:b74591d5ab33 262 *PWM_MR(obj->mr) = PWM_SETCOUNT(v);
be_bryan 0:b74591d5ab33 263 LPC_SCT->OUT[i].SET = (1 << 0); // event 0 sets PWM pin
be_bryan 0:b74591d5ab33 264 LPC_SCT->OUT[i].CLR = (1 << obj->mr); // match event clears PWM pin
be_bryan 0:b74591d5ab33 265 } else {
be_bryan 0:b74591d5ab33 266 // set match to zero and clear SCT output
be_bryan 0:b74591d5ab33 267 *PWM_MR(obj->mr) = 0;
be_bryan 0:b74591d5ab33 268 LPC_SCT->OUT[i].SET = 0; // no set event if no pulsewidth defined
be_bryan 0:b74591d5ab33 269 LPC_SCT->OUT[i].CLR = (1 << 0); // event 0 clears PWM pin
be_bryan 0:b74591d5ab33 270 }
be_bryan 0:b74591d5ab33 271 }