EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC43XX/i2c_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 *
be_bryan 0:b74591d5ab33 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
be_bryan 0:b74591d5ab33 17 */
be_bryan 0:b74591d5ab33 18 #include "i2c_api.h"
be_bryan 0:b74591d5ab33 19 #include "cmsis.h"
be_bryan 0:b74591d5ab33 20 #include "pinmap.h"
be_bryan 0:b74591d5ab33 21 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 22
be_bryan 0:b74591d5ab33 23 // SCU mode for I2C SCL/SDA pins
be_bryan 0:b74591d5ab33 24 #define SCU_PINIO_I2C SCU_PINIO_PULLNONE
be_bryan 0:b74591d5ab33 25
be_bryan 0:b74591d5ab33 26 static const PinMap PinMap_I2C_SDA[] = {
be_bryan 0:b74591d5ab33 27 {P_DED, I2C_0, 0},
be_bryan 0:b74591d5ab33 28 {P2_3, I2C_1, (SCU_PINIO_I2C | 1)},
be_bryan 0:b74591d5ab33 29 {PE_13, I2C_1, (SCU_PINIO_I2C | 2)},
be_bryan 0:b74591d5ab33 30 {NC, NC, 0}
be_bryan 0:b74591d5ab33 31 };
be_bryan 0:b74591d5ab33 32
be_bryan 0:b74591d5ab33 33 static const PinMap PinMap_I2C_SCL[] = {
be_bryan 0:b74591d5ab33 34 {P_DED, I2C_0, 0},
be_bryan 0:b74591d5ab33 35 {P2_4, I2C_1, (SCU_PINIO_I2C | 1)},
be_bryan 0:b74591d5ab33 36 {PE_14, I2C_1, (SCU_PINIO_I2C | 2)},
be_bryan 0:b74591d5ab33 37 {NC, NC, 0}
be_bryan 0:b74591d5ab33 38 };
be_bryan 0:b74591d5ab33 39
be_bryan 0:b74591d5ab33 40 #define I2C_CONSET(x) (x->i2c->CONSET)
be_bryan 0:b74591d5ab33 41 #define I2C_CONCLR(x) (x->i2c->CONCLR)
be_bryan 0:b74591d5ab33 42 #define I2C_STAT(x) (x->i2c->STAT)
be_bryan 0:b74591d5ab33 43 #define I2C_DAT(x) (x->i2c->DAT)
be_bryan 0:b74591d5ab33 44 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
be_bryan 0:b74591d5ab33 45 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
be_bryan 0:b74591d5ab33 46
be_bryan 0:b74591d5ab33 47 static const uint32_t I2C_addr_offset[2][4] = {
be_bryan 0:b74591d5ab33 48 {0x0C, 0x20, 0x24, 0x28},
be_bryan 0:b74591d5ab33 49 {0x30, 0x34, 0x38, 0x3C}
be_bryan 0:b74591d5ab33 50 };
be_bryan 0:b74591d5ab33 51
be_bryan 0:b74591d5ab33 52 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
be_bryan 0:b74591d5ab33 53 I2C_CONCLR(obj) = (start << 5)
be_bryan 0:b74591d5ab33 54 | (stop << 4)
be_bryan 0:b74591d5ab33 55 | (interrupt << 3)
be_bryan 0:b74591d5ab33 56 | (acknowledge << 2);
be_bryan 0:b74591d5ab33 57 }
be_bryan 0:b74591d5ab33 58
be_bryan 0:b74591d5ab33 59 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
be_bryan 0:b74591d5ab33 60 I2C_CONSET(obj) = (start << 5)
be_bryan 0:b74591d5ab33 61 | (stop << 4)
be_bryan 0:b74591d5ab33 62 | (interrupt << 3)
be_bryan 0:b74591d5ab33 63 | (acknowledge << 2);
be_bryan 0:b74591d5ab33 64 }
be_bryan 0:b74591d5ab33 65
be_bryan 0:b74591d5ab33 66 // Clear the Serial Interrupt (SI)
be_bryan 0:b74591d5ab33 67 static inline void i2c_clear_SI(i2c_t *obj) {
be_bryan 0:b74591d5ab33 68 i2c_conclr(obj, 0, 0, 1, 0);
be_bryan 0:b74591d5ab33 69 }
be_bryan 0:b74591d5ab33 70
be_bryan 0:b74591d5ab33 71 static inline int i2c_status(i2c_t *obj) {
be_bryan 0:b74591d5ab33 72 return I2C_STAT(obj);
be_bryan 0:b74591d5ab33 73 }
be_bryan 0:b74591d5ab33 74
be_bryan 0:b74591d5ab33 75 // Wait until the Serial Interrupt (SI) is set
be_bryan 0:b74591d5ab33 76 static int i2c_wait_SI(i2c_t *obj) {
be_bryan 0:b74591d5ab33 77 int timeout = 0;
be_bryan 0:b74591d5ab33 78 while (!(I2C_CONSET(obj) & (1 << 3))) {
be_bryan 0:b74591d5ab33 79 timeout++;
be_bryan 0:b74591d5ab33 80 if (timeout > 100000) return -1;
be_bryan 0:b74591d5ab33 81 }
be_bryan 0:b74591d5ab33 82 return 0;
be_bryan 0:b74591d5ab33 83 }
be_bryan 0:b74591d5ab33 84
be_bryan 0:b74591d5ab33 85 static inline void i2c_interface_enable(i2c_t *obj) {
be_bryan 0:b74591d5ab33 86 I2C_CONSET(obj) = 0x40;
be_bryan 0:b74591d5ab33 87 }
be_bryan 0:b74591d5ab33 88
be_bryan 0:b74591d5ab33 89 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
be_bryan 0:b74591d5ab33 90 // determine the SPI to use
be_bryan 0:b74591d5ab33 91 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 92 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 93 obj->i2c = (LPC_I2C_T *)pinmap_merge(i2c_sda, i2c_scl);
be_bryan 0:b74591d5ab33 94
be_bryan 0:b74591d5ab33 95 if ((int)obj->i2c == NC) {
be_bryan 0:b74591d5ab33 96 error("I2C pin mapping failed");
be_bryan 0:b74591d5ab33 97 }
be_bryan 0:b74591d5ab33 98
be_bryan 0:b74591d5ab33 99 // set default frequency at 100k
be_bryan 0:b74591d5ab33 100 i2c_frequency(obj, 100000);
be_bryan 0:b74591d5ab33 101 i2c_conclr(obj, 1, 1, 1, 1);
be_bryan 0:b74591d5ab33 102 i2c_interface_enable(obj);
be_bryan 0:b74591d5ab33 103
be_bryan 0:b74591d5ab33 104 // Set SCU functions
be_bryan 0:b74591d5ab33 105 if (scl == P_DED) {
be_bryan 0:b74591d5ab33 106 // Enable dedicated I2C0 SDA and SCL pins (open drain)
be_bryan 0:b74591d5ab33 107 LPC_SCU->SFSI2C0 = (1 << 11) | (1 << 3);
be_bryan 0:b74591d5ab33 108 } else {
be_bryan 0:b74591d5ab33 109 pinmap_pinout(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 110 pinmap_pinout(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 111 }
be_bryan 0:b74591d5ab33 112 }
be_bryan 0:b74591d5ab33 113
be_bryan 0:b74591d5ab33 114 inline int i2c_start(i2c_t *obj) {
be_bryan 0:b74591d5ab33 115 int status = 0;
be_bryan 0:b74591d5ab33 116 int isInterrupted = I2C_CONSET(obj) & (1 << 3);
be_bryan 0:b74591d5ab33 117
be_bryan 0:b74591d5ab33 118 // 8.1 Before master mode can be entered, I2CON must be initialised to:
be_bryan 0:b74591d5ab33 119 // - I2EN STA STO SI AA - -
be_bryan 0:b74591d5ab33 120 // - 1 0 0 x x - -
be_bryan 0:b74591d5ab33 121 // if AA = 0, it can't enter slave mode
be_bryan 0:b74591d5ab33 122 i2c_conclr(obj, 1, 1, 0, 1);
be_bryan 0:b74591d5ab33 123
be_bryan 0:b74591d5ab33 124 // The master mode may now be entered by setting the STA bit
be_bryan 0:b74591d5ab33 125 // this will generate a start condition when the bus becomes free
be_bryan 0:b74591d5ab33 126 i2c_conset(obj, 1, 0, 0, 1);
be_bryan 0:b74591d5ab33 127 // Clearing SI bit when it wasn't set on entry can jump past state
be_bryan 0:b74591d5ab33 128 // 0x10 or 0x08 and erroneously send uninitialized slave address.
be_bryan 0:b74591d5ab33 129 if (isInterrupted)
be_bryan 0:b74591d5ab33 130 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 131
be_bryan 0:b74591d5ab33 132 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 133 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 134
be_bryan 0:b74591d5ab33 135 // Clear start bit now that it's transmitted
be_bryan 0:b74591d5ab33 136 i2c_conclr(obj, 1, 0, 0, 0);
be_bryan 0:b74591d5ab33 137 return status;
be_bryan 0:b74591d5ab33 138 }
be_bryan 0:b74591d5ab33 139
be_bryan 0:b74591d5ab33 140 inline int i2c_stop(i2c_t *obj) {
be_bryan 0:b74591d5ab33 141 int timeout = 0;
be_bryan 0:b74591d5ab33 142
be_bryan 0:b74591d5ab33 143 // write the stop bit
be_bryan 0:b74591d5ab33 144 i2c_conset(obj, 0, 1, 0, 0);
be_bryan 0:b74591d5ab33 145 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 146
be_bryan 0:b74591d5ab33 147 // wait for STO bit to reset
be_bryan 0:b74591d5ab33 148 while(I2C_CONSET(obj) & (1 << 4)) {
be_bryan 0:b74591d5ab33 149 timeout ++;
be_bryan 0:b74591d5ab33 150 if (timeout > 100000) return 1;
be_bryan 0:b74591d5ab33 151 }
be_bryan 0:b74591d5ab33 152
be_bryan 0:b74591d5ab33 153 return 0;
be_bryan 0:b74591d5ab33 154 }
be_bryan 0:b74591d5ab33 155
be_bryan 0:b74591d5ab33 156 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
be_bryan 0:b74591d5ab33 157 // write the data
be_bryan 0:b74591d5ab33 158 I2C_DAT(obj) = value;
be_bryan 0:b74591d5ab33 159
be_bryan 0:b74591d5ab33 160 // clear SI to init a send
be_bryan 0:b74591d5ab33 161 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 162
be_bryan 0:b74591d5ab33 163 // wait and return status
be_bryan 0:b74591d5ab33 164 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 165 return i2c_status(obj);
be_bryan 0:b74591d5ab33 166 }
be_bryan 0:b74591d5ab33 167
be_bryan 0:b74591d5ab33 168 static inline int i2c_do_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 169 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
be_bryan 0:b74591d5ab33 170 if(last) {
be_bryan 0:b74591d5ab33 171 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
be_bryan 0:b74591d5ab33 172 } else {
be_bryan 0:b74591d5ab33 173 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
be_bryan 0:b74591d5ab33 174 }
be_bryan 0:b74591d5ab33 175
be_bryan 0:b74591d5ab33 176 // accept byte
be_bryan 0:b74591d5ab33 177 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 178
be_bryan 0:b74591d5ab33 179 // wait for it to arrive
be_bryan 0:b74591d5ab33 180 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 181
be_bryan 0:b74591d5ab33 182 // return the data
be_bryan 0:b74591d5ab33 183 return (I2C_DAT(obj) & 0xFF);
be_bryan 0:b74591d5ab33 184 }
be_bryan 0:b74591d5ab33 185
be_bryan 0:b74591d5ab33 186 void i2c_frequency(i2c_t *obj, int hz) {
be_bryan 0:b74591d5ab33 187 // [TODO] set pclk to /4
be_bryan 0:b74591d5ab33 188 uint32_t PCLK = SystemCoreClock / 4;
be_bryan 0:b74591d5ab33 189
be_bryan 0:b74591d5ab33 190 uint32_t pulse = PCLK / (hz * 2);
be_bryan 0:b74591d5ab33 191
be_bryan 0:b74591d5ab33 192 // I2C Rate
be_bryan 0:b74591d5ab33 193 I2C_SCLL(obj, pulse);
be_bryan 0:b74591d5ab33 194 I2C_SCLH(obj, pulse);
be_bryan 0:b74591d5ab33 195 }
be_bryan 0:b74591d5ab33 196
be_bryan 0:b74591d5ab33 197 // The I2C does a read or a write as a whole operation
be_bryan 0:b74591d5ab33 198 // There are two types of error conditions it can encounter
be_bryan 0:b74591d5ab33 199 // 1) it can not obtain the bus
be_bryan 0:b74591d5ab33 200 // 2) it gets error responses at part of the transmission
be_bryan 0:b74591d5ab33 201 //
be_bryan 0:b74591d5ab33 202 // We tackle them as follows:
be_bryan 0:b74591d5ab33 203 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
be_bryan 0:b74591d5ab33 204 // which basically turns it in to a 2)
be_bryan 0:b74591d5ab33 205 // 2) on error, we use the standard error mechanisms to report/debug
be_bryan 0:b74591d5ab33 206 //
be_bryan 0:b74591d5ab33 207 // Therefore an I2C transaction should always complete. If it doesn't it is usually
be_bryan 0:b74591d5ab33 208 // because something is setup wrong (e.g. wiring), and we don't need to programatically
be_bryan 0:b74591d5ab33 209 // check for that
be_bryan 0:b74591d5ab33 210
be_bryan 0:b74591d5ab33 211 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 212 int count, status;
be_bryan 0:b74591d5ab33 213
be_bryan 0:b74591d5ab33 214 status = i2c_start(obj);
be_bryan 0:b74591d5ab33 215
be_bryan 0:b74591d5ab33 216 if ((status != 0x10) && (status != 0x08)) {
be_bryan 0:b74591d5ab33 217 i2c_stop(obj);
be_bryan 0:b74591d5ab33 218 return I2C_ERROR_BUS_BUSY;
be_bryan 0:b74591d5ab33 219 }
be_bryan 0:b74591d5ab33 220
be_bryan 0:b74591d5ab33 221 status = i2c_do_write(obj, (address | 0x01), 1);
be_bryan 0:b74591d5ab33 222 if (status != 0x40) {
be_bryan 0:b74591d5ab33 223 i2c_stop(obj);
be_bryan 0:b74591d5ab33 224 return I2C_ERROR_NO_SLAVE;
be_bryan 0:b74591d5ab33 225 }
be_bryan 0:b74591d5ab33 226
be_bryan 0:b74591d5ab33 227 // Read in all except last byte
be_bryan 0:b74591d5ab33 228 for (count = 0; count < (length - 1); count++) {
be_bryan 0:b74591d5ab33 229 int value = i2c_do_read(obj, 0);
be_bryan 0:b74591d5ab33 230 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 231 if (status != 0x50) {
be_bryan 0:b74591d5ab33 232 i2c_stop(obj);
be_bryan 0:b74591d5ab33 233 return count;
be_bryan 0:b74591d5ab33 234 }
be_bryan 0:b74591d5ab33 235 data[count] = (char) value;
be_bryan 0:b74591d5ab33 236 }
be_bryan 0:b74591d5ab33 237
be_bryan 0:b74591d5ab33 238 // read in last byte
be_bryan 0:b74591d5ab33 239 int value = i2c_do_read(obj, 1);
be_bryan 0:b74591d5ab33 240 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 241 if (status != 0x58) {
be_bryan 0:b74591d5ab33 242 i2c_stop(obj);
be_bryan 0:b74591d5ab33 243 return length - 1;
be_bryan 0:b74591d5ab33 244 }
be_bryan 0:b74591d5ab33 245
be_bryan 0:b74591d5ab33 246 data[count] = (char) value;
be_bryan 0:b74591d5ab33 247
be_bryan 0:b74591d5ab33 248 // If not repeated start, send stop.
be_bryan 0:b74591d5ab33 249 if (stop) {
be_bryan 0:b74591d5ab33 250 i2c_stop(obj);
be_bryan 0:b74591d5ab33 251 }
be_bryan 0:b74591d5ab33 252
be_bryan 0:b74591d5ab33 253 return length;
be_bryan 0:b74591d5ab33 254 }
be_bryan 0:b74591d5ab33 255
be_bryan 0:b74591d5ab33 256 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 257 int i, status;
be_bryan 0:b74591d5ab33 258
be_bryan 0:b74591d5ab33 259 status = i2c_start(obj);
be_bryan 0:b74591d5ab33 260
be_bryan 0:b74591d5ab33 261 if ((status != 0x10) && (status != 0x08)) {
be_bryan 0:b74591d5ab33 262 i2c_stop(obj);
be_bryan 0:b74591d5ab33 263 return I2C_ERROR_BUS_BUSY;
be_bryan 0:b74591d5ab33 264 }
be_bryan 0:b74591d5ab33 265
be_bryan 0:b74591d5ab33 266 status = i2c_do_write(obj, (address & 0xFE), 1);
be_bryan 0:b74591d5ab33 267 if (status != 0x18) {
be_bryan 0:b74591d5ab33 268 i2c_stop(obj);
be_bryan 0:b74591d5ab33 269 return I2C_ERROR_NO_SLAVE;
be_bryan 0:b74591d5ab33 270 }
be_bryan 0:b74591d5ab33 271
be_bryan 0:b74591d5ab33 272 for (i=0; i<length; i++) {
be_bryan 0:b74591d5ab33 273 status = i2c_do_write(obj, data[i], 0);
be_bryan 0:b74591d5ab33 274 if(status != 0x28) {
be_bryan 0:b74591d5ab33 275 i2c_stop(obj);
be_bryan 0:b74591d5ab33 276 return i;
be_bryan 0:b74591d5ab33 277 }
be_bryan 0:b74591d5ab33 278 }
be_bryan 0:b74591d5ab33 279
be_bryan 0:b74591d5ab33 280 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
be_bryan 0:b74591d5ab33 281 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
be_bryan 0:b74591d5ab33 282 // i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 283
be_bryan 0:b74591d5ab33 284 // If not repeated start, send stop.
be_bryan 0:b74591d5ab33 285 if (stop) {
be_bryan 0:b74591d5ab33 286 i2c_stop(obj);
be_bryan 0:b74591d5ab33 287 }
be_bryan 0:b74591d5ab33 288
be_bryan 0:b74591d5ab33 289 return length;
be_bryan 0:b74591d5ab33 290 }
be_bryan 0:b74591d5ab33 291
be_bryan 0:b74591d5ab33 292 void i2c_reset(i2c_t *obj) {
be_bryan 0:b74591d5ab33 293 i2c_stop(obj);
be_bryan 0:b74591d5ab33 294 }
be_bryan 0:b74591d5ab33 295
be_bryan 0:b74591d5ab33 296 int i2c_byte_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 297 return (i2c_do_read(obj, last) & 0xFF);
be_bryan 0:b74591d5ab33 298 }
be_bryan 0:b74591d5ab33 299
be_bryan 0:b74591d5ab33 300 int i2c_byte_write(i2c_t *obj, int data) {
be_bryan 0:b74591d5ab33 301 int ack;
be_bryan 0:b74591d5ab33 302 int status = i2c_do_write(obj, (data & 0xFF), 0);
be_bryan 0:b74591d5ab33 303
be_bryan 0:b74591d5ab33 304 switch(status) {
be_bryan 0:b74591d5ab33 305 case 0x18: case 0x28: // Master transmit ACKs
be_bryan 0:b74591d5ab33 306 ack = 1;
be_bryan 0:b74591d5ab33 307 break;
be_bryan 0:b74591d5ab33 308 case 0x40: // Master receive address transmitted ACK
be_bryan 0:b74591d5ab33 309 ack = 1;
be_bryan 0:b74591d5ab33 310 break;
be_bryan 0:b74591d5ab33 311 case 0xB8: // Slave transmit ACK
be_bryan 0:b74591d5ab33 312 ack = 1;
be_bryan 0:b74591d5ab33 313 break;
be_bryan 0:b74591d5ab33 314 default:
be_bryan 0:b74591d5ab33 315 ack = 0;
be_bryan 0:b74591d5ab33 316 break;
be_bryan 0:b74591d5ab33 317 }
be_bryan 0:b74591d5ab33 318
be_bryan 0:b74591d5ab33 319 return ack;
be_bryan 0:b74591d5ab33 320 }
be_bryan 0:b74591d5ab33 321
be_bryan 0:b74591d5ab33 322 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
be_bryan 0:b74591d5ab33 323 if (enable_slave != 0) {
be_bryan 0:b74591d5ab33 324 i2c_conclr(obj, 1, 1, 1, 0);
be_bryan 0:b74591d5ab33 325 i2c_conset(obj, 0, 0, 0, 1);
be_bryan 0:b74591d5ab33 326 } else {
be_bryan 0:b74591d5ab33 327 i2c_conclr(obj, 1, 1, 1, 1);
be_bryan 0:b74591d5ab33 328 }
be_bryan 0:b74591d5ab33 329 }
be_bryan 0:b74591d5ab33 330
be_bryan 0:b74591d5ab33 331 int i2c_slave_receive(i2c_t *obj) {
be_bryan 0:b74591d5ab33 332 int status;
be_bryan 0:b74591d5ab33 333 int retval;
be_bryan 0:b74591d5ab33 334
be_bryan 0:b74591d5ab33 335 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 336 switch(status) {
be_bryan 0:b74591d5ab33 337 case 0x60: retval = 3; break;
be_bryan 0:b74591d5ab33 338 case 0x70: retval = 2; break;
be_bryan 0:b74591d5ab33 339 case 0xA8: retval = 1; break;
be_bryan 0:b74591d5ab33 340 default : retval = 0; break;
be_bryan 0:b74591d5ab33 341 }
be_bryan 0:b74591d5ab33 342
be_bryan 0:b74591d5ab33 343 return(retval);
be_bryan 0:b74591d5ab33 344 }
be_bryan 0:b74591d5ab33 345
be_bryan 0:b74591d5ab33 346 int i2c_slave_read(i2c_t *obj, char *data, int length) {
be_bryan 0:b74591d5ab33 347 int count = 0;
be_bryan 0:b74591d5ab33 348 int status;
be_bryan 0:b74591d5ab33 349
be_bryan 0:b74591d5ab33 350 do {
be_bryan 0:b74591d5ab33 351 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 352 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 353 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 354 if((status == 0x80) || (status == 0x90)) {
be_bryan 0:b74591d5ab33 355 data[count] = I2C_DAT(obj) & 0xFF;
be_bryan 0:b74591d5ab33 356 }
be_bryan 0:b74591d5ab33 357 count++;
be_bryan 0:b74591d5ab33 358 } while (((status == 0x80) || (status == 0x90) ||
be_bryan 0:b74591d5ab33 359 (status == 0x060) || (status == 0x70)) && (count < length));
be_bryan 0:b74591d5ab33 360
be_bryan 0:b74591d5ab33 361 if(status != 0xA0) {
be_bryan 0:b74591d5ab33 362 i2c_stop(obj);
be_bryan 0:b74591d5ab33 363 }
be_bryan 0:b74591d5ab33 364
be_bryan 0:b74591d5ab33 365 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 366
be_bryan 0:b74591d5ab33 367 return count;
be_bryan 0:b74591d5ab33 368 }
be_bryan 0:b74591d5ab33 369
be_bryan 0:b74591d5ab33 370 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
be_bryan 0:b74591d5ab33 371 int count = 0;
be_bryan 0:b74591d5ab33 372 int status;
be_bryan 0:b74591d5ab33 373
be_bryan 0:b74591d5ab33 374 if(length <= 0) {
be_bryan 0:b74591d5ab33 375 return(0);
be_bryan 0:b74591d5ab33 376 }
be_bryan 0:b74591d5ab33 377
be_bryan 0:b74591d5ab33 378 do {
be_bryan 0:b74591d5ab33 379 status = i2c_do_write(obj, data[count], 0);
be_bryan 0:b74591d5ab33 380 count++;
be_bryan 0:b74591d5ab33 381 } while ((count < length) && (status == 0xB8));
be_bryan 0:b74591d5ab33 382
be_bryan 0:b74591d5ab33 383 if ((status != 0xC0) && (status != 0xC8)) {
be_bryan 0:b74591d5ab33 384 i2c_stop(obj);
be_bryan 0:b74591d5ab33 385 }
be_bryan 0:b74591d5ab33 386
be_bryan 0:b74591d5ab33 387 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 388
be_bryan 0:b74591d5ab33 389 return(count);
be_bryan 0:b74591d5ab33 390 }
be_bryan 0:b74591d5ab33 391
be_bryan 0:b74591d5ab33 392 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
be_bryan 0:b74591d5ab33 393 uint32_t addr;
be_bryan 0:b74591d5ab33 394
be_bryan 0:b74591d5ab33 395 if ((idx >= 0) && (idx <= 3)) {
be_bryan 0:b74591d5ab33 396 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
be_bryan 0:b74591d5ab33 397 *((uint32_t *) addr) = address & 0xFF;
be_bryan 0:b74591d5ab33 398 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
be_bryan 0:b74591d5ab33 399 *((uint32_t *) addr) = mask & 0xFE;
be_bryan 0:b74591d5ab33 400 }
be_bryan 0:b74591d5ab33 401 }