EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC15XX/serial_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16 // math.h required for floating point operations for baud rate calculation
be_bryan 0:b74591d5ab33 17 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 18 #include <math.h>
be_bryan 0:b74591d5ab33 19 #include <string.h>
be_bryan 0:b74591d5ab33 20
be_bryan 0:b74591d5ab33 21 #include "serial_api.h"
be_bryan 0:b74591d5ab33 22 #include "cmsis.h"
be_bryan 0:b74591d5ab33 23 #include "pinmap.h"
be_bryan 0:b74591d5ab33 24 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 25
be_bryan 0:b74591d5ab33 26 /******************************************************************************
be_bryan 0:b74591d5ab33 27 * INITIALIZATION
be_bryan 0:b74591d5ab33 28 ******************************************************************************/
be_bryan 0:b74591d5ab33 29 #define UART_NUM 3
be_bryan 0:b74591d5ab33 30
be_bryan 0:b74591d5ab33 31 static const SWM_Map SWM_UART_TX[] = {
be_bryan 0:b74591d5ab33 32 {0, 0}, // Pin assign register0, 7:0bit
be_bryan 0:b74591d5ab33 33 {1, 8}, // Pin assign register1, 15:8bit
be_bryan 0:b74591d5ab33 34 {2, 16}, // Pin assign register2, 23:16bit
be_bryan 0:b74591d5ab33 35 };
be_bryan 0:b74591d5ab33 36
be_bryan 0:b74591d5ab33 37 static const SWM_Map SWM_UART_RX[] = {
be_bryan 0:b74591d5ab33 38 {0, 8},
be_bryan 0:b74591d5ab33 39 {1, 16},
be_bryan 0:b74591d5ab33 40 {2, 24},
be_bryan 0:b74591d5ab33 41 };
be_bryan 0:b74591d5ab33 42
be_bryan 0:b74591d5ab33 43 static const SWM_Map SWM_UART_RTS[] = {
be_bryan 0:b74591d5ab33 44 {0, 16},
be_bryan 0:b74591d5ab33 45 {1, 24},
be_bryan 0:b74591d5ab33 46 {3, 0}, // not available
be_bryan 0:b74591d5ab33 47 };
be_bryan 0:b74591d5ab33 48
be_bryan 0:b74591d5ab33 49 static const SWM_Map SWM_UART_CTS[] = {
be_bryan 0:b74591d5ab33 50 {0, 24},
be_bryan 0:b74591d5ab33 51 {2, 0},
be_bryan 0:b74591d5ab33 52 {3, 8} // not available
be_bryan 0:b74591d5ab33 53 };
be_bryan 0:b74591d5ab33 54
be_bryan 0:b74591d5ab33 55 // bit flags for used UARTs
be_bryan 0:b74591d5ab33 56 static unsigned char uart_used = 0;
be_bryan 0:b74591d5ab33 57 static int get_available_uart(void) {
be_bryan 0:b74591d5ab33 58 int i;
be_bryan 0:b74591d5ab33 59 for (i=0; i<3; i++) {
be_bryan 0:b74591d5ab33 60 if ((uart_used & (1 << i)) == 0)
be_bryan 0:b74591d5ab33 61 return i;
be_bryan 0:b74591d5ab33 62 }
be_bryan 0:b74591d5ab33 63 return -1;
be_bryan 0:b74591d5ab33 64 }
be_bryan 0:b74591d5ab33 65
be_bryan 0:b74591d5ab33 66 #define UART_EN (0x01<<0)
be_bryan 0:b74591d5ab33 67
be_bryan 0:b74591d5ab33 68 #define CTS_DELTA (0x01<<5)
be_bryan 0:b74591d5ab33 69 #define RXBRK (0x01<<10)
be_bryan 0:b74591d5ab33 70 #define DELTA_RXBRK (0x01<<11)
be_bryan 0:b74591d5ab33 71
be_bryan 0:b74591d5ab33 72 #define RXRDY (0x01<<0)
be_bryan 0:b74591d5ab33 73 #define TXRDY (0x01<<2)
be_bryan 0:b74591d5ab33 74
be_bryan 0:b74591d5ab33 75 #define TXBRKEN (0x01<<1)
be_bryan 0:b74591d5ab33 76 #define CTSEN (0x01<<9)
be_bryan 0:b74591d5ab33 77
be_bryan 0:b74591d5ab33 78 static uint32_t UARTSysClk;
be_bryan 0:b74591d5ab33 79
be_bryan 0:b74591d5ab33 80 static uint32_t serial_irq_ids[UART_NUM] = {0};
be_bryan 0:b74591d5ab33 81 static uart_irq_handler irq_handler;
be_bryan 0:b74591d5ab33 82
be_bryan 0:b74591d5ab33 83 int stdio_uart_inited = 0;
be_bryan 0:b74591d5ab33 84 serial_t stdio_uart;
be_bryan 0:b74591d5ab33 85
be_bryan 0:b74591d5ab33 86 static void switch_pin(const SWM_Map *swm, PinName pn)
be_bryan 0:b74591d5ab33 87 {
be_bryan 0:b74591d5ab33 88 uint32_t regVal;
be_bryan 0:b74591d5ab33 89 if (pn != NC)
be_bryan 0:b74591d5ab33 90 {
be_bryan 0:b74591d5ab33 91 // check if we have any function mapped to this pin already and remove it
be_bryan 0:b74591d5ab33 92 for (uint32_t n = 0; n < sizeof(LPC_SWM->PINASSIGN)/sizeof(*LPC_SWM->PINASSIGN); n ++) {
be_bryan 0:b74591d5ab33 93 regVal = LPC_SWM->PINASSIGN[n];
be_bryan 0:b74591d5ab33 94 for (uint32_t j = 0; j <= 24; j += 8) {
be_bryan 0:b74591d5ab33 95 if (((regVal >> j) & 0xFF) == (uint32_t)pn)
be_bryan 0:b74591d5ab33 96 regVal |= (0xFF << j);
be_bryan 0:b74591d5ab33 97 }
be_bryan 0:b74591d5ab33 98 LPC_SWM->PINASSIGN[n] = regVal;
be_bryan 0:b74591d5ab33 99 }
be_bryan 0:b74591d5ab33 100 }
be_bryan 0:b74591d5ab33 101 // now map it
be_bryan 0:b74591d5ab33 102 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
be_bryan 0:b74591d5ab33 103 LPC_SWM->PINASSIGN[swm->n] = regVal | (pn << swm->offset);
be_bryan 0:b74591d5ab33 104 }
be_bryan 0:b74591d5ab33 105
be_bryan 0:b74591d5ab33 106 void serial_init(serial_t *obj, PinName tx, PinName rx) {
be_bryan 0:b74591d5ab33 107 int is_stdio_uart = 0;
be_bryan 0:b74591d5ab33 108
be_bryan 0:b74591d5ab33 109 int uart_n = get_available_uart();
be_bryan 0:b74591d5ab33 110 if (uart_n == -1) {
be_bryan 0:b74591d5ab33 111 error("No available UART");
be_bryan 0:b74591d5ab33 112 }
be_bryan 0:b74591d5ab33 113 obj->index = uart_n;
be_bryan 0:b74591d5ab33 114 switch (uart_n) {
be_bryan 0:b74591d5ab33 115 case 0: obj->uart = (LPC_USART0_Type *)LPC_USART0_BASE; break;
be_bryan 0:b74591d5ab33 116 case 1: obj->uart = (LPC_USART0_Type *)LPC_USART1_BASE; break;
be_bryan 0:b74591d5ab33 117 case 2: obj->uart = (LPC_USART0_Type *)LPC_USART2_BASE; break;
be_bryan 0:b74591d5ab33 118 }
be_bryan 0:b74591d5ab33 119 uart_used |= (1 << uart_n);
be_bryan 0:b74591d5ab33 120
be_bryan 0:b74591d5ab33 121 switch_pin(&SWM_UART_TX[uart_n], tx);
be_bryan 0:b74591d5ab33 122 switch_pin(&SWM_UART_RX[uart_n], rx);
be_bryan 0:b74591d5ab33 123
be_bryan 0:b74591d5ab33 124 /* uart clock divided by 6 */
be_bryan 0:b74591d5ab33 125 LPC_SYSCON->UARTCLKDIV =6;
be_bryan 0:b74591d5ab33 126
be_bryan 0:b74591d5ab33 127 /* disable uart interrupts */
be_bryan 0:b74591d5ab33 128 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
be_bryan 0:b74591d5ab33 129
be_bryan 0:b74591d5ab33 130 /* Enable UART clock */
be_bryan 0:b74591d5ab33 131 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (17 + uart_n));
be_bryan 0:b74591d5ab33 132
be_bryan 0:b74591d5ab33 133 /* Peripheral reset control to UART, a "1" bring it out of reset. */
be_bryan 0:b74591d5ab33 134 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (17 + uart_n));
be_bryan 0:b74591d5ab33 135 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (17 + uart_n));
be_bryan 0:b74591d5ab33 136
be_bryan 0:b74591d5ab33 137 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
be_bryan 0:b74591d5ab33 138
be_bryan 0:b74591d5ab33 139 // set default baud rate and format
be_bryan 0:b74591d5ab33 140 serial_baud (obj, 9600);
be_bryan 0:b74591d5ab33 141 serial_format(obj, 8, ParityNone, 1);
be_bryan 0:b74591d5ab33 142
be_bryan 0:b74591d5ab33 143 /* Clear all status bits. */
be_bryan 0:b74591d5ab33 144 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
be_bryan 0:b74591d5ab33 145
be_bryan 0:b74591d5ab33 146 /* enable uart interrupts */
be_bryan 0:b74591d5ab33 147 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
be_bryan 0:b74591d5ab33 148
be_bryan 0:b74591d5ab33 149 /* Enable UART */
be_bryan 0:b74591d5ab33 150 obj->uart->CFG |= UART_EN;
be_bryan 0:b74591d5ab33 151
be_bryan 0:b74591d5ab33 152 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
be_bryan 0:b74591d5ab33 153
be_bryan 0:b74591d5ab33 154 if (is_stdio_uart) {
be_bryan 0:b74591d5ab33 155 stdio_uart_inited = 1;
be_bryan 0:b74591d5ab33 156 memcpy(&stdio_uart, obj, sizeof(serial_t));
be_bryan 0:b74591d5ab33 157 }
be_bryan 0:b74591d5ab33 158 }
be_bryan 0:b74591d5ab33 159
be_bryan 0:b74591d5ab33 160 void serial_free(serial_t *obj) {
be_bryan 0:b74591d5ab33 161 uart_used &= ~(1 << obj->index);
be_bryan 0:b74591d5ab33 162 serial_irq_ids[obj->index] = 0;
be_bryan 0:b74591d5ab33 163 }
be_bryan 0:b74591d5ab33 164
be_bryan 0:b74591d5ab33 165 // serial_baud
be_bryan 0:b74591d5ab33 166 // set the baud rate, taking in to account the current SystemFrequency
be_bryan 0:b74591d5ab33 167 void serial_baud(serial_t *obj, int baudrate) {
be_bryan 0:b74591d5ab33 168 /* Integer divider:
be_bryan 0:b74591d5ab33 169 BRG = UARTSysClk/(Baudrate * 16) - 1
be_bryan 0:b74591d5ab33 170
be_bryan 0:b74591d5ab33 171 Frational divider:
be_bryan 0:b74591d5ab33 172 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
be_bryan 0:b74591d5ab33 173
be_bryan 0:b74591d5ab33 174 where
be_bryan 0:b74591d5ab33 175 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
be_bryan 0:b74591d5ab33 176
be_bryan 0:b74591d5ab33 177 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
be_bryan 0:b74591d5ab33 178 register is 0xFF.
be_bryan 0:b74591d5ab33 179 (2) In ADD register value, depending on the value of UartSysClk,
be_bryan 0:b74591d5ab33 180 baudrate, BRG register value, and SUB register value, be careful
be_bryan 0:b74591d5ab33 181 about the order of multiplier and divider and make sure any
be_bryan 0:b74591d5ab33 182 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
be_bryan 0:b74591d5ab33 183 down below one(integer 0).
be_bryan 0:b74591d5ab33 184 (3) ADD should be always less than SUB.
be_bryan 0:b74591d5ab33 185 */
be_bryan 0:b74591d5ab33 186 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
be_bryan 0:b74591d5ab33 187
be_bryan 0:b74591d5ab33 188 // To use of the fractional baud rate generator, you must write 0xFF to the DIV
be_bryan 0:b74591d5ab33 189 // value to yield a denominator value of 256. All other values are not supported.
be_bryan 0:b74591d5ab33 190 LPC_SYSCON->FRGCTRL = 0xFF;
be_bryan 0:b74591d5ab33 191
be_bryan 0:b74591d5ab33 192 LPC_SYSCON->FRGCTRL |= ( ( ((UARTSysClk / 16) * (0xFF + 1)) /
be_bryan 0:b74591d5ab33 193 (baudrate * (obj->uart->BRG + 1))
be_bryan 0:b74591d5ab33 194 ) - (0xFF + 1) ) << 8;
be_bryan 0:b74591d5ab33 195
be_bryan 0:b74591d5ab33 196 }
be_bryan 0:b74591d5ab33 197
be_bryan 0:b74591d5ab33 198 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
be_bryan 0:b74591d5ab33 199 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
be_bryan 0:b74591d5ab33 200 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
be_bryan 0:b74591d5ab33 201 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
be_bryan 0:b74591d5ab33 202
be_bryan 0:b74591d5ab33 203 stop_bits -= 1;
be_bryan 0:b74591d5ab33 204 data_bits -= 7;
be_bryan 0:b74591d5ab33 205
be_bryan 0:b74591d5ab33 206 int paritysel;
be_bryan 0:b74591d5ab33 207 switch (parity) {
be_bryan 0:b74591d5ab33 208 case ParityNone: paritysel = 0; break;
be_bryan 0:b74591d5ab33 209 case ParityEven: paritysel = 2; break;
be_bryan 0:b74591d5ab33 210 case ParityOdd : paritysel = 3; break;
be_bryan 0:b74591d5ab33 211 default:
be_bryan 0:b74591d5ab33 212 break;
be_bryan 0:b74591d5ab33 213 }
be_bryan 0:b74591d5ab33 214
be_bryan 0:b74591d5ab33 215 // First disable the the usart as described in documentation and then enable while updating CFG
be_bryan 0:b74591d5ab33 216
be_bryan 0:b74591d5ab33 217 // 24.6.1 USART Configuration register
be_bryan 0:b74591d5ab33 218 // Remark: If software needs to change configuration values, the following sequence should
be_bryan 0:b74591d5ab33 219 // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
be_bryan 0:b74591d5ab33 220 // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
be_bryan 0:b74591d5ab33 221 // Write the new configuration value, with the ENABLE bit set to 1.
be_bryan 0:b74591d5ab33 222 obj->uart->CFG &= ~(1 << 0);
be_bryan 0:b74591d5ab33 223
be_bryan 0:b74591d5ab33 224 obj->uart->CFG = (1 << 0) // this will enable the usart
be_bryan 0:b74591d5ab33 225 | (data_bits << 2)
be_bryan 0:b74591d5ab33 226 | (paritysel << 4)
be_bryan 0:b74591d5ab33 227 | (stop_bits << 6);
be_bryan 0:b74591d5ab33 228 }
be_bryan 0:b74591d5ab33 229
be_bryan 0:b74591d5ab33 230 /******************************************************************************
be_bryan 0:b74591d5ab33 231 * INTERRUPTS HANDLING
be_bryan 0:b74591d5ab33 232 ******************************************************************************/
be_bryan 0:b74591d5ab33 233 static inline void uart_irq(SerialIrq irq_type, uint32_t index) {
be_bryan 0:b74591d5ab33 234 if (serial_irq_ids[index] != 0)
be_bryan 0:b74591d5ab33 235 irq_handler(serial_irq_ids[index], irq_type);
be_bryan 0:b74591d5ab33 236 }
be_bryan 0:b74591d5ab33 237
be_bryan 0:b74591d5ab33 238 void uart0_irq() {uart_irq((LPC_USART0->INTSTAT & 1) ? RxIrq : TxIrq, 0);}
be_bryan 0:b74591d5ab33 239 void uart1_irq() {uart_irq((LPC_USART1->INTSTAT & 1) ? RxIrq : TxIrq, 1);}
be_bryan 0:b74591d5ab33 240 void uart2_irq() {uart_irq((LPC_USART2->INTSTAT & 1) ? RxIrq : TxIrq, 2);}
be_bryan 0:b74591d5ab33 241
be_bryan 0:b74591d5ab33 242 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
be_bryan 0:b74591d5ab33 243 irq_handler = handler;
be_bryan 0:b74591d5ab33 244 serial_irq_ids[obj->index] = id;
be_bryan 0:b74591d5ab33 245 }
be_bryan 0:b74591d5ab33 246
be_bryan 0:b74591d5ab33 247 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
be_bryan 0:b74591d5ab33 248 IRQn_Type irq_n = (IRQn_Type)0;
be_bryan 0:b74591d5ab33 249 uint32_t vector = 0;
be_bryan 0:b74591d5ab33 250 switch ((int)obj->uart) {
be_bryan 0:b74591d5ab33 251 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
be_bryan 0:b74591d5ab33 252 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
be_bryan 0:b74591d5ab33 253 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
be_bryan 0:b74591d5ab33 254 }
be_bryan 0:b74591d5ab33 255
be_bryan 0:b74591d5ab33 256 if (enable) {
be_bryan 0:b74591d5ab33 257 NVIC_DisableIRQ(irq_n);
be_bryan 0:b74591d5ab33 258 obj->uart->INTENSET |= (1 << ((irq == RxIrq) ? 0 : 2));
be_bryan 0:b74591d5ab33 259 NVIC_SetVector(irq_n, vector);
be_bryan 0:b74591d5ab33 260 NVIC_EnableIRQ(irq_n);
be_bryan 0:b74591d5ab33 261 } else { // disable
be_bryan 0:b74591d5ab33 262 int all_disabled = 0;
be_bryan 0:b74591d5ab33 263 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
be_bryan 0:b74591d5ab33 264 obj->uart->INTENCLR |= (1 << ((irq == RxIrq) ? 0 : 2)); // disable the interrupt
be_bryan 0:b74591d5ab33 265 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
be_bryan 0:b74591d5ab33 266 if (all_disabled)
be_bryan 0:b74591d5ab33 267 NVIC_DisableIRQ(irq_n);
be_bryan 0:b74591d5ab33 268 }
be_bryan 0:b74591d5ab33 269 }
be_bryan 0:b74591d5ab33 270
be_bryan 0:b74591d5ab33 271 /******************************************************************************
be_bryan 0:b74591d5ab33 272 * READ/WRITE
be_bryan 0:b74591d5ab33 273 ******************************************************************************/
be_bryan 0:b74591d5ab33 274 int serial_getc(serial_t *obj) {
be_bryan 0:b74591d5ab33 275 while (!serial_readable(obj));
be_bryan 0:b74591d5ab33 276 return obj->uart->RXDATA;
be_bryan 0:b74591d5ab33 277 }
be_bryan 0:b74591d5ab33 278
be_bryan 0:b74591d5ab33 279 void serial_putc(serial_t *obj, int c) {
be_bryan 0:b74591d5ab33 280 while (!serial_writable(obj));
be_bryan 0:b74591d5ab33 281 obj->uart->TXDATA = c;
be_bryan 0:b74591d5ab33 282 }
be_bryan 0:b74591d5ab33 283
be_bryan 0:b74591d5ab33 284 int serial_readable(serial_t *obj) {
be_bryan 0:b74591d5ab33 285 return obj->uart->STAT & RXRDY;
be_bryan 0:b74591d5ab33 286 }
be_bryan 0:b74591d5ab33 287
be_bryan 0:b74591d5ab33 288 int serial_writable(serial_t *obj) {
be_bryan 0:b74591d5ab33 289 return obj->uart->STAT & TXRDY;
be_bryan 0:b74591d5ab33 290 }
be_bryan 0:b74591d5ab33 291
be_bryan 0:b74591d5ab33 292 void serial_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 293 // [TODO]
be_bryan 0:b74591d5ab33 294 }
be_bryan 0:b74591d5ab33 295
be_bryan 0:b74591d5ab33 296 void serial_pinout_tx(PinName tx) {
be_bryan 0:b74591d5ab33 297
be_bryan 0:b74591d5ab33 298 }
be_bryan 0:b74591d5ab33 299
be_bryan 0:b74591d5ab33 300 void serial_break_set(serial_t *obj) {
be_bryan 0:b74591d5ab33 301 obj->uart->CTRL |= TXBRKEN;
be_bryan 0:b74591d5ab33 302 }
be_bryan 0:b74591d5ab33 303
be_bryan 0:b74591d5ab33 304 void serial_break_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 305 obj->uart->CTRL &= ~TXBRKEN;
be_bryan 0:b74591d5ab33 306 }
be_bryan 0:b74591d5ab33 307
be_bryan 0:b74591d5ab33 308 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
be_bryan 0:b74591d5ab33 309 if ((FlowControlNone == type || FlowControlRTS == type)) txflow = NC;
be_bryan 0:b74591d5ab33 310 if ((FlowControlNone == type || FlowControlCTS == type)) rxflow = NC;
be_bryan 0:b74591d5ab33 311 switch_pin(&SWM_UART_RTS[obj->index], rxflow);
be_bryan 0:b74591d5ab33 312 switch_pin(&SWM_UART_CTS[obj->index], txflow);
be_bryan 0:b74591d5ab33 313 if (txflow == NC) obj->uart->CFG &= ~CTSEN;
be_bryan 0:b74591d5ab33 314 else obj->uart->CFG |= CTSEN;
be_bryan 0:b74591d5ab33 315 }
be_bryan 0:b74591d5ab33 316