EL4121 Embedded System / mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC11UXX/spi_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 17 #include <math.h>
be_bryan 0:b74591d5ab33 18 #include "spi_api.h"
be_bryan 0:b74591d5ab33 19 #include "cmsis.h"
be_bryan 0:b74591d5ab33 20 #include "pinmap.h"
be_bryan 0:b74591d5ab33 21 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 22 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
be_bryan 0:b74591d5ab33 23
be_bryan 0:b74591d5ab33 24 static inline int ssp_disable(spi_t *obj);
be_bryan 0:b74591d5ab33 25 static inline int ssp_enable(spi_t *obj);
be_bryan 0:b74591d5ab33 26
be_bryan 0:b74591d5ab33 27 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
be_bryan 0:b74591d5ab33 28 // determine the SPI to use
be_bryan 0:b74591d5ab33 29 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
be_bryan 0:b74591d5ab33 30 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
be_bryan 0:b74591d5ab33 31 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
be_bryan 0:b74591d5ab33 32 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
be_bryan 0:b74591d5ab33 33 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
be_bryan 0:b74591d5ab33 34 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
be_bryan 0:b74591d5ab33 35
be_bryan 0:b74591d5ab33 36 obj->spi = (LPC_SSPx_Type*)pinmap_merge(spi_data, spi_cntl);
be_bryan 0:b74591d5ab33 37 MBED_ASSERT((int)obj->spi != NC);
be_bryan 0:b74591d5ab33 38
be_bryan 0:b74591d5ab33 39 // enable power and clocking
be_bryan 0:b74591d5ab33 40 switch ((int)obj->spi) {
be_bryan 0:b74591d5ab33 41 case SPI_0:
be_bryan 0:b74591d5ab33 42 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
be_bryan 0:b74591d5ab33 43 LPC_SYSCON->SSP0CLKDIV = 0x01;
be_bryan 0:b74591d5ab33 44 LPC_SYSCON->PRESETCTRL |= 1 << 0;
be_bryan 0:b74591d5ab33 45 break;
be_bryan 0:b74591d5ab33 46 case SPI_1:
be_bryan 0:b74591d5ab33 47 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
be_bryan 0:b74591d5ab33 48 LPC_SYSCON->SSP1CLKDIV = 0x01;
be_bryan 0:b74591d5ab33 49 LPC_SYSCON->PRESETCTRL |= 1 << 2;
be_bryan 0:b74591d5ab33 50 break;
be_bryan 0:b74591d5ab33 51 }
be_bryan 0:b74591d5ab33 52
be_bryan 0:b74591d5ab33 53 // pin out the spi pins
be_bryan 0:b74591d5ab33 54 pinmap_pinout(mosi, PinMap_SPI_MOSI);
be_bryan 0:b74591d5ab33 55 pinmap_pinout(miso, PinMap_SPI_MISO);
be_bryan 0:b74591d5ab33 56 pinmap_pinout(sclk, PinMap_SPI_SCLK);
be_bryan 0:b74591d5ab33 57 if (ssel != NC) {
be_bryan 0:b74591d5ab33 58 pinmap_pinout(ssel, PinMap_SPI_SSEL);
be_bryan 0:b74591d5ab33 59 }
be_bryan 0:b74591d5ab33 60 }
be_bryan 0:b74591d5ab33 61
be_bryan 0:b74591d5ab33 62 void spi_free(spi_t *obj) {}
be_bryan 0:b74591d5ab33 63
be_bryan 0:b74591d5ab33 64 void spi_format(spi_t *obj, int bits, int mode, int slave) {
be_bryan 0:b74591d5ab33 65 MBED_ASSERT((bits >= 4 && bits <= 16) || (mode >= 0 && mode <= 3));
be_bryan 0:b74591d5ab33 66
be_bryan 0:b74591d5ab33 67 ssp_disable(obj);
be_bryan 0:b74591d5ab33 68
be_bryan 0:b74591d5ab33 69 int polarity = (mode & 0x2) ? 1 : 0;
be_bryan 0:b74591d5ab33 70 int phase = (mode & 0x1) ? 1 : 0;
be_bryan 0:b74591d5ab33 71
be_bryan 0:b74591d5ab33 72 // set it up
be_bryan 0:b74591d5ab33 73 int DSS = bits - 1; // DSS (data select size)
be_bryan 0:b74591d5ab33 74 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
be_bryan 0:b74591d5ab33 75 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
be_bryan 0:b74591d5ab33 76
be_bryan 0:b74591d5ab33 77 int FRF = 0; // FRF (frame format) = SPI
be_bryan 0:b74591d5ab33 78 uint32_t tmp = obj->spi->CR0;
be_bryan 0:b74591d5ab33 79 tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
be_bryan 0:b74591d5ab33 80 tmp |= DSS << 0
be_bryan 0:b74591d5ab33 81 | FRF << 4
be_bryan 0:b74591d5ab33 82 | SPO << 6
be_bryan 0:b74591d5ab33 83 | SPH << 7;
be_bryan 0:b74591d5ab33 84 obj->spi->CR0 = tmp;
be_bryan 0:b74591d5ab33 85
be_bryan 0:b74591d5ab33 86 tmp = obj->spi->CR1;
be_bryan 0:b74591d5ab33 87 tmp &= ~(0xD);
be_bryan 0:b74591d5ab33 88 tmp |= 0 << 0 // LBM - loop back mode - off
be_bryan 0:b74591d5ab33 89 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
be_bryan 0:b74591d5ab33 90 | 0 << 3; // SOD - slave output disable - na
be_bryan 0:b74591d5ab33 91 obj->spi->CR1 = tmp;
be_bryan 0:b74591d5ab33 92
be_bryan 0:b74591d5ab33 93 ssp_enable(obj);
be_bryan 0:b74591d5ab33 94 }
be_bryan 0:b74591d5ab33 95
be_bryan 0:b74591d5ab33 96 void spi_frequency(spi_t *obj, int hz) {
be_bryan 0:b74591d5ab33 97 ssp_disable(obj);
be_bryan 0:b74591d5ab33 98
be_bryan 0:b74591d5ab33 99 uint32_t PCLK = SystemCoreClock;
be_bryan 0:b74591d5ab33 100
be_bryan 0:b74591d5ab33 101 int prescaler;
be_bryan 0:b74591d5ab33 102
be_bryan 0:b74591d5ab33 103 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
be_bryan 0:b74591d5ab33 104 int prescale_hz = PCLK / prescaler;
be_bryan 0:b74591d5ab33 105
be_bryan 0:b74591d5ab33 106 // calculate the divider
be_bryan 0:b74591d5ab33 107 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
be_bryan 0:b74591d5ab33 108
be_bryan 0:b74591d5ab33 109 // check we can support the divider
be_bryan 0:b74591d5ab33 110 if (divider < 256) {
be_bryan 0:b74591d5ab33 111 // prescaler
be_bryan 0:b74591d5ab33 112 obj->spi->CPSR = prescaler;
be_bryan 0:b74591d5ab33 113
be_bryan 0:b74591d5ab33 114 // divider
be_bryan 0:b74591d5ab33 115 obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
be_bryan 0:b74591d5ab33 116 obj->spi->CR0 |= (divider - 1) << 8;
be_bryan 0:b74591d5ab33 117 ssp_enable(obj);
be_bryan 0:b74591d5ab33 118 return;
be_bryan 0:b74591d5ab33 119 }
be_bryan 0:b74591d5ab33 120 }
be_bryan 0:b74591d5ab33 121 error("Couldn't setup requested SPI frequency");
be_bryan 0:b74591d5ab33 122 }
be_bryan 0:b74591d5ab33 123
be_bryan 0:b74591d5ab33 124 static inline int ssp_disable(spi_t *obj) {
be_bryan 0:b74591d5ab33 125 return obj->spi->CR1 &= ~(1 << 1);
be_bryan 0:b74591d5ab33 126 }
be_bryan 0:b74591d5ab33 127
be_bryan 0:b74591d5ab33 128 static inline int ssp_enable(spi_t *obj) {
be_bryan 0:b74591d5ab33 129 return obj->spi->CR1 |= (1 << 1);
be_bryan 0:b74591d5ab33 130 }
be_bryan 0:b74591d5ab33 131
be_bryan 0:b74591d5ab33 132 static inline int ssp_readable(spi_t *obj) {
be_bryan 0:b74591d5ab33 133 return obj->spi->SR & (1 << 2);
be_bryan 0:b74591d5ab33 134 }
be_bryan 0:b74591d5ab33 135
be_bryan 0:b74591d5ab33 136 static inline int ssp_writeable(spi_t *obj) {
be_bryan 0:b74591d5ab33 137 return obj->spi->SR & (1 << 1);
be_bryan 0:b74591d5ab33 138 }
be_bryan 0:b74591d5ab33 139
be_bryan 0:b74591d5ab33 140 static inline void ssp_write(spi_t *obj, int value) {
be_bryan 0:b74591d5ab33 141 while (!ssp_writeable(obj));
be_bryan 0:b74591d5ab33 142 obj->spi->DR = value;
be_bryan 0:b74591d5ab33 143 }
be_bryan 0:b74591d5ab33 144
be_bryan 0:b74591d5ab33 145 static inline int ssp_read(spi_t *obj) {
be_bryan 0:b74591d5ab33 146 while (!ssp_readable(obj));
be_bryan 0:b74591d5ab33 147 return obj->spi->DR;
be_bryan 0:b74591d5ab33 148 }
be_bryan 0:b74591d5ab33 149
be_bryan 0:b74591d5ab33 150 static inline int ssp_busy(spi_t *obj) {
be_bryan 0:b74591d5ab33 151 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
be_bryan 0:b74591d5ab33 152 }
be_bryan 0:b74591d5ab33 153
be_bryan 0:b74591d5ab33 154 int spi_master_write(spi_t *obj, int value) {
be_bryan 0:b74591d5ab33 155 ssp_write(obj, value);
be_bryan 0:b74591d5ab33 156 return ssp_read(obj);
be_bryan 0:b74591d5ab33 157 }
be_bryan 0:b74591d5ab33 158
be_bryan 0:b74591d5ab33 159 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
be_bryan 0:b74591d5ab33 160 char *rx_buffer, int rx_length, char write_fill) {
be_bryan 0:b74591d5ab33 161 int total = (tx_length > rx_length) ? tx_length : rx_length;
be_bryan 0:b74591d5ab33 162
be_bryan 0:b74591d5ab33 163 for (int i = 0; i < total; i++) {
be_bryan 0:b74591d5ab33 164 char out = (i < tx_length) ? tx_buffer[i] : write_fill;
be_bryan 0:b74591d5ab33 165 char in = spi_master_write(obj, out);
be_bryan 0:b74591d5ab33 166 if (i < rx_length) {
be_bryan 0:b74591d5ab33 167 rx_buffer[i] = in;
be_bryan 0:b74591d5ab33 168 }
be_bryan 0:b74591d5ab33 169 }
be_bryan 0:b74591d5ab33 170
be_bryan 0:b74591d5ab33 171 return total;
be_bryan 0:b74591d5ab33 172 }
be_bryan 0:b74591d5ab33 173
be_bryan 0:b74591d5ab33 174 int spi_slave_receive(spi_t *obj) {
be_bryan 0:b74591d5ab33 175 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
be_bryan 0:b74591d5ab33 176 }
be_bryan 0:b74591d5ab33 177
be_bryan 0:b74591d5ab33 178 int spi_slave_read(spi_t *obj) {
be_bryan 0:b74591d5ab33 179 return obj->spi->DR;
be_bryan 0:b74591d5ab33 180 }
be_bryan 0:b74591d5ab33 181
be_bryan 0:b74591d5ab33 182 void spi_slave_write(spi_t *obj, int value) {
be_bryan 0:b74591d5ab33 183 while (ssp_writeable(obj) == 0) ;
be_bryan 0:b74591d5ab33 184 obj->spi->DR = value;
be_bryan 0:b74591d5ab33 185 }
be_bryan 0:b74591d5ab33 186
be_bryan 0:b74591d5ab33 187 int spi_busy(spi_t *obj) {
be_bryan 0:b74591d5ab33 188 return ssp_busy(obj);
be_bryan 0:b74591d5ab33 189 }