mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16 // math.h required for floating point operations for baud rate calculation
be_bryan 0:b74591d5ab33 17 #include <math.h>
be_bryan 0:b74591d5ab33 18 #include <string.h>
be_bryan 0:b74591d5ab33 19 #include <stdlib.h>
be_bryan 0:b74591d5ab33 20
be_bryan 0:b74591d5ab33 21 #include "serial_api.h"
be_bryan 0:b74591d5ab33 22 #include "cmsis.h"
be_bryan 0:b74591d5ab33 23 #include "pinmap.h"
be_bryan 0:b74591d5ab33 24 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
be_bryan 0:b74591d5ab33 25
be_bryan 0:b74591d5ab33 26 /******************************************************************************
be_bryan 0:b74591d5ab33 27 * INITIALIZATION
be_bryan 0:b74591d5ab33 28 ******************************************************************************/
be_bryan 0:b74591d5ab33 29 #define UART_NUM 1
be_bryan 0:b74591d5ab33 30
be_bryan 0:b74591d5ab33 31 static uint32_t serial_irq_ids[UART_NUM] = {0};
be_bryan 0:b74591d5ab33 32 static uart_irq_handler irq_handler;
be_bryan 0:b74591d5ab33 33
be_bryan 0:b74591d5ab33 34 int stdio_uart_inited = 0;
be_bryan 0:b74591d5ab33 35 serial_t stdio_uart;
be_bryan 0:b74591d5ab33 36
be_bryan 0:b74591d5ab33 37 void serial_init(serial_t *obj, PinName tx, PinName rx) {
be_bryan 0:b74591d5ab33 38 int is_stdio_uart = 0;
be_bryan 0:b74591d5ab33 39
be_bryan 0:b74591d5ab33 40 // determine the UART to use
be_bryan 0:b74591d5ab33 41 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 42 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
be_bryan 0:b74591d5ab33 43 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
be_bryan 0:b74591d5ab33 44 MBED_ASSERT((int)uart != NC);
be_bryan 0:b74591d5ab33 45
be_bryan 0:b74591d5ab33 46 obj->uart = (LPC_USART_Type *)uart;
be_bryan 0:b74591d5ab33 47 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
be_bryan 0:b74591d5ab33 48
be_bryan 0:b74591d5ab33 49 // [TODO] Consider more elegant approach
be_bryan 0:b74591d5ab33 50 // disconnect USBTX/RX mapping mux, for case when switching ports
be_bryan 0:b74591d5ab33 51 #ifdef USBTX
be_bryan 0:b74591d5ab33 52 pin_function(USBTX, 0);
be_bryan 0:b74591d5ab33 53 pin_function(USBRX, 0);
be_bryan 0:b74591d5ab33 54 #endif
be_bryan 0:b74591d5ab33 55
be_bryan 0:b74591d5ab33 56 // enable fifos and default rx trigger level
be_bryan 0:b74591d5ab33 57 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
be_bryan 0:b74591d5ab33 58 | 0 << 1 // Rx Fifo Reset
be_bryan 0:b74591d5ab33 59 | 0 << 2 // Tx Fifo Reset
be_bryan 0:b74591d5ab33 60 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
be_bryan 0:b74591d5ab33 61
be_bryan 0:b74591d5ab33 62 // disable irqs
be_bryan 0:b74591d5ab33 63 obj->uart->IER = 0 << 0 // Rx Data available irq enable
be_bryan 0:b74591d5ab33 64 | 0 << 1 // Tx Fifo empty irq enable
be_bryan 0:b74591d5ab33 65 | 0 << 2; // Rx Line Status irq enable
be_bryan 0:b74591d5ab33 66
be_bryan 0:b74591d5ab33 67 // set default baud rate and format
be_bryan 0:b74591d5ab33 68 serial_baud (obj, 9600);
be_bryan 0:b74591d5ab33 69 serial_format(obj, 8, ParityNone, 1);
be_bryan 0:b74591d5ab33 70
be_bryan 0:b74591d5ab33 71 // pinout the chosen uart
be_bryan 0:b74591d5ab33 72 pinmap_pinout(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 73 pinmap_pinout(rx, PinMap_UART_RX);
be_bryan 0:b74591d5ab33 74
be_bryan 0:b74591d5ab33 75 // set rx/tx pins in PullUp mode
be_bryan 0:b74591d5ab33 76 if (tx != NC) {
be_bryan 0:b74591d5ab33 77 pin_mode(tx, PullUp);
be_bryan 0:b74591d5ab33 78 }
be_bryan 0:b74591d5ab33 79 if (rx != NC) {
be_bryan 0:b74591d5ab33 80 pin_mode(rx, PullUp);
be_bryan 0:b74591d5ab33 81 }
be_bryan 0:b74591d5ab33 82
be_bryan 0:b74591d5ab33 83 switch (uart) {
be_bryan 0:b74591d5ab33 84 case UART_0: obj->index = 0; break;
be_bryan 0:b74591d5ab33 85 }
be_bryan 0:b74591d5ab33 86
be_bryan 0:b74591d5ab33 87 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
be_bryan 0:b74591d5ab33 88
be_bryan 0:b74591d5ab33 89 if (is_stdio_uart) {
be_bryan 0:b74591d5ab33 90 stdio_uart_inited = 1;
be_bryan 0:b74591d5ab33 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
be_bryan 0:b74591d5ab33 92 }
be_bryan 0:b74591d5ab33 93 }
be_bryan 0:b74591d5ab33 94
be_bryan 0:b74591d5ab33 95 void serial_free(serial_t *obj) {
be_bryan 0:b74591d5ab33 96 serial_irq_ids[obj->index] = 0;
be_bryan 0:b74591d5ab33 97 }
be_bryan 0:b74591d5ab33 98
be_bryan 0:b74591d5ab33 99 // serial_baud
be_bryan 0:b74591d5ab33 100 // set the baud rate, taking in to account the current SystemFrequency
be_bryan 0:b74591d5ab33 101 void serial_baud(serial_t *obj, int baudrate) {
be_bryan 0:b74591d5ab33 102 LPC_SYSCON->UARTCLKDIV = 0x1;
be_bryan 0:b74591d5ab33 103 uint32_t PCLK = SystemCoreClock;
be_bryan 0:b74591d5ab33 104 // First we check to see if the basic divide with no DivAddVal/MulVal
be_bryan 0:b74591d5ab33 105 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
be_bryan 0:b74591d5ab33 106 // MulVal = 1. Otherwise, we search the valid ratio value range to find
be_bryan 0:b74591d5ab33 107 // the closest match. This could be more elegant, using search methods
be_bryan 0:b74591d5ab33 108 // and/or lookup tables, but the brute force method is not that much
be_bryan 0:b74591d5ab33 109 // slower, and is more maintainable.
be_bryan 0:b74591d5ab33 110 uint16_t DL = PCLK / (16 * baudrate);
be_bryan 0:b74591d5ab33 111
be_bryan 0:b74591d5ab33 112 uint8_t DivAddVal = 0;
be_bryan 0:b74591d5ab33 113 uint8_t MulVal = 1;
be_bryan 0:b74591d5ab33 114 int hit = 0;
be_bryan 0:b74591d5ab33 115 uint16_t dlv;
be_bryan 0:b74591d5ab33 116 uint8_t mv, dav;
be_bryan 0:b74591d5ab33 117 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
be_bryan 0:b74591d5ab33 118 int err_best = baudrate, b;
be_bryan 0:b74591d5ab33 119 for (mv = 1; mv < 16 && !hit; mv++)
be_bryan 0:b74591d5ab33 120 {
be_bryan 0:b74591d5ab33 121 for (dav = 0; dav < mv; dav++)
be_bryan 0:b74591d5ab33 122 {
be_bryan 0:b74591d5ab33 123 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
be_bryan 0:b74591d5ab33 124 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
be_bryan 0:b74591d5ab33 125 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
be_bryan 0:b74591d5ab33 126 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
be_bryan 0:b74591d5ab33 127 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
be_bryan 0:b74591d5ab33 128
be_bryan 0:b74591d5ab33 129 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
be_bryan 0:b74591d5ab33 130 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
be_bryan 0:b74591d5ab33 131 else // 2 bits headroom, use more precision
be_bryan 0:b74591d5ab33 132 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
be_bryan 0:b74591d5ab33 133
be_bryan 0:b74591d5ab33 134 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
be_bryan 0:b74591d5ab33 135 if (dlv == 0)
be_bryan 0:b74591d5ab33 136 dlv = 1;
be_bryan 0:b74591d5ab33 137
be_bryan 0:b74591d5ab33 138 // datasheet says if dav > 0 then DL must be >= 2
be_bryan 0:b74591d5ab33 139 if ((dav > 0) && (dlv < 2))
be_bryan 0:b74591d5ab33 140 dlv = 2;
be_bryan 0:b74591d5ab33 141
be_bryan 0:b74591d5ab33 142 // integer rearrangement of the baudrate equation (with rounding)
be_bryan 0:b74591d5ab33 143 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
be_bryan 0:b74591d5ab33 144
be_bryan 0:b74591d5ab33 145 // check to see how we went
be_bryan 0:b74591d5ab33 146 b = abs(b - baudrate);
be_bryan 0:b74591d5ab33 147 if (b < err_best)
be_bryan 0:b74591d5ab33 148 {
be_bryan 0:b74591d5ab33 149 err_best = b;
be_bryan 0:b74591d5ab33 150
be_bryan 0:b74591d5ab33 151 DL = dlv;
be_bryan 0:b74591d5ab33 152 MulVal = mv;
be_bryan 0:b74591d5ab33 153 DivAddVal = dav;
be_bryan 0:b74591d5ab33 154
be_bryan 0:b74591d5ab33 155 if (b == baudrate)
be_bryan 0:b74591d5ab33 156 {
be_bryan 0:b74591d5ab33 157 hit = 1;
be_bryan 0:b74591d5ab33 158 break;
be_bryan 0:b74591d5ab33 159 }
be_bryan 0:b74591d5ab33 160 }
be_bryan 0:b74591d5ab33 161 }
be_bryan 0:b74591d5ab33 162 }
be_bryan 0:b74591d5ab33 163 }
be_bryan 0:b74591d5ab33 164
be_bryan 0:b74591d5ab33 165 // set LCR[DLAB] to enable writing to divider registers
be_bryan 0:b74591d5ab33 166 obj->uart->LCR |= (1 << 7);
be_bryan 0:b74591d5ab33 167
be_bryan 0:b74591d5ab33 168 // set divider values
be_bryan 0:b74591d5ab33 169 obj->uart->DLM = (DL >> 8) & 0xFF;
be_bryan 0:b74591d5ab33 170 obj->uart->DLL = (DL >> 0) & 0xFF;
be_bryan 0:b74591d5ab33 171 obj->uart->FDR = (uint32_t) DivAddVal << 0
be_bryan 0:b74591d5ab33 172 | (uint32_t) MulVal << 4;
be_bryan 0:b74591d5ab33 173
be_bryan 0:b74591d5ab33 174 // clear LCR[DLAB]
be_bryan 0:b74591d5ab33 175 obj->uart->LCR &= ~(1 << 7);
be_bryan 0:b74591d5ab33 176 }
be_bryan 0:b74591d5ab33 177
be_bryan 0:b74591d5ab33 178 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
be_bryan 0:b74591d5ab33 179 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
be_bryan 0:b74591d5ab33 180 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
be_bryan 0:b74591d5ab33 181 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
be_bryan 0:b74591d5ab33 182 (parity == ParityForced1) || (parity == ParityForced0));
be_bryan 0:b74591d5ab33 183
be_bryan 0:b74591d5ab33 184 stop_bits -= 1;
be_bryan 0:b74591d5ab33 185 data_bits -= 5;
be_bryan 0:b74591d5ab33 186
be_bryan 0:b74591d5ab33 187 int parity_enable = 0, parity_select = 0;
be_bryan 0:b74591d5ab33 188 switch (parity) {
be_bryan 0:b74591d5ab33 189 case ParityNone: parity_enable = 0; parity_select = 0; break;
be_bryan 0:b74591d5ab33 190 case ParityOdd : parity_enable = 1; parity_select = 0; break;
be_bryan 0:b74591d5ab33 191 case ParityEven: parity_enable = 1; parity_select = 1; break;
be_bryan 0:b74591d5ab33 192 case ParityForced1: parity_enable = 1; parity_select = 2; break;
be_bryan 0:b74591d5ab33 193 case ParityForced0: parity_enable = 1; parity_select = 3; break;
be_bryan 0:b74591d5ab33 194 default:
be_bryan 0:b74591d5ab33 195 break;
be_bryan 0:b74591d5ab33 196 }
be_bryan 0:b74591d5ab33 197
be_bryan 0:b74591d5ab33 198 obj->uart->LCR = data_bits << 0
be_bryan 0:b74591d5ab33 199 | stop_bits << 2
be_bryan 0:b74591d5ab33 200 | parity_enable << 3
be_bryan 0:b74591d5ab33 201 | parity_select << 4;
be_bryan 0:b74591d5ab33 202 }
be_bryan 0:b74591d5ab33 203
be_bryan 0:b74591d5ab33 204 /******************************************************************************
be_bryan 0:b74591d5ab33 205 * INTERRUPTS HANDLING
be_bryan 0:b74591d5ab33 206 ******************************************************************************/
be_bryan 0:b74591d5ab33 207 static inline void uart_irq(uint32_t iir, uint32_t index) {
be_bryan 0:b74591d5ab33 208 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
be_bryan 0:b74591d5ab33 209 SerialIrq irq_type;
be_bryan 0:b74591d5ab33 210 switch (iir) {
be_bryan 0:b74591d5ab33 211 case 1: irq_type = TxIrq; break;
be_bryan 0:b74591d5ab33 212 case 2: irq_type = RxIrq; break;
be_bryan 0:b74591d5ab33 213 default: return;
be_bryan 0:b74591d5ab33 214 }
be_bryan 0:b74591d5ab33 215
be_bryan 0:b74591d5ab33 216 if (serial_irq_ids[index] != 0)
be_bryan 0:b74591d5ab33 217 irq_handler(serial_irq_ids[index], irq_type);
be_bryan 0:b74591d5ab33 218 }
be_bryan 0:b74591d5ab33 219
be_bryan 0:b74591d5ab33 220 void uart0_irq() {uart_irq((LPC_USART->IIR >> 1) & 0x7, 0);}
be_bryan 0:b74591d5ab33 221
be_bryan 0:b74591d5ab33 222 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
be_bryan 0:b74591d5ab33 223 irq_handler = handler;
be_bryan 0:b74591d5ab33 224 serial_irq_ids[obj->index] = id;
be_bryan 0:b74591d5ab33 225 }
be_bryan 0:b74591d5ab33 226
be_bryan 0:b74591d5ab33 227 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
be_bryan 0:b74591d5ab33 228 IRQn_Type irq_n = (IRQn_Type)0;
be_bryan 0:b74591d5ab33 229 uint32_t vector = 0;
be_bryan 0:b74591d5ab33 230 switch ((int)obj->uart) {
be_bryan 0:b74591d5ab33 231 case UART_0: irq_n=UART_IRQn ; vector = (uint32_t)&uart0_irq; break;
be_bryan 0:b74591d5ab33 232 }
be_bryan 0:b74591d5ab33 233
be_bryan 0:b74591d5ab33 234 if (enable) {
be_bryan 0:b74591d5ab33 235 obj->uart->IER |= 1 << irq;
be_bryan 0:b74591d5ab33 236 NVIC_SetVector(irq_n, vector);
be_bryan 0:b74591d5ab33 237 NVIC_EnableIRQ(irq_n);
be_bryan 0:b74591d5ab33 238 } else { // disable
be_bryan 0:b74591d5ab33 239 int all_disabled = 0;
be_bryan 0:b74591d5ab33 240 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
be_bryan 0:b74591d5ab33 241
be_bryan 0:b74591d5ab33 242 obj->uart->IER &= ~(1 << irq);
be_bryan 0:b74591d5ab33 243 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
be_bryan 0:b74591d5ab33 244
be_bryan 0:b74591d5ab33 245 if (all_disabled)
be_bryan 0:b74591d5ab33 246 NVIC_DisableIRQ(irq_n);
be_bryan 0:b74591d5ab33 247 }
be_bryan 0:b74591d5ab33 248 }
be_bryan 0:b74591d5ab33 249
be_bryan 0:b74591d5ab33 250 /******************************************************************************
be_bryan 0:b74591d5ab33 251 * READ/WRITE
be_bryan 0:b74591d5ab33 252 ******************************************************************************/
be_bryan 0:b74591d5ab33 253 int serial_getc(serial_t *obj) {
be_bryan 0:b74591d5ab33 254 while (!serial_readable(obj));
be_bryan 0:b74591d5ab33 255 return obj->uart->RBR;
be_bryan 0:b74591d5ab33 256 }
be_bryan 0:b74591d5ab33 257
be_bryan 0:b74591d5ab33 258 void serial_putc(serial_t *obj, int c) {
be_bryan 0:b74591d5ab33 259 while (!serial_writable(obj));
be_bryan 0:b74591d5ab33 260 obj->uart->THR = c;
be_bryan 0:b74591d5ab33 261 }
be_bryan 0:b74591d5ab33 262
be_bryan 0:b74591d5ab33 263 int serial_readable(serial_t *obj) {
be_bryan 0:b74591d5ab33 264 return obj->uart->LSR & 0x01;
be_bryan 0:b74591d5ab33 265 }
be_bryan 0:b74591d5ab33 266
be_bryan 0:b74591d5ab33 267 int serial_writable(serial_t *obj) {
be_bryan 0:b74591d5ab33 268 return obj->uart->LSR & 0x20;
be_bryan 0:b74591d5ab33 269 }
be_bryan 0:b74591d5ab33 270
be_bryan 0:b74591d5ab33 271 void serial_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 272 obj->uart->FCR = 1 << 1 // rx FIFO reset
be_bryan 0:b74591d5ab33 273 | 1 << 2 // tx FIFO reset
be_bryan 0:b74591d5ab33 274 | 0 << 6; // interrupt depth
be_bryan 0:b74591d5ab33 275 }
be_bryan 0:b74591d5ab33 276
be_bryan 0:b74591d5ab33 277 void serial_pinout_tx(PinName tx) {
be_bryan 0:b74591d5ab33 278 pinmap_pinout(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 279 }
be_bryan 0:b74591d5ab33 280
be_bryan 0:b74591d5ab33 281 void serial_break_set(serial_t *obj) {
be_bryan 0:b74591d5ab33 282 obj->uart->LCR |= (1 << 6);
be_bryan 0:b74591d5ab33 283 }
be_bryan 0:b74591d5ab33 284
be_bryan 0:b74591d5ab33 285 void serial_break_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 286 obj->uart->LCR &= ~(1 << 6);
be_bryan 0:b74591d5ab33 287 }
be_bryan 0:b74591d5ab33 288