EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 17 #include "i2c_api.h"
be_bryan 0:b74591d5ab33 18 #include "cmsis.h"
be_bryan 0:b74591d5ab33 19 #include "pinmap.h"
be_bryan 0:b74591d5ab33 20 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
be_bryan 0:b74591d5ab33 21
be_bryan 0:b74591d5ab33 22 #define I2C_CONSET(x) (x->i2c->CONSET)
be_bryan 0:b74591d5ab33 23 #define I2C_CONCLR(x) (x->i2c->CONCLR)
be_bryan 0:b74591d5ab33 24 #define I2C_STAT(x) (x->i2c->STAT)
be_bryan 0:b74591d5ab33 25 #define I2C_DAT(x) (x->i2c->DAT)
be_bryan 0:b74591d5ab33 26 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
be_bryan 0:b74591d5ab33 27 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
be_bryan 0:b74591d5ab33 28
be_bryan 0:b74591d5ab33 29 static const uint32_t I2C_addr_offset[2][4] = {
be_bryan 0:b74591d5ab33 30 {0x0C, 0x20, 0x24, 0x28},
be_bryan 0:b74591d5ab33 31 {0x30, 0x34, 0x38, 0x3C}
be_bryan 0:b74591d5ab33 32 };
be_bryan 0:b74591d5ab33 33
be_bryan 0:b74591d5ab33 34 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
be_bryan 0:b74591d5ab33 35 I2C_CONCLR(obj) = (start << 5)
be_bryan 0:b74591d5ab33 36 | (stop << 4)
be_bryan 0:b74591d5ab33 37 | (interrupt << 3)
be_bryan 0:b74591d5ab33 38 | (acknowledge << 2);
be_bryan 0:b74591d5ab33 39 }
be_bryan 0:b74591d5ab33 40
be_bryan 0:b74591d5ab33 41 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
be_bryan 0:b74591d5ab33 42 I2C_CONSET(obj) = (start << 5)
be_bryan 0:b74591d5ab33 43 | (stop << 4)
be_bryan 0:b74591d5ab33 44 | (interrupt << 3)
be_bryan 0:b74591d5ab33 45 | (acknowledge << 2);
be_bryan 0:b74591d5ab33 46 }
be_bryan 0:b74591d5ab33 47
be_bryan 0:b74591d5ab33 48 // Clear the Serial Interrupt (SI)
be_bryan 0:b74591d5ab33 49 static inline void i2c_clear_SI(i2c_t *obj) {
be_bryan 0:b74591d5ab33 50 i2c_conclr(obj, 0, 0, 1, 0);
be_bryan 0:b74591d5ab33 51 }
be_bryan 0:b74591d5ab33 52
be_bryan 0:b74591d5ab33 53 static inline int i2c_status(i2c_t *obj) {
be_bryan 0:b74591d5ab33 54 return I2C_STAT(obj);
be_bryan 0:b74591d5ab33 55 }
be_bryan 0:b74591d5ab33 56
be_bryan 0:b74591d5ab33 57 // Wait until the Serial Interrupt (SI) is set
be_bryan 0:b74591d5ab33 58 static int i2c_wait_SI(i2c_t *obj) {
be_bryan 0:b74591d5ab33 59 int timeout = 0;
be_bryan 0:b74591d5ab33 60 while (!(I2C_CONSET(obj) & (1 << 3))) {
be_bryan 0:b74591d5ab33 61 timeout++;
be_bryan 0:b74591d5ab33 62 if (timeout > 100000) return -1;
be_bryan 0:b74591d5ab33 63 }
be_bryan 0:b74591d5ab33 64 return 0;
be_bryan 0:b74591d5ab33 65 }
be_bryan 0:b74591d5ab33 66
be_bryan 0:b74591d5ab33 67 static inline void i2c_interface_enable(i2c_t *obj) {
be_bryan 0:b74591d5ab33 68 I2C_CONSET(obj) = 0x40;
be_bryan 0:b74591d5ab33 69 }
be_bryan 0:b74591d5ab33 70
be_bryan 0:b74591d5ab33 71 static inline void i2c_power_enable(i2c_t *obj) {
be_bryan 0:b74591d5ab33 72 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
be_bryan 0:b74591d5ab33 73 LPC_SYSCON->PRESETCTRL |= 1 << 1;
be_bryan 0:b74591d5ab33 74 }
be_bryan 0:b74591d5ab33 75
be_bryan 0:b74591d5ab33 76 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
be_bryan 0:b74591d5ab33 77 // determine the SPI to use
be_bryan 0:b74591d5ab33 78 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 79 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 80 obj->i2c = (LPC_I2C_Type *)pinmap_merge(i2c_sda, i2c_scl);
be_bryan 0:b74591d5ab33 81 MBED_ASSERT((int)obj->i2c != NC);
be_bryan 0:b74591d5ab33 82
be_bryan 0:b74591d5ab33 83 // enable power
be_bryan 0:b74591d5ab33 84 i2c_power_enable(obj);
be_bryan 0:b74591d5ab33 85
be_bryan 0:b74591d5ab33 86 // set default frequency at 100k
be_bryan 0:b74591d5ab33 87 i2c_frequency(obj, 100000);
be_bryan 0:b74591d5ab33 88 i2c_conclr(obj, 1, 1, 1, 1);
be_bryan 0:b74591d5ab33 89 i2c_interface_enable(obj);
be_bryan 0:b74591d5ab33 90
be_bryan 0:b74591d5ab33 91 pinmap_pinout(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 92 pinmap_pinout(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 93 }
be_bryan 0:b74591d5ab33 94
be_bryan 0:b74591d5ab33 95 inline int i2c_start(i2c_t *obj) {
be_bryan 0:b74591d5ab33 96 int status = 0;
be_bryan 0:b74591d5ab33 97 int isInterrupted = I2C_CONSET(obj) & (1 << 3);
be_bryan 0:b74591d5ab33 98
be_bryan 0:b74591d5ab33 99 // 8.1 Before master mode can be entered, I2CON must be initialised to:
be_bryan 0:b74591d5ab33 100 // - I2EN STA STO SI AA - -
be_bryan 0:b74591d5ab33 101 // - 1 0 0 x x - -
be_bryan 0:b74591d5ab33 102 // if AA = 0, it can't enter slave mode
be_bryan 0:b74591d5ab33 103 i2c_conclr(obj, 1, 1, 0, 1);
be_bryan 0:b74591d5ab33 104
be_bryan 0:b74591d5ab33 105 // The master mode may now be entered by setting the STA bit
be_bryan 0:b74591d5ab33 106 // this will generate a start condition when the bus becomes free
be_bryan 0:b74591d5ab33 107 i2c_conset(obj, 1, 0, 0, 1);
be_bryan 0:b74591d5ab33 108 // Clearing SI bit when it wasn't set on entry can jump past state
be_bryan 0:b74591d5ab33 109 // 0x10 or 0x08 and erroneously send uninitialized slave address.
be_bryan 0:b74591d5ab33 110 if (isInterrupted)
be_bryan 0:b74591d5ab33 111 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 112
be_bryan 0:b74591d5ab33 113 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 114 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 115
be_bryan 0:b74591d5ab33 116 // Clear start bit now that it's transmitted
be_bryan 0:b74591d5ab33 117 i2c_conclr(obj, 1, 0, 0, 0);
be_bryan 0:b74591d5ab33 118 return status;
be_bryan 0:b74591d5ab33 119 }
be_bryan 0:b74591d5ab33 120
be_bryan 0:b74591d5ab33 121 inline int i2c_stop(i2c_t *obj) {
be_bryan 0:b74591d5ab33 122 int timeout = 0;
be_bryan 0:b74591d5ab33 123
be_bryan 0:b74591d5ab33 124 // write the stop bit
be_bryan 0:b74591d5ab33 125 i2c_conset(obj, 0, 1, 0, 0);
be_bryan 0:b74591d5ab33 126 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 127
be_bryan 0:b74591d5ab33 128 // wait for STO bit to reset
be_bryan 0:b74591d5ab33 129 while(I2C_CONSET(obj) & (1 << 4)) {
be_bryan 0:b74591d5ab33 130 timeout ++;
be_bryan 0:b74591d5ab33 131 if (timeout > 100000) return 1;
be_bryan 0:b74591d5ab33 132 }
be_bryan 0:b74591d5ab33 133
be_bryan 0:b74591d5ab33 134 return 0;
be_bryan 0:b74591d5ab33 135 }
be_bryan 0:b74591d5ab33 136
be_bryan 0:b74591d5ab33 137
be_bryan 0:b74591d5ab33 138 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
be_bryan 0:b74591d5ab33 139 // write the data
be_bryan 0:b74591d5ab33 140 I2C_DAT(obj) = value;
be_bryan 0:b74591d5ab33 141
be_bryan 0:b74591d5ab33 142 // clear SI to init a send
be_bryan 0:b74591d5ab33 143 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 144
be_bryan 0:b74591d5ab33 145 // wait and return status
be_bryan 0:b74591d5ab33 146 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 147 return i2c_status(obj);
be_bryan 0:b74591d5ab33 148 }
be_bryan 0:b74591d5ab33 149
be_bryan 0:b74591d5ab33 150 static inline int i2c_do_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 151 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
be_bryan 0:b74591d5ab33 152 if (last) {
be_bryan 0:b74591d5ab33 153 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
be_bryan 0:b74591d5ab33 154 } else {
be_bryan 0:b74591d5ab33 155 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
be_bryan 0:b74591d5ab33 156 }
be_bryan 0:b74591d5ab33 157
be_bryan 0:b74591d5ab33 158 // accept byte
be_bryan 0:b74591d5ab33 159 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 160
be_bryan 0:b74591d5ab33 161 // wait for it to arrive
be_bryan 0:b74591d5ab33 162 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 163
be_bryan 0:b74591d5ab33 164 // return the data
be_bryan 0:b74591d5ab33 165 return (I2C_DAT(obj) & 0xFF);
be_bryan 0:b74591d5ab33 166 }
be_bryan 0:b74591d5ab33 167
be_bryan 0:b74591d5ab33 168 void i2c_frequency(i2c_t *obj, int hz) {
be_bryan 0:b74591d5ab33 169 // No peripheral clock divider on the M0
be_bryan 0:b74591d5ab33 170 uint32_t PCLK = SystemCoreClock;
be_bryan 0:b74591d5ab33 171
be_bryan 0:b74591d5ab33 172 uint32_t pulse = PCLK / (hz * 2);
be_bryan 0:b74591d5ab33 173
be_bryan 0:b74591d5ab33 174 // I2C Rate
be_bryan 0:b74591d5ab33 175 I2C_SCLL(obj, pulse);
be_bryan 0:b74591d5ab33 176 I2C_SCLH(obj, pulse);
be_bryan 0:b74591d5ab33 177 }
be_bryan 0:b74591d5ab33 178
be_bryan 0:b74591d5ab33 179 // The I2C does a read or a write as a whole operation
be_bryan 0:b74591d5ab33 180 // There are two types of error conditions it can encounter
be_bryan 0:b74591d5ab33 181 // 1) it can not obtain the bus
be_bryan 0:b74591d5ab33 182 // 2) it gets error responses at part of the transmission
be_bryan 0:b74591d5ab33 183 //
be_bryan 0:b74591d5ab33 184 // We tackle them as follows:
be_bryan 0:b74591d5ab33 185 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
be_bryan 0:b74591d5ab33 186 // which basically turns it in to a 2)
be_bryan 0:b74591d5ab33 187 // 2) on error, we use the standard error mechanisms to report/debug
be_bryan 0:b74591d5ab33 188 //
be_bryan 0:b74591d5ab33 189 // Therefore an I2C transaction should always complete. If it doesn't it is usually
be_bryan 0:b74591d5ab33 190 // because something is setup wrong (e.g. wiring), and we don't need to programatically
be_bryan 0:b74591d5ab33 191 // check for that
be_bryan 0:b74591d5ab33 192
be_bryan 0:b74591d5ab33 193 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 194 int count, status;
be_bryan 0:b74591d5ab33 195
be_bryan 0:b74591d5ab33 196 status = i2c_start(obj);
be_bryan 0:b74591d5ab33 197
be_bryan 0:b74591d5ab33 198 if ((status != 0x10) && (status != 0x08)) {
be_bryan 0:b74591d5ab33 199 i2c_stop(obj);
be_bryan 0:b74591d5ab33 200 return I2C_ERROR_BUS_BUSY;
be_bryan 0:b74591d5ab33 201 }
be_bryan 0:b74591d5ab33 202
be_bryan 0:b74591d5ab33 203 status = i2c_do_write(obj, (address | 0x01), 1);
be_bryan 0:b74591d5ab33 204 if (status != 0x40) {
be_bryan 0:b74591d5ab33 205 i2c_stop(obj);
be_bryan 0:b74591d5ab33 206 return I2C_ERROR_NO_SLAVE;
be_bryan 0:b74591d5ab33 207 }
be_bryan 0:b74591d5ab33 208
be_bryan 0:b74591d5ab33 209 // Read in all except last byte
be_bryan 0:b74591d5ab33 210 for (count = 0; count < (length - 1); count++) {
be_bryan 0:b74591d5ab33 211 int value = i2c_do_read(obj, 0);
be_bryan 0:b74591d5ab33 212 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 213 if (status != 0x50) {
be_bryan 0:b74591d5ab33 214 i2c_stop(obj);
be_bryan 0:b74591d5ab33 215 return count;
be_bryan 0:b74591d5ab33 216 }
be_bryan 0:b74591d5ab33 217 data[count] = (char) value;
be_bryan 0:b74591d5ab33 218 }
be_bryan 0:b74591d5ab33 219
be_bryan 0:b74591d5ab33 220 // read in last byte
be_bryan 0:b74591d5ab33 221 int value = i2c_do_read(obj, 1);
be_bryan 0:b74591d5ab33 222 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 223 if (status != 0x58) {
be_bryan 0:b74591d5ab33 224 i2c_stop(obj);
be_bryan 0:b74591d5ab33 225 return length - 1;
be_bryan 0:b74591d5ab33 226 }
be_bryan 0:b74591d5ab33 227
be_bryan 0:b74591d5ab33 228 data[count] = (char) value;
be_bryan 0:b74591d5ab33 229
be_bryan 0:b74591d5ab33 230 // If not repeated start, send stop.
be_bryan 0:b74591d5ab33 231 if (stop) {
be_bryan 0:b74591d5ab33 232 i2c_stop(obj);
be_bryan 0:b74591d5ab33 233 }
be_bryan 0:b74591d5ab33 234
be_bryan 0:b74591d5ab33 235 return length;
be_bryan 0:b74591d5ab33 236 }
be_bryan 0:b74591d5ab33 237
be_bryan 0:b74591d5ab33 238 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 239 int i, status;
be_bryan 0:b74591d5ab33 240
be_bryan 0:b74591d5ab33 241 status = i2c_start(obj);
be_bryan 0:b74591d5ab33 242
be_bryan 0:b74591d5ab33 243 if ((status != 0x10) && (status != 0x08)) {
be_bryan 0:b74591d5ab33 244 i2c_stop(obj);
be_bryan 0:b74591d5ab33 245 return I2C_ERROR_BUS_BUSY;
be_bryan 0:b74591d5ab33 246 }
be_bryan 0:b74591d5ab33 247
be_bryan 0:b74591d5ab33 248 status = i2c_do_write(obj, (address & 0xFE), 1);
be_bryan 0:b74591d5ab33 249 if (status != 0x18) {
be_bryan 0:b74591d5ab33 250 i2c_stop(obj);
be_bryan 0:b74591d5ab33 251 return I2C_ERROR_NO_SLAVE;
be_bryan 0:b74591d5ab33 252 }
be_bryan 0:b74591d5ab33 253
be_bryan 0:b74591d5ab33 254 for (i=0; i<length; i++) {
be_bryan 0:b74591d5ab33 255 status = i2c_do_write(obj, data[i], 0);
be_bryan 0:b74591d5ab33 256 if(status != 0x28) {
be_bryan 0:b74591d5ab33 257 i2c_stop(obj);
be_bryan 0:b74591d5ab33 258 return i;
be_bryan 0:b74591d5ab33 259 }
be_bryan 0:b74591d5ab33 260 }
be_bryan 0:b74591d5ab33 261
be_bryan 0:b74591d5ab33 262 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
be_bryan 0:b74591d5ab33 263 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
be_bryan 0:b74591d5ab33 264 // i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 265
be_bryan 0:b74591d5ab33 266 // If not repeated start, send stop.
be_bryan 0:b74591d5ab33 267 if (stop) {
be_bryan 0:b74591d5ab33 268 i2c_stop(obj);
be_bryan 0:b74591d5ab33 269 }
be_bryan 0:b74591d5ab33 270
be_bryan 0:b74591d5ab33 271 return length;
be_bryan 0:b74591d5ab33 272 }
be_bryan 0:b74591d5ab33 273
be_bryan 0:b74591d5ab33 274 void i2c_reset(i2c_t *obj) {
be_bryan 0:b74591d5ab33 275 i2c_stop(obj);
be_bryan 0:b74591d5ab33 276 }
be_bryan 0:b74591d5ab33 277
be_bryan 0:b74591d5ab33 278 int i2c_byte_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 279 return (i2c_do_read(obj, last) & 0xFF);
be_bryan 0:b74591d5ab33 280 }
be_bryan 0:b74591d5ab33 281
be_bryan 0:b74591d5ab33 282 int i2c_byte_write(i2c_t *obj, int data) {
be_bryan 0:b74591d5ab33 283 int ack;
be_bryan 0:b74591d5ab33 284 int status = i2c_do_write(obj, (data & 0xFF), 0);
be_bryan 0:b74591d5ab33 285
be_bryan 0:b74591d5ab33 286 switch(status) {
be_bryan 0:b74591d5ab33 287 case 0x18: case 0x28: // Master transmit ACKs
be_bryan 0:b74591d5ab33 288 ack = 1;
be_bryan 0:b74591d5ab33 289 break;
be_bryan 0:b74591d5ab33 290 case 0x40: // Master receive address transmitted ACK
be_bryan 0:b74591d5ab33 291 ack = 1;
be_bryan 0:b74591d5ab33 292 break;
be_bryan 0:b74591d5ab33 293 case 0xB8: // Slave transmit ACK
be_bryan 0:b74591d5ab33 294 ack = 1;
be_bryan 0:b74591d5ab33 295 break;
be_bryan 0:b74591d5ab33 296 default:
be_bryan 0:b74591d5ab33 297 ack = 0;
be_bryan 0:b74591d5ab33 298 break;
be_bryan 0:b74591d5ab33 299 }
be_bryan 0:b74591d5ab33 300
be_bryan 0:b74591d5ab33 301 return ack;
be_bryan 0:b74591d5ab33 302 }
be_bryan 0:b74591d5ab33 303
be_bryan 0:b74591d5ab33 304 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
be_bryan 0:b74591d5ab33 305 if (enable_slave != 0) {
be_bryan 0:b74591d5ab33 306 i2c_conclr(obj, 1, 1, 1, 0);
be_bryan 0:b74591d5ab33 307 i2c_conset(obj, 0, 0, 0, 1);
be_bryan 0:b74591d5ab33 308 } else {
be_bryan 0:b74591d5ab33 309 i2c_conclr(obj, 1, 1, 1, 1);
be_bryan 0:b74591d5ab33 310 }
be_bryan 0:b74591d5ab33 311 }
be_bryan 0:b74591d5ab33 312
be_bryan 0:b74591d5ab33 313 int i2c_slave_receive(i2c_t *obj) {
be_bryan 0:b74591d5ab33 314 int status;
be_bryan 0:b74591d5ab33 315 int retval;
be_bryan 0:b74591d5ab33 316
be_bryan 0:b74591d5ab33 317 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 318 switch(status) {
be_bryan 0:b74591d5ab33 319 case 0x60: retval = 3; break;
be_bryan 0:b74591d5ab33 320 case 0x70: retval = 2; break;
be_bryan 0:b74591d5ab33 321 case 0xA8: retval = 1; break;
be_bryan 0:b74591d5ab33 322 default : retval = 0; break;
be_bryan 0:b74591d5ab33 323 }
be_bryan 0:b74591d5ab33 324
be_bryan 0:b74591d5ab33 325 return(retval);
be_bryan 0:b74591d5ab33 326 }
be_bryan 0:b74591d5ab33 327
be_bryan 0:b74591d5ab33 328 int i2c_slave_read(i2c_t *obj, char *data, int length) {
be_bryan 0:b74591d5ab33 329 int count = 0;
be_bryan 0:b74591d5ab33 330 int status;
be_bryan 0:b74591d5ab33 331
be_bryan 0:b74591d5ab33 332 do {
be_bryan 0:b74591d5ab33 333 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 334 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 335 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 336 if((status == 0x80) || (status == 0x90)) {
be_bryan 0:b74591d5ab33 337 data[count] = I2C_DAT(obj) & 0xFF;
be_bryan 0:b74591d5ab33 338 }
be_bryan 0:b74591d5ab33 339 count++;
be_bryan 0:b74591d5ab33 340 } while (((status == 0x80) || (status == 0x90) ||
be_bryan 0:b74591d5ab33 341 (status == 0x060) || (status == 0x70)) && (count < length));
be_bryan 0:b74591d5ab33 342
be_bryan 0:b74591d5ab33 343 if(status != 0xA0) {
be_bryan 0:b74591d5ab33 344 i2c_stop(obj);
be_bryan 0:b74591d5ab33 345 }
be_bryan 0:b74591d5ab33 346
be_bryan 0:b74591d5ab33 347 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 348
be_bryan 0:b74591d5ab33 349 return count;
be_bryan 0:b74591d5ab33 350 }
be_bryan 0:b74591d5ab33 351
be_bryan 0:b74591d5ab33 352 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
be_bryan 0:b74591d5ab33 353 int count = 0;
be_bryan 0:b74591d5ab33 354 int status;
be_bryan 0:b74591d5ab33 355
be_bryan 0:b74591d5ab33 356 if(length <= 0) {
be_bryan 0:b74591d5ab33 357 return(0);
be_bryan 0:b74591d5ab33 358 }
be_bryan 0:b74591d5ab33 359
be_bryan 0:b74591d5ab33 360 do {
be_bryan 0:b74591d5ab33 361 status = i2c_do_write(obj, data[count], 0);
be_bryan 0:b74591d5ab33 362 count++;
be_bryan 0:b74591d5ab33 363 } while ((count < length) && (status == 0xB8));
be_bryan 0:b74591d5ab33 364
be_bryan 0:b74591d5ab33 365 if((status != 0xC0) && (status != 0xC8)) {
be_bryan 0:b74591d5ab33 366 i2c_stop(obj);
be_bryan 0:b74591d5ab33 367 }
be_bryan 0:b74591d5ab33 368
be_bryan 0:b74591d5ab33 369 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 370
be_bryan 0:b74591d5ab33 371 return(count);
be_bryan 0:b74591d5ab33 372 }
be_bryan 0:b74591d5ab33 373
be_bryan 0:b74591d5ab33 374 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
be_bryan 0:b74591d5ab33 375 uint32_t addr;
be_bryan 0:b74591d5ab33 376
be_bryan 0:b74591d5ab33 377 if ((idx >= 0) && (idx <= 3)) {
be_bryan 0:b74591d5ab33 378 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
be_bryan 0:b74591d5ab33 379 *((uint32_t *) addr) = address & 0xFF;
be_bryan 0:b74591d5ab33 380 }
be_bryan 0:b74591d5ab33 381 }