EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC11U6X/serial_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16
be_bryan 0:b74591d5ab33 17 // math.h required for floating point operations for baud rate calculation
be_bryan 0:b74591d5ab33 18 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 19 #include <math.h>
be_bryan 0:b74591d5ab33 20 #include <string.h>
be_bryan 0:b74591d5ab33 21 #include <stdlib.h>
be_bryan 0:b74591d5ab33 22
be_bryan 0:b74591d5ab33 23 #include "serial_api.h"
be_bryan 0:b74591d5ab33 24 #include "cmsis.h"
be_bryan 0:b74591d5ab33 25 #include "pinmap.h"
be_bryan 0:b74591d5ab33 26
be_bryan 0:b74591d5ab33 27 #if DEVICE_SERIAL
be_bryan 0:b74591d5ab33 28
be_bryan 0:b74591d5ab33 29 /******************************************************************************
be_bryan 0:b74591d5ab33 30 * INITIALIZATION
be_bryan 0:b74591d5ab33 31 ******************************************************************************/
be_bryan 0:b74591d5ab33 32
be_bryan 0:b74591d5ab33 33 #define UART_NUM 5
be_bryan 0:b74591d5ab33 34
be_bryan 0:b74591d5ab33 35 // CFG
be_bryan 0:b74591d5ab33 36 #define UART_EN (0x01<<0)
be_bryan 0:b74591d5ab33 37
be_bryan 0:b74591d5ab33 38 // CTL
be_bryan 0:b74591d5ab33 39 #define TXBRKEN (0x01<<1)
be_bryan 0:b74591d5ab33 40
be_bryan 0:b74591d5ab33 41 // STAT
be_bryan 0:b74591d5ab33 42 #define RXRDY (0x01<<0)
be_bryan 0:b74591d5ab33 43 #define TXRDY (0x01<<2)
be_bryan 0:b74591d5ab33 44 #define DELTACTS (0x01<<5)
be_bryan 0:b74591d5ab33 45 #define RXBRK (0x01<<10)
be_bryan 0:b74591d5ab33 46 #define DELTARXBRK (0x01<<11)
be_bryan 0:b74591d5ab33 47
be_bryan 0:b74591d5ab33 48 static const PinMap PinMap_UART_TX[] = {
be_bryan 0:b74591d5ab33 49 {P0_19, UART_0, 1},
be_bryan 0:b74591d5ab33 50 {P1_18, UART_0, 2},
be_bryan 0:b74591d5ab33 51 {P1_27, UART_0, 2},
be_bryan 0:b74591d5ab33 52 {P1_8 , UART_1, 2},
be_bryan 0:b74591d5ab33 53 {P0_14, UART_1, 4},
be_bryan 0:b74591d5ab33 54 {P1_0 , UART_2, 3},
be_bryan 0:b74591d5ab33 55 {P1_23, UART_2, 3},
be_bryan 0:b74591d5ab33 56 {P2_4 , UART_3, 1},
be_bryan 0:b74591d5ab33 57 {P2_12, UART_4, 1},
be_bryan 0:b74591d5ab33 58 { NC , NC , 0}
be_bryan 0:b74591d5ab33 59 };
be_bryan 0:b74591d5ab33 60
be_bryan 0:b74591d5ab33 61 static const PinMap PinMap_UART_RX[] = {
be_bryan 0:b74591d5ab33 62 {P0_18, UART_0, 1},
be_bryan 0:b74591d5ab33 63 {P1_17, UART_0, 2},
be_bryan 0:b74591d5ab33 64 {P1_26, UART_0, 2},
be_bryan 0:b74591d5ab33 65 {P1_2 , UART_1, 3},
be_bryan 0:b74591d5ab33 66 {P0_13, UART_1, 4},
be_bryan 0:b74591d5ab33 67 {P0_20, UART_2, 2},
be_bryan 0:b74591d5ab33 68 {P1_6 , UART_2, 2},
be_bryan 0:b74591d5ab33 69 {P2_3 , UART_3, 1},
be_bryan 0:b74591d5ab33 70 {P2_11, UART_4, 1},
be_bryan 0:b74591d5ab33 71 {NC , NC , 0}
be_bryan 0:b74591d5ab33 72 };
be_bryan 0:b74591d5ab33 73
be_bryan 0:b74591d5ab33 74 static uint32_t serial_irq_ids[UART_NUM] = {0};
be_bryan 0:b74591d5ab33 75 static uart_irq_handler irq_handler;
be_bryan 0:b74591d5ab33 76
be_bryan 0:b74591d5ab33 77 int stdio_uart_inited = 0;
be_bryan 0:b74591d5ab33 78 serial_t stdio_uart;
be_bryan 0:b74591d5ab33 79
be_bryan 0:b74591d5ab33 80 void serial_init(serial_t *obj, PinName tx, PinName rx) {
be_bryan 0:b74591d5ab33 81 int is_stdio_uart = 0;
be_bryan 0:b74591d5ab33 82
be_bryan 0:b74591d5ab33 83 // determine the UART to use
be_bryan 0:b74591d5ab33 84 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 85 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
be_bryan 0:b74591d5ab33 86 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
be_bryan 0:b74591d5ab33 87 MBED_ASSERT((int)uart != NC);
be_bryan 0:b74591d5ab33 88
be_bryan 0:b74591d5ab33 89 switch (uart) {
be_bryan 0:b74591d5ab33 90 case UART_0:
be_bryan 0:b74591d5ab33 91 obj->index = 0;
be_bryan 0:b74591d5ab33 92 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12);
be_bryan 0:b74591d5ab33 93 break;
be_bryan 0:b74591d5ab33 94 case UART_1:
be_bryan 0:b74591d5ab33 95 obj->index = 1;
be_bryan 0:b74591d5ab33 96 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 20);
be_bryan 0:b74591d5ab33 97 LPC_SYSCON->PRESETCTRL |= (1 << 5);
be_bryan 0:b74591d5ab33 98 break;
be_bryan 0:b74591d5ab33 99 case UART_2:
be_bryan 0:b74591d5ab33 100 obj->index = 2;
be_bryan 0:b74591d5ab33 101 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 21);
be_bryan 0:b74591d5ab33 102 LPC_SYSCON->PRESETCTRL |= (1 << 6);
be_bryan 0:b74591d5ab33 103 break;
be_bryan 0:b74591d5ab33 104 case UART_3:
be_bryan 0:b74591d5ab33 105 obj->index = 3;
be_bryan 0:b74591d5ab33 106 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22);
be_bryan 0:b74591d5ab33 107 LPC_SYSCON->PRESETCTRL |= (1 << 7);
be_bryan 0:b74591d5ab33 108 break;
be_bryan 0:b74591d5ab33 109 case UART_4:
be_bryan 0:b74591d5ab33 110 obj->index = 4;
be_bryan 0:b74591d5ab33 111 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22);
be_bryan 0:b74591d5ab33 112 LPC_SYSCON->PRESETCTRL |= (1 << 8);
be_bryan 0:b74591d5ab33 113 break;
be_bryan 0:b74591d5ab33 114 }
be_bryan 0:b74591d5ab33 115
be_bryan 0:b74591d5ab33 116 if (obj->index == 0)
be_bryan 0:b74591d5ab33 117 obj->uart = (LPC_USART0_Type *)uart;
be_bryan 0:b74591d5ab33 118 else
be_bryan 0:b74591d5ab33 119 obj->mini_uart = (LPC_USART4_Type *)uart;
be_bryan 0:b74591d5ab33 120
be_bryan 0:b74591d5ab33 121 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 122 // enable fifos and default rx trigger level
be_bryan 0:b74591d5ab33 123 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
be_bryan 0:b74591d5ab33 124 | 0 << 1 // Rx Fifo Clear
be_bryan 0:b74591d5ab33 125 | 0 << 2 // Tx Fifo Clear
be_bryan 0:b74591d5ab33 126 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
be_bryan 0:b74591d5ab33 127 // disable irqs
be_bryan 0:b74591d5ab33 128 obj->uart->IER = 0 << 0 // Rx Data available irq enable
be_bryan 0:b74591d5ab33 129 | 0 << 1 // Tx Fifo empty irq enable
be_bryan 0:b74591d5ab33 130 | 0 << 2; // Rx Line Status irq enable
be_bryan 0:b74591d5ab33 131 }
be_bryan 0:b74591d5ab33 132 else {
be_bryan 0:b74591d5ab33 133 // Clear all status bits
be_bryan 0:b74591d5ab33 134 obj->mini_uart->STAT = (DELTACTS | DELTARXBRK);
be_bryan 0:b74591d5ab33 135 // Enable UART
be_bryan 0:b74591d5ab33 136 obj->mini_uart->CFG |= UART_EN;
be_bryan 0:b74591d5ab33 137 }
be_bryan 0:b74591d5ab33 138 // set default baud rate and format
be_bryan 0:b74591d5ab33 139 serial_baud (obj, 9600);
be_bryan 0:b74591d5ab33 140 serial_format(obj, 8, ParityNone, 1);
be_bryan 0:b74591d5ab33 141
be_bryan 0:b74591d5ab33 142 // pinout the chosen uart
be_bryan 0:b74591d5ab33 143 pinmap_pinout(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 144 pinmap_pinout(rx, PinMap_UART_RX);
be_bryan 0:b74591d5ab33 145
be_bryan 0:b74591d5ab33 146 // set rx/tx pins in PullUp mode
be_bryan 0:b74591d5ab33 147 if (tx != NC) {
be_bryan 0:b74591d5ab33 148 pin_mode(tx, PullUp);
be_bryan 0:b74591d5ab33 149 }
be_bryan 0:b74591d5ab33 150 if (rx != NC) {
be_bryan 0:b74591d5ab33 151 pin_mode(rx, PullUp);
be_bryan 0:b74591d5ab33 152 }
be_bryan 0:b74591d5ab33 153
be_bryan 0:b74591d5ab33 154 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
be_bryan 0:b74591d5ab33 155
be_bryan 0:b74591d5ab33 156 if (is_stdio_uart && (obj->index == 0)) {
be_bryan 0:b74591d5ab33 157 stdio_uart_inited = 1;
be_bryan 0:b74591d5ab33 158 memcpy(&stdio_uart, obj, sizeof(serial_t));
be_bryan 0:b74591d5ab33 159 }
be_bryan 0:b74591d5ab33 160 }
be_bryan 0:b74591d5ab33 161
be_bryan 0:b74591d5ab33 162 void serial_free(serial_t *obj) {
be_bryan 0:b74591d5ab33 163 serial_irq_ids[obj->index] = 0;
be_bryan 0:b74591d5ab33 164 }
be_bryan 0:b74591d5ab33 165
be_bryan 0:b74591d5ab33 166 // serial_baud
be_bryan 0:b74591d5ab33 167 // set the baud rate, taking in to account the current SystemFrequency
be_bryan 0:b74591d5ab33 168 void serial_baud(serial_t *obj, int baudrate) {
be_bryan 0:b74591d5ab33 169 LPC_SYSCON->USART0CLKDIV = 1;
be_bryan 0:b74591d5ab33 170 LPC_SYSCON->FRGCLKDIV = 1;
be_bryan 0:b74591d5ab33 171
be_bryan 0:b74591d5ab33 172 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 173 uint32_t PCLK = SystemCoreClock;
be_bryan 0:b74591d5ab33 174 // First we check to see if the basic divide with no DivAddVal/MulVal
be_bryan 0:b74591d5ab33 175 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
be_bryan 0:b74591d5ab33 176 // MulVal = 1. Otherwise, we search the valid ratio value range to find
be_bryan 0:b74591d5ab33 177 // the closest match. This could be more elegant, using search methods
be_bryan 0:b74591d5ab33 178 // and/or lookup tables, but the brute force method is not that much
be_bryan 0:b74591d5ab33 179 // slower, and is more maintainable.
be_bryan 0:b74591d5ab33 180 uint16_t DL = PCLK / (16 * baudrate);
be_bryan 0:b74591d5ab33 181
be_bryan 0:b74591d5ab33 182 uint8_t DivAddVal = 0;
be_bryan 0:b74591d5ab33 183 uint8_t MulVal = 1;
be_bryan 0:b74591d5ab33 184 int hit = 0;
be_bryan 0:b74591d5ab33 185 uint16_t dlv;
be_bryan 0:b74591d5ab33 186 uint8_t mv, dav;
be_bryan 0:b74591d5ab33 187 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
be_bryan 0:b74591d5ab33 188 int err_best = baudrate, b;
be_bryan 0:b74591d5ab33 189 for (mv = 1; mv < 16 && !hit; mv++)
be_bryan 0:b74591d5ab33 190 {
be_bryan 0:b74591d5ab33 191 for (dav = 0; dav < mv; dav++)
be_bryan 0:b74591d5ab33 192 {
be_bryan 0:b74591d5ab33 193 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
be_bryan 0:b74591d5ab33 194 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
be_bryan 0:b74591d5ab33 195 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
be_bryan 0:b74591d5ab33 196 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
be_bryan 0:b74591d5ab33 197 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
be_bryan 0:b74591d5ab33 198
be_bryan 0:b74591d5ab33 199 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
be_bryan 0:b74591d5ab33 200 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
be_bryan 0:b74591d5ab33 201 else // 2 bits headroom, use more precision
be_bryan 0:b74591d5ab33 202 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
be_bryan 0:b74591d5ab33 203
be_bryan 0:b74591d5ab33 204 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
be_bryan 0:b74591d5ab33 205 if (dlv == 0)
be_bryan 0:b74591d5ab33 206 dlv = 1;
be_bryan 0:b74591d5ab33 207
be_bryan 0:b74591d5ab33 208 // datasheet says if dav > 0 then DL must be >= 2
be_bryan 0:b74591d5ab33 209 if ((dav > 0) && (dlv < 2))
be_bryan 0:b74591d5ab33 210 dlv = 2;
be_bryan 0:b74591d5ab33 211
be_bryan 0:b74591d5ab33 212 // integer rearrangement of the baudrate equation (with rounding)
be_bryan 0:b74591d5ab33 213 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
be_bryan 0:b74591d5ab33 214
be_bryan 0:b74591d5ab33 215 // check to see how we went
be_bryan 0:b74591d5ab33 216 b = abs(b - baudrate);
be_bryan 0:b74591d5ab33 217 if (b < err_best)
be_bryan 0:b74591d5ab33 218 {
be_bryan 0:b74591d5ab33 219 err_best = b;
be_bryan 0:b74591d5ab33 220
be_bryan 0:b74591d5ab33 221 DL = dlv;
be_bryan 0:b74591d5ab33 222 MulVal = mv;
be_bryan 0:b74591d5ab33 223 DivAddVal = dav;
be_bryan 0:b74591d5ab33 224
be_bryan 0:b74591d5ab33 225 if (b == baudrate)
be_bryan 0:b74591d5ab33 226 {
be_bryan 0:b74591d5ab33 227 hit = 1;
be_bryan 0:b74591d5ab33 228 break;
be_bryan 0:b74591d5ab33 229 }
be_bryan 0:b74591d5ab33 230 }
be_bryan 0:b74591d5ab33 231 }
be_bryan 0:b74591d5ab33 232 }
be_bryan 0:b74591d5ab33 233 }
be_bryan 0:b74591d5ab33 234
be_bryan 0:b74591d5ab33 235 // set LCR[DLAB] to enable writing to divider registers
be_bryan 0:b74591d5ab33 236 obj->uart->LCR |= (1 << 7);
be_bryan 0:b74591d5ab33 237
be_bryan 0:b74591d5ab33 238 // set divider values
be_bryan 0:b74591d5ab33 239 obj->uart->DLM = (DL >> 8) & 0xFF;
be_bryan 0:b74591d5ab33 240 obj->uart->DLL = (DL >> 0) & 0xFF;
be_bryan 0:b74591d5ab33 241 obj->uart->FDR = (uint32_t) DivAddVal << 0
be_bryan 0:b74591d5ab33 242 | (uint32_t) MulVal << 4;
be_bryan 0:b74591d5ab33 243
be_bryan 0:b74591d5ab33 244 // clear LCR[DLAB]
be_bryan 0:b74591d5ab33 245 obj->uart->LCR &= ~(1 << 7);
be_bryan 0:b74591d5ab33 246 }
be_bryan 0:b74591d5ab33 247 else {
be_bryan 0:b74591d5ab33 248 uint32_t UARTSysClk = SystemCoreClock / LPC_SYSCON->FRGCLKDIV;
be_bryan 0:b74591d5ab33 249 obj->mini_uart->BRG = UARTSysClk / 16 / baudrate - 1;
be_bryan 0:b74591d5ab33 250
be_bryan 0:b74591d5ab33 251 LPC_SYSCON->UARTFRGDIV = 0xFF;
be_bryan 0:b74591d5ab33 252 LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) /
be_bryan 0:b74591d5ab33 253 (baudrate * (obj->mini_uart->BRG + 1))
be_bryan 0:b74591d5ab33 254 ) - (LPC_SYSCON->UARTFRGDIV + 1);
be_bryan 0:b74591d5ab33 255 }
be_bryan 0:b74591d5ab33 256 }
be_bryan 0:b74591d5ab33 257
be_bryan 0:b74591d5ab33 258 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
be_bryan 0:b74591d5ab33 259 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
be_bryan 0:b74591d5ab33 260
be_bryan 0:b74591d5ab33 261 stop_bits -= 1;
be_bryan 0:b74591d5ab33 262
be_bryan 0:b74591d5ab33 263 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 264 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
be_bryan 0:b74591d5ab33 265 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
be_bryan 0:b74591d5ab33 266 (parity == ParityForced1) || (parity == ParityForced0));
be_bryan 0:b74591d5ab33 267 data_bits -= 5;
be_bryan 0:b74591d5ab33 268
be_bryan 0:b74591d5ab33 269 int parity_enable, parity_select;
be_bryan 0:b74591d5ab33 270 switch (parity) {
be_bryan 0:b74591d5ab33 271 case ParityNone: parity_enable = 0; parity_select = 0; break;
be_bryan 0:b74591d5ab33 272 case ParityOdd : parity_enable = 1; parity_select = 0; break;
be_bryan 0:b74591d5ab33 273 case ParityEven: parity_enable = 1; parity_select = 1; break;
be_bryan 0:b74591d5ab33 274 case ParityForced1: parity_enable = 1; parity_select = 2; break;
be_bryan 0:b74591d5ab33 275 case ParityForced0: parity_enable = 1; parity_select = 3; break;
be_bryan 0:b74591d5ab33 276 default:
be_bryan 0:b74591d5ab33 277 return;
be_bryan 0:b74591d5ab33 278 }
be_bryan 0:b74591d5ab33 279
be_bryan 0:b74591d5ab33 280 obj->uart->LCR = data_bits << 0
be_bryan 0:b74591d5ab33 281 | stop_bits << 2
be_bryan 0:b74591d5ab33 282 | parity_enable << 3
be_bryan 0:b74591d5ab33 283 | parity_select << 4;
be_bryan 0:b74591d5ab33 284 }
be_bryan 0:b74591d5ab33 285 else {
be_bryan 0:b74591d5ab33 286 // 0: 7 data bits ... 2: 9 data bits
be_bryan 0:b74591d5ab33 287 MBED_ASSERT((data_bits > 6) && (data_bits < 10));
be_bryan 0:b74591d5ab33 288 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
be_bryan 0:b74591d5ab33 289 data_bits -= 7;
be_bryan 0:b74591d5ab33 290
be_bryan 0:b74591d5ab33 291 int paritysel;
be_bryan 0:b74591d5ab33 292 switch (parity) {
be_bryan 0:b74591d5ab33 293 case ParityNone: paritysel = 0; break;
be_bryan 0:b74591d5ab33 294 case ParityEven: paritysel = 2; break;
be_bryan 0:b74591d5ab33 295 case ParityOdd : paritysel = 3; break;
be_bryan 0:b74591d5ab33 296 default:
be_bryan 0:b74591d5ab33 297 return;
be_bryan 0:b74591d5ab33 298 }
be_bryan 0:b74591d5ab33 299 obj->mini_uart->CFG = (data_bits << 2)
be_bryan 0:b74591d5ab33 300 | (paritysel << 4)
be_bryan 0:b74591d5ab33 301 | (stop_bits << 6)
be_bryan 0:b74591d5ab33 302 | UART_EN;
be_bryan 0:b74591d5ab33 303 }
be_bryan 0:b74591d5ab33 304 }
be_bryan 0:b74591d5ab33 305
be_bryan 0:b74591d5ab33 306 /******************************************************************************
be_bryan 0:b74591d5ab33 307 * INTERRUPTS HANDLING
be_bryan 0:b74591d5ab33 308 ******************************************************************************/
be_bryan 0:b74591d5ab33 309 static inline void uart_irq(uint32_t iir, uint32_t index) {
be_bryan 0:b74591d5ab33 310 SerialIrq irq_type;
be_bryan 0:b74591d5ab33 311 switch (iir) {
be_bryan 0:b74591d5ab33 312 case 1: irq_type = TxIrq; break;
be_bryan 0:b74591d5ab33 313 case 2: irq_type = RxIrq; break;
be_bryan 0:b74591d5ab33 314 default: return;
be_bryan 0:b74591d5ab33 315 }
be_bryan 0:b74591d5ab33 316
be_bryan 0:b74591d5ab33 317 if (serial_irq_ids[index] != 0)
be_bryan 0:b74591d5ab33 318 irq_handler(serial_irq_ids[index], irq_type);
be_bryan 0:b74591d5ab33 319 }
be_bryan 0:b74591d5ab33 320
be_bryan 0:b74591d5ab33 321 void uart0_irq()
be_bryan 0:b74591d5ab33 322 {
be_bryan 0:b74591d5ab33 323 uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0);
be_bryan 0:b74591d5ab33 324 }
be_bryan 0:b74591d5ab33 325
be_bryan 0:b74591d5ab33 326 void uart1_irq()
be_bryan 0:b74591d5ab33 327 {
be_bryan 0:b74591d5ab33 328 if(LPC_USART1->STAT & (1 << 2)){
be_bryan 0:b74591d5ab33 329 uart_irq(1, 1);
be_bryan 0:b74591d5ab33 330 }
be_bryan 0:b74591d5ab33 331 if(LPC_USART1->STAT & (1 << 0)){
be_bryan 0:b74591d5ab33 332 uart_irq(2, 1);
be_bryan 0:b74591d5ab33 333 }
be_bryan 0:b74591d5ab33 334 }
be_bryan 0:b74591d5ab33 335
be_bryan 0:b74591d5ab33 336 void uart2_irq()
be_bryan 0:b74591d5ab33 337 {
be_bryan 0:b74591d5ab33 338 if(LPC_USART2->STAT & (1 << 2)){
be_bryan 0:b74591d5ab33 339 uart_irq(1, 2);
be_bryan 0:b74591d5ab33 340 }
be_bryan 0:b74591d5ab33 341 if(LPC_USART2->STAT & (1 << 0)){
be_bryan 0:b74591d5ab33 342 uart_irq(2, 2);
be_bryan 0:b74591d5ab33 343 }
be_bryan 0:b74591d5ab33 344 }
be_bryan 0:b74591d5ab33 345
be_bryan 0:b74591d5ab33 346 void uart3_irq()
be_bryan 0:b74591d5ab33 347 {
be_bryan 0:b74591d5ab33 348 if(LPC_USART3->STAT & (1 << 2)){
be_bryan 0:b74591d5ab33 349 uart_irq(1, 3);
be_bryan 0:b74591d5ab33 350 }
be_bryan 0:b74591d5ab33 351 if(LPC_USART3->STAT & (1 << 0)){
be_bryan 0:b74591d5ab33 352 uart_irq(2, 3);
be_bryan 0:b74591d5ab33 353 }
be_bryan 0:b74591d5ab33 354 }
be_bryan 0:b74591d5ab33 355
be_bryan 0:b74591d5ab33 356 void uart4_irq()
be_bryan 0:b74591d5ab33 357 {
be_bryan 0:b74591d5ab33 358 if(LPC_USART4->STAT & (1 << 2)){
be_bryan 0:b74591d5ab33 359 uart_irq(1, 4);
be_bryan 0:b74591d5ab33 360 }
be_bryan 0:b74591d5ab33 361 if(LPC_USART4->STAT & (1 << 0)){
be_bryan 0:b74591d5ab33 362 uart_irq(2, 4);
be_bryan 0:b74591d5ab33 363 }
be_bryan 0:b74591d5ab33 364 }
be_bryan 0:b74591d5ab33 365
be_bryan 0:b74591d5ab33 366 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
be_bryan 0:b74591d5ab33 367 irq_handler = handler;
be_bryan 0:b74591d5ab33 368 serial_irq_ids[obj->index] = id;
be_bryan 0:b74591d5ab33 369 }
be_bryan 0:b74591d5ab33 370
be_bryan 0:b74591d5ab33 371 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
be_bryan 0:b74591d5ab33 372 IRQn_Type irq_n = (IRQn_Type)0;
be_bryan 0:b74591d5ab33 373 uint32_t vector = 0;
be_bryan 0:b74591d5ab33 374 if(obj->index == 0){
be_bryan 0:b74591d5ab33 375 irq_n = USART0_IRQn; vector = (uint32_t)&uart0_irq;
be_bryan 0:b74591d5ab33 376 }
be_bryan 0:b74591d5ab33 377 else{
be_bryan 0:b74591d5ab33 378 switch ((int)obj->mini_uart) {
be_bryan 0:b74591d5ab33 379 case UART_0: irq_n = USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
be_bryan 0:b74591d5ab33 380 case UART_1: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart1_irq; break;
be_bryan 0:b74591d5ab33 381 case UART_2: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart2_irq; break;
be_bryan 0:b74591d5ab33 382 case UART_3: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart3_irq; break;
be_bryan 0:b74591d5ab33 383 case UART_4: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart4_irq; break;
be_bryan 0:b74591d5ab33 384 }
be_bryan 0:b74591d5ab33 385 }
be_bryan 0:b74591d5ab33 386
be_bryan 0:b74591d5ab33 387 if (enable) {
be_bryan 0:b74591d5ab33 388 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 389 obj->uart->IER |= (1 << irq);
be_bryan 0:b74591d5ab33 390 }
be_bryan 0:b74591d5ab33 391 else {
be_bryan 0:b74591d5ab33 392 obj->mini_uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2));
be_bryan 0:b74591d5ab33 393 }
be_bryan 0:b74591d5ab33 394 NVIC_SetVector(irq_n, vector);
be_bryan 0:b74591d5ab33 395 NVIC_EnableIRQ(irq_n);
be_bryan 0:b74591d5ab33 396 } else { // disable
be_bryan 0:b74591d5ab33 397 int all_disabled = 0;
be_bryan 0:b74591d5ab33 398 SerialIrq other_irq = (irq == RxIrq) ? (RxIrq) : (TxIrq);
be_bryan 0:b74591d5ab33 399
be_bryan 0:b74591d5ab33 400 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 401 obj->uart->IER &= ~(1 << irq);
be_bryan 0:b74591d5ab33 402 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
be_bryan 0:b74591d5ab33 403 }
be_bryan 0:b74591d5ab33 404 else {
be_bryan 0:b74591d5ab33 405 obj->mini_uart->INTENCLR = (1 << ((irq == RxIrq) ? 0 : 2));
be_bryan 0:b74591d5ab33 406 all_disabled = (obj->mini_uart->INTENSET) == 0;
be_bryan 0:b74591d5ab33 407 }
be_bryan 0:b74591d5ab33 408
be_bryan 0:b74591d5ab33 409 if (all_disabled)
be_bryan 0:b74591d5ab33 410 NVIC_DisableIRQ(irq_n);
be_bryan 0:b74591d5ab33 411 }
be_bryan 0:b74591d5ab33 412 }
be_bryan 0:b74591d5ab33 413
be_bryan 0:b74591d5ab33 414 /******************************************************************************
be_bryan 0:b74591d5ab33 415 * READ/WRITE
be_bryan 0:b74591d5ab33 416 ******************************************************************************/
be_bryan 0:b74591d5ab33 417 int serial_getc(serial_t *obj) {
be_bryan 0:b74591d5ab33 418 while (!serial_readable(obj));
be_bryan 0:b74591d5ab33 419 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 420 return obj->uart->RBR;
be_bryan 0:b74591d5ab33 421 }
be_bryan 0:b74591d5ab33 422 else {
be_bryan 0:b74591d5ab33 423 return obj->mini_uart->RXDAT;
be_bryan 0:b74591d5ab33 424 }
be_bryan 0:b74591d5ab33 425 }
be_bryan 0:b74591d5ab33 426
be_bryan 0:b74591d5ab33 427 void serial_putc(serial_t *obj, int c) {
be_bryan 0:b74591d5ab33 428 while (!serial_writable(obj));
be_bryan 0:b74591d5ab33 429 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 430 obj->uart->THR = c;
be_bryan 0:b74591d5ab33 431 }
be_bryan 0:b74591d5ab33 432 else {
be_bryan 0:b74591d5ab33 433 obj->mini_uart->TXDAT = c;
be_bryan 0:b74591d5ab33 434 }
be_bryan 0:b74591d5ab33 435 }
be_bryan 0:b74591d5ab33 436
be_bryan 0:b74591d5ab33 437 int serial_readable(serial_t *obj) {
be_bryan 0:b74591d5ab33 438 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 439 return obj->uart->LSR & 0x01;
be_bryan 0:b74591d5ab33 440 }
be_bryan 0:b74591d5ab33 441 else {
be_bryan 0:b74591d5ab33 442 return obj->mini_uart->STAT & RXRDY;
be_bryan 0:b74591d5ab33 443 }
be_bryan 0:b74591d5ab33 444 }
be_bryan 0:b74591d5ab33 445
be_bryan 0:b74591d5ab33 446 int serial_writable(serial_t *obj) {
be_bryan 0:b74591d5ab33 447 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 448 return obj->uart->LSR & 0x20;
be_bryan 0:b74591d5ab33 449 }
be_bryan 0:b74591d5ab33 450 else {
be_bryan 0:b74591d5ab33 451 return obj->mini_uart->STAT & TXRDY;
be_bryan 0:b74591d5ab33 452 }
be_bryan 0:b74591d5ab33 453 }
be_bryan 0:b74591d5ab33 454
be_bryan 0:b74591d5ab33 455 void serial_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 456 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 457 obj->uart->FCR = 1 << 1 // rx FIFO reset
be_bryan 0:b74591d5ab33 458 | 1 << 2 // tx FIFO reset
be_bryan 0:b74591d5ab33 459 | 0 << 6; // interrupt depth
be_bryan 0:b74591d5ab33 460 }
be_bryan 0:b74591d5ab33 461 else {
be_bryan 0:b74591d5ab33 462 obj->mini_uart->STAT = 0;
be_bryan 0:b74591d5ab33 463 }
be_bryan 0:b74591d5ab33 464 }
be_bryan 0:b74591d5ab33 465
be_bryan 0:b74591d5ab33 466 void serial_pinout_tx(PinName tx) {
be_bryan 0:b74591d5ab33 467 pinmap_pinout(tx, PinMap_UART_TX);
be_bryan 0:b74591d5ab33 468 }
be_bryan 0:b74591d5ab33 469
be_bryan 0:b74591d5ab33 470 void serial_break_set(serial_t *obj) {
be_bryan 0:b74591d5ab33 471 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 472 obj->uart->LCR |= (1 << 6);
be_bryan 0:b74591d5ab33 473 }
be_bryan 0:b74591d5ab33 474 else {
be_bryan 0:b74591d5ab33 475 obj->mini_uart->CTL |= TXBRKEN;
be_bryan 0:b74591d5ab33 476 }
be_bryan 0:b74591d5ab33 477 }
be_bryan 0:b74591d5ab33 478
be_bryan 0:b74591d5ab33 479 void serial_break_clear(serial_t *obj) {
be_bryan 0:b74591d5ab33 480 if (obj->index == 0) {
be_bryan 0:b74591d5ab33 481 obj->uart->LCR &= ~(1 << 6);
be_bryan 0:b74591d5ab33 482 }
be_bryan 0:b74591d5ab33 483 else {
be_bryan 0:b74591d5ab33 484 obj->mini_uart->CTL &= ~TXBRKEN;
be_bryan 0:b74591d5ab33 485 }
be_bryan 0:b74591d5ab33 486 }
be_bryan 0:b74591d5ab33 487
be_bryan 0:b74591d5ab33 488
be_bryan 0:b74591d5ab33 489 #endif