EL4121 Embedded System / mbed-os

mbed-os

Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC11U6X/i2c_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 17 #include "i2c_api.h"
be_bryan 0:b74591d5ab33 18 #include "cmsis.h"
be_bryan 0:b74591d5ab33 19 #include "pinmap.h"
be_bryan 0:b74591d5ab33 20
be_bryan 0:b74591d5ab33 21 #if DEVICE_I2C
be_bryan 0:b74591d5ab33 22
be_bryan 0:b74591d5ab33 23 static const PinMap PinMap_I2C_SDA[] = {
be_bryan 0:b74591d5ab33 24 {P0_5 , I2C_0, 1},
be_bryan 0:b74591d5ab33 25 {P1_3 , I2C_1, 3},
be_bryan 0:b74591d5ab33 26 {P1_14, I2C_1, 1},
be_bryan 0:b74591d5ab33 27 {P1_24, I2C_1, 2},
be_bryan 0:b74591d5ab33 28 {NC , NC , 0}
be_bryan 0:b74591d5ab33 29 };
be_bryan 0:b74591d5ab33 30
be_bryan 0:b74591d5ab33 31 static const PinMap PinMap_I2C_SCL[] = {
be_bryan 0:b74591d5ab33 32 {P0_4 , I2C_0, 1},
be_bryan 0:b74591d5ab33 33 {P0_7 , I2C_1, 3},
be_bryan 0:b74591d5ab33 34 {P1_11, I2C_1, 1},
be_bryan 0:b74591d5ab33 35 {P1_30, I2C_1, 1},
be_bryan 0:b74591d5ab33 36 {NC , NC, 0}
be_bryan 0:b74591d5ab33 37 };
be_bryan 0:b74591d5ab33 38
be_bryan 0:b74591d5ab33 39 #define I2C_CONSET(x) (x->i2c->CONSET)
be_bryan 0:b74591d5ab33 40 #define I2C_CONCLR(x) (x->i2c->CONCLR)
be_bryan 0:b74591d5ab33 41 #define I2C_STAT(x) (x->i2c->STAT)
be_bryan 0:b74591d5ab33 42 #define I2C_DAT(x) (x->i2c->DAT)
be_bryan 0:b74591d5ab33 43 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
be_bryan 0:b74591d5ab33 44 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
be_bryan 0:b74591d5ab33 45
be_bryan 0:b74591d5ab33 46 static const uint32_t I2C_addr_offset[2][4] = {
be_bryan 0:b74591d5ab33 47 {0x0C, 0x20, 0x24, 0x28}, // slave address offset
be_bryan 0:b74591d5ab33 48 {0x30, 0x34, 0x38, 0x3C} // slave address mask offset
be_bryan 0:b74591d5ab33 49 };
be_bryan 0:b74591d5ab33 50
be_bryan 0:b74591d5ab33 51 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
be_bryan 0:b74591d5ab33 52 I2C_CONCLR(obj) = (start << 5)
be_bryan 0:b74591d5ab33 53 | (stop << 4)
be_bryan 0:b74591d5ab33 54 | (interrupt << 3)
be_bryan 0:b74591d5ab33 55 | (acknowledge << 2);
be_bryan 0:b74591d5ab33 56 }
be_bryan 0:b74591d5ab33 57
be_bryan 0:b74591d5ab33 58 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
be_bryan 0:b74591d5ab33 59 I2C_CONSET(obj) = (start << 5)
be_bryan 0:b74591d5ab33 60 | (stop << 4)
be_bryan 0:b74591d5ab33 61 | (interrupt << 3)
be_bryan 0:b74591d5ab33 62 | (acknowledge << 2);
be_bryan 0:b74591d5ab33 63 }
be_bryan 0:b74591d5ab33 64
be_bryan 0:b74591d5ab33 65 // Clear the Serial Interrupt (SI)
be_bryan 0:b74591d5ab33 66 static inline void i2c_clear_SI(i2c_t *obj) {
be_bryan 0:b74591d5ab33 67 i2c_conclr(obj, 0, 0, 1, 0);
be_bryan 0:b74591d5ab33 68 }
be_bryan 0:b74591d5ab33 69
be_bryan 0:b74591d5ab33 70 static inline int i2c_status(i2c_t *obj) {
be_bryan 0:b74591d5ab33 71 return I2C_STAT(obj);
be_bryan 0:b74591d5ab33 72 }
be_bryan 0:b74591d5ab33 73
be_bryan 0:b74591d5ab33 74 // Wait until the Serial Interrupt (SI) is set
be_bryan 0:b74591d5ab33 75 static int i2c_wait_SI(i2c_t *obj) {
be_bryan 0:b74591d5ab33 76 volatile int timeout = 0;
be_bryan 0:b74591d5ab33 77 while (!(I2C_CONSET(obj) & (1 << 3))) {
be_bryan 0:b74591d5ab33 78 timeout++;
be_bryan 0:b74591d5ab33 79 if (timeout > 100000) return -1;
be_bryan 0:b74591d5ab33 80 }
be_bryan 0:b74591d5ab33 81 return 0;
be_bryan 0:b74591d5ab33 82 }
be_bryan 0:b74591d5ab33 83
be_bryan 0:b74591d5ab33 84 static inline void i2c_interface_enable(i2c_t *obj) {
be_bryan 0:b74591d5ab33 85 I2C_CONSET(obj) = 0x40;
be_bryan 0:b74591d5ab33 86 }
be_bryan 0:b74591d5ab33 87
be_bryan 0:b74591d5ab33 88 static inline void i2c_power_enable(i2c_t *obj) {
be_bryan 0:b74591d5ab33 89 LPC_SYSCON->SYSAHBCLKCTRL |= ((1 << 5) | (1 << 25));
be_bryan 0:b74591d5ab33 90 LPC_SYSCON->PRESETCTRL |= ((1 << 1) | (1 << 3));
be_bryan 0:b74591d5ab33 91 }
be_bryan 0:b74591d5ab33 92
be_bryan 0:b74591d5ab33 93 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
be_bryan 0:b74591d5ab33 94 // determine the SPI to use
be_bryan 0:b74591d5ab33 95 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 96 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 97 obj->i2c = (LPC_I2C0_Type *)pinmap_merge(i2c_sda, i2c_scl);
be_bryan 0:b74591d5ab33 98 MBED_ASSERT((int)obj->i2c != NC);
be_bryan 0:b74591d5ab33 99
be_bryan 0:b74591d5ab33 100 // enable power
be_bryan 0:b74591d5ab33 101 i2c_power_enable(obj);
be_bryan 0:b74591d5ab33 102
be_bryan 0:b74591d5ab33 103 // set default frequency at 100k
be_bryan 0:b74591d5ab33 104 i2c_frequency(obj, 100000);
be_bryan 0:b74591d5ab33 105 i2c_conclr(obj, 1, 1, 1, 1);
be_bryan 0:b74591d5ab33 106 i2c_interface_enable(obj);
be_bryan 0:b74591d5ab33 107
be_bryan 0:b74591d5ab33 108 pinmap_pinout(sda, PinMap_I2C_SDA);
be_bryan 0:b74591d5ab33 109 pinmap_pinout(scl, PinMap_I2C_SCL);
be_bryan 0:b74591d5ab33 110 }
be_bryan 0:b74591d5ab33 111
be_bryan 0:b74591d5ab33 112 inline int i2c_start(i2c_t *obj) {
be_bryan 0:b74591d5ab33 113 int status = 0;
be_bryan 0:b74591d5ab33 114 int isInterrupted = I2C_CONSET(obj) & (1 << 3);
be_bryan 0:b74591d5ab33 115
be_bryan 0:b74591d5ab33 116 // 8.1 Before master mode can be entered, I2CON must be initialised to:
be_bryan 0:b74591d5ab33 117 // - I2EN STA STO SI AA - -
be_bryan 0:b74591d5ab33 118 // - 1 0 0 x x - -
be_bryan 0:b74591d5ab33 119 // if AA = 0, it can't enter slave mode
be_bryan 0:b74591d5ab33 120 i2c_conclr(obj, 1, 1, 0, 1);
be_bryan 0:b74591d5ab33 121
be_bryan 0:b74591d5ab33 122 // The master mode may now be entered by setting the STA bit
be_bryan 0:b74591d5ab33 123 // this will generate a start condition when the bus becomes free
be_bryan 0:b74591d5ab33 124 i2c_conset(obj, 1, 0, 0, 1);
be_bryan 0:b74591d5ab33 125 // Clearing SI bit when it wasn't set on entry can jump past state
be_bryan 0:b74591d5ab33 126 // 0x10 or 0x08 and erroneously send uninitialized slave address.
be_bryan 0:b74591d5ab33 127 if (isInterrupted)
be_bryan 0:b74591d5ab33 128 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 129
be_bryan 0:b74591d5ab33 130 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 131 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 132
be_bryan 0:b74591d5ab33 133 // Clear start bit now that it's transmitted
be_bryan 0:b74591d5ab33 134 i2c_conclr(obj, 1, 0, 0, 0);
be_bryan 0:b74591d5ab33 135 return status;
be_bryan 0:b74591d5ab33 136 }
be_bryan 0:b74591d5ab33 137
be_bryan 0:b74591d5ab33 138 inline int i2c_stop(i2c_t *obj) {
be_bryan 0:b74591d5ab33 139 int timeout = 0;
be_bryan 0:b74591d5ab33 140
be_bryan 0:b74591d5ab33 141 // write the stop bit
be_bryan 0:b74591d5ab33 142 i2c_conset(obj, 0, 1, 0, 0);
be_bryan 0:b74591d5ab33 143 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 144
be_bryan 0:b74591d5ab33 145 // wait for STO bit to reset
be_bryan 0:b74591d5ab33 146 while(I2C_CONSET(obj) & (1 << 4)) {
be_bryan 0:b74591d5ab33 147 timeout ++;
be_bryan 0:b74591d5ab33 148 if (timeout > 100000) return 1;
be_bryan 0:b74591d5ab33 149 }
be_bryan 0:b74591d5ab33 150
be_bryan 0:b74591d5ab33 151 return 0;
be_bryan 0:b74591d5ab33 152 }
be_bryan 0:b74591d5ab33 153
be_bryan 0:b74591d5ab33 154
be_bryan 0:b74591d5ab33 155 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
be_bryan 0:b74591d5ab33 156 // write the data
be_bryan 0:b74591d5ab33 157 I2C_DAT(obj) = value;
be_bryan 0:b74591d5ab33 158
be_bryan 0:b74591d5ab33 159 // clear SI to init a send
be_bryan 0:b74591d5ab33 160 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 161
be_bryan 0:b74591d5ab33 162 // wait and return status
be_bryan 0:b74591d5ab33 163 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 164 return i2c_status(obj);
be_bryan 0:b74591d5ab33 165 }
be_bryan 0:b74591d5ab33 166
be_bryan 0:b74591d5ab33 167 static inline int i2c_do_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 168 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
be_bryan 0:b74591d5ab33 169 if (last) {
be_bryan 0:b74591d5ab33 170 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
be_bryan 0:b74591d5ab33 171 } else {
be_bryan 0:b74591d5ab33 172 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
be_bryan 0:b74591d5ab33 173 }
be_bryan 0:b74591d5ab33 174
be_bryan 0:b74591d5ab33 175 // accept byte
be_bryan 0:b74591d5ab33 176 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 177
be_bryan 0:b74591d5ab33 178 // wait for it to arrive
be_bryan 0:b74591d5ab33 179 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 180
be_bryan 0:b74591d5ab33 181 // return the data
be_bryan 0:b74591d5ab33 182 return (I2C_DAT(obj) & 0xFF);
be_bryan 0:b74591d5ab33 183 }
be_bryan 0:b74591d5ab33 184
be_bryan 0:b74591d5ab33 185 void i2c_frequency(i2c_t *obj, int hz) {
be_bryan 0:b74591d5ab33 186 // No peripheral clock divider on the M0
be_bryan 0:b74591d5ab33 187 uint32_t PCLK = SystemCoreClock;
be_bryan 0:b74591d5ab33 188
be_bryan 0:b74591d5ab33 189 uint32_t pulse = PCLK / (hz * 2);
be_bryan 0:b74591d5ab33 190
be_bryan 0:b74591d5ab33 191 // I2C Rate
be_bryan 0:b74591d5ab33 192 I2C_SCLL(obj, pulse);
be_bryan 0:b74591d5ab33 193 I2C_SCLH(obj, pulse);
be_bryan 0:b74591d5ab33 194 }
be_bryan 0:b74591d5ab33 195
be_bryan 0:b74591d5ab33 196 // The I2C does a read or a write as a whole operation
be_bryan 0:b74591d5ab33 197 // There are two types of error conditions it can encounter
be_bryan 0:b74591d5ab33 198 // 1) it can not obtain the bus
be_bryan 0:b74591d5ab33 199 // 2) it gets error responses at part of the transmission
be_bryan 0:b74591d5ab33 200 //
be_bryan 0:b74591d5ab33 201 // We tackle them as follows:
be_bryan 0:b74591d5ab33 202 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
be_bryan 0:b74591d5ab33 203 // which basically turns it in to a 2)
be_bryan 0:b74591d5ab33 204 // 2) on error, we use the standard error mechanisms to report/debug
be_bryan 0:b74591d5ab33 205 //
be_bryan 0:b74591d5ab33 206 // Therefore an I2C transaction should always complete. If it doesn't it is usually
be_bryan 0:b74591d5ab33 207 // because something is setup wrong (e.g. wiring), and we don't need to programatically
be_bryan 0:b74591d5ab33 208 // check for that
be_bryan 0:b74591d5ab33 209
be_bryan 0:b74591d5ab33 210 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 211 int count, status;
be_bryan 0:b74591d5ab33 212
be_bryan 0:b74591d5ab33 213 status = i2c_start(obj);
be_bryan 0:b74591d5ab33 214
be_bryan 0:b74591d5ab33 215 if ((status != 0x10) && (status != 0x08)) {
be_bryan 0:b74591d5ab33 216 i2c_stop(obj);
be_bryan 0:b74591d5ab33 217 return I2C_ERROR_BUS_BUSY;
be_bryan 0:b74591d5ab33 218 }
be_bryan 0:b74591d5ab33 219
be_bryan 0:b74591d5ab33 220 status = i2c_do_write(obj, (address | 0x01), 1);
be_bryan 0:b74591d5ab33 221 if (status != 0x40) {
be_bryan 0:b74591d5ab33 222 i2c_stop(obj);
be_bryan 0:b74591d5ab33 223 return I2C_ERROR_NO_SLAVE;
be_bryan 0:b74591d5ab33 224 }
be_bryan 0:b74591d5ab33 225
be_bryan 0:b74591d5ab33 226 // Read in all except last byte
be_bryan 0:b74591d5ab33 227 for (count = 0; count < (length - 1); count++) {
be_bryan 0:b74591d5ab33 228 int value = i2c_do_read(obj, 0);
be_bryan 0:b74591d5ab33 229 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 230 if (status != 0x50) {
be_bryan 0:b74591d5ab33 231 i2c_stop(obj);
be_bryan 0:b74591d5ab33 232 return count;
be_bryan 0:b74591d5ab33 233 }
be_bryan 0:b74591d5ab33 234 data[count] = (char) value;
be_bryan 0:b74591d5ab33 235 }
be_bryan 0:b74591d5ab33 236
be_bryan 0:b74591d5ab33 237 // read in last byte
be_bryan 0:b74591d5ab33 238 int value = i2c_do_read(obj, 1);
be_bryan 0:b74591d5ab33 239 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 240 if (status != 0x58) {
be_bryan 0:b74591d5ab33 241 i2c_stop(obj);
be_bryan 0:b74591d5ab33 242 return length - 1;
be_bryan 0:b74591d5ab33 243 }
be_bryan 0:b74591d5ab33 244
be_bryan 0:b74591d5ab33 245 data[count] = (char) value;
be_bryan 0:b74591d5ab33 246
be_bryan 0:b74591d5ab33 247 // If not repeated start, send stop.
be_bryan 0:b74591d5ab33 248 if (stop) {
be_bryan 0:b74591d5ab33 249 i2c_stop(obj);
be_bryan 0:b74591d5ab33 250 }
be_bryan 0:b74591d5ab33 251
be_bryan 0:b74591d5ab33 252 return length;
be_bryan 0:b74591d5ab33 253 }
be_bryan 0:b74591d5ab33 254
be_bryan 0:b74591d5ab33 255 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
be_bryan 0:b74591d5ab33 256 int i, status;
be_bryan 0:b74591d5ab33 257
be_bryan 0:b74591d5ab33 258 status = i2c_start(obj);
be_bryan 0:b74591d5ab33 259
be_bryan 0:b74591d5ab33 260 if ((status != 0x10) && (status != 0x08)) {
be_bryan 0:b74591d5ab33 261 i2c_stop(obj);
be_bryan 0:b74591d5ab33 262 return I2C_ERROR_BUS_BUSY;
be_bryan 0:b74591d5ab33 263 }
be_bryan 0:b74591d5ab33 264
be_bryan 0:b74591d5ab33 265 status = i2c_do_write(obj, (address & 0xFE), 1);
be_bryan 0:b74591d5ab33 266 if (status != 0x18) {
be_bryan 0:b74591d5ab33 267 i2c_stop(obj);
be_bryan 0:b74591d5ab33 268 return I2C_ERROR_NO_SLAVE;
be_bryan 0:b74591d5ab33 269 }
be_bryan 0:b74591d5ab33 270
be_bryan 0:b74591d5ab33 271 for (i=0; i<length; i++) {
be_bryan 0:b74591d5ab33 272 status = i2c_do_write(obj, data[i], 0);
be_bryan 0:b74591d5ab33 273 if(status != 0x28) {
be_bryan 0:b74591d5ab33 274 i2c_stop(obj);
be_bryan 0:b74591d5ab33 275 return i;
be_bryan 0:b74591d5ab33 276 }
be_bryan 0:b74591d5ab33 277 }
be_bryan 0:b74591d5ab33 278
be_bryan 0:b74591d5ab33 279 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
be_bryan 0:b74591d5ab33 280 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
be_bryan 0:b74591d5ab33 281 // i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 282
be_bryan 0:b74591d5ab33 283 // If not repeated start, send stop.
be_bryan 0:b74591d5ab33 284 if (stop) {
be_bryan 0:b74591d5ab33 285 i2c_stop(obj);
be_bryan 0:b74591d5ab33 286 }
be_bryan 0:b74591d5ab33 287
be_bryan 0:b74591d5ab33 288 return length;
be_bryan 0:b74591d5ab33 289 }
be_bryan 0:b74591d5ab33 290
be_bryan 0:b74591d5ab33 291 void i2c_reset(i2c_t *obj) {
be_bryan 0:b74591d5ab33 292 i2c_stop(obj);
be_bryan 0:b74591d5ab33 293 }
be_bryan 0:b74591d5ab33 294
be_bryan 0:b74591d5ab33 295 int i2c_byte_read(i2c_t *obj, int last) {
be_bryan 0:b74591d5ab33 296 return (i2c_do_read(obj, last) & 0xFF);
be_bryan 0:b74591d5ab33 297 }
be_bryan 0:b74591d5ab33 298
be_bryan 0:b74591d5ab33 299 int i2c_byte_write(i2c_t *obj, int data) {
be_bryan 0:b74591d5ab33 300 int ack;
be_bryan 0:b74591d5ab33 301 int status = i2c_do_write(obj, (data & 0xFF), 0);
be_bryan 0:b74591d5ab33 302
be_bryan 0:b74591d5ab33 303 switch(status) {
be_bryan 0:b74591d5ab33 304 case 0x18: case 0x28: // Master transmit ACKs
be_bryan 0:b74591d5ab33 305 ack = 1;
be_bryan 0:b74591d5ab33 306 break;
be_bryan 0:b74591d5ab33 307 case 0x40: // Master receive address transmitted ACK
be_bryan 0:b74591d5ab33 308 ack = 1;
be_bryan 0:b74591d5ab33 309 break;
be_bryan 0:b74591d5ab33 310 case 0xB8: // Slave transmit ACK
be_bryan 0:b74591d5ab33 311 ack = 1;
be_bryan 0:b74591d5ab33 312 break;
be_bryan 0:b74591d5ab33 313 default:
be_bryan 0:b74591d5ab33 314 ack = 0;
be_bryan 0:b74591d5ab33 315 break;
be_bryan 0:b74591d5ab33 316 }
be_bryan 0:b74591d5ab33 317
be_bryan 0:b74591d5ab33 318 return ack;
be_bryan 0:b74591d5ab33 319 }
be_bryan 0:b74591d5ab33 320
be_bryan 0:b74591d5ab33 321 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
be_bryan 0:b74591d5ab33 322 if (enable_slave != 0) {
be_bryan 0:b74591d5ab33 323 i2c_conclr(obj, 1, 1, 1, 0);
be_bryan 0:b74591d5ab33 324 i2c_conset(obj, 0, 0, 0, 1);
be_bryan 0:b74591d5ab33 325 } else {
be_bryan 0:b74591d5ab33 326 i2c_conclr(obj, 1, 1, 1, 1);
be_bryan 0:b74591d5ab33 327 }
be_bryan 0:b74591d5ab33 328 }
be_bryan 0:b74591d5ab33 329
be_bryan 0:b74591d5ab33 330 int i2c_slave_receive(i2c_t *obj) {
be_bryan 0:b74591d5ab33 331 int status;
be_bryan 0:b74591d5ab33 332 int retval;
be_bryan 0:b74591d5ab33 333
be_bryan 0:b74591d5ab33 334 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 335 switch(status) {
be_bryan 0:b74591d5ab33 336 case 0x60: retval = 3; break;
be_bryan 0:b74591d5ab33 337 case 0x70: retval = 2; break;
be_bryan 0:b74591d5ab33 338 case 0xA8: retval = 1; break;
be_bryan 0:b74591d5ab33 339 default : retval = 0; break;
be_bryan 0:b74591d5ab33 340 }
be_bryan 0:b74591d5ab33 341
be_bryan 0:b74591d5ab33 342 return(retval);
be_bryan 0:b74591d5ab33 343 }
be_bryan 0:b74591d5ab33 344
be_bryan 0:b74591d5ab33 345 int i2c_slave_read(i2c_t *obj, char *data, int length) {
be_bryan 0:b74591d5ab33 346 int count = 0;
be_bryan 0:b74591d5ab33 347 int status;
be_bryan 0:b74591d5ab33 348
be_bryan 0:b74591d5ab33 349 do {
be_bryan 0:b74591d5ab33 350 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 351 i2c_wait_SI(obj);
be_bryan 0:b74591d5ab33 352 status = i2c_status(obj);
be_bryan 0:b74591d5ab33 353 if((status == 0x80) || (status == 0x90)) {
be_bryan 0:b74591d5ab33 354 data[count] = I2C_DAT(obj) & 0xFF;
be_bryan 0:b74591d5ab33 355 }
be_bryan 0:b74591d5ab33 356 count++;
be_bryan 0:b74591d5ab33 357 } while (((status == 0x80) || (status == 0x90) ||
be_bryan 0:b74591d5ab33 358 (status == 0x060) || (status == 0x70)) && (count < length));
be_bryan 0:b74591d5ab33 359
be_bryan 0:b74591d5ab33 360 if(status != 0xA0) {
be_bryan 0:b74591d5ab33 361 i2c_stop(obj);
be_bryan 0:b74591d5ab33 362 }
be_bryan 0:b74591d5ab33 363
be_bryan 0:b74591d5ab33 364 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 365
be_bryan 0:b74591d5ab33 366 return count;
be_bryan 0:b74591d5ab33 367 }
be_bryan 0:b74591d5ab33 368
be_bryan 0:b74591d5ab33 369 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
be_bryan 0:b74591d5ab33 370 int count = 0;
be_bryan 0:b74591d5ab33 371 int status;
be_bryan 0:b74591d5ab33 372
be_bryan 0:b74591d5ab33 373 if(length <= 0) {
be_bryan 0:b74591d5ab33 374 return(0);
be_bryan 0:b74591d5ab33 375 }
be_bryan 0:b74591d5ab33 376
be_bryan 0:b74591d5ab33 377 do {
be_bryan 0:b74591d5ab33 378 status = i2c_do_write(obj, data[count], 0);
be_bryan 0:b74591d5ab33 379 count++;
be_bryan 0:b74591d5ab33 380 } while ((count < length) && (status == 0xB8));
be_bryan 0:b74591d5ab33 381
be_bryan 0:b74591d5ab33 382 if((status != 0xC0) && (status != 0xC8)) {
be_bryan 0:b74591d5ab33 383 i2c_stop(obj);
be_bryan 0:b74591d5ab33 384 }
be_bryan 0:b74591d5ab33 385
be_bryan 0:b74591d5ab33 386 i2c_clear_SI(obj);
be_bryan 0:b74591d5ab33 387
be_bryan 0:b74591d5ab33 388 return(count);
be_bryan 0:b74591d5ab33 389 }
be_bryan 0:b74591d5ab33 390
be_bryan 0:b74591d5ab33 391 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
be_bryan 0:b74591d5ab33 392 uint32_t addr;
be_bryan 0:b74591d5ab33 393
be_bryan 0:b74591d5ab33 394 if ((idx >= 0) && (idx <= 3)) {
be_bryan 0:b74591d5ab33 395 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
be_bryan 0:b74591d5ab33 396 *((uint32_t *) addr) = address & 0xFF;
be_bryan 0:b74591d5ab33 397 }
be_bryan 0:b74591d5ab33 398 }
be_bryan 0:b74591d5ab33 399
be_bryan 0:b74591d5ab33 400 #endif