EIC / L3GD20_SPI

L3GD20 Library using FIFO and Interrupt

Fork of L3GD20_SPI by Tatsuki Fukuda

L3GD20.h@3:6e935e7cec72, 2014-05-13 (annotated)

Committer:
lelect
Date:
Tue May 13 09:56:43 2014 +0000
Revision:
3:6e935e7cec72
Parent:
2:be6daa938101 
.....I had mistaken the mosi and miso.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lelect 0:175bf093daa8 1 #ifndef MBED_SPI
lelect 0:175bf093daa8 2 #define MBED_SPI
lelect 0:175bf093daa8 3 #include "mbed.h"
lelect 0:175bf093daa8 4 #include "L3GD20_Resister.h"
lelect 1:2ebc045424af 5 /** L3GD20(SPI) class
lelect 1:2ebc045424af 6 *
lelect 1:2ebc045424af 7 * This is the L3GD20 class.
lelect 1:2ebc045424af 8 * @code
lelect 1:2ebc045424af 9 #include "mbed.h"
lelect 1:2ebc045424af 10 #include "L3GD20.h"
lelect 1:2ebc045424af 11
lelect 1:2ebc045424af 12 Serial pc(USBTX,USBRX);//tx,rx
lelect 1:2ebc045424af 13 L3GD20 L3GD20(p11,p12,p13,p14,p15);//miso,mosi,sck,cs,interrupt
lelect 1:2ebc045424af 14
lelect 1:2ebc045424af 15 void interruption(anglerrates *val)
lelect 1:2ebc045424af 16 {
lelect 1:2ebc045424af 17 printf("X:%+05d\tY:%+05d\tZ:%+05d level:%02d\r\n",(val->X),(val->Y),(val->Z),(L3GD20.FIFO.level));
lelect 1:2ebc045424af 18 }
lelect 1:2ebc045424af 19 int main()
lelect 1:2ebc045424af 20 {
lelect 1:2ebc045424af 21 L3GD20.start(L3GD20::XYZ,&interruption);
lelect 1:2ebc045424af 22 while(1) {
lelect 1:2ebc045424af 23 sleep();
lelect 1:2ebc045424af 24 }
lelect 1:2ebc045424af 25 }
lelect 1:2ebc045424af 26 * @endcode
lelect 1:2ebc045424af 27 */
lelect 0:175bf093daa8 28 class L3GD20
lelect 0:175bf093daa8 29 {
lelect 0:175bf093daa8 30 public:
lelect 3:6e935e7cec72 31 L3GD20(PinName mosi, PinName miso, PinName scl, PinName cs,PinName interrupt2=NC);
lelect 0:175bf093daa8 32 typedef enum {
lelect 0:175bf093daa8 33 null=0x00,WhoAmI=0x0F,CtrlReg1=0x20,CtrlReg2=0x21,CtrlReg3=0x22,CtrlReg4=0x23,CtrlReg5=0x24,Reference=0x25,OutTemp=0x26,StatusReg=0x27,OutXL=0x28,OutXH=0x29,OutYL=0x2A,OutYH=0x2B,OutZL=0x2C,OutZH=0x2D,FIFOCtrlReg=0x2E,FIFOSrcReg=0x2F,INT1Cfg=0x30,INT1Src=0x31,INT1ThsXH=0x32,INT1ThsXL=0x33,INT1ThsYH=0x34,INT1ThsYL=0x35,INT1ThsZH=0x36,INT1ThsZL=0x37,INT1Duration=0x38,READ=0x80
lelect 0:175bf093daa8 34 } RESISTER;
lelect 1:2ebc045424af 35 /** @enum DIRECTION
lelect 1:2ebc045424af 36 * enable direction\n
lelect 1:2ebc045424af 37 * Example...L3GD20::XY,L3GD20::XYZ
lelect 1:2ebc045424af 38 */
lelect 0:175bf093daa8 39 typedef enum {
lelect 1:2ebc045424af 40 Y=0x1,
lelect 1:2ebc045424af 41 X=0x1<<1,
lelect 1:2ebc045424af 42 Z=0x1<<2,
lelect 1:2ebc045424af 43 XY=X|Y,
lelect 1:2ebc045424af 44 XZ=X|Z,
lelect 1:2ebc045424af 45 YZ=Y|Z,
lelect 1:2ebc045424af 46 XYZ=X|Y|Z
lelect 0:175bf093daa8 47 } DIRECTION;
lelect 2:be6daa938101 48 /** @enum FIFO_mode
lelect 2:be6daa938101 49 * FIFO mode\n
lelect 2:be6daa938101 50 * Example...L3GD20::FIFOmode\n
lelect 2:be6daa938101 51 * See Datasheet 4.2_FIFO(p.16/44)
lelect 2:be6daa938101 52 */
lelect 0:175bf093daa8 53 typedef enum {
lelect 0:175bf093daa8 54 BYPASSmode=0x0,FIFOmode,STREAMmode,STREAMtoFIFOmode,BYPASStoSTREAMmode
lelect 0:175bf093daa8 55 } FIFO_mode;
lelect 3:6e935e7cec72 56 /**
lelect 2:be6daa938101 57 * FIFO status for cause of interruption\n
lelect 2:be6daa938101 58 * Example...L3GD20::watermark\n
lelect 2:be6daa938101 59 * See Datasheet 7.4_CTRL_REG3(p.33/44)
lelect 2:be6daa938101 60 */
lelect 0:175bf093daa8 61 typedef enum {
lelect 0:175bf093daa8 62 none=0,empty,watermark,overrun
lelect 0:175bf093daa8 63 } FIFOstatus;
lelect 3:6e935e7cec72 64 /**
lelect 3:6e935e7cec72 65 * @brief FIFO status info
lelect 3:6e935e7cec72 66 */
lelect 3:6e935e7cec72 67 struct {
lelect 3:6e935e7cec72 68 FIFOstatus status;///< Type of status is enum "FIFOstatus". cause of interruption(none,empty,watermark,overrun)
lelect 3:6e935e7cec72 69 int level; ///< FIFO buffer level
lelect 0:175bf093daa8 70 } FIFO;
lelect 0:175bf093daa8 71 struct config {
lelect 0:175bf093daa8 72 //read and write resister
lelect 0:175bf093daa8 73 union CTRL_REG1 CTRL_REG1;
lelect 0:175bf093daa8 74 union CTRL_REG2 CTRL_REG2;
lelect 0:175bf093daa8 75 union CTRL_REG3 CTRL_REG3;
lelect 0:175bf093daa8 76 union CTRL_REG4 CTRL_REG4;
lelect 0:175bf093daa8 77 union CTRL_REG5 CTRL_REG5;
lelect 0:175bf093daa8 78 union REF_DATACAP REF_DATACAP;
lelect 0:175bf093daa8 79 union OUT_TEMP OUT_TEMP;
lelect 0:175bf093daa8 80 union STATUS_REG STATUS_REG;
lelect 0:175bf093daa8 81 union FIFO_CTRL_REG FIFO_CTRL_REG;
lelect 0:175bf093daa8 82 union INT1_CFG INT1_CFG;
lelect 0:175bf093daa8 83 union INT1_TSH_XH INT1_TSH_XH;
lelect 0:175bf093daa8 84 union INT1_TSH_XL INT1_TSH_XL;
lelect 0:175bf093daa8 85 union INT1_TSH_YH INT1_TSH_YH;
lelect 0:175bf093daa8 86 union INT1_TSH_YL INT1_TSH_YL;
lelect 0:175bf093daa8 87 union INT1_TSH_ZH INT1_TSH_ZH;
lelect 0:175bf093daa8 88 union INT1_TSH_ZL INT1_TSH_ZL;
lelect 0:175bf093daa8 89 union INT1_DURATION INT1_DURATION;
lelect 0:175bf093daa8 90 } _config;
lelect 0:175bf093daa8 91 struct status {
lelect 0:175bf093daa8 92 //read only resister
lelect 0:175bf093daa8 93 int OUT_TEMP;
lelect 0:175bf093daa8 94 int STATUS_REG;
lelect 0:175bf093daa8 95 union FIFO_SRC_REG FIFO_SRC_REG;
lelect 0:175bf093daa8 96 int INT1_SRC;
lelect 0:175bf093daa8 97 } _status;
lelect 0:175bf093daa8 98 //Class method
lelect 1:2ebc045424af 99 /** @fn void L3GD20::start(DIRECTION enable);
lelect 1:2ebc045424af 100 * Start command send to module
lelect 1:2ebc045424af 101 * @param enable
lelect 0:175bf093daa8 102 */
lelect 0:175bf093daa8 103 void start(DIRECTION enable);
lelect 1:2ebc045424af 104 /** @fn void L3GD20::start(DIRECTION enable,void (*func)(anglerrates*));
lelect 1:2ebc045424af 105 * Start with interrupt
lelect 1:2ebc045424af 106 * @param enable L3GD20 channel
lelect 1:2ebc045424af 107 * @param func user function(call by InterrtptIn)
lelect 1:2ebc045424af 108 */
lelect 0:175bf093daa8 109 void start(DIRECTION enable,void (*func)(anglerrates*));
lelect 1:2ebc045424af 110 /** @fn void L3GD20::stop()
lelect 1:2ebc045424af 111 * stop sampling command send
lelect 0:175bf093daa8 112 */
lelect 0:175bf093daa8 113 void stop();
lelect 1:2ebc045424af 114 /** @fn void L3GD20::sleep()
lelect 1:2ebc045424af 115 * sleep command send
lelect 1:2ebc045424af 116 */
lelect 0:175bf093daa8 117 void sleep();
lelect 1:2ebc045424af 118 /** @fn void L3GD20::read(anglerrates* val,DIRECTION direction)
lelect 1:2ebc045424af 119 * read angler rates with direction(L3GD20::XY)\n
lelect 1:2ebc045424af 120 * This is read and calcurate dps, reading value is set to class instanse
lelect 1:2ebc045424af 121 */
lelect 0:175bf093daa8 122 void read(anglerrates* val,DIRECTION direction);
lelect 1:2ebc045424af 123 /** @fn int L3GD20::readTemperature()
lelect 1:2ebc045424af 124 * read temperature without format
lelect 1:2ebc045424af 125 * (I don't know meaning of value.)
lelect 1:2ebc045424af 126 */
lelect 0:175bf093daa8 127 int readTemperature();
lelect 1:2ebc045424af 128 /** @fn void L3GD20::enableFIFO(FIFO_mode mode,FIFOstatus interrupt,const int threshold)
lelect 3:6e935e7cec72 129 * @brief L3GD20mode need to reset(to bypass mode) when filled FIFObuffor
lelect 1:2ebc045424af 130 * @param mode FIFOmode(L3GD20::BYPASSmode,FIFOmode,STREAMmode,STREAMtoFIFOmode,BYPASStoSTREAMmode)
lelect 1:2ebc045424af 131 * @param interrupt cause of interrupt(L3GD20::none,empty,watermark,overrun)
lelect 1:2ebc045424af 132 * @param threshold interruption threshold(1 to 30 vaild)
lelect 1:2ebc045424af 133 */
lelect 3:6e935e7cec72 134 void enableFIFO(FIFO_mode mode,FIFOstatus interrupt,const int threshold=0);
lelect 1:2ebc045424af 135 /** @fn int L3GD20::updateFIFO(void)
lelect 3:6e935e7cec72 136 * @brief Update FIFO status
lelect 1:2ebc045424af 137 * @return FIFO buffer level
lelect 1:2ebc045424af 138 */
lelect 0:175bf093daa8 139 int updateFIFO(void);
lelect 3:6e935e7cec72 140 void allReadOut();
lelect 1:2ebc045424af 141 anglerrates value;///< @brief latest angler rates
lelect 0:175bf093daa8 142 protected:
lelect 0:175bf093daa8 143 //write command to resister
lelect 0:175bf093daa8 144 void write(RESISTER reg,int val);
lelect 0:175bf093daa8 145 //read resister for resister
lelect 0:175bf093daa8 146 void read(RESISTER reg,int* val);
lelect 0:175bf093daa8 147 //just send reboot command
lelect 0:175bf093daa8 148 void reboot();
lelect 2:be6daa938101 149 //reset FIFO To restart data collection, resister must be written back to Bypass mode.
lelect 2:be6daa938101 150 void resetFIFO();
lelect 0:175bf093daa8 151 //read all configration rester
lelect 0:175bf093daa8 152 void configReadOut(void);
lelect 0:175bf093daa8 153 //read all status rester
lelect 0:175bf093daa8 154 void statusReadOut(void);
lelect 0:175bf093daa8 155 //for InterruptIn function ,call userFunction in this methed
lelect 0:175bf093daa8 156 void interrupt(void);
lelect 0:175bf093daa8 157 /*
lelect 0:175bf093daa8 158 void datarate(uint8_t rate,uint8_t bandwidth);
lelect 0:175bf093daa8 159 void setDataFormat();
lelect 0:175bf093daa8 160 void filter(uint8_t mode,uint8_t frequency);
lelect 0:175bf093daa8 161 void channelSource(uint8_t channnel,uint8_t dataSelection,uint8_t interruptSelection);
lelect 0:175bf093daa8 162 void FIFO(uint8_t mode,uint8_t watermark);
lelect 0:175bf093daa8 163 void interrupt(uint8_t source,uint8_t threthold,uint8_t duration,uint8_t Wait);
lelect 0:175bf093daa8 164 */
lelect 0:175bf093daa8 165 void (*userFunction)(anglerrates*);
lelect 0:175bf093daa8 166 SPI _spi;
lelect 0:175bf093daa8 167 DigitalOut _cs;
lelect 0:175bf093daa8 168 InterruptIn _int2;
lelect 0:175bf093daa8 169 };
lelect 0:175bf093daa8 170
lelect 0:175bf093daa8 171 #endif