Diff: Drivers/DE0_driver.cpp

Revision:

7:73fd05fe556a

Parent:

1:3e9684e81312

Child:

8:a0890fa79084

--- a/Drivers/DE0_driver.cpp	Sat Feb 10 19:35:21 2018 +0000
+++ b/Drivers/DE0_driver.cpp	Thu Feb 15 01:15:26 2018 +0000
@@ -15,13 +15,11 @@
 
 int SignExtend(int16_t x)
 {
-
     // if number is negative
     if(x&0x00008000) {
         // reserve the sign bit into the 32-bit number
         x = x|0xFFFF0000;
     }
-
     return x;
 }
 
@@ -43,6 +41,14 @@
     SpiReset=0;
     }
 
+
+/*******************************************************************************
+* @brief    This is the initialization function for the DE0 FPGA - communication
+            between the FPGA and MCU is done through SPI. The function 
+            initializes the SPI channel to a bit rate of 500kbps
+* @param    none
+* @return   none
+*******************************************************************************/
 void DE0_init(void)
 {
  DE0.format(16,1); // Define SPI format: 16-bit words, mode 1 protocol.
@@ -50,8 +56,7 @@
  ResetDE0();
 }
 
-/*
-
+/*******************************************************************************
 Before an SPI data transaction with the DE0 FPGA can occur, a control word must 
 first be written to the slave that specifies: 
 
@@ -62,24 +67,27 @@
 
 A control word need only be written once – if the same transactions are repeated.
 Subsequent transactions use the protocol specified by the last control word that
- was written. To change the transaction protocol a new control needs to be
- written. To write a new control word, the SpiReset input must first be set then
- cleared followed by a SPI write of a 16-bit word that is interpreted as the
- control word by the slave.
+was written. To change the transaction protocol a new control needs to be
+written. To write a new control word, the SpiReset input must first be set then
+cleared followed by a SPI write of a 16-bit word that is interpreted as the
+control word by the slave.
  
- The 16-bit control word format appears below.
+The 16-bit control word format appears below.
 
 1        7bits            8bits
 rd | address offset | number of words 
 
-
 When RD = 1, no write operation occurs within the slave. Data on the MOSI is 
 ignored by the slave. When RD = 0, a simultaneous read + write of the slave 
 occurs.
- 
- */
+*******************************************************************************/
 
 
+/*******************************************************************************
+* @brief    This function reads the output from the FPGA through the SPI channel
+* @param    none
+* @return   none
+*******************************************************************************/
 void DE0_read(uint16_t * id, int * dP, uint16_t * dT)
 {
     // To place SPI module into control mode, where the next word received by the
@@ -93,7 +101,4 @@
     *dP = SignExtend(DE0.write(DUMMY)); // A SPI read only transaction occurs.
     *dT = DE0.write(DUMMY); //
 }
-
- 
-
     
\ No newline at end of file