ECE 111 At Oregon State University
SLCD lib
Revision 0:5085b49e7c77, committed 2017-10-24
- Comitter:
- dogcatfee
- Date:
- Tue Oct 24 17:22:46 2017 -0700
- Commit message:
- Add files
Changed in this revision
diff -r 000000000000 -r 5085b49e7c77 FRDM-s401.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/FRDM-s401.h Tue Oct 24 17:22:46 2017 -0700 @@ -0,0 +1,97 @@ +#pragma once +/*^^^^^^^^^^^^^^^^ LCD HARDWARE CONECTION ^^^^^^^^^^^^^^^^^^^^^^^^*/ +#define _LCDFRONTPLANES (8) // # of frontPlanes +#define _LCDBACKPLANES (4) // # of backplanes + +/* + LCD logical organization definition + This section indicates how the LCD is distributed how many characteres of (7-seg, 14,seg, 16 seg, or colums in case of Dot Matrix) does it contain + First character is forced only one can be written + +*/ +// HARDWARE_CONFIG Changing LCD pins Allows to verify all LCD pins easily +// if HARDWARE_CONFIG == 0 FRDM-KL46 RevB +// if HARDWARE_CONFIG == 1 FRDM-KL46 RevA +#ifdef FRDM_REVA +#define HARDWARE_CONFIG 1 +#else +#define HARDWARE_CONFIG 0 +#endif + +#define _CHARNUM (4) //number of chars that can be written +#define _CHAR_SIZE (2) // Used only when Dot Matrix is used +#define _LCDTYPE (2) //indicate how many LCD_WF are required to write a single Character + +/* + Following definitions indicate how characters are associated to waveform +*/ +/* Hardware configuration */ +#if HARDWARE_CONFIG == 0 + +// LCD PIN1 to LCDWF0 Rev B +#define CHAR1a 37 // LCD Pin 5 +#define CHAR1b 17 // LCD Pin 6 +#define CHAR2a 7 // LCD Pin 7 +#define CHAR2b 8 // LCD Pin 8 +#define CHAR3a 53 // LCD Pin 9 +#define CHAR3b 38 // LCD Pin 10 +#define CHAR4a 10 // LCD Pin 11 +#define CHAR4b 11 // LCD Pin 12 +#define CHARCOM0 40 // LCD Pin 1 +#define CHARCOM1 52 // LCD Pin 2 +#define CHARCOM2 19 // LCD Pin 3 +#define CHARCOM3 18 // LCD Pin 4 + +// LCD PIN1 to LCDWF2 for FRDM-KL46Z +#elif HARDWARE_CONFIG == 1 +#define CHAR1a 37 // LCD Pin 5 +#define CHAR1b 17 // LCD Pin 6 +#define CHAR2a 7 // LCD Pin 7 +#define CHAR2b 8 // LCD Pin 8 +#define CHAR3a 12 // LCD Pin 9 +#define CHAR3b 26 // LCD Pin 10 +#define CHAR4a 10 // LCD Pin 11 +#define CHAR4b 11 // LCD Pin 12 +#define CHARCOM0 51 // LCD Pin 1 +#define CHARCOM1 52 // LCD Pin 2 +#define CHARCOM2 19 // LCD Pin 3 +#define CHARCOM3 16 // LCD Pin 4 + +#endif + + +/*Ascii Codification table information */ +#define ASCCI_TABLE_START '0' // indicates which is the first Ascii character in the table +#define ASCCI_TABLE_END 'Z' // indicates which is the first Ascii character in the table +#define BLANK_CHARACTER '>' // Indicate which ASCII character is a blank character (depends on ASCII table) + +#define _ALLON 0xFF // Used for ALL_on function + +#define SEGDP 0x01 +#define SEGC 0x02 +#define SEGB 0x04 +#define SEGA 0x08 + +#define SEGD 0x01 +#define SEGE 0x02 +#define SEGG 0x04 +#define SEGF 0x08 + + +/* Fault detect initial limits */ + +/* Fault detect initial parameters and limits */ +#define FAULTD_FP_FDPRS FDPRS_32 +#define FAULTD_FP_FDSWW FDSWW_128 +#define FAULTD_BP_FDPRS FDPRS_64 +#define FAULTD_BP_FDSWW FDSWW_128 + +#define FAULTD_FP_HI 127 +#define FAULTD_FP_LO 110 +#define FAULTD_BP_HI 127 +#define FAULTD_BP_LO 110 +#define FAULTD_TIME 6 + +extern const uint8_t WF_ORDERING_TABLE[]; // Logical Front plane N to LCD_WFx + +
diff -r 000000000000 -r 5085b49e7c77 LCDconfig.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/LCDconfig.h Tue Oct 24 17:22:46 2017 -0700 @@ -0,0 +1,183 @@ +#include "FRDM-s401.h" // 4x7 segdisplay + + +#if 1 // VREF to VLL1 +/* Following configuration is used for LCD default initialization */ +#define _LCDRVEN (1) // +#define _LCDRVTRIM (8) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf +#define _LCDCPSEL (1) // charge pump select 0 or 1 +#define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf +#define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf +#define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock + +#define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms +#define _LCDSUPPLY (1) +#define _LCDHREF (0) // 0 or 1 +#define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock +#define _LCDLCK (1) //Any number between 0 and 7 +#define _LCDBLINKRATE (3) //Any number between 0 and 7 + + +#else //VLL3 to VDD internally +/* Following configuration is used for LCD default initialization */ +#define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock +#define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock +#define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms +#define _LCDSUPPLY (0) +#define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf +#define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf +#define _LCDRVTRIM (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf +#define _LCDHREF (0) // 0 or 1 +#define _LCDCPSEL (1) // 0 or 1 +#define _LCDRVEN (0) // +#define _LCDBLINKRATE (3) // Any number between 0 and 7 +#define _LCDLCK (0) // Any number between 0 and 7 + +#endif + + + + +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 0 ~|~|~|~|~|~|~|~|~|~|~|~|~*/ +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/ +#define _LCDINTENABLE (1) + +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 1 ~|~|~|~|~|~|~|~|~|~|~|~|~|*/ +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/ +#define _LCDFRAMEINTERRUPT (0) //0 Disable Frame Frequency Interrupt +//1 Enable an LCD interrupt that coincides with the LCD frame frequency +#define _LCDFULLCPLDIRIVE (0) // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD +// 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3 +#define _LCDWAITMODE (0) // 0 Allows the LCD driver and charge pump to continue running during wait mode +// 1 Disable the LCD when the MCU goes into wait mode +#define _LCDSTOPMODE (0) // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3 +// 1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3 + +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Voltage Supply Register ~|~|~|~|~|~|~|~|~|~|~|~*/ +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/ +#define _LCDHIGHREF (0) //0 Divide input VIREG=1.0v +//1 Do not divide the input VIREG=1.67v +#define _LCDBBYPASS (0) //Determines whether the internal LCD op amp buffer is bypassed +//0 Buffered mode +//1 Unbuffered mode + +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/ +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/ +#define _LCDCONTRAST (1) //Contrast by software 0 -- Disable 1-- Enable +#define _LVLCONTRAST (0) //Any number between 0 and 15, if the number is bigger the glass gets darker + +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/ +/*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/ +#define _LCDBLINKCONTROL (1) //0 Disable blink mode +//1 Enable blink mode +#define _LCDALTMODE (0) //0 Normal display +//1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display +#define _LCDBLANKDISP (0) //0 Do not blank display +//1 Blank display if you put it in 0 the text before blank is manteined +#define _LCDBLINKMODE (0) //0 Display blank during the blink period +//1 Display alternate displat during blink period (Ignored if duty is 5 or greater) + + +//Calculated values +#define _LCDUSEDPINS (_LCDFRONTPLANES + _LCDBACKPLANES) +#define _LCDDUTY (_LCDBACKPLANES-1) //Any number between 0 and 7 +#define LCD_WF_BASE LCD->WF8B[0] + +// General definitions used by the LCD library +#define LCD_WF(x) *((uint8 *)&LCD_WF_BASE + x) + +/*LCD Fault Detections Consts*/ +#define FP_TYPE 0x00 // pin is a Front Plane +#define BP_TYPE 0x80 // pin is Back Plane + +// Fault Detect Preescaler Options +#define FDPRS_1 0 +#define FDPRS_2 1 +#define FDPRS_4 2 +#define FDPRS_8 3 +#define FDPRS_16 4 +#define FDPRS_32 5 +#define FDPRS_64 6 +#define FDPRS_128 7 + +// Fault Detect Sample Window Width Values +#define FDSWW_4 0 +#define FDSWW_8 1 +#define FDSWW_16 2 +#define FDSWW_32 3 +#define FDSWW_64 4 +#define FDSWW_128 5 +#define FDSWW_256 6 +#define FDSWW_512 7 + +/* + Mask Bit definitions used f +*/ +#define mBIT0 1 +#define mBIT1 2 +#define mBIT2 4 +#define mBIT3 8 +#define mBIT4 16 +#define mBIT5 32 +#define mBIT6 64 +#define mBIT7 128 +#define mBIT8 256 +#define mBIT9 512 +#define mBIT10 1024 +#define mBIT11 2048 +#define mBIT12 4096 +#define mBIT13 8192 +#define mBIT14 16384 +#define mBIT15 32768 +#define mBIT16 65536 +#define mBIT17 131072 +#define mBIT18 262144 +#define mBIT19 524288 +#define mBIT20 1048576 +#define mBIT21 2097152 +#define mBIT22 4194304 +#define mBIT23 8388608 +#define mBIT24 16777216 +#define mBIT25 33554432 +#define mBIT26 67108864 +#define mBIT27 134217728 +#define mBIT28 268435456 +#define mBIT29 536870912 +#define mBIT30 1073741824 +#define mBIT31 2147483648 + +#define mBIT32 1 +#define mBIT33 2 +#define mBIT34 4 +#define mBIT35 8 +#define mBIT36 16 +#define mBIT37 32 +#define mBIT38 64 +#define mBIT39 128 +#define mBIT40 256 +#define mBIT41 512 +#define mBIT42 1024 +#define mBIT43 2048 +#define mBIT44 4096 +#define mBIT45 8192 +#define mBIT46 16384 +#define mBIT47 32768 +#define mBIT48 65536 +#define mBIT49 131072 +#define mBIT50 262144 +#define mBIT51 524288 +#define mBIT52 1048576 +#define mBIT53 2097152 +#define mBIT54 4194304 +#define mBIT55 8388608 +#define mBIT56 16777216 +#define mBIT57 33554432 +#define mBIT58 67108864 +#define mBIT59 134217728 +#define mBIT60 268435456 +#define mBIT61 536870912 +#define mBIT62 1073741824 +#define mBIT63 2147483648 + + +
diff -r 000000000000 -r 5085b49e7c77 SLCD.cpp
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/SLCD.cpp Tue Oct 24 17:22:46 2017 -0700
@@ -0,0 +1,295 @@
+#include "SLCD.h"
+#include "LCDconfig.h"
+
+
+const uint8_t WF_ORDERING_TABLE[ ] = {
+ CHAR1a, // LCD81 --- Pin:5 LCDnAddress=51
+ CHAR1b, // LCD82 --- Pin:6 LCDnAddress=52
+ CHAR2a, // LCD83 --- Pin:7 LCDnAddress=53
+ CHAR2b, // LCD84 --- Pin:8 LCDnAddress=54
+ CHAR3a, // LCD85 --- Pin:9 LCDnAddress=55
+ CHAR3b, // LCD86 --- Pin:10 LCDnAddress=56
+ CHAR4a, // LCD87 --- Pin:11 LCDnAddress=57
+ CHAR4b, // LCD88 --- Pin:12 LCDnAddress=58
+ CHARCOM0, // LCD77 --- Pin:1 LCDnAddress=4D
+ CHARCOM1, // LCD78 --- Pin:2 LCDnAddress=4E
+ CHARCOM2, // LCD79 --- Pin:3 LCDnAddress=4F
+ CHARCOM3, // LCD80 --- Pin:4 LCDnAddress=50
+};
+
+const char ASCII_TO_WF_CODIFICATION_TABLE [ ] = {
+
+ /*
+ segA
+ ________
+ | |
+ segF | | segB
+ | |
+ -segG--
+ | |
+ segE | | segC
+ |________|
+ segD
+ */
+
+ ( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 0, offset=0
+ (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = 1, offset=4
+ ( SEGD+ SEGE+!SEGF+ SEGG) , (!SEGC+ SEGB+ SEGA) ,//Char = 2, offset=8
+ ( SEGD+!SEGE+!SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 3, offset=12
+ (!SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = 4, offset=16
+ ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = 5, offset=20
+ ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = 6, offset=24
+ (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 7, offset=28
+ ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 8, offset=32
+ ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 9, offset=36
+ (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = :, offset=40
+ (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = ;, offset=44
+ (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = <, offset=48
+ ( SEGD+!SEGE+!SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = =, offset=52
+ (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = >, offset=56
+ (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = ?, offset=60
+ ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = @, offset=64
+ (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = A, offset=68
+ ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = B, offset=72
+ ( SEGD+ SEGE+ SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = C, offset=76
+ ( SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = D, offset=80
+ ( SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = E, offset=84
+ (!SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = F, offset=88
+ ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = G, offset=92
+ (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = H, offset=96
+ (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = I, offset=100
+ ( SEGD+ SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = J, offset=104
+ (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = K, offset=108
+ ( SEGD+ SEGE+ SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = L, offset=112
+ (!SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = M, offset=116
+ (!SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = N, offset=120
+ ( SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = O, offset=124
+ (!SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+ SEGB+ SEGA) ,//Char = P, offset=128
+ ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = Q, offset=132
+ (!SEGD+ SEGE+!SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = R, offset=136
+ ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = S, offset=140
+ ( SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = T, offset=144
+ ( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = U, offset=148
+ ( SEGD+ SEGE+!SEGF+!SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = V, offset=152
+ ( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = W, offset=156
+ (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = X, offset=160
+ ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = Y, offset=164
+ ( SEGD+!SEGE+!SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = Z, offset=168
+ ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = [, offset=172
+ ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = \, offset=176
+ ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = ], offset=180
+ ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = ^, offset=184
+ ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = _, offset=188
+ ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = `, offset=192
+};
+
+SLCD::SLCD()
+{
+ init();
+ CharPosition = 0;
+}
+
+void SLCD::init()
+{
+ SIM->SCGC5 |= SIM_SCGC5_SLCD_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
+
+ // configure pins for LCD operation
+ PORTC->PCR[20] = 0x00000000; //VLL2
+ PORTC->PCR[21] = 0x00000000; //VLL1
+ PORTC->PCR[22] = 0x00000000; //VCAP2
+ PORTC->PCR[23] = 0x00000000; //VCAP1
+ // Enable IRCLK
+ MCG->C1 |= MCG_C1_IRCLKEN_MASK | MCG_C1_IREFSTEN_MASK;
+ MCG->C2 |= MCG_C2_IRCS_MASK ; //0 32KHZ internal reference clock; 1= 4MHz irc
+
+ //Check if the Fast reference has its divide by 2 enabled (default):
+ if ((MCG->SC & MCG_SC_FCRDIV_MASK) != 1<<1)
+ error("Invalid clock configuration for SLCD\n");
+ LCD->GCR = 0x0;
+ LCD->AR = 0x0;
+
+ // LCD configurartion
+ LCD->GCR = ( LCD_GCR_RVEN_MASK*_LCDRVEN
+ | LCD_GCR_RVTRIM(_LCDRVTRIM) //0-15
+ | LCD_GCR_CPSEL_MASK*_LCDCPSEL
+ | LCD_GCR_LADJ(_LCDLOADADJUST) //0-3
+ | LCD_GCR_VSUPPLY_MASK*_LCDSUPPLY //0-1
+ |!LCD_GCR_FDCIEN_MASK
+ | LCD_GCR_ALTDIV(1) //divide by something
+ |!LCD_GCR_LCDDOZE_MASK
+ |!LCD_GCR_LCDSTP_MASK
+ |!LCD_GCR_LCDEN_MASK //WILL BE ENABLE ON SUBSEQUENT STEP
+ | LCD_GCR_SOURCE_MASK*1
+ | LCD_GCR_ALTSOURCE_MASK*0
+ | LCD_GCR_LCLK(0) //0-7
+ | LCD_GCR_DUTY(_LCDDUTY) //0-7
+ );
+ uint8_t i;
+ uint32_t *p_pen;
+ uint8_t pen_offset; // 0 or 1
+ uint8_t pen_bit; // 0 to 31
+ LCD->PEN[0] = 0x0;
+ LCD->PEN[1] = 0x0;
+ LCD->BPEN[0] = 0x0;
+ LCD->BPEN[1] = 0x0;
+ p_pen = (uint32_t *)&LCD->PEN[0];
+ for (i=0; i<_LCDUSEDPINS; i++) {
+ pen_offset = WF_ORDERING_TABLE[i]/32;
+ pen_bit = WF_ORDERING_TABLE[i]%32;
+ p_pen[pen_offset] |= 1 << pen_bit;
+ if (i>= _LCDFRONTPLANES) { // Pin is a backplane
+ p_pen[pen_offset+2] |= 1 << pen_bit; // Enable BPEN
+ LCD->WF8B[(uint8_t)WF_ORDERING_TABLE[i]] = 1 << (i - _LCDFRONTPLANES); // fill with 0x01, 0x02, etc
+ }
+ }
+ LCD->GCR |= LCD_GCR_LCDEN_MASK;
+}
+
+int SLCD::_putc(int c)
+{
+ Write_Char(c);
+ return 0;
+}
+
+void SLCD::Write_Char (char lbValue)
+{
+ if (CharPosition >= _CHARNUM)
+ CharPosition = 0;
+
+ if (lbValue == '.') {
+ // Use built-in dot
+ DP(CharPosition-1, true);
+ return;
+ }
+
+ uint8_t char_val;
+ uint8_t temp;
+ uint8_t *lbpLCDWF;
+ uint8_t lbCounter;
+ uint16_t arrayOffset;
+ uint8_t position;
+
+ lbpLCDWF = (uint8_t *)&LCD->WF8B[0];
+ /* only ascii character if value not writeable write as @ */
+ if (lbValue>='a' && lbValue<='z') {
+ lbValue -= 32; // UpperCase
+ }
+ if (lbValue<ASCCI_TABLE_START || lbValue >ASCCI_TABLE_END) {
+ lbValue = BLANK_CHARACTER; // default value as space
+ }
+ lbValue -=ASCCI_TABLE_START; // Remove the offset to search in the ascci table
+ arrayOffset = (lbValue * _CHAR_SIZE); // Compensate matrix offset
+ // ensure bLCD position is in valid limit
+ lbCounter = 0; //number of writings to complete one char
+ while (lbCounter<_CHAR_SIZE) {
+ position = (CharPosition) *_LCDTYPE + lbCounter;
+ temp=0;
+ if (lbCounter==1) {
+ temp = lbpLCDWF[WF_ORDERING_TABLE[position]] & 0x01;//bit 0 has the special symbol information
+ }
+ char_val = ASCII_TO_WF_CODIFICATION_TABLE[arrayOffset + lbCounter];
+ lbpLCDWF[WF_ORDERING_TABLE[position]] = char_val | temp;
+ // if (char_val==0) lbCounter = _CHAR_SIZE; //end of this character
+ lbCounter++;
+ }
+ CharPosition++;
+}
+
+void SLCD::Home()
+{
+ CharPosition = 0;
+}
+
+void SLCD::Contrast (uint8_t lbContrast)
+{
+ lbContrast &= 0x0F; //Forced to the only values accepted
+ LCD->GCR |= LCD_GCR_RVTRIM(lbContrast);
+}
+
+void SLCD::clear()
+{
+ All_Segments(0);
+}
+
+void SLCD::All_Segments (int mode)
+{
+ uint8_t lbTotalBytes = _CHARNUM * _LCDTYPE;
+ uint8_t lbCounter=0;
+ uint8_t *lbpLCDWF;
+
+ lbpLCDWF = (uint8_t *)&LCD->WF8B[0];
+ while (lbCounter < lbTotalBytes) {
+ if (mode==1) {
+ lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[lbCounter++]]=_ALLON;
+ } else {
+ lbpLCDWF[WF_ORDERING_TABLE[lbCounter++]]=0;
+ }
+ }
+}
+
+void SLCD::DP(int pos, bool on)
+{
+ uint8_t *lbpLCDWF;
+ int tableLoc;
+ switch (pos) {
+ case 0:
+ tableLoc = 1;
+ break;
+ case 1:
+ tableLoc = 3;
+ break;
+ case 2:
+ tableLoc = 5;
+ break;
+ default:
+ return; // Bad position
+ }
+ lbpLCDWF = (uint8_t *)&LCD->WF8B[0];
+ if (on) {
+ lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[tableLoc]]|=1;
+ } else {
+ lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[tableLoc]]&=~1;
+ }
+}
+
+void SLCD::DP1 (int mode)
+{
+ DP(0, mode==1);
+}
+
+void SLCD::DP2 (int mode)
+{
+ DP(1, mode==1);
+}
+
+void SLCD::DP3 (int mode)
+{
+ DP(2, mode==1);
+}
+
+void SLCD::Colon (bool on)
+{
+ uint8_t *lbpLCDWF;
+ lbpLCDWF = (uint8_t *)&LCD->WF8B[0];
+ if (on) {
+ lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[7]]|=1;
+ } else {
+ lbpLCDWF[(uint8_t)WF_ORDERING_TABLE[7]]&=~1;
+ }
+}
+
+void SLCD::blink(int blink)
+{
+ if (( blink > 7) || (blink < 0))
+ LCD->AR &= ~LCD_AR_BLINK_MASK;
+ else
+ LCD->AR |= LCD_AR_BLINK_MASK | blink;
+}
+
+void SLCD::deepsleepEnable(bool enable)
+{
+ MCG->C1 &= ~MCG_C1_IREFSTEN_MASK;
+ MCG->C1 |= enable << MCG_C1_IREFSTEN_SHIFT;
+ LCD->GCR &= ~LCD_GCR_LCDSTP_MASK;
+ LCD->GCR |= (!enable) << LCD_GCR_LCDSTP_SHIFT;
+}
diff -r 000000000000 -r 5085b49e7c77 SLCD.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/SLCD.h Tue Oct 24 17:22:46 2017 -0700
@@ -0,0 +1,90 @@
+#pragma once
+#include "mbed.h"
+
+/* ------ sample usage------
+
+ #include "mbed.h"
+ #include "SLCD.h"
+
+ SLCD slcd;
+
+ main()
+ {
+ slcd.printf("1.2.3.4"); // standard printf function, only charaters in ASCII_TO_WF_CODIFICATION_TABLE will display
+ // Dots printed using decimal points
+ slcd.putc('A'); // prints a single character
+ slcd.clear(); // All segments off
+ slcd.All_Segments(y); // y=1 for ALL segments on, 0 for ALL segments off
+ slcd.DP(x, true/false); // Set/Clear decimal point. x=0, 1 or 2.
+ // Does nothing if invalid decimal point
+ slcd.DPx(y); // x=DP1 to DP3, y=1 for on 0 for off (legacy)
+ slcd.Colon(y); // y=1 for on, 0 for off
+ slcd.CharPosition=x; // x=0 to 3, 0 is start position
+ slcd.Home(); // sets next charater to posistion 0 (start)
+ slcd.Contrast (x); // set contrast x=0 - 15, 0 lightest, 15 darkest
+ slcd.blink(x); // set display to blink, 0-7 is blink rate (default = 3), -1 disables blink
+ slcd.deepsleepEnable(x);// true (default) keeps the lcd enabled in deepsleep, false disables its 4MHz internal oscillator clock. Total power consumption ~= 40uA
+ }
+*/
+
+/**
+* SLCD peripheral of the FRDM-KL46Z\n
+Inherits mbed::Stream and supports the majority of Stream functions.
+
+@code
+#include "mbed.h"
+#include "SLCD.h"
+
+SLCD slcd;
+
+main()
+{
+ slcd.Home(); // Moves cursor to position 0 (start)
+ slcd.printf("1.2.3.4"); // Standard printf function, only characters in ASCII_TO_WF_CODIFICATION_TABLE will display
+ // Dots printed using decimal points
+ slcd.putc('A'); // Prints a single character
+
+ while(1); // Wait forever
+}
+@endcode
+*/
+class SLCD : public Stream
+{
+public:
+ //! Construct an SLCD object
+ SLCD();
+
+ //! Move the SLCD cursor to the first character
+ void Home();
+ /**
+ * Set contrast
+ * @param lbContrast 0 - 15, 0 lightest, 15 darkest
+ */
+ void Contrast (uint8_t lbContrast);
+ void All_Segments (int);
+ //! Turn off all segments
+ void clear();
+ /**
+ * Turn a decimal point on or off
+ * @param pos decimal point position: 0-2
+ * @param on True or False
+ */
+ void DP(int pos, bool on);
+ void DP1 (int);
+ void DP2 (int);
+ void DP3 (int);
+ //! Turn the colon symbol on or off
+ void Colon (bool on);
+ //! Current cursor position
+ uint8_t CharPosition;
+ void blink(int blink = 3);
+ void deepsleepEnable(bool enable);
+
+private:
+ void Write_Char(char lbValue);
+ void init();
+ virtual int _putc(int c);
+ virtual int _getc() {
+ return 0;
+ }
+};