ECE 111 At Oregon State University / Mbed 2 deprecated Lab6_Basic

Simply creates a servo object from a motor object, to allow the control of the angle. uses the solar panel to look for the brightest spot, then stops.

Dependencies:   mbed

Fork of Lab6_Basic by ECE 111 At Oregon State University

LCDconfig.h@8:0d8f931d6f8c, 2017-11-14 (annotated)

Committer:
dogcatfee
Date:
Tue Nov 14 13:07:24 2017 -0800
Revision:
8:0d8f931d6f8c
Parent:
6:65dfd3886629 
Remove SLCD.lib, hg remove SLCD.lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dogcatfee 6:65dfd3886629 1 #include "FRDM-s401.h" // 4x7 segdisplay
dogcatfee 6:65dfd3886629 2
dogcatfee 6:65dfd3886629 3
dogcatfee 6:65dfd3886629 4 #if 1 // VREF to VLL1
dogcatfee 6:65dfd3886629 5 /* Following configuration is used for LCD default initialization */
dogcatfee 6:65dfd3886629 6 #define _LCDRVEN (1) //
dogcatfee 6:65dfd3886629 7 #define _LCDRVTRIM (8) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 6:65dfd3886629 8 #define _LCDCPSEL (1) // charge pump select 0 or 1
dogcatfee 6:65dfd3886629 9 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 6:65dfd3886629 10 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 6:65dfd3886629 11 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
dogcatfee 6:65dfd3886629 12
dogcatfee 6:65dfd3886629 13 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
dogcatfee 6:65dfd3886629 14 #define _LCDSUPPLY (1)
dogcatfee 6:65dfd3886629 15 #define _LCDHREF (0) // 0 or 1
dogcatfee 6:65dfd3886629 16 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
dogcatfee 6:65dfd3886629 17 #define _LCDLCK (1) //Any number between 0 and 7
dogcatfee 6:65dfd3886629 18 #define _LCDBLINKRATE (3) //Any number between 0 and 7
dogcatfee 6:65dfd3886629 19
dogcatfee 6:65dfd3886629 20
dogcatfee 6:65dfd3886629 21 #else //VLL3 to VDD internally
dogcatfee 6:65dfd3886629 22 /* Following configuration is used for LCD default initialization */
dogcatfee 6:65dfd3886629 23 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
dogcatfee 6:65dfd3886629 24 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
dogcatfee 6:65dfd3886629 25 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
dogcatfee 6:65dfd3886629 26 #define _LCDSUPPLY (0)
dogcatfee 6:65dfd3886629 27 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 6:65dfd3886629 28 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 6:65dfd3886629 29 #define _LCDRVTRIM (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 6:65dfd3886629 30 #define _LCDHREF (0) // 0 or 1
dogcatfee 6:65dfd3886629 31 #define _LCDCPSEL (1) // 0 or 1
dogcatfee 6:65dfd3886629 32 #define _LCDRVEN (0) //
dogcatfee 6:65dfd3886629 33 #define _LCDBLINKRATE (3) // Any number between 0 and 7
dogcatfee 6:65dfd3886629 34 #define _LCDLCK (0) // Any number between 0 and 7
dogcatfee 6:65dfd3886629 35
dogcatfee 6:65dfd3886629 36 #endif
dogcatfee 6:65dfd3886629 37
dogcatfee 6:65dfd3886629 38
dogcatfee 6:65dfd3886629 39
dogcatfee 6:65dfd3886629 40
dogcatfee 6:65dfd3886629 41 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 0 ~|~|~|~|~|~|~|~|~|~|~|~|~*/
dogcatfee 6:65dfd3886629 42 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 6:65dfd3886629 43 #define _LCDINTENABLE (1)
dogcatfee 6:65dfd3886629 44
dogcatfee 6:65dfd3886629 45 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 1 ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 6:65dfd3886629 46 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 6:65dfd3886629 47 #define _LCDFRAMEINTERRUPT (0) //0 Disable Frame Frequency Interrupt
dogcatfee 6:65dfd3886629 48 //1 Enable an LCD interrupt that coincides with the LCD frame frequency
dogcatfee 6:65dfd3886629 49 #define _LCDFULLCPLDIRIVE (0) // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
dogcatfee 6:65dfd3886629 50 // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
dogcatfee 6:65dfd3886629 51 #define _LCDWAITMODE (0) // 0 Allows the LCD driver and charge pump to continue running during wait mode
dogcatfee 6:65dfd3886629 52 // 1 Disable the LCD when the MCU goes into wait mode
dogcatfee 6:65dfd3886629 53 #define _LCDSTOPMODE (0) // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
dogcatfee 6:65dfd3886629 54 // 1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
dogcatfee 6:65dfd3886629 55
dogcatfee 6:65dfd3886629 56 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Voltage Supply Register ~|~|~|~|~|~|~|~|~|~|~|~*/
dogcatfee 6:65dfd3886629 57 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 6:65dfd3886629 58 #define _LCDHIGHREF (0) //0 Divide input VIREG=1.0v
dogcatfee 6:65dfd3886629 59 //1 Do not divide the input VIREG=1.67v
dogcatfee 6:65dfd3886629 60 #define _LCDBBYPASS (0) //Determines whether the internal LCD op amp buffer is bypassed
dogcatfee 6:65dfd3886629 61 //0 Buffered mode
dogcatfee 6:65dfd3886629 62 //1 Unbuffered mode
dogcatfee 6:65dfd3886629 63
dogcatfee 6:65dfd3886629 64 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
dogcatfee 6:65dfd3886629 65 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 6:65dfd3886629 66 #define _LCDCONTRAST (1) //Contrast by software 0 -- Disable 1-- Enable
dogcatfee 6:65dfd3886629 67 #define _LVLCONTRAST (0) //Any number between 0 and 15, if the number is bigger the glass gets darker
dogcatfee 6:65dfd3886629 68
dogcatfee 6:65dfd3886629 69 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
dogcatfee 6:65dfd3886629 70 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 6:65dfd3886629 71 #define _LCDBLINKCONTROL (1) //0 Disable blink mode
dogcatfee 6:65dfd3886629 72 //1 Enable blink mode
dogcatfee 6:65dfd3886629 73 #define _LCDALTMODE (0) //0 Normal display
dogcatfee 6:65dfd3886629 74 //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
dogcatfee 6:65dfd3886629 75 #define _LCDBLANKDISP (0) //0 Do not blank display
dogcatfee 6:65dfd3886629 76 //1 Blank display if you put it in 0 the text before blank is manteined
dogcatfee 6:65dfd3886629 77 #define _LCDBLINKMODE (0) //0 Display blank during the blink period
dogcatfee 6:65dfd3886629 78 //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
dogcatfee 6:65dfd3886629 79
dogcatfee 6:65dfd3886629 80
dogcatfee 6:65dfd3886629 81 //Calculated values
dogcatfee 6:65dfd3886629 82 #define _LCDUSEDPINS (_LCDFRONTPLANES + _LCDBACKPLANES)
dogcatfee 6:65dfd3886629 83 #define _LCDDUTY (_LCDBACKPLANES-1) //Any number between 0 and 7
dogcatfee 6:65dfd3886629 84 #define LCD_WF_BASE LCD->WF8B[0]
dogcatfee 6:65dfd3886629 85
dogcatfee 6:65dfd3886629 86 // General definitions used by the LCD library
dogcatfee 6:65dfd3886629 87 //#define LCD_WF(x) *((uint8 *)&LCD_WF_BASE + x)
dogcatfee 6:65dfd3886629 88
dogcatfee 6:65dfd3886629 89 /*LCD Fault Detections Consts*/
dogcatfee 6:65dfd3886629 90 #define FP_TYPE 0x00 // pin is a Front Plane
dogcatfee 6:65dfd3886629 91 #define BP_TYPE 0x80 // pin is Back Plane
dogcatfee 6:65dfd3886629 92
dogcatfee 6:65dfd3886629 93 // Fault Detect Preescaler Options
dogcatfee 6:65dfd3886629 94 #define FDPRS_1 0
dogcatfee 6:65dfd3886629 95 #define FDPRS_2 1
dogcatfee 6:65dfd3886629 96 #define FDPRS_4 2
dogcatfee 6:65dfd3886629 97 #define FDPRS_8 3
dogcatfee 6:65dfd3886629 98 #define FDPRS_16 4
dogcatfee 6:65dfd3886629 99 #define FDPRS_32 5
dogcatfee 6:65dfd3886629 100 #define FDPRS_64 6
dogcatfee 6:65dfd3886629 101 #define FDPRS_128 7
dogcatfee 6:65dfd3886629 102
dogcatfee 6:65dfd3886629 103 // Fault Detect Sample Window Width Values
dogcatfee 6:65dfd3886629 104 #define FDSWW_4 0
dogcatfee 6:65dfd3886629 105 #define FDSWW_8 1
dogcatfee 6:65dfd3886629 106 #define FDSWW_16 2
dogcatfee 6:65dfd3886629 107 #define FDSWW_32 3
dogcatfee 6:65dfd3886629 108 #define FDSWW_64 4
dogcatfee 6:65dfd3886629 109 #define FDSWW_128 5
dogcatfee 6:65dfd3886629 110 #define FDSWW_256 6
dogcatfee 6:65dfd3886629 111 #define FDSWW_512 7
dogcatfee 6:65dfd3886629 112
dogcatfee 6:65dfd3886629 113 /*
dogcatfee 6:65dfd3886629 114 Mask Bit definitions used f
dogcatfee 6:65dfd3886629 115 */
dogcatfee 6:65dfd3886629 116 #define mBIT0 1
dogcatfee 6:65dfd3886629 117 #define mBIT1 2
dogcatfee 6:65dfd3886629 118 #define mBIT2 4
dogcatfee 6:65dfd3886629 119 #define mBIT3 8
dogcatfee 6:65dfd3886629 120 #define mBIT4 16
dogcatfee 6:65dfd3886629 121 #define mBIT5 32
dogcatfee 6:65dfd3886629 122 #define mBIT6 64
dogcatfee 6:65dfd3886629 123 #define mBIT7 128
dogcatfee 6:65dfd3886629 124 #define mBIT8 256
dogcatfee 6:65dfd3886629 125 #define mBIT9 512
dogcatfee 6:65dfd3886629 126 #define mBIT10 1024
dogcatfee 6:65dfd3886629 127 #define mBIT11 2048
dogcatfee 6:65dfd3886629 128 #define mBIT12 4096
dogcatfee 6:65dfd3886629 129 #define mBIT13 8192
dogcatfee 6:65dfd3886629 130 #define mBIT14 16384
dogcatfee 6:65dfd3886629 131 #define mBIT15 32768
dogcatfee 6:65dfd3886629 132 #define mBIT16 65536
dogcatfee 6:65dfd3886629 133 #define mBIT17 131072
dogcatfee 6:65dfd3886629 134 #define mBIT18 262144
dogcatfee 6:65dfd3886629 135 #define mBIT19 524288
dogcatfee 6:65dfd3886629 136 #define mBIT20 1048576
dogcatfee 6:65dfd3886629 137 #define mBIT21 2097152
dogcatfee 6:65dfd3886629 138 #define mBIT22 4194304
dogcatfee 6:65dfd3886629 139 #define mBIT23 8388608
dogcatfee 6:65dfd3886629 140 #define mBIT24 16777216
dogcatfee 6:65dfd3886629 141 #define mBIT25 33554432
dogcatfee 6:65dfd3886629 142 #define mBIT26 67108864
dogcatfee 6:65dfd3886629 143 #define mBIT27 134217728
dogcatfee 6:65dfd3886629 144 #define mBIT28 268435456
dogcatfee 6:65dfd3886629 145 #define mBIT29 536870912
dogcatfee 6:65dfd3886629 146 #define mBIT30 1073741824
dogcatfee 6:65dfd3886629 147 #define mBIT31 2147483648
dogcatfee 6:65dfd3886629 148
dogcatfee 6:65dfd3886629 149 #define mBIT32 1
dogcatfee 6:65dfd3886629 150 #define mBIT33 2
dogcatfee 6:65dfd3886629 151 #define mBIT34 4
dogcatfee 6:65dfd3886629 152 #define mBIT35 8
dogcatfee 6:65dfd3886629 153 #define mBIT36 16
dogcatfee 6:65dfd3886629 154 #define mBIT37 32
dogcatfee 6:65dfd3886629 155 #define mBIT38 64
dogcatfee 6:65dfd3886629 156 #define mBIT39 128
dogcatfee 6:65dfd3886629 157 #define mBIT40 256
dogcatfee 6:65dfd3886629 158 #define mBIT41 512
dogcatfee 6:65dfd3886629 159 #define mBIT42 1024
dogcatfee 6:65dfd3886629 160 #define mBIT43 2048
dogcatfee 6:65dfd3886629 161 #define mBIT44 4096
dogcatfee 6:65dfd3886629 162 #define mBIT45 8192
dogcatfee 6:65dfd3886629 163 #define mBIT46 16384
dogcatfee 6:65dfd3886629 164 #define mBIT47 32768
dogcatfee 6:65dfd3886629 165 #define mBIT48 65536
dogcatfee 6:65dfd3886629 166 #define mBIT49 131072
dogcatfee 6:65dfd3886629 167 #define mBIT50 262144
dogcatfee 6:65dfd3886629 168 #define mBIT51 524288
dogcatfee 6:65dfd3886629 169 #define mBIT52 1048576
dogcatfee 6:65dfd3886629 170 #define mBIT53 2097152
dogcatfee 6:65dfd3886629 171 #define mBIT54 4194304
dogcatfee 6:65dfd3886629 172 #define mBIT55 8388608
dogcatfee 6:65dfd3886629 173 #define mBIT56 16777216
dogcatfee 6:65dfd3886629 174 #define mBIT57 33554432
dogcatfee 6:65dfd3886629 175 #define mBIT58 67108864
dogcatfee 6:65dfd3886629 176 #define mBIT59 134217728
dogcatfee 6:65dfd3886629 177 #define mBIT60 268435456
dogcatfee 6:65dfd3886629 178 #define mBIT61 536870912
dogcatfee 6:65dfd3886629 179 #define mBIT62 1073741824
dogcatfee 6:65dfd3886629 180 #define mBIT63 2147483648
dogcatfee 6:65dfd3886629 181
dogcatfee 6:65dfd3886629 182
dogcatfee 6:65dfd3886629 183