E3 Designers / ButtonCtrl

Release 1.01

SPI_MX25R.h@1:86f6ebbe4fd1, 2019-09-12 (annotated)

Committer:
foxbrianr
Date:
Thu Sep 12 11:27:59 2019 +0000
Revision:
1:86f6ebbe4fd1
Child:
2:1d5204d29bc5
beta1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
foxbrianr 1:86f6ebbe4fd1 1 #ifndef _SPI_MX25R_H_
foxbrianr 1:86f6ebbe4fd1 2 #define _SPI_MX25R_H_
foxbrianr 1:86f6ebbe4fd1 3
foxbrianr 1:86f6ebbe4fd1 4 #include "mbed.h"
foxbrianr 1:86f6ebbe4fd1 5
foxbrianr 1:86f6ebbe4fd1 6 /**
foxbrianr 1:86f6ebbe4fd1 7 * Macronix Serial Flash Low Power Memories
foxbrianr 1:86f6ebbe4fd1 8 * SPI_MX25R Series SPI-Flash Memory
foxbrianr 1:86f6ebbe4fd1 9 */
foxbrianr 1:86f6ebbe4fd1 10 #define CS_LOW 0 // SPI CS# (Chip Select) Setting
foxbrianr 1:86f6ebbe4fd1 11 #define CS_HIGH 1 // SPI CS# (Chip Select) Setting
foxbrianr 1:86f6ebbe4fd1 12 #define DUMMY 0x00 // Dummy byte which can be changed to any value
foxbrianr 1:86f6ebbe4fd1 13 /**
foxbrianr 1:86f6ebbe4fd1 14 * MX25R Series Register Command Table.
foxbrianr 1:86f6ebbe4fd1 15 * x2 and x4 commands not currently supported with FRDM K64F platform
foxbrianr 1:86f6ebbe4fd1 16 */
foxbrianr 1:86f6ebbe4fd1 17 #define CMD_READ 0x03 // x1 Normal Read Data Byte
foxbrianr 1:86f6ebbe4fd1 18 #define CMD_FREAD 0x0B // x1 Fast Read Data Byte
foxbrianr 1:86f6ebbe4fd1 19 #define CMD_2READ 0xBB // x2 2READ
foxbrianr 1:86f6ebbe4fd1 20 #define CMD_DREAD 0x3B // x2 DREAD
foxbrianr 1:86f6ebbe4fd1 21 #define CMD_4READ 0xEB // x4 4READ
foxbrianr 1:86f6ebbe4fd1 22 #define CMD_QREAD 0x6B // x4 QREAD
foxbrianr 1:86f6ebbe4fd1 23 #define CMD_PP 0x02 // Page Program
foxbrianr 1:86f6ebbe4fd1 24 #define CMD_4PP 0x38 // x4 PP
foxbrianr 1:86f6ebbe4fd1 25 #define CMD_SE 0x20 // 4KB Sector Erase
foxbrianr 1:86f6ebbe4fd1 26 #define CMD_32KBE 0x52 // 32KB Block Erase
foxbrianr 1:86f6ebbe4fd1 27 #define CMD_BE 0xD8 // 64KB Block Erase
foxbrianr 1:86f6ebbe4fd1 28 #define CMD_CE 0xC7 // Chip Erase
foxbrianr 1:86f6ebbe4fd1 29 #define CMD_RDSFDP 0x5A // Read SFDP
foxbrianr 1:86f6ebbe4fd1 30 #define CMD_WREN 0x06 // Write Enable
foxbrianr 1:86f6ebbe4fd1 31 #define CMD_WRDI 0x04 // Write Disable
foxbrianr 1:86f6ebbe4fd1 32 #define CMD_RDSR 0x05 // Read Status Register
foxbrianr 1:86f6ebbe4fd1 33 #define CMD_RDCR 0x15 // Read Configuration Register
foxbrianr 1:86f6ebbe4fd1 34 #define CMD_WRSR 0x01 // Write Status Register
foxbrianr 1:86f6ebbe4fd1 35 #define CMD_PESUS 0xB0 // Program/Erase Suspend
foxbrianr 1:86f6ebbe4fd1 36 #define CMD_PERES 0x30 // Program/Erase Resume
foxbrianr 1:86f6ebbe4fd1 37 #define CMD_DP 0xB9 // Enter Deep Power Down
foxbrianr 1:86f6ebbe4fd1 38 #define CMD_SBL 0xC0 // Set Burst Length
foxbrianr 1:86f6ebbe4fd1 39 #define CMD_RDID 0x9F // Read Manufacturer and JDEC Device ID
foxbrianr 1:86f6ebbe4fd1 40 #define CMD_REMS 0x90 // Read Electronic Manufacturer and Device ID
foxbrianr 1:86f6ebbe4fd1 41 #define CMD_RES 0xAB // Read Electronic ID
foxbrianr 1:86f6ebbe4fd1 42 #define CMD_ENSO 0xB1 // Enter Secure OTP
foxbrianr 1:86f6ebbe4fd1 43 #define CMD_EXSO 0xC1 // Exit Secure OTP
foxbrianr 1:86f6ebbe4fd1 44 #define CMD_RDSCUR 0x2B // Read Security Register
foxbrianr 1:86f6ebbe4fd1 45 #define CMD_WRSCUR 0x2F // Write Security Register
foxbrianr 1:86f6ebbe4fd1 46 #define CMD_NOP 0x00 // No Operation
foxbrianr 1:86f6ebbe4fd1 47 #define CMD_RSTEN 0x66 // Reset Enable
foxbrianr 1:86f6ebbe4fd1 48 #define CMD_RST 0x99 // Reset
foxbrianr 1:86f6ebbe4fd1 49 #define CMD_RRE 0xFF // Release Read Enhanced Mode
foxbrianr 1:86f6ebbe4fd1 50
foxbrianr 1:86f6ebbe4fd1 51
foxbrianr 1:86f6ebbe4fd1 52 class SPI_MX25R
foxbrianr 1:86f6ebbe4fd1 53 {
foxbrianr 1:86f6ebbe4fd1 54 public:
foxbrianr 1:86f6ebbe4fd1 55 /**
foxbrianr 1:86f6ebbe4fd1 56 * Macronix MX25R Low Power and Wide Vcc SPI-Flash Memory Family
foxbrianr 1:86f6ebbe4fd1 57 *
foxbrianr 1:86f6ebbe4fd1 58 * @param SI/SIO0 SPI_MOSI pin
foxbrianr 1:86f6ebbe4fd1 59 * @param SO/SI01 SPI_MISO pin
foxbrianr 1:86f6ebbe4fd1 60 * @param SCLK SPI_CLK pin
foxbrianr 1:86f6ebbe4fd1 61 * @param CSb SPI_CS pin
foxbrianr 1:86f6ebbe4fd1 62 */
foxbrianr 1:86f6ebbe4fd1 63 SPI_MX25R(PinName mosi, PinName miso, PinName sclk, PinName cs) ;
foxbrianr 1:86f6ebbe4fd1 64
foxbrianr 1:86f6ebbe4fd1 65 ~SPI_MX25R() ;
foxbrianr 1:86f6ebbe4fd1 66
foxbrianr 1:86f6ebbe4fd1 67 SPI m_spi;
foxbrianr 1:86f6ebbe4fd1 68 DigitalOut m_cs ;
foxbrianr 1:86f6ebbe4fd1 69 int _mode ;
foxbrianr 1:86f6ebbe4fd1 70
foxbrianr 1:86f6ebbe4fd1 71 /// Write Enable
foxbrianr 1:86f6ebbe4fd1 72 void writeEnable(void) ;
foxbrianr 1:86f6ebbe4fd1 73
foxbrianr 1:86f6ebbe4fd1 74 /// Write Disable
foxbrianr 1:86f6ebbe4fd1 75 void writeDisable(void) ;
foxbrianr 1:86f6ebbe4fd1 76
foxbrianr 1:86f6ebbe4fd1 77 /// Reset Enable
foxbrianr 1:86f6ebbe4fd1 78 void resetEnable(void) ;
foxbrianr 1:86f6ebbe4fd1 79
foxbrianr 1:86f6ebbe4fd1 80 /// Reset
foxbrianr 1:86f6ebbe4fd1 81 void reset(void) ;
foxbrianr 1:86f6ebbe4fd1 82
foxbrianr 1:86f6ebbe4fd1 83 /// Program or Erase Suspend
foxbrianr 1:86f6ebbe4fd1 84 void pgmersSuspend(void) ;
foxbrianr 1:86f6ebbe4fd1 85
foxbrianr 1:86f6ebbe4fd1 86 /// Program or Erase Resume
foxbrianr 1:86f6ebbe4fd1 87 void pgmersResume(void) ;
foxbrianr 1:86f6ebbe4fd1 88
foxbrianr 1:86f6ebbe4fd1 89 /// Enter Deep Power Down
foxbrianr 1:86f6ebbe4fd1 90 void deepPowerdown(void) ;
foxbrianr 1:86f6ebbe4fd1 91
foxbrianr 1:86f6ebbe4fd1 92 /// Set Burst Length
foxbrianr 1:86f6ebbe4fd1 93 void setBurstlength(void) ;
foxbrianr 1:86f6ebbe4fd1 94
foxbrianr 1:86f6ebbe4fd1 95 /// Release from Read Enhanced Mode
foxbrianr 1:86f6ebbe4fd1 96 void releaseReadenhaced(void) ;
foxbrianr 1:86f6ebbe4fd1 97
foxbrianr 1:86f6ebbe4fd1 98 /// No Operation
foxbrianr 1:86f6ebbe4fd1 99 void noOperation(void) ;
foxbrianr 1:86f6ebbe4fd1 100
foxbrianr 1:86f6ebbe4fd1 101 /// Enter OTP Area
foxbrianr 1:86f6ebbe4fd1 102 void enterSecureOTP(void) ;
foxbrianr 1:86f6ebbe4fd1 103
foxbrianr 1:86f6ebbe4fd1 104 /// Exit OTP Area
foxbrianr 1:86f6ebbe4fd1 105 void exitSecureOTP(void) ;
foxbrianr 1:86f6ebbe4fd1 106
foxbrianr 1:86f6ebbe4fd1 107 /// Chip Erase
foxbrianr 1:86f6ebbe4fd1 108 void chipErase(void) ;
foxbrianr 1:86f6ebbe4fd1 109
foxbrianr 1:86f6ebbe4fd1 110 /// Write Status and Configuration Reg 1 and 2
foxbrianr 1:86f6ebbe4fd1 111 void writeStatusreg(int addr) ;
foxbrianr 1:86f6ebbe4fd1 112
foxbrianr 1:86f6ebbe4fd1 113 /// Write Security Reg
foxbrianr 1:86f6ebbe4fd1 114 void writeSecurityreg(int addr) ;
foxbrianr 1:86f6ebbe4fd1 115
foxbrianr 1:86f6ebbe4fd1 116 /** Page Program
foxbrianr 1:86f6ebbe4fd1 117 *
foxbrianr 1:86f6ebbe4fd1 118 * @param int addr start address
foxbrianr 1:86f6ebbe4fd1 119 * @param uint8_t *data data buffer
foxbrianr 1:86f6ebbe4fd1 120 * @param int numData the number of data to be written
foxbrianr 1:86f6ebbe4fd1 121 */
foxbrianr 1:86f6ebbe4fd1 122 void programPage(int addr, uint8_t *data, int numData) ;
foxbrianr 1:86f6ebbe4fd1 123
foxbrianr 1:86f6ebbe4fd1 124 /** Sector Erase
foxbrianr 1:86f6ebbe4fd1 125 *
foxbrianr 1:86f6ebbe4fd1 126 * @param int addr specify the sector to be erased
foxbrianr 1:86f6ebbe4fd1 127 */
foxbrianr 1:86f6ebbe4fd1 128 void sectorErase(int addr) ;
foxbrianr 1:86f6ebbe4fd1 129
foxbrianr 1:86f6ebbe4fd1 130 /** Block Erase
foxbrianr 1:86f6ebbe4fd1 131 *
foxbrianr 1:86f6ebbe4fd1 132 * @param int addr specify the sector to be erased
foxbrianr 1:86f6ebbe4fd1 133 */
foxbrianr 1:86f6ebbe4fd1 134 void blockErase(int addr) ;
foxbrianr 1:86f6ebbe4fd1 135
foxbrianr 1:86f6ebbe4fd1 136 /** 32KB Block Erase
foxbrianr 1:86f6ebbe4fd1 137 *
foxbrianr 1:86f6ebbe4fd1 138 * @param int addr specify the sector to be erased
foxbrianr 1:86f6ebbe4fd1 139 */
foxbrianr 1:86f6ebbe4fd1 140 void blockErase32KB(int addr) ;
foxbrianr 1:86f6ebbe4fd1 141
foxbrianr 1:86f6ebbe4fd1 142 /** Read Status Register
foxbrianr 1:86f6ebbe4fd1 143 *
foxbrianr 1:86f6ebbe4fd1 144 * @returns uint8_t status register value
foxbrianr 1:86f6ebbe4fd1 145 */
foxbrianr 1:86f6ebbe4fd1 146 uint8_t readStatus(void) ;
foxbrianr 1:86f6ebbe4fd1 147
foxbrianr 1:86f6ebbe4fd1 148 /** Read Security Register
foxbrianr 1:86f6ebbe4fd1 149 *
foxbrianr 1:86f6ebbe4fd1 150 * @returns uint8_t security register value
foxbrianr 1:86f6ebbe4fd1 151 */
foxbrianr 1:86f6ebbe4fd1 152 uint8_t readSecurity(void) ;
foxbrianr 1:86f6ebbe4fd1 153
foxbrianr 1:86f6ebbe4fd1 154 /** Read Manufacturer and JEDEC Device ID
foxbrianr 1:86f6ebbe4fd1 155 *
foxbrianr 1:86f6ebbe4fd1 156 * @returns uint32_t Manufacturer ID, Mem Type, Device ID
foxbrianr 1:86f6ebbe4fd1 157 */
foxbrianr 1:86f6ebbe4fd1 158 uint32_t readID(void) ;
foxbrianr 1:86f6ebbe4fd1 159
foxbrianr 1:86f6ebbe4fd1 160 /** Read Electronic Manufacturer and Device ID
foxbrianr 1:86f6ebbe4fd1 161 *
foxbrianr 1:86f6ebbe4fd1 162 * @returns uint32_t Manufacturer ID, Device ID
foxbrianr 1:86f6ebbe4fd1 163 */
foxbrianr 1:86f6ebbe4fd1 164 uint32_t readREMS(void) ;
foxbrianr 1:86f6ebbe4fd1 165
foxbrianr 1:86f6ebbe4fd1 166 /** Read Electronic ID
foxbrianr 1:86f6ebbe4fd1 167 *
foxbrianr 1:86f6ebbe4fd1 168 * @returns uint8_t Device ID
foxbrianr 1:86f6ebbe4fd1 169 */
foxbrianr 1:86f6ebbe4fd1 170 uint8_t readRES(void) ;
foxbrianr 1:86f6ebbe4fd1 171
foxbrianr 1:86f6ebbe4fd1 172 /** Read Configuration Register
foxbrianr 1:86f6ebbe4fd1 173 *
foxbrianr 1:86f6ebbe4fd1 174 * @returns uint32_t configuration register value
foxbrianr 1:86f6ebbe4fd1 175 */
foxbrianr 1:86f6ebbe4fd1 176 uint32_t readConfig(void) ;
foxbrianr 1:86f6ebbe4fd1 177 uint8_t readSFDP(int addr) ;
foxbrianr 1:86f6ebbe4fd1 178 uint8_t readFREAD(int addr) ;
foxbrianr 1:86f6ebbe4fd1 179 uint8_t read8(int addr) ;
foxbrianr 1:86f6ebbe4fd1 180 void write8(int addr, uint8_t data) ;
foxbrianr 1:86f6ebbe4fd1 181 private:
foxbrianr 1:86f6ebbe4fd1 182
foxbrianr 1:86f6ebbe4fd1 183 } ;
foxbrianr 1:86f6ebbe4fd1 184 #endif // _SPI_MX25R_H_