Release 1.01

Committer:
foxbrianr
Date:
Tue Sep 17 13:48:28 2019 +0000
Revision:
2:1d5204d29bc5
Parent:
0:b6d729ae4f27
Beta 2

Who changed what in which revision?

UserRevisionLine numberNew contents of line
foxbrianr 2:1d5204d29bc5 1 /**************************************************************************//**
foxbrianr 2:1d5204d29bc5 2 * @file mcp23s08.cpp
foxbrianr 2:1d5204d29bc5 3 * @brief Base class for wrapping the interface with the GPIO Extender .
foxbrianr 2:1d5204d29bc5 4 * @version: V1.0
foxbrianr 2:1d5204d29bc5 5 * @date: 9/17/2019
foxbrianr 2:1d5204d29bc5 6
foxbrianr 2:1d5204d29bc5 7 *
foxbrianr 2:1d5204d29bc5 8 * @note
foxbrianr 2:1d5204d29bc5 9 * This is Third party software adapted to the ESCM project.
foxbrianr 2:1d5204d29bc5 10 * See copyright below.
foxbrianr 2:1d5204d29bc5 11 *
foxbrianr 2:1d5204d29bc5 12 * @par
foxbrianr 2:1d5204d29bc5 13 * E3 Designers LLC is supplying this software for use with Cortex-M3 LPC1768
foxbrianr 2:1d5204d29bc5 14 * processor based microcontroller for the ESCM 2000 Monitor and Display.
foxbrianr 2:1d5204d29bc5 15 * *
foxbrianr 2:1d5204d29bc5 16 * @par
foxbrianr 2:1d5204d29bc5 17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
foxbrianr 2:1d5204d29bc5 18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
foxbrianr 2:1d5204d29bc5 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
foxbrianr 2:1d5204d29bc5 20 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
foxbrianr 2:1d5204d29bc5 21 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
foxbrianr 2:1d5204d29bc5 22 *
foxbrianr 2:1d5204d29bc5 23 ******************************************************************************/
foxbrianr 2:1d5204d29bc5 24
foxbrianr 2:1d5204d29bc5 25 /*
foxbrianr 0:b6d729ae4f27 26 ___ _ _ _ __ ___ ___ | |_ ___ _ _
foxbrianr 0:b6d729ae4f27 27 / __|| | | || '_ ` _ \ / _ \ | __|/ _ \ | | | |
foxbrianr 0:b6d729ae4f27 28 \__ \| |_| || | | | | || (_) || |_| (_) || |_| |
foxbrianr 0:b6d729ae4f27 29 |___/ \__,_||_| |_| |_| \___/ \__|\___/ \__, |
foxbrianr 0:b6d729ae4f27 30 |___/
foxbrianr 0:b6d729ae4f27 31
foxbrianr 0:b6d729ae4f27 32 gpio_expander - An attemp to create a fast and universal library for drive many GPIO chips
foxbrianr 0:b6d729ae4f27 33
foxbrianr 0:b6d729ae4f27 34 model: company: pins: protocol: Special Features:
foxbrianr 0:b6d729ae4f27 35 ---------------------------------------------------------------------------------------------------------------------
foxbrianr 0:b6d729ae4f27 36 mcp23s08 Microchip 8 SPI INT/HAEN
foxbrianr 0:b6d729ae4f27 37 ---------------------------------------------------------------------------------------------------------------------
foxbrianr 0:b6d729ae4f27 38 Version history:
foxbrianr 0:b6d729ae4f27 39 0.5b1: first release, just coded and never tested
foxbrianr 0:b6d729ae4f27 40 0.5b2: fixed 2wire version, added portPullup, tested output mode (ok)
foxbrianr 0:b6d729ae4f27 41 0.5b3: added some drivers
foxbrianr 0:b6d729ae4f27 42 0.5b4: ability to include library inside other libraries.
foxbrianr 0:b6d729ae4f27 43 0.5b7: Changed functionalities of some function.
foxbrianr 0:b6d729ae4f27 44 0.6b1: Changed gpioRegisterRead to gpioRegisterReadByte. Added gpioRegisterReadWord (for some GPIO)
foxbrianr 0:b6d729ae4f27 45 0.6b3: Added basic support for SPI transactions, small optimizations.
foxbrianr 0:b6d729ae4f27 46 0.8b3: Added 2 more commands and 2 gpio chip.
foxbrianr 0:b6d729ae4f27 47 0.8b4: Support for SPI Transaction post setup
foxbrianr 0:b6d729ae4f27 48 ---------------------------------------------------------------------------------------------------------------------
foxbrianr 0:b6d729ae4f27 49 Copyright (c) 2013-2014, s.u.m.o.t.o.y [sumotoy(at)gmail.com]
foxbrianr 0:b6d729ae4f27 50 ---------------------------------------------------------------------------------------------------------------------
foxbrianr 0:b6d729ae4f27 51 gpio_expander Library is free software: you can redistribute it and/or modify
foxbrianr 0:b6d729ae4f27 52 it under the terms of the GNU General Public License as published by
foxbrianr 0:b6d729ae4f27 53 the Free Software Foundation, either version 3 of the License, or
foxbrianr 0:b6d729ae4f27 54 (at your option) any later version.
foxbrianr 0:b6d729ae4f27 55 gpio_expander Library is distributed in the hope that it will be useful,
foxbrianr 0:b6d729ae4f27 56 but WITHOUT ANY WARRANTY; without even the implied warranty of
foxbrianr 0:b6d729ae4f27 57 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
foxbrianr 0:b6d729ae4f27 58 GNU General Public License for more details.
foxbrianr 0:b6d729ae4f27 59 You should have received a copy of the GNU General Public License
foxbrianr 0:b6d729ae4f27 60 along with Foobar. If not, see <http://www.gnu.org/licenses/>.
foxbrianr 0:b6d729ae4f27 61
foxbrianr 0:b6d729ae4f27 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
foxbrianr 0:b6d729ae4f27 63 Version:0.8b3: Added 2 more commands and 2 gpio chip.
foxbrianr 0:b6d729ae4f27 64 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
foxbrianr 0:b6d729ae4f27 65 */
foxbrianr 0:b6d729ae4f27 66
foxbrianr 0:b6d729ae4f27 67 /* ------------------------------ MCP23S08 WIRING ------------------------------------
foxbrianr 0:b6d729ae4f27 68 This chip has a very useful feature called HAEN that allow you to share the same CS pin trough
foxbrianr 0:b6d729ae4f27 69 4 different addresses. Of course chip has to be Microchip and should be assigned to different addresses!
foxbrianr 0:b6d729ae4f27 70 Basic Address: 001000 A1 A0 (from 0x20 to 0x23)
foxbrianr 0:b6d729ae4f27 71 A1,A0 tied to ground = 0x20
foxbrianr 0:b6d729ae4f27 72 __ __
foxbrianr 0:b6d729ae4f27 73 -> sck [| U |] ++++
foxbrianr 0:b6d729ae4f27 74 -> mosi [| |] IO-7
foxbrianr 0:b6d729ae4f27 75 <- miso [| |] IO-6
foxbrianr 0:b6d729ae4f27 76 A1 [| |] IO-5
foxbrianr 0:b6d729ae4f27 77 A0 [| |] IO-4
foxbrianr 0:b6d729ae4f27 78 rst (con.+) [| |] IO-3
foxbrianr 0:b6d729ae4f27 79 cs [| |] IO-2
foxbrianr 0:b6d729ae4f27 80 int [| |] IO-1
foxbrianr 0:b6d729ae4f27 81 GND [|_____|] IO-0
foxbrianr 0:b6d729ae4f27 82 */
foxbrianr 0:b6d729ae4f27 83 #ifndef _MCP23S08_H_
foxbrianr 0:b6d729ae4f27 84 #define _MCP23S08_H_
foxbrianr 0:b6d729ae4f27 85
foxbrianr 0:b6d729ae4f27 86 #include <inttypes.h>
foxbrianr 0:b6d729ae4f27 87
foxbrianr 0:b6d729ae4f27 88 class mcp23s08 : public SPI
foxbrianr 0:b6d729ae4f27 89 {
foxbrianr 0:b6d729ae4f27 90
foxbrianr 0:b6d729ae4f27 91 public:
foxbrianr 0:b6d729ae4f27 92 mcp23s08(PinName mosi, PinName miso, PinName clk, PinName cs_pin,const uint8_t haenAdrs);
foxbrianr 0:b6d729ae4f27 93 void postSetup(const uint8_t haenAdrs);//used with other libraries only
foxbrianr 0:b6d729ae4f27 94 virtual void begin(bool protocolInitOverride=false); //protocolInitOverride=true will not init the SPI
foxbrianr 0:b6d729ae4f27 95
foxbrianr 0:b6d729ae4f27 96
foxbrianr 0:b6d729ae4f27 97 void gpioPinMode(uint8_t mode); //set all pins to INPUT or OUTPUT
foxbrianr 0:b6d729ae4f27 98 void gpioPinMode(uint8_t pin, bool mode); //set a unique pin as IN(1) or OUT (0)
foxbrianr 0:b6d729ae4f27 99 void gpioPort(uint8_t value); //write data to all pins
foxbrianr 0:b6d729ae4f27 100 //void gpioPort(uint8_t lowByte, uint8_t highByte); //same as abowe but uses 2 separate bytes (not applicable to this chip)
foxbrianr 0:b6d729ae4f27 101 uint8_t readGpioPort(); //read the state of the pins (all)
foxbrianr 0:b6d729ae4f27 102 uint8_t readGpioPortFast();
foxbrianr 0:b6d729ae4f27 103
foxbrianr 0:b6d729ae4f27 104 void gpioDigitalWrite(uint8_t pin, bool value); //write data to one pin
foxbrianr 0:b6d729ae4f27 105 void gpioDigitalWriteFast(uint8_t pin, bool value);
foxbrianr 0:b6d729ae4f27 106 int gpioDigitalRead(uint8_t pin); //read data from one pin
foxbrianr 0:b6d729ae4f27 107 uint8_t gpioRegisterReadByte(uint8_t reg); //read a uint8_t from chip register
foxbrianr 0:b6d729ae4f27 108 int gpioDigitalReadFast(uint8_t pin);
foxbrianr 0:b6d729ae4f27 109 void gpioRegisterWriteByte(uint8_t reg,uint8_t data); //write a chip register
foxbrianr 0:b6d729ae4f27 110 void portPullup(uint8_t data); // true=pullup, false=pulldown all pins
foxbrianr 0:b6d729ae4f27 111 void gpioPortUpdate();
foxbrianr 0:b6d729ae4f27 112 // direct access commands
foxbrianr 0:b6d729ae4f27 113 uint8_t readAddress(uint8_t addr);
foxbrianr 0:b6d729ae4f27 114
foxbrianr 0:b6d729ae4f27 115 void setSPIspeed(uint32_t spispeed);//for SPI transactions
foxbrianr 0:b6d729ae4f27 116
foxbrianr 0:b6d729ae4f27 117 //------------------------- REGISTERS
foxbrianr 0:b6d729ae4f27 118 uint8_t IOCON;
foxbrianr 0:b6d729ae4f27 119 uint8_t IODIR;
foxbrianr 0:b6d729ae4f27 120 uint8_t GPPU;
foxbrianr 0:b6d729ae4f27 121 uint8_t GPIO;
foxbrianr 0:b6d729ae4f27 122 uint8_t GPINTEN;
foxbrianr 0:b6d729ae4f27 123 uint8_t IPOL;
foxbrianr 0:b6d729ae4f27 124 uint8_t DEFVAL;
foxbrianr 0:b6d729ae4f27 125 uint8_t INTF;
foxbrianr 0:b6d729ae4f27 126 uint8_t INTCAP;
foxbrianr 0:b6d729ae4f27 127 uint8_t OLAT;
foxbrianr 0:b6d729ae4f27 128 uint8_t INTCON;
foxbrianr 0:b6d729ae4f27 129
foxbrianr 0:b6d729ae4f27 130 private:
foxbrianr 0:b6d729ae4f27 131 DigitalOut cs;
foxbrianr 0:b6d729ae4f27 132
foxbrianr 0:b6d729ae4f27 133 uint8_t _cs;
foxbrianr 0:b6d729ae4f27 134 uint8_t _adrs;
foxbrianr 0:b6d729ae4f27 135
foxbrianr 0:b6d729ae4f27 136 uint32_t _spiTransactionsSpeed;//for SPI transactions
foxbrianr 0:b6d729ae4f27 137
foxbrianr 0:b6d729ae4f27 138 uint8_t _useHaen;
foxbrianr 0:b6d729ae4f27 139 uint8_t _readCmd;
foxbrianr 0:b6d729ae4f27 140 uint8_t _writeCmd;
foxbrianr 0:b6d729ae4f27 141 void startSend(bool mode);
foxbrianr 0:b6d729ae4f27 142 void endSend();
foxbrianr 0:b6d729ae4f27 143 uint8_t _gpioDirection;
foxbrianr 0:b6d729ae4f27 144 uint8_t _gpioState;
foxbrianr 0:b6d729ae4f27 145 void writeByte(uint8_t addr, uint8_t data);
foxbrianr 0:b6d729ae4f27 146 };
foxbrianr 0:b6d729ae4f27 147 #endif