Mouse code for the MacroRat

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Show/hide line numbers mbed_application.c Source File

mbed_application.c

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2017-2017 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 
00017 #include <stdlib.h>
00018 #include <stdarg.h>
00019 #include "device.h"
00020 #include "platform/mbed_application.h"
00021 
00022 #if MBED_APPLICATION_SUPPORT
00023 
00024 static void powerdown_nvic(void);
00025 static void powerdown_scb(uint32_t vtor);
00026 static void start_new_application(void *sp, void *pc);
00027 
00028 void mbed_start_application(uintptr_t address)
00029 {
00030     void *sp;
00031     void *pc;
00032 
00033     // Interrupts are re-enabled in start_new_application
00034     __disable_irq();
00035 
00036     SysTick->CTRL = 0x00000000;
00037     powerdown_nvic();
00038     powerdown_scb(address);
00039 
00040     sp = *((void**)address + 0);
00041     pc = *((void**)address + 1);
00042     start_new_application(sp, pc);
00043 }
00044 
00045 static void powerdown_nvic()
00046 {
00047     int isr_count;
00048     int i;
00049     int j;
00050 
00051     isr_count = (SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos;
00052     for (i = 0; i < isr_count; i++) {
00053         NVIC->ICER[i] = 0xFFFFFFFF;
00054         NVIC->ICPR[i] = 0xFFFFFFFF;
00055         for (j = 0; j < 8; j++) {
00056             NVIC->IP[i * 8 + j] = 0x00000000;
00057         }
00058     }
00059 }
00060 
00061 static void powerdown_scb(uint32_t vtor)
00062 {
00063     int i;
00064 
00065     // SCB->CPUID   - Read only CPU ID register
00066     SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
00067     SCB->VTOR = vtor;
00068     SCB->AIRCR = 0x05FA | 0x0000;
00069     SCB->SCR = 0x00000000;
00070     // SCB->CCR     - Implementation defined value
00071     for (i = 0; i < 12; i++) {
00072 #if defined(__CORTEX_M7)
00073         SCB->SHPR[i] = 0x00;
00074 #else
00075         SCB->SHP[i] = 0x00;
00076 #endif
00077     }
00078     SCB->SHCSR = 0x00000000;
00079     SCB->CFSR = 0xFFFFFFFF;
00080     SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
00081     SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
00082                 SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
00083     // SCB->MMFAR   - Implementation defined value
00084     // SCB->BFAR    - Implementation defined value
00085     // SCB->AFSR    - Implementation defined value
00086     // SCB->PFR     - Read only processor feature register
00087     // SCB->DFR     - Read only debug feature registers
00088     // SCB->ADR     - Read only auxiliary feature registers
00089     // SCB->MMFR    - Read only memory model feature registers
00090     // SCB->ISAR    - Read only instruction set attribute registers
00091     // SCB->CPACR   - Implementation defined value
00092 }
00093 
00094 #if defined (__CC_ARM)
00095 
00096 __asm static void start_new_application(void *sp, void *pc)
00097 {
00098     MOV R2, #0
00099     MSR CONTROL, R2         // Switch to main stack
00100     MOV SP, R0
00101     MSR PRIMASK, R2         // Enable interrupts
00102     BX R1
00103 }
00104 
00105 #elif defined (__GNUC__) || defined (__ICCARM__)
00106 
00107 void start_new_application(void *sp, void *pc)
00108 {
00109     __asm volatile (
00110         "mov    r2, #0      \n"
00111         "msr    control, r2 \n" // Switch to main stack
00112         "mov    sp, %0      \n"
00113         "msr    primask, r2 \n" // Enable interrupts
00114         "bx     %1          \n"
00115         :
00116         : "l" (sp), "l" (pc)
00117         : "r2", "cc", "memory"
00118     );
00119 }
00120 
00121 #else
00122 
00123 #error "Unsupported toolchain"
00124 
00125 #endif
00126 
00127 #endif /* MBED_APPLICATION_SUPPORT */