MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/efr32mg1p_leuart.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file efr32mg1p_leuart.h
sahilmgandhi 18:6a4db94011d3 3 * @brief EFR32MG1P_LEUART register and bit field definitions
sahilmgandhi 18:6a4db94011d3 4 * @version 5.1.2
sahilmgandhi 18:6a4db94011d3 5 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 6 * @section License
sahilmgandhi 18:6a4db94011d3 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Permission is granted to anyone to use this software for any purpose,
sahilmgandhi 18:6a4db94011d3 11 * including commercial applications, and to alter it and redistribute it
sahilmgandhi 18:6a4db94011d3 12 * freely, subject to the following restrictions:
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * 1. The origin of this software must not be misrepresented; you must not
sahilmgandhi 18:6a4db94011d3 15 * claim that you wrote the original software.@n
sahilmgandhi 18:6a4db94011d3 16 * 2. Altered source versions must be plainly marked as such, and must not be
sahilmgandhi 18:6a4db94011d3 17 * misrepresented as being the original software.@n
sahilmgandhi 18:6a4db94011d3 18 * 3. This notice may not be removed or altered from any source distribution.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
sahilmgandhi 18:6a4db94011d3 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
sahilmgandhi 18:6a4db94011d3 22 * providing the Software "AS IS", with no express or implied warranties of any
sahilmgandhi 18:6a4db94011d3 23 * kind, including, but not limited to, any implied warranties of
sahilmgandhi 18:6a4db94011d3 24 * merchantability or fitness for any particular purpose or warranties against
sahilmgandhi 18:6a4db94011d3 25 * infringement of any proprietary rights of a third party.
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
sahilmgandhi 18:6a4db94011d3 28 * incidental, or special damages, or any other relief, or for any claim by
sahilmgandhi 18:6a4db94011d3 29 * any third party, arising from your use of this Software.
sahilmgandhi 18:6a4db94011d3 30 *
sahilmgandhi 18:6a4db94011d3 31 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 32 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 33 * @addtogroup Parts
sahilmgandhi 18:6a4db94011d3 34 * @{
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 36 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 37 * @defgroup EFR32MG1P_LEUART
sahilmgandhi 18:6a4db94011d3 38 * @{
sahilmgandhi 18:6a4db94011d3 39 * @brief EFR32MG1P_LEUART Register Declaration
sahilmgandhi 18:6a4db94011d3 40 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 41 typedef struct
sahilmgandhi 18:6a4db94011d3 42 {
sahilmgandhi 18:6a4db94011d3 43 __IOM uint32_t CTRL; /**< Control Register */
sahilmgandhi 18:6a4db94011d3 44 __IOM uint32_t CMD; /**< Command Register */
sahilmgandhi 18:6a4db94011d3 45 __IM uint32_t STATUS; /**< Status Register */
sahilmgandhi 18:6a4db94011d3 46 __IOM uint32_t CLKDIV; /**< Clock Control Register */
sahilmgandhi 18:6a4db94011d3 47 __IOM uint32_t STARTFRAME; /**< Start Frame Register */
sahilmgandhi 18:6a4db94011d3 48 __IOM uint32_t SIGFRAME; /**< Signal Frame Register */
sahilmgandhi 18:6a4db94011d3 49 __IM uint32_t RXDATAX; /**< Receive Buffer Data Extended Register */
sahilmgandhi 18:6a4db94011d3 50 __IM uint32_t RXDATA; /**< Receive Buffer Data Register */
sahilmgandhi 18:6a4db94011d3 51 __IM uint32_t RXDATAXP; /**< Receive Buffer Data Extended Peek Register */
sahilmgandhi 18:6a4db94011d3 52 __IOM uint32_t TXDATAX; /**< Transmit Buffer Data Extended Register */
sahilmgandhi 18:6a4db94011d3 53 __IOM uint32_t TXDATA; /**< Transmit Buffer Data Register */
sahilmgandhi 18:6a4db94011d3 54 __IM uint32_t IF; /**< Interrupt Flag Register */
sahilmgandhi 18:6a4db94011d3 55 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
sahilmgandhi 18:6a4db94011d3 56 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
sahilmgandhi 18:6a4db94011d3 57 __IOM uint32_t IEN; /**< Interrupt Enable Register */
sahilmgandhi 18:6a4db94011d3 58 __IOM uint32_t PULSECTRL; /**< Pulse Control Register */
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 __IOM uint32_t FREEZE; /**< Freeze Register */
sahilmgandhi 18:6a4db94011d3 61 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 uint32_t RESERVED0[3]; /**< Reserved for future use **/
sahilmgandhi 18:6a4db94011d3 64 __IOM uint32_t ROUTEPEN; /**< I/O Routing Pin Enable Register */
sahilmgandhi 18:6a4db94011d3 65 __IOM uint32_t ROUTELOC0; /**< I/O Routing Location Register */
sahilmgandhi 18:6a4db94011d3 66 uint32_t RESERVED1[2]; /**< Reserved for future use **/
sahilmgandhi 18:6a4db94011d3 67 __IOM uint32_t INPUT; /**< LEUART Input Register */
sahilmgandhi 18:6a4db94011d3 68 } LEUART_TypeDef; /** @} */
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 71 * @defgroup EFR32MG1P_LEUART_BitFields
sahilmgandhi 18:6a4db94011d3 72 * @{
sahilmgandhi 18:6a4db94011d3 73 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /* Bit fields for LEUART CTRL */
sahilmgandhi 18:6a4db94011d3 76 #define _LEUART_CTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 77 #define _LEUART_CTRL_MASK 0x0000FFFFUL /**< Mask for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 78 #define LEUART_CTRL_AUTOTRI (0x1UL << 0) /**< Automatic Transmitter Tristate */
sahilmgandhi 18:6a4db94011d3 79 #define _LEUART_CTRL_AUTOTRI_SHIFT 0 /**< Shift value for LEUART_AUTOTRI */
sahilmgandhi 18:6a4db94011d3 80 #define _LEUART_CTRL_AUTOTRI_MASK 0x1UL /**< Bit mask for LEUART_AUTOTRI */
sahilmgandhi 18:6a4db94011d3 81 #define _LEUART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 82 #define LEUART_CTRL_AUTOTRI_DEFAULT (_LEUART_CTRL_AUTOTRI_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 83 #define LEUART_CTRL_DATABITS (0x1UL << 1) /**< Data-Bit Mode */
sahilmgandhi 18:6a4db94011d3 84 #define _LEUART_CTRL_DATABITS_SHIFT 1 /**< Shift value for LEUART_DATABITS */
sahilmgandhi 18:6a4db94011d3 85 #define _LEUART_CTRL_DATABITS_MASK 0x2UL /**< Bit mask for LEUART_DATABITS */
sahilmgandhi 18:6a4db94011d3 86 #define _LEUART_CTRL_DATABITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 87 #define _LEUART_CTRL_DATABITS_EIGHT 0x00000000UL /**< Mode EIGHT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 88 #define _LEUART_CTRL_DATABITS_NINE 0x00000001UL /**< Mode NINE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 89 #define LEUART_CTRL_DATABITS_DEFAULT (_LEUART_CTRL_DATABITS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 90 #define LEUART_CTRL_DATABITS_EIGHT (_LEUART_CTRL_DATABITS_EIGHT << 1) /**< Shifted mode EIGHT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 91 #define LEUART_CTRL_DATABITS_NINE (_LEUART_CTRL_DATABITS_NINE << 1) /**< Shifted mode NINE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 92 #define _LEUART_CTRL_PARITY_SHIFT 2 /**< Shift value for LEUART_PARITY */
sahilmgandhi 18:6a4db94011d3 93 #define _LEUART_CTRL_PARITY_MASK 0xCUL /**< Bit mask for LEUART_PARITY */
sahilmgandhi 18:6a4db94011d3 94 #define _LEUART_CTRL_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 95 #define _LEUART_CTRL_PARITY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 96 #define _LEUART_CTRL_PARITY_EVEN 0x00000002UL /**< Mode EVEN for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 97 #define _LEUART_CTRL_PARITY_ODD 0x00000003UL /**< Mode ODD for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 98 #define LEUART_CTRL_PARITY_DEFAULT (_LEUART_CTRL_PARITY_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 99 #define LEUART_CTRL_PARITY_NONE (_LEUART_CTRL_PARITY_NONE << 2) /**< Shifted mode NONE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 100 #define LEUART_CTRL_PARITY_EVEN (_LEUART_CTRL_PARITY_EVEN << 2) /**< Shifted mode EVEN for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 101 #define LEUART_CTRL_PARITY_ODD (_LEUART_CTRL_PARITY_ODD << 2) /**< Shifted mode ODD for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 102 #define LEUART_CTRL_STOPBITS (0x1UL << 4) /**< Stop-Bit Mode */
sahilmgandhi 18:6a4db94011d3 103 #define _LEUART_CTRL_STOPBITS_SHIFT 4 /**< Shift value for LEUART_STOPBITS */
sahilmgandhi 18:6a4db94011d3 104 #define _LEUART_CTRL_STOPBITS_MASK 0x10UL /**< Bit mask for LEUART_STOPBITS */
sahilmgandhi 18:6a4db94011d3 105 #define _LEUART_CTRL_STOPBITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 106 #define _LEUART_CTRL_STOPBITS_ONE 0x00000000UL /**< Mode ONE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 107 #define _LEUART_CTRL_STOPBITS_TWO 0x00000001UL /**< Mode TWO for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 108 #define LEUART_CTRL_STOPBITS_DEFAULT (_LEUART_CTRL_STOPBITS_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 109 #define LEUART_CTRL_STOPBITS_ONE (_LEUART_CTRL_STOPBITS_ONE << 4) /**< Shifted mode ONE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 110 #define LEUART_CTRL_STOPBITS_TWO (_LEUART_CTRL_STOPBITS_TWO << 4) /**< Shifted mode TWO for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 111 #define LEUART_CTRL_INV (0x1UL << 5) /**< Invert Input And Output */
sahilmgandhi 18:6a4db94011d3 112 #define _LEUART_CTRL_INV_SHIFT 5 /**< Shift value for LEUART_INV */
sahilmgandhi 18:6a4db94011d3 113 #define _LEUART_CTRL_INV_MASK 0x20UL /**< Bit mask for LEUART_INV */
sahilmgandhi 18:6a4db94011d3 114 #define _LEUART_CTRL_INV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 115 #define LEUART_CTRL_INV_DEFAULT (_LEUART_CTRL_INV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 116 #define LEUART_CTRL_ERRSDMA (0x1UL << 6) /**< Clear RX DMA On Error */
sahilmgandhi 18:6a4db94011d3 117 #define _LEUART_CTRL_ERRSDMA_SHIFT 6 /**< Shift value for LEUART_ERRSDMA */
sahilmgandhi 18:6a4db94011d3 118 #define _LEUART_CTRL_ERRSDMA_MASK 0x40UL /**< Bit mask for LEUART_ERRSDMA */
sahilmgandhi 18:6a4db94011d3 119 #define _LEUART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 120 #define LEUART_CTRL_ERRSDMA_DEFAULT (_LEUART_CTRL_ERRSDMA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 121 #define LEUART_CTRL_LOOPBK (0x1UL << 7) /**< Loopback Enable */
sahilmgandhi 18:6a4db94011d3 122 #define _LEUART_CTRL_LOOPBK_SHIFT 7 /**< Shift value for LEUART_LOOPBK */
sahilmgandhi 18:6a4db94011d3 123 #define _LEUART_CTRL_LOOPBK_MASK 0x80UL /**< Bit mask for LEUART_LOOPBK */
sahilmgandhi 18:6a4db94011d3 124 #define _LEUART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 125 #define LEUART_CTRL_LOOPBK_DEFAULT (_LEUART_CTRL_LOOPBK_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 126 #define LEUART_CTRL_SFUBRX (0x1UL << 8) /**< Start-Frame UnBlock RX */
sahilmgandhi 18:6a4db94011d3 127 #define _LEUART_CTRL_SFUBRX_SHIFT 8 /**< Shift value for LEUART_SFUBRX */
sahilmgandhi 18:6a4db94011d3 128 #define _LEUART_CTRL_SFUBRX_MASK 0x100UL /**< Bit mask for LEUART_SFUBRX */
sahilmgandhi 18:6a4db94011d3 129 #define _LEUART_CTRL_SFUBRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 130 #define LEUART_CTRL_SFUBRX_DEFAULT (_LEUART_CTRL_SFUBRX_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 131 #define LEUART_CTRL_MPM (0x1UL << 9) /**< Multi-Processor Mode */
sahilmgandhi 18:6a4db94011d3 132 #define _LEUART_CTRL_MPM_SHIFT 9 /**< Shift value for LEUART_MPM */
sahilmgandhi 18:6a4db94011d3 133 #define _LEUART_CTRL_MPM_MASK 0x200UL /**< Bit mask for LEUART_MPM */
sahilmgandhi 18:6a4db94011d3 134 #define _LEUART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 135 #define LEUART_CTRL_MPM_DEFAULT (_LEUART_CTRL_MPM_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 136 #define LEUART_CTRL_MPAB (0x1UL << 10) /**< Multi-Processor Address-Bit */
sahilmgandhi 18:6a4db94011d3 137 #define _LEUART_CTRL_MPAB_SHIFT 10 /**< Shift value for LEUART_MPAB */
sahilmgandhi 18:6a4db94011d3 138 #define _LEUART_CTRL_MPAB_MASK 0x400UL /**< Bit mask for LEUART_MPAB */
sahilmgandhi 18:6a4db94011d3 139 #define _LEUART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 140 #define LEUART_CTRL_MPAB_DEFAULT (_LEUART_CTRL_MPAB_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 141 #define LEUART_CTRL_BIT8DV (0x1UL << 11) /**< Bit 8 Default Value */
sahilmgandhi 18:6a4db94011d3 142 #define _LEUART_CTRL_BIT8DV_SHIFT 11 /**< Shift value for LEUART_BIT8DV */
sahilmgandhi 18:6a4db94011d3 143 #define _LEUART_CTRL_BIT8DV_MASK 0x800UL /**< Bit mask for LEUART_BIT8DV */
sahilmgandhi 18:6a4db94011d3 144 #define _LEUART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 145 #define LEUART_CTRL_BIT8DV_DEFAULT (_LEUART_CTRL_BIT8DV_DEFAULT << 11) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 146 #define LEUART_CTRL_RXDMAWU (0x1UL << 12) /**< RX DMA Wakeup */
sahilmgandhi 18:6a4db94011d3 147 #define _LEUART_CTRL_RXDMAWU_SHIFT 12 /**< Shift value for LEUART_RXDMAWU */
sahilmgandhi 18:6a4db94011d3 148 #define _LEUART_CTRL_RXDMAWU_MASK 0x1000UL /**< Bit mask for LEUART_RXDMAWU */
sahilmgandhi 18:6a4db94011d3 149 #define _LEUART_CTRL_RXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 150 #define LEUART_CTRL_RXDMAWU_DEFAULT (_LEUART_CTRL_RXDMAWU_DEFAULT << 12) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 151 #define LEUART_CTRL_TXDMAWU (0x1UL << 13) /**< TX DMA Wakeup */
sahilmgandhi 18:6a4db94011d3 152 #define _LEUART_CTRL_TXDMAWU_SHIFT 13 /**< Shift value for LEUART_TXDMAWU */
sahilmgandhi 18:6a4db94011d3 153 #define _LEUART_CTRL_TXDMAWU_MASK 0x2000UL /**< Bit mask for LEUART_TXDMAWU */
sahilmgandhi 18:6a4db94011d3 154 #define _LEUART_CTRL_TXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 155 #define LEUART_CTRL_TXDMAWU_DEFAULT (_LEUART_CTRL_TXDMAWU_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 156 #define _LEUART_CTRL_TXDELAY_SHIFT 14 /**< Shift value for LEUART_TXDELAY */
sahilmgandhi 18:6a4db94011d3 157 #define _LEUART_CTRL_TXDELAY_MASK 0xC000UL /**< Bit mask for LEUART_TXDELAY */
sahilmgandhi 18:6a4db94011d3 158 #define _LEUART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 159 #define _LEUART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 160 #define _LEUART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 161 #define _LEUART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 162 #define _LEUART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 163 #define LEUART_CTRL_TXDELAY_DEFAULT (_LEUART_CTRL_TXDELAY_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 164 #define LEUART_CTRL_TXDELAY_NONE (_LEUART_CTRL_TXDELAY_NONE << 14) /**< Shifted mode NONE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 165 #define LEUART_CTRL_TXDELAY_SINGLE (_LEUART_CTRL_TXDELAY_SINGLE << 14) /**< Shifted mode SINGLE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 166 #define LEUART_CTRL_TXDELAY_DOUBLE (_LEUART_CTRL_TXDELAY_DOUBLE << 14) /**< Shifted mode DOUBLE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 167 #define LEUART_CTRL_TXDELAY_TRIPLE (_LEUART_CTRL_TXDELAY_TRIPLE << 14) /**< Shifted mode TRIPLE for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 /* Bit fields for LEUART CMD */
sahilmgandhi 18:6a4db94011d3 170 #define _LEUART_CMD_RESETVALUE 0x00000000UL /**< Default value for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 171 #define _LEUART_CMD_MASK 0x000000FFUL /**< Mask for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 172 #define LEUART_CMD_RXEN (0x1UL << 0) /**< Receiver Enable */
sahilmgandhi 18:6a4db94011d3 173 #define _LEUART_CMD_RXEN_SHIFT 0 /**< Shift value for LEUART_RXEN */
sahilmgandhi 18:6a4db94011d3 174 #define _LEUART_CMD_RXEN_MASK 0x1UL /**< Bit mask for LEUART_RXEN */
sahilmgandhi 18:6a4db94011d3 175 #define _LEUART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 176 #define LEUART_CMD_RXEN_DEFAULT (_LEUART_CMD_RXEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 177 #define LEUART_CMD_RXDIS (0x1UL << 1) /**< Receiver Disable */
sahilmgandhi 18:6a4db94011d3 178 #define _LEUART_CMD_RXDIS_SHIFT 1 /**< Shift value for LEUART_RXDIS */
sahilmgandhi 18:6a4db94011d3 179 #define _LEUART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for LEUART_RXDIS */
sahilmgandhi 18:6a4db94011d3 180 #define _LEUART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 181 #define LEUART_CMD_RXDIS_DEFAULT (_LEUART_CMD_RXDIS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 182 #define LEUART_CMD_TXEN (0x1UL << 2) /**< Transmitter Enable */
sahilmgandhi 18:6a4db94011d3 183 #define _LEUART_CMD_TXEN_SHIFT 2 /**< Shift value for LEUART_TXEN */
sahilmgandhi 18:6a4db94011d3 184 #define _LEUART_CMD_TXEN_MASK 0x4UL /**< Bit mask for LEUART_TXEN */
sahilmgandhi 18:6a4db94011d3 185 #define _LEUART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 186 #define LEUART_CMD_TXEN_DEFAULT (_LEUART_CMD_TXEN_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 187 #define LEUART_CMD_TXDIS (0x1UL << 3) /**< Transmitter Disable */
sahilmgandhi 18:6a4db94011d3 188 #define _LEUART_CMD_TXDIS_SHIFT 3 /**< Shift value for LEUART_TXDIS */
sahilmgandhi 18:6a4db94011d3 189 #define _LEUART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for LEUART_TXDIS */
sahilmgandhi 18:6a4db94011d3 190 #define _LEUART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 191 #define LEUART_CMD_TXDIS_DEFAULT (_LEUART_CMD_TXDIS_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 192 #define LEUART_CMD_RXBLOCKEN (0x1UL << 4) /**< Receiver Block Enable */
sahilmgandhi 18:6a4db94011d3 193 #define _LEUART_CMD_RXBLOCKEN_SHIFT 4 /**< Shift value for LEUART_RXBLOCKEN */
sahilmgandhi 18:6a4db94011d3 194 #define _LEUART_CMD_RXBLOCKEN_MASK 0x10UL /**< Bit mask for LEUART_RXBLOCKEN */
sahilmgandhi 18:6a4db94011d3 195 #define _LEUART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 196 #define LEUART_CMD_RXBLOCKEN_DEFAULT (_LEUART_CMD_RXBLOCKEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 197 #define LEUART_CMD_RXBLOCKDIS (0x1UL << 5) /**< Receiver Block Disable */
sahilmgandhi 18:6a4db94011d3 198 #define _LEUART_CMD_RXBLOCKDIS_SHIFT 5 /**< Shift value for LEUART_RXBLOCKDIS */
sahilmgandhi 18:6a4db94011d3 199 #define _LEUART_CMD_RXBLOCKDIS_MASK 0x20UL /**< Bit mask for LEUART_RXBLOCKDIS */
sahilmgandhi 18:6a4db94011d3 200 #define _LEUART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 201 #define LEUART_CMD_RXBLOCKDIS_DEFAULT (_LEUART_CMD_RXBLOCKDIS_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 202 #define LEUART_CMD_CLEARTX (0x1UL << 6) /**< Clear TX */
sahilmgandhi 18:6a4db94011d3 203 #define _LEUART_CMD_CLEARTX_SHIFT 6 /**< Shift value for LEUART_CLEARTX */
sahilmgandhi 18:6a4db94011d3 204 #define _LEUART_CMD_CLEARTX_MASK 0x40UL /**< Bit mask for LEUART_CLEARTX */
sahilmgandhi 18:6a4db94011d3 205 #define _LEUART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 206 #define LEUART_CMD_CLEARTX_DEFAULT (_LEUART_CMD_CLEARTX_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 207 #define LEUART_CMD_CLEARRX (0x1UL << 7) /**< Clear RX */
sahilmgandhi 18:6a4db94011d3 208 #define _LEUART_CMD_CLEARRX_SHIFT 7 /**< Shift value for LEUART_CLEARRX */
sahilmgandhi 18:6a4db94011d3 209 #define _LEUART_CMD_CLEARRX_MASK 0x80UL /**< Bit mask for LEUART_CLEARRX */
sahilmgandhi 18:6a4db94011d3 210 #define _LEUART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 211 #define LEUART_CMD_CLEARRX_DEFAULT (_LEUART_CMD_CLEARRX_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 /* Bit fields for LEUART STATUS */
sahilmgandhi 18:6a4db94011d3 214 #define _LEUART_STATUS_RESETVALUE 0x00000050UL /**< Default value for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 215 #define _LEUART_STATUS_MASK 0x0000007FUL /**< Mask for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 216 #define LEUART_STATUS_RXENS (0x1UL << 0) /**< Receiver Enable Status */
sahilmgandhi 18:6a4db94011d3 217 #define _LEUART_STATUS_RXENS_SHIFT 0 /**< Shift value for LEUART_RXENS */
sahilmgandhi 18:6a4db94011d3 218 #define _LEUART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for LEUART_RXENS */
sahilmgandhi 18:6a4db94011d3 219 #define _LEUART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 220 #define LEUART_STATUS_RXENS_DEFAULT (_LEUART_STATUS_RXENS_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 221 #define LEUART_STATUS_TXENS (0x1UL << 1) /**< Transmitter Enable Status */
sahilmgandhi 18:6a4db94011d3 222 #define _LEUART_STATUS_TXENS_SHIFT 1 /**< Shift value for LEUART_TXENS */
sahilmgandhi 18:6a4db94011d3 223 #define _LEUART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for LEUART_TXENS */
sahilmgandhi 18:6a4db94011d3 224 #define _LEUART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 225 #define LEUART_STATUS_TXENS_DEFAULT (_LEUART_STATUS_TXENS_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 226 #define LEUART_STATUS_RXBLOCK (0x1UL << 2) /**< Block Incoming Data */
sahilmgandhi 18:6a4db94011d3 227 #define _LEUART_STATUS_RXBLOCK_SHIFT 2 /**< Shift value for LEUART_RXBLOCK */
sahilmgandhi 18:6a4db94011d3 228 #define _LEUART_STATUS_RXBLOCK_MASK 0x4UL /**< Bit mask for LEUART_RXBLOCK */
sahilmgandhi 18:6a4db94011d3 229 #define _LEUART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 230 #define LEUART_STATUS_RXBLOCK_DEFAULT (_LEUART_STATUS_RXBLOCK_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 231 #define LEUART_STATUS_TXC (0x1UL << 3) /**< TX Complete */
sahilmgandhi 18:6a4db94011d3 232 #define _LEUART_STATUS_TXC_SHIFT 3 /**< Shift value for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 233 #define _LEUART_STATUS_TXC_MASK 0x8UL /**< Bit mask for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 234 #define _LEUART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 235 #define LEUART_STATUS_TXC_DEFAULT (_LEUART_STATUS_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 236 #define LEUART_STATUS_TXBL (0x1UL << 4) /**< TX Buffer Level */
sahilmgandhi 18:6a4db94011d3 237 #define _LEUART_STATUS_TXBL_SHIFT 4 /**< Shift value for LEUART_TXBL */
sahilmgandhi 18:6a4db94011d3 238 #define _LEUART_STATUS_TXBL_MASK 0x10UL /**< Bit mask for LEUART_TXBL */
sahilmgandhi 18:6a4db94011d3 239 #define _LEUART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 240 #define LEUART_STATUS_TXBL_DEFAULT (_LEUART_STATUS_TXBL_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 241 #define LEUART_STATUS_RXDATAV (0x1UL << 5) /**< RX Data Valid */
sahilmgandhi 18:6a4db94011d3 242 #define _LEUART_STATUS_RXDATAV_SHIFT 5 /**< Shift value for LEUART_RXDATAV */
sahilmgandhi 18:6a4db94011d3 243 #define _LEUART_STATUS_RXDATAV_MASK 0x20UL /**< Bit mask for LEUART_RXDATAV */
sahilmgandhi 18:6a4db94011d3 244 #define _LEUART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 245 #define LEUART_STATUS_RXDATAV_DEFAULT (_LEUART_STATUS_RXDATAV_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 246 #define LEUART_STATUS_TXIDLE (0x1UL << 6) /**< TX Idle */
sahilmgandhi 18:6a4db94011d3 247 #define _LEUART_STATUS_TXIDLE_SHIFT 6 /**< Shift value for LEUART_TXIDLE */
sahilmgandhi 18:6a4db94011d3 248 #define _LEUART_STATUS_TXIDLE_MASK 0x40UL /**< Bit mask for LEUART_TXIDLE */
sahilmgandhi 18:6a4db94011d3 249 #define _LEUART_STATUS_TXIDLE_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 250 #define LEUART_STATUS_TXIDLE_DEFAULT (_LEUART_STATUS_TXIDLE_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_STATUS */
sahilmgandhi 18:6a4db94011d3 251
sahilmgandhi 18:6a4db94011d3 252 /* Bit fields for LEUART CLKDIV */
sahilmgandhi 18:6a4db94011d3 253 #define _LEUART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for LEUART_CLKDIV */
sahilmgandhi 18:6a4db94011d3 254 #define _LEUART_CLKDIV_MASK 0x0001FFF8UL /**< Mask for LEUART_CLKDIV */
sahilmgandhi 18:6a4db94011d3 255 #define _LEUART_CLKDIV_DIV_SHIFT 3 /**< Shift value for LEUART_DIV */
sahilmgandhi 18:6a4db94011d3 256 #define _LEUART_CLKDIV_DIV_MASK 0x1FFF8UL /**< Bit mask for LEUART_DIV */
sahilmgandhi 18:6a4db94011d3 257 #define _LEUART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CLKDIV */
sahilmgandhi 18:6a4db94011d3 258 #define LEUART_CLKDIV_DIV_DEFAULT (_LEUART_CLKDIV_DIV_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_CLKDIV */
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 /* Bit fields for LEUART STARTFRAME */
sahilmgandhi 18:6a4db94011d3 261 #define _LEUART_STARTFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 262 #define _LEUART_STARTFRAME_MASK 0x000001FFUL /**< Mask for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 263 #define _LEUART_STARTFRAME_STARTFRAME_SHIFT 0 /**< Shift value for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 264 #define _LEUART_STARTFRAME_STARTFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 265 #define _LEUART_STARTFRAME_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 266 #define LEUART_STARTFRAME_STARTFRAME_DEFAULT (_LEUART_STARTFRAME_STARTFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 267
sahilmgandhi 18:6a4db94011d3 268 /* Bit fields for LEUART SIGFRAME */
sahilmgandhi 18:6a4db94011d3 269 #define _LEUART_SIGFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 270 #define _LEUART_SIGFRAME_MASK 0x000001FFUL /**< Mask for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 271 #define _LEUART_SIGFRAME_SIGFRAME_SHIFT 0 /**< Shift value for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 272 #define _LEUART_SIGFRAME_SIGFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 273 #define _LEUART_SIGFRAME_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 274 #define LEUART_SIGFRAME_SIGFRAME_DEFAULT (_LEUART_SIGFRAME_SIGFRAME_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 275
sahilmgandhi 18:6a4db94011d3 276 /* Bit fields for LEUART RXDATAX */
sahilmgandhi 18:6a4db94011d3 277 #define _LEUART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 278 #define _LEUART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 279 #define _LEUART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 280 #define _LEUART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 281 #define _LEUART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 282 #define LEUART_RXDATAX_RXDATA_DEFAULT (_LEUART_RXDATAX_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 283 #define LEUART_RXDATAX_PERR (0x1UL << 14) /**< Receive Data Parity Error */
sahilmgandhi 18:6a4db94011d3 284 #define _LEUART_RXDATAX_PERR_SHIFT 14 /**< Shift value for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 285 #define _LEUART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 286 #define _LEUART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 287 #define LEUART_RXDATAX_PERR_DEFAULT (_LEUART_RXDATAX_PERR_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 288 #define LEUART_RXDATAX_FERR (0x1UL << 15) /**< Receive Data Framing Error */
sahilmgandhi 18:6a4db94011d3 289 #define _LEUART_RXDATAX_FERR_SHIFT 15 /**< Shift value for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 290 #define _LEUART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 291 #define _LEUART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 292 #define LEUART_RXDATAX_FERR_DEFAULT (_LEUART_RXDATAX_FERR_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
sahilmgandhi 18:6a4db94011d3 293
sahilmgandhi 18:6a4db94011d3 294 /* Bit fields for LEUART RXDATA */
sahilmgandhi 18:6a4db94011d3 295 #define _LEUART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 296 #define _LEUART_RXDATA_MASK 0x000000FFUL /**< Mask for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 297 #define _LEUART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 298 #define _LEUART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 299 #define _LEUART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 300 #define LEUART_RXDATA_RXDATA_DEFAULT (_LEUART_RXDATA_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATA */
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 /* Bit fields for LEUART RXDATAXP */
sahilmgandhi 18:6a4db94011d3 303 #define _LEUART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 304 #define _LEUART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 305 #define _LEUART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for LEUART_RXDATAP */
sahilmgandhi 18:6a4db94011d3 306 #define _LEUART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATAP */
sahilmgandhi 18:6a4db94011d3 307 #define _LEUART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 308 #define LEUART_RXDATAXP_RXDATAP_DEFAULT (_LEUART_RXDATAXP_RXDATAP_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 309 #define LEUART_RXDATAXP_PERRP (0x1UL << 14) /**< Receive Data Parity Error Peek */
sahilmgandhi 18:6a4db94011d3 310 #define _LEUART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for LEUART_PERRP */
sahilmgandhi 18:6a4db94011d3 311 #define _LEUART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for LEUART_PERRP */
sahilmgandhi 18:6a4db94011d3 312 #define _LEUART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 313 #define LEUART_RXDATAXP_PERRP_DEFAULT (_LEUART_RXDATAXP_PERRP_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 314 #define LEUART_RXDATAXP_FERRP (0x1UL << 15) /**< Receive Data Framing Error Peek */
sahilmgandhi 18:6a4db94011d3 315 #define _LEUART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for LEUART_FERRP */
sahilmgandhi 18:6a4db94011d3 316 #define _LEUART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for LEUART_FERRP */
sahilmgandhi 18:6a4db94011d3 317 #define _LEUART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 318 #define LEUART_RXDATAXP_FERRP_DEFAULT (_LEUART_RXDATAXP_FERRP_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
sahilmgandhi 18:6a4db94011d3 319
sahilmgandhi 18:6a4db94011d3 320 /* Bit fields for LEUART TXDATAX */
sahilmgandhi 18:6a4db94011d3 321 #define _LEUART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 322 #define _LEUART_TXDATAX_MASK 0x0000E1FFUL /**< Mask for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 323 #define _LEUART_TXDATAX_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 324 #define _LEUART_TXDATAX_TXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 325 #define _LEUART_TXDATAX_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 326 #define LEUART_TXDATAX_TXDATA_DEFAULT (_LEUART_TXDATAX_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 327 #define LEUART_TXDATAX_TXBREAK (0x1UL << 13) /**< Transmit Data As Break */
sahilmgandhi 18:6a4db94011d3 328 #define _LEUART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for LEUART_TXBREAK */
sahilmgandhi 18:6a4db94011d3 329 #define _LEUART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for LEUART_TXBREAK */
sahilmgandhi 18:6a4db94011d3 330 #define _LEUART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 331 #define LEUART_TXDATAX_TXBREAK_DEFAULT (_LEUART_TXDATAX_TXBREAK_DEFAULT << 13) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 332 #define LEUART_TXDATAX_TXDISAT (0x1UL << 14) /**< Disable TX After Transmission */
sahilmgandhi 18:6a4db94011d3 333 #define _LEUART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for LEUART_TXDISAT */
sahilmgandhi 18:6a4db94011d3 334 #define _LEUART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for LEUART_TXDISAT */
sahilmgandhi 18:6a4db94011d3 335 #define _LEUART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 336 #define LEUART_TXDATAX_TXDISAT_DEFAULT (_LEUART_TXDATAX_TXDISAT_DEFAULT << 14) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 337 #define LEUART_TXDATAX_RXENAT (0x1UL << 15) /**< Enable RX After Transmission */
sahilmgandhi 18:6a4db94011d3 338 #define _LEUART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for LEUART_RXENAT */
sahilmgandhi 18:6a4db94011d3 339 #define _LEUART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for LEUART_RXENAT */
sahilmgandhi 18:6a4db94011d3 340 #define _LEUART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 341 #define LEUART_TXDATAX_RXENAT_DEFAULT (_LEUART_TXDATAX_RXENAT_DEFAULT << 15) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 342
sahilmgandhi 18:6a4db94011d3 343 /* Bit fields for LEUART TXDATA */
sahilmgandhi 18:6a4db94011d3 344 #define _LEUART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 345 #define _LEUART_TXDATA_MASK 0x000000FFUL /**< Mask for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 346 #define _LEUART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 347 #define _LEUART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 348 #define _LEUART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 349 #define LEUART_TXDATA_TXDATA_DEFAULT (_LEUART_TXDATA_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 /* Bit fields for LEUART IF */
sahilmgandhi 18:6a4db94011d3 352 #define _LEUART_IF_RESETVALUE 0x00000002UL /**< Default value for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 353 #define _LEUART_IF_MASK 0x000007FFUL /**< Mask for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 354 #define LEUART_IF_TXC (0x1UL << 0) /**< TX Complete Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 355 #define _LEUART_IF_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 356 #define _LEUART_IF_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 357 #define _LEUART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 358 #define LEUART_IF_TXC_DEFAULT (_LEUART_IF_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 359 #define LEUART_IF_TXBL (0x1UL << 1) /**< TX Buffer Level Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 360 #define _LEUART_IF_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
sahilmgandhi 18:6a4db94011d3 361 #define _LEUART_IF_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
sahilmgandhi 18:6a4db94011d3 362 #define _LEUART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 363 #define LEUART_IF_TXBL_DEFAULT (_LEUART_IF_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 364 #define LEUART_IF_RXDATAV (0x1UL << 2) /**< RX Data Valid Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 365 #define _LEUART_IF_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
sahilmgandhi 18:6a4db94011d3 366 #define _LEUART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
sahilmgandhi 18:6a4db94011d3 367 #define _LEUART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 368 #define LEUART_IF_RXDATAV_DEFAULT (_LEUART_IF_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 369 #define LEUART_IF_RXOF (0x1UL << 3) /**< RX Overflow Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 370 #define _LEUART_IF_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 371 #define _LEUART_IF_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 372 #define _LEUART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 373 #define LEUART_IF_RXOF_DEFAULT (_LEUART_IF_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 374 #define LEUART_IF_RXUF (0x1UL << 4) /**< RX Underflow Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 375 #define _LEUART_IF_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 376 #define _LEUART_IF_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 377 #define _LEUART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 378 #define LEUART_IF_RXUF_DEFAULT (_LEUART_IF_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 379 #define LEUART_IF_TXOF (0x1UL << 5) /**< TX Overflow Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 380 #define _LEUART_IF_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 381 #define _LEUART_IF_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 382 #define _LEUART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 383 #define LEUART_IF_TXOF_DEFAULT (_LEUART_IF_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 384 #define LEUART_IF_PERR (0x1UL << 6) /**< Parity Error Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 385 #define _LEUART_IF_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 386 #define _LEUART_IF_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 387 #define _LEUART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 388 #define LEUART_IF_PERR_DEFAULT (_LEUART_IF_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 389 #define LEUART_IF_FERR (0x1UL << 7) /**< Framing Error Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 390 #define _LEUART_IF_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 391 #define _LEUART_IF_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 392 #define _LEUART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 393 #define LEUART_IF_FERR_DEFAULT (_LEUART_IF_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 394 #define LEUART_IF_MPAF (0x1UL << 8) /**< Multi-Processor Address Frame Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 395 #define _LEUART_IF_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 396 #define _LEUART_IF_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 397 #define _LEUART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 398 #define LEUART_IF_MPAF_DEFAULT (_LEUART_IF_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 399 #define LEUART_IF_STARTF (0x1UL << 9) /**< Start Frame Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 400 #define _LEUART_IF_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 401 #define _LEUART_IF_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 402 #define _LEUART_IF_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 403 #define LEUART_IF_STARTF_DEFAULT (_LEUART_IF_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 404 #define LEUART_IF_SIGF (0x1UL << 10) /**< Signal Frame Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 405 #define _LEUART_IF_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 406 #define _LEUART_IF_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 407 #define _LEUART_IF_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 408 #define LEUART_IF_SIGF_DEFAULT (_LEUART_IF_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IF */
sahilmgandhi 18:6a4db94011d3 409
sahilmgandhi 18:6a4db94011d3 410 /* Bit fields for LEUART IFS */
sahilmgandhi 18:6a4db94011d3 411 #define _LEUART_IFS_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 412 #define _LEUART_IFS_MASK 0x000007F9UL /**< Mask for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 413 #define LEUART_IFS_TXC (0x1UL << 0) /**< Set TXC Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 414 #define _LEUART_IFS_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 415 #define _LEUART_IFS_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 416 #define _LEUART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 417 #define LEUART_IFS_TXC_DEFAULT (_LEUART_IFS_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 418 #define LEUART_IFS_RXOF (0x1UL << 3) /**< Set RXOF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 419 #define _LEUART_IFS_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 420 #define _LEUART_IFS_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 421 #define _LEUART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 422 #define LEUART_IFS_RXOF_DEFAULT (_LEUART_IFS_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 423 #define LEUART_IFS_RXUF (0x1UL << 4) /**< Set RXUF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 424 #define _LEUART_IFS_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 425 #define _LEUART_IFS_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 426 #define _LEUART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 427 #define LEUART_IFS_RXUF_DEFAULT (_LEUART_IFS_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 428 #define LEUART_IFS_TXOF (0x1UL << 5) /**< Set TXOF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 429 #define _LEUART_IFS_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 430 #define _LEUART_IFS_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 431 #define _LEUART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 432 #define LEUART_IFS_TXOF_DEFAULT (_LEUART_IFS_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 433 #define LEUART_IFS_PERR (0x1UL << 6) /**< Set PERR Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 434 #define _LEUART_IFS_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 435 #define _LEUART_IFS_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 436 #define _LEUART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 437 #define LEUART_IFS_PERR_DEFAULT (_LEUART_IFS_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 438 #define LEUART_IFS_FERR (0x1UL << 7) /**< Set FERR Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 439 #define _LEUART_IFS_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 440 #define _LEUART_IFS_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 441 #define _LEUART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 442 #define LEUART_IFS_FERR_DEFAULT (_LEUART_IFS_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 443 #define LEUART_IFS_MPAF (0x1UL << 8) /**< Set MPAF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 444 #define _LEUART_IFS_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 445 #define _LEUART_IFS_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 446 #define _LEUART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 447 #define LEUART_IFS_MPAF_DEFAULT (_LEUART_IFS_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 448 #define LEUART_IFS_STARTF (0x1UL << 9) /**< Set STARTF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 449 #define _LEUART_IFS_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 450 #define _LEUART_IFS_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 451 #define _LEUART_IFS_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 452 #define LEUART_IFS_STARTF_DEFAULT (_LEUART_IFS_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 453 #define LEUART_IFS_SIGF (0x1UL << 10) /**< Set SIGF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 454 #define _LEUART_IFS_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 455 #define _LEUART_IFS_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 456 #define _LEUART_IFS_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 457 #define LEUART_IFS_SIGF_DEFAULT (_LEUART_IFS_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFS */
sahilmgandhi 18:6a4db94011d3 458
sahilmgandhi 18:6a4db94011d3 459 /* Bit fields for LEUART IFC */
sahilmgandhi 18:6a4db94011d3 460 #define _LEUART_IFC_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 461 #define _LEUART_IFC_MASK 0x000007F9UL /**< Mask for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 462 #define LEUART_IFC_TXC (0x1UL << 0) /**< Clear TXC Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 463 #define _LEUART_IFC_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 464 #define _LEUART_IFC_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 465 #define _LEUART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 466 #define LEUART_IFC_TXC_DEFAULT (_LEUART_IFC_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 467 #define LEUART_IFC_RXOF (0x1UL << 3) /**< Clear RXOF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 468 #define _LEUART_IFC_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 469 #define _LEUART_IFC_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 470 #define _LEUART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 471 #define LEUART_IFC_RXOF_DEFAULT (_LEUART_IFC_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 472 #define LEUART_IFC_RXUF (0x1UL << 4) /**< Clear RXUF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 473 #define _LEUART_IFC_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 474 #define _LEUART_IFC_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 475 #define _LEUART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 476 #define LEUART_IFC_RXUF_DEFAULT (_LEUART_IFC_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 477 #define LEUART_IFC_TXOF (0x1UL << 5) /**< Clear TXOF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 478 #define _LEUART_IFC_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 479 #define _LEUART_IFC_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 480 #define _LEUART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 481 #define LEUART_IFC_TXOF_DEFAULT (_LEUART_IFC_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 482 #define LEUART_IFC_PERR (0x1UL << 6) /**< Clear PERR Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 483 #define _LEUART_IFC_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 484 #define _LEUART_IFC_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 485 #define _LEUART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 486 #define LEUART_IFC_PERR_DEFAULT (_LEUART_IFC_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 487 #define LEUART_IFC_FERR (0x1UL << 7) /**< Clear FERR Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 488 #define _LEUART_IFC_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 489 #define _LEUART_IFC_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 490 #define _LEUART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 491 #define LEUART_IFC_FERR_DEFAULT (_LEUART_IFC_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 492 #define LEUART_IFC_MPAF (0x1UL << 8) /**< Clear MPAF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 493 #define _LEUART_IFC_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 494 #define _LEUART_IFC_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 495 #define _LEUART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 496 #define LEUART_IFC_MPAF_DEFAULT (_LEUART_IFC_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 497 #define LEUART_IFC_STARTF (0x1UL << 9) /**< Clear STARTF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 498 #define _LEUART_IFC_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 499 #define _LEUART_IFC_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 500 #define _LEUART_IFC_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 501 #define LEUART_IFC_STARTF_DEFAULT (_LEUART_IFC_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 502 #define LEUART_IFC_SIGF (0x1UL << 10) /**< Clear SIGF Interrupt Flag */
sahilmgandhi 18:6a4db94011d3 503 #define _LEUART_IFC_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 504 #define _LEUART_IFC_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 505 #define _LEUART_IFC_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 506 #define LEUART_IFC_SIGF_DEFAULT (_LEUART_IFC_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IFC */
sahilmgandhi 18:6a4db94011d3 507
sahilmgandhi 18:6a4db94011d3 508 /* Bit fields for LEUART IEN */
sahilmgandhi 18:6a4db94011d3 509 #define _LEUART_IEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 510 #define _LEUART_IEN_MASK 0x000007FFUL /**< Mask for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 511 #define LEUART_IEN_TXC (0x1UL << 0) /**< TXC Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 512 #define _LEUART_IEN_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 513 #define _LEUART_IEN_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
sahilmgandhi 18:6a4db94011d3 514 #define _LEUART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 515 #define LEUART_IEN_TXC_DEFAULT (_LEUART_IEN_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 516 #define LEUART_IEN_TXBL (0x1UL << 1) /**< TXBL Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 517 #define _LEUART_IEN_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
sahilmgandhi 18:6a4db94011d3 518 #define _LEUART_IEN_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
sahilmgandhi 18:6a4db94011d3 519 #define _LEUART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 520 #define LEUART_IEN_TXBL_DEFAULT (_LEUART_IEN_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 521 #define LEUART_IEN_RXDATAV (0x1UL << 2) /**< RXDATAV Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 522 #define _LEUART_IEN_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
sahilmgandhi 18:6a4db94011d3 523 #define _LEUART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
sahilmgandhi 18:6a4db94011d3 524 #define _LEUART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 525 #define LEUART_IEN_RXDATAV_DEFAULT (_LEUART_IEN_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 526 #define LEUART_IEN_RXOF (0x1UL << 3) /**< RXOF Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 527 #define _LEUART_IEN_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 528 #define _LEUART_IEN_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
sahilmgandhi 18:6a4db94011d3 529 #define _LEUART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 530 #define LEUART_IEN_RXOF_DEFAULT (_LEUART_IEN_RXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 531 #define LEUART_IEN_RXUF (0x1UL << 4) /**< RXUF Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 532 #define _LEUART_IEN_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 533 #define _LEUART_IEN_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
sahilmgandhi 18:6a4db94011d3 534 #define _LEUART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 535 #define LEUART_IEN_RXUF_DEFAULT (_LEUART_IEN_RXUF_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 536 #define LEUART_IEN_TXOF (0x1UL << 5) /**< TXOF Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 537 #define _LEUART_IEN_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 538 #define _LEUART_IEN_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
sahilmgandhi 18:6a4db94011d3 539 #define _LEUART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 540 #define LEUART_IEN_TXOF_DEFAULT (_LEUART_IEN_TXOF_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 541 #define LEUART_IEN_PERR (0x1UL << 6) /**< PERR Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 542 #define _LEUART_IEN_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 543 #define _LEUART_IEN_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
sahilmgandhi 18:6a4db94011d3 544 #define _LEUART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 545 #define LEUART_IEN_PERR_DEFAULT (_LEUART_IEN_PERR_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 546 #define LEUART_IEN_FERR (0x1UL << 7) /**< FERR Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 547 #define _LEUART_IEN_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 548 #define _LEUART_IEN_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
sahilmgandhi 18:6a4db94011d3 549 #define _LEUART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 550 #define LEUART_IEN_FERR_DEFAULT (_LEUART_IEN_FERR_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 551 #define LEUART_IEN_MPAF (0x1UL << 8) /**< MPAF Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 552 #define _LEUART_IEN_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 553 #define _LEUART_IEN_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
sahilmgandhi 18:6a4db94011d3 554 #define _LEUART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 555 #define LEUART_IEN_MPAF_DEFAULT (_LEUART_IEN_MPAF_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 556 #define LEUART_IEN_STARTF (0x1UL << 9) /**< STARTF Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 557 #define _LEUART_IEN_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 558 #define _LEUART_IEN_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
sahilmgandhi 18:6a4db94011d3 559 #define _LEUART_IEN_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 560 #define LEUART_IEN_STARTF_DEFAULT (_LEUART_IEN_STARTF_DEFAULT << 9) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 561 #define LEUART_IEN_SIGF (0x1UL << 10) /**< SIGF Interrupt Enable */
sahilmgandhi 18:6a4db94011d3 562 #define _LEUART_IEN_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 563 #define _LEUART_IEN_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
sahilmgandhi 18:6a4db94011d3 564 #define _LEUART_IEN_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 565 #define LEUART_IEN_SIGF_DEFAULT (_LEUART_IEN_SIGF_DEFAULT << 10) /**< Shifted mode DEFAULT for LEUART_IEN */
sahilmgandhi 18:6a4db94011d3 566
sahilmgandhi 18:6a4db94011d3 567 /* Bit fields for LEUART PULSECTRL */
sahilmgandhi 18:6a4db94011d3 568 #define _LEUART_PULSECTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 569 #define _LEUART_PULSECTRL_MASK 0x0000003FUL /**< Mask for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 570 #define _LEUART_PULSECTRL_PULSEW_SHIFT 0 /**< Shift value for LEUART_PULSEW */
sahilmgandhi 18:6a4db94011d3 571 #define _LEUART_PULSECTRL_PULSEW_MASK 0xFUL /**< Bit mask for LEUART_PULSEW */
sahilmgandhi 18:6a4db94011d3 572 #define _LEUART_PULSECTRL_PULSEW_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 573 #define LEUART_PULSECTRL_PULSEW_DEFAULT (_LEUART_PULSECTRL_PULSEW_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 574 #define LEUART_PULSECTRL_PULSEEN (0x1UL << 4) /**< Pulse Generator/Extender Enable */
sahilmgandhi 18:6a4db94011d3 575 #define _LEUART_PULSECTRL_PULSEEN_SHIFT 4 /**< Shift value for LEUART_PULSEEN */
sahilmgandhi 18:6a4db94011d3 576 #define _LEUART_PULSECTRL_PULSEEN_MASK 0x10UL /**< Bit mask for LEUART_PULSEEN */
sahilmgandhi 18:6a4db94011d3 577 #define _LEUART_PULSECTRL_PULSEEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 578 #define LEUART_PULSECTRL_PULSEEN_DEFAULT (_LEUART_PULSECTRL_PULSEEN_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 579 #define LEUART_PULSECTRL_PULSEFILT (0x1UL << 5) /**< Pulse Filter */
sahilmgandhi 18:6a4db94011d3 580 #define _LEUART_PULSECTRL_PULSEFILT_SHIFT 5 /**< Shift value for LEUART_PULSEFILT */
sahilmgandhi 18:6a4db94011d3 581 #define _LEUART_PULSECTRL_PULSEFILT_MASK 0x20UL /**< Bit mask for LEUART_PULSEFILT */
sahilmgandhi 18:6a4db94011d3 582 #define _LEUART_PULSECTRL_PULSEFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 583 #define LEUART_PULSECTRL_PULSEFILT_DEFAULT (_LEUART_PULSECTRL_PULSEFILT_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 584
sahilmgandhi 18:6a4db94011d3 585 /* Bit fields for LEUART FREEZE */
sahilmgandhi 18:6a4db94011d3 586 #define _LEUART_FREEZE_RESETVALUE 0x00000000UL /**< Default value for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 587 #define _LEUART_FREEZE_MASK 0x00000001UL /**< Mask for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 588 #define LEUART_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */
sahilmgandhi 18:6a4db94011d3 589 #define _LEUART_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for LEUART_REGFREEZE */
sahilmgandhi 18:6a4db94011d3 590 #define _LEUART_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for LEUART_REGFREEZE */
sahilmgandhi 18:6a4db94011d3 591 #define _LEUART_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 592 #define _LEUART_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 593 #define _LEUART_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 594 #define LEUART_FREEZE_REGFREEZE_DEFAULT (_LEUART_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 595 #define LEUART_FREEZE_REGFREEZE_UPDATE (_LEUART_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 596 #define LEUART_FREEZE_REGFREEZE_FREEZE (_LEUART_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for LEUART_FREEZE */
sahilmgandhi 18:6a4db94011d3 597
sahilmgandhi 18:6a4db94011d3 598 /* Bit fields for LEUART SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 599 #define _LEUART_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 600 #define _LEUART_SYNCBUSY_MASK 0x000000FFUL /**< Mask for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 601 #define LEUART_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
sahilmgandhi 18:6a4db94011d3 602 #define _LEUART_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 603 #define _LEUART_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for LEUART_CTRL */
sahilmgandhi 18:6a4db94011d3 604 #define _LEUART_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 605 #define LEUART_SYNCBUSY_CTRL_DEFAULT (_LEUART_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 606 #define LEUART_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
sahilmgandhi 18:6a4db94011d3 607 #define _LEUART_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 608 #define _LEUART_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for LEUART_CMD */
sahilmgandhi 18:6a4db94011d3 609 #define _LEUART_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 610 #define LEUART_SYNCBUSY_CMD_DEFAULT (_LEUART_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 611 #define LEUART_SYNCBUSY_CLKDIV (0x1UL << 2) /**< CLKDIV Register Busy */
sahilmgandhi 18:6a4db94011d3 612 #define _LEUART_SYNCBUSY_CLKDIV_SHIFT 2 /**< Shift value for LEUART_CLKDIV */
sahilmgandhi 18:6a4db94011d3 613 #define _LEUART_SYNCBUSY_CLKDIV_MASK 0x4UL /**< Bit mask for LEUART_CLKDIV */
sahilmgandhi 18:6a4db94011d3 614 #define _LEUART_SYNCBUSY_CLKDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 615 #define LEUART_SYNCBUSY_CLKDIV_DEFAULT (_LEUART_SYNCBUSY_CLKDIV_DEFAULT << 2) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 616 #define LEUART_SYNCBUSY_STARTFRAME (0x1UL << 3) /**< STARTFRAME Register Busy */
sahilmgandhi 18:6a4db94011d3 617 #define _LEUART_SYNCBUSY_STARTFRAME_SHIFT 3 /**< Shift value for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 618 #define _LEUART_SYNCBUSY_STARTFRAME_MASK 0x8UL /**< Bit mask for LEUART_STARTFRAME */
sahilmgandhi 18:6a4db94011d3 619 #define _LEUART_SYNCBUSY_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 620 #define LEUART_SYNCBUSY_STARTFRAME_DEFAULT (_LEUART_SYNCBUSY_STARTFRAME_DEFAULT << 3) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 621 #define LEUART_SYNCBUSY_SIGFRAME (0x1UL << 4) /**< SIGFRAME Register Busy */
sahilmgandhi 18:6a4db94011d3 622 #define _LEUART_SYNCBUSY_SIGFRAME_SHIFT 4 /**< Shift value for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 623 #define _LEUART_SYNCBUSY_SIGFRAME_MASK 0x10UL /**< Bit mask for LEUART_SIGFRAME */
sahilmgandhi 18:6a4db94011d3 624 #define _LEUART_SYNCBUSY_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 625 #define LEUART_SYNCBUSY_SIGFRAME_DEFAULT (_LEUART_SYNCBUSY_SIGFRAME_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 626 #define LEUART_SYNCBUSY_TXDATAX (0x1UL << 5) /**< TXDATAX Register Busy */
sahilmgandhi 18:6a4db94011d3 627 #define _LEUART_SYNCBUSY_TXDATAX_SHIFT 5 /**< Shift value for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 628 #define _LEUART_SYNCBUSY_TXDATAX_MASK 0x20UL /**< Bit mask for LEUART_TXDATAX */
sahilmgandhi 18:6a4db94011d3 629 #define _LEUART_SYNCBUSY_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 630 #define LEUART_SYNCBUSY_TXDATAX_DEFAULT (_LEUART_SYNCBUSY_TXDATAX_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 631 #define LEUART_SYNCBUSY_TXDATA (0x1UL << 6) /**< TXDATA Register Busy */
sahilmgandhi 18:6a4db94011d3 632 #define _LEUART_SYNCBUSY_TXDATA_SHIFT 6 /**< Shift value for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 633 #define _LEUART_SYNCBUSY_TXDATA_MASK 0x40UL /**< Bit mask for LEUART_TXDATA */
sahilmgandhi 18:6a4db94011d3 634 #define _LEUART_SYNCBUSY_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 635 #define LEUART_SYNCBUSY_TXDATA_DEFAULT (_LEUART_SYNCBUSY_TXDATA_DEFAULT << 6) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 636 #define LEUART_SYNCBUSY_PULSECTRL (0x1UL << 7) /**< PULSECTRL Register Busy */
sahilmgandhi 18:6a4db94011d3 637 #define _LEUART_SYNCBUSY_PULSECTRL_SHIFT 7 /**< Shift value for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 638 #define _LEUART_SYNCBUSY_PULSECTRL_MASK 0x80UL /**< Bit mask for LEUART_PULSECTRL */
sahilmgandhi 18:6a4db94011d3 639 #define _LEUART_SYNCBUSY_PULSECTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 640 #define LEUART_SYNCBUSY_PULSECTRL_DEFAULT (_LEUART_SYNCBUSY_PULSECTRL_DEFAULT << 7) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
sahilmgandhi 18:6a4db94011d3 641
sahilmgandhi 18:6a4db94011d3 642 /* Bit fields for LEUART ROUTEPEN */
sahilmgandhi 18:6a4db94011d3 643 #define _LEUART_ROUTEPEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTEPEN */
sahilmgandhi 18:6a4db94011d3 644 #define _LEUART_ROUTEPEN_MASK 0x00000003UL /**< Mask for LEUART_ROUTEPEN */
sahilmgandhi 18:6a4db94011d3 645 #define LEUART_ROUTEPEN_RXPEN (0x1UL << 0) /**< RX Pin Enable */
sahilmgandhi 18:6a4db94011d3 646 #define _LEUART_ROUTEPEN_RXPEN_SHIFT 0 /**< Shift value for LEUART_RXPEN */
sahilmgandhi 18:6a4db94011d3 647 #define _LEUART_ROUTEPEN_RXPEN_MASK 0x1UL /**< Bit mask for LEUART_RXPEN */
sahilmgandhi 18:6a4db94011d3 648 #define _LEUART_ROUTEPEN_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTEPEN */
sahilmgandhi 18:6a4db94011d3 649 #define LEUART_ROUTEPEN_RXPEN_DEFAULT (_LEUART_ROUTEPEN_RXPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_ROUTEPEN */
sahilmgandhi 18:6a4db94011d3 650 #define LEUART_ROUTEPEN_TXPEN (0x1UL << 1) /**< TX Pin Enable */
sahilmgandhi 18:6a4db94011d3 651 #define _LEUART_ROUTEPEN_TXPEN_SHIFT 1 /**< Shift value for LEUART_TXPEN */
sahilmgandhi 18:6a4db94011d3 652 #define _LEUART_ROUTEPEN_TXPEN_MASK 0x2UL /**< Bit mask for LEUART_TXPEN */
sahilmgandhi 18:6a4db94011d3 653 #define _LEUART_ROUTEPEN_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTEPEN */
sahilmgandhi 18:6a4db94011d3 654 #define LEUART_ROUTEPEN_TXPEN_DEFAULT (_LEUART_ROUTEPEN_TXPEN_DEFAULT << 1) /**< Shifted mode DEFAULT for LEUART_ROUTEPEN */
sahilmgandhi 18:6a4db94011d3 655
sahilmgandhi 18:6a4db94011d3 656 /* Bit fields for LEUART ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 657 #define _LEUART_ROUTELOC0_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 658 #define _LEUART_ROUTELOC0_MASK 0x00001F1FUL /**< Mask for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 659 #define _LEUART_ROUTELOC0_RXLOC_SHIFT 0 /**< Shift value for LEUART_RXLOC */
sahilmgandhi 18:6a4db94011d3 660 #define _LEUART_ROUTELOC0_RXLOC_MASK 0x1FUL /**< Bit mask for LEUART_RXLOC */
sahilmgandhi 18:6a4db94011d3 661 #define _LEUART_ROUTELOC0_RXLOC_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 662 #define _LEUART_ROUTELOC0_RXLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 663 #define _LEUART_ROUTELOC0_RXLOC_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 664 #define _LEUART_ROUTELOC0_RXLOC_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 665 #define _LEUART_ROUTELOC0_RXLOC_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 666 #define _LEUART_ROUTELOC0_RXLOC_LOC4 0x00000004UL /**< Mode LOC4 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 667 #define _LEUART_ROUTELOC0_RXLOC_LOC5 0x00000005UL /**< Mode LOC5 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 668 #define _LEUART_ROUTELOC0_RXLOC_LOC6 0x00000006UL /**< Mode LOC6 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 669 #define _LEUART_ROUTELOC0_RXLOC_LOC7 0x00000007UL /**< Mode LOC7 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 670 #define _LEUART_ROUTELOC0_RXLOC_LOC8 0x00000008UL /**< Mode LOC8 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 671 #define _LEUART_ROUTELOC0_RXLOC_LOC9 0x00000009UL /**< Mode LOC9 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 672 #define _LEUART_ROUTELOC0_RXLOC_LOC10 0x0000000AUL /**< Mode LOC10 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 673 #define _LEUART_ROUTELOC0_RXLOC_LOC11 0x0000000BUL /**< Mode LOC11 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 674 #define _LEUART_ROUTELOC0_RXLOC_LOC12 0x0000000CUL /**< Mode LOC12 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 675 #define _LEUART_ROUTELOC0_RXLOC_LOC13 0x0000000DUL /**< Mode LOC13 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 676 #define _LEUART_ROUTELOC0_RXLOC_LOC14 0x0000000EUL /**< Mode LOC14 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 677 #define _LEUART_ROUTELOC0_RXLOC_LOC15 0x0000000FUL /**< Mode LOC15 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 678 #define _LEUART_ROUTELOC0_RXLOC_LOC16 0x00000010UL /**< Mode LOC16 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 679 #define _LEUART_ROUTELOC0_RXLOC_LOC17 0x00000011UL /**< Mode LOC17 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 680 #define _LEUART_ROUTELOC0_RXLOC_LOC18 0x00000012UL /**< Mode LOC18 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 681 #define _LEUART_ROUTELOC0_RXLOC_LOC19 0x00000013UL /**< Mode LOC19 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 682 #define _LEUART_ROUTELOC0_RXLOC_LOC20 0x00000014UL /**< Mode LOC20 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 683 #define _LEUART_ROUTELOC0_RXLOC_LOC21 0x00000015UL /**< Mode LOC21 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 684 #define _LEUART_ROUTELOC0_RXLOC_LOC22 0x00000016UL /**< Mode LOC22 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 685 #define _LEUART_ROUTELOC0_RXLOC_LOC23 0x00000017UL /**< Mode LOC23 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 686 #define _LEUART_ROUTELOC0_RXLOC_LOC24 0x00000018UL /**< Mode LOC24 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 687 #define _LEUART_ROUTELOC0_RXLOC_LOC25 0x00000019UL /**< Mode LOC25 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 688 #define _LEUART_ROUTELOC0_RXLOC_LOC26 0x0000001AUL /**< Mode LOC26 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 689 #define _LEUART_ROUTELOC0_RXLOC_LOC27 0x0000001BUL /**< Mode LOC27 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 690 #define _LEUART_ROUTELOC0_RXLOC_LOC28 0x0000001CUL /**< Mode LOC28 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 691 #define _LEUART_ROUTELOC0_RXLOC_LOC29 0x0000001DUL /**< Mode LOC29 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 692 #define _LEUART_ROUTELOC0_RXLOC_LOC30 0x0000001EUL /**< Mode LOC30 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 693 #define _LEUART_ROUTELOC0_RXLOC_LOC31 0x0000001FUL /**< Mode LOC31 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 694 #define LEUART_ROUTELOC0_RXLOC_LOC0 (_LEUART_ROUTELOC0_RXLOC_LOC0 << 0) /**< Shifted mode LOC0 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 695 #define LEUART_ROUTELOC0_RXLOC_DEFAULT (_LEUART_ROUTELOC0_RXLOC_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 696 #define LEUART_ROUTELOC0_RXLOC_LOC1 (_LEUART_ROUTELOC0_RXLOC_LOC1 << 0) /**< Shifted mode LOC1 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 697 #define LEUART_ROUTELOC0_RXLOC_LOC2 (_LEUART_ROUTELOC0_RXLOC_LOC2 << 0) /**< Shifted mode LOC2 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 698 #define LEUART_ROUTELOC0_RXLOC_LOC3 (_LEUART_ROUTELOC0_RXLOC_LOC3 << 0) /**< Shifted mode LOC3 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 699 #define LEUART_ROUTELOC0_RXLOC_LOC4 (_LEUART_ROUTELOC0_RXLOC_LOC4 << 0) /**< Shifted mode LOC4 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 700 #define LEUART_ROUTELOC0_RXLOC_LOC5 (_LEUART_ROUTELOC0_RXLOC_LOC5 << 0) /**< Shifted mode LOC5 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 701 #define LEUART_ROUTELOC0_RXLOC_LOC6 (_LEUART_ROUTELOC0_RXLOC_LOC6 << 0) /**< Shifted mode LOC6 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 702 #define LEUART_ROUTELOC0_RXLOC_LOC7 (_LEUART_ROUTELOC0_RXLOC_LOC7 << 0) /**< Shifted mode LOC7 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 703 #define LEUART_ROUTELOC0_RXLOC_LOC8 (_LEUART_ROUTELOC0_RXLOC_LOC8 << 0) /**< Shifted mode LOC8 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 704 #define LEUART_ROUTELOC0_RXLOC_LOC9 (_LEUART_ROUTELOC0_RXLOC_LOC9 << 0) /**< Shifted mode LOC9 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 705 #define LEUART_ROUTELOC0_RXLOC_LOC10 (_LEUART_ROUTELOC0_RXLOC_LOC10 << 0) /**< Shifted mode LOC10 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 706 #define LEUART_ROUTELOC0_RXLOC_LOC11 (_LEUART_ROUTELOC0_RXLOC_LOC11 << 0) /**< Shifted mode LOC11 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 707 #define LEUART_ROUTELOC0_RXLOC_LOC12 (_LEUART_ROUTELOC0_RXLOC_LOC12 << 0) /**< Shifted mode LOC12 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 708 #define LEUART_ROUTELOC0_RXLOC_LOC13 (_LEUART_ROUTELOC0_RXLOC_LOC13 << 0) /**< Shifted mode LOC13 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 709 #define LEUART_ROUTELOC0_RXLOC_LOC14 (_LEUART_ROUTELOC0_RXLOC_LOC14 << 0) /**< Shifted mode LOC14 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 710 #define LEUART_ROUTELOC0_RXLOC_LOC15 (_LEUART_ROUTELOC0_RXLOC_LOC15 << 0) /**< Shifted mode LOC15 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 711 #define LEUART_ROUTELOC0_RXLOC_LOC16 (_LEUART_ROUTELOC0_RXLOC_LOC16 << 0) /**< Shifted mode LOC16 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 712 #define LEUART_ROUTELOC0_RXLOC_LOC17 (_LEUART_ROUTELOC0_RXLOC_LOC17 << 0) /**< Shifted mode LOC17 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 713 #define LEUART_ROUTELOC0_RXLOC_LOC18 (_LEUART_ROUTELOC0_RXLOC_LOC18 << 0) /**< Shifted mode LOC18 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 714 #define LEUART_ROUTELOC0_RXLOC_LOC19 (_LEUART_ROUTELOC0_RXLOC_LOC19 << 0) /**< Shifted mode LOC19 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 715 #define LEUART_ROUTELOC0_RXLOC_LOC20 (_LEUART_ROUTELOC0_RXLOC_LOC20 << 0) /**< Shifted mode LOC20 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 716 #define LEUART_ROUTELOC0_RXLOC_LOC21 (_LEUART_ROUTELOC0_RXLOC_LOC21 << 0) /**< Shifted mode LOC21 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 717 #define LEUART_ROUTELOC0_RXLOC_LOC22 (_LEUART_ROUTELOC0_RXLOC_LOC22 << 0) /**< Shifted mode LOC22 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 718 #define LEUART_ROUTELOC0_RXLOC_LOC23 (_LEUART_ROUTELOC0_RXLOC_LOC23 << 0) /**< Shifted mode LOC23 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 719 #define LEUART_ROUTELOC0_RXLOC_LOC24 (_LEUART_ROUTELOC0_RXLOC_LOC24 << 0) /**< Shifted mode LOC24 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 720 #define LEUART_ROUTELOC0_RXLOC_LOC25 (_LEUART_ROUTELOC0_RXLOC_LOC25 << 0) /**< Shifted mode LOC25 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 721 #define LEUART_ROUTELOC0_RXLOC_LOC26 (_LEUART_ROUTELOC0_RXLOC_LOC26 << 0) /**< Shifted mode LOC26 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 722 #define LEUART_ROUTELOC0_RXLOC_LOC27 (_LEUART_ROUTELOC0_RXLOC_LOC27 << 0) /**< Shifted mode LOC27 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 723 #define LEUART_ROUTELOC0_RXLOC_LOC28 (_LEUART_ROUTELOC0_RXLOC_LOC28 << 0) /**< Shifted mode LOC28 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 724 #define LEUART_ROUTELOC0_RXLOC_LOC29 (_LEUART_ROUTELOC0_RXLOC_LOC29 << 0) /**< Shifted mode LOC29 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 725 #define LEUART_ROUTELOC0_RXLOC_LOC30 (_LEUART_ROUTELOC0_RXLOC_LOC30 << 0) /**< Shifted mode LOC30 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 726 #define LEUART_ROUTELOC0_RXLOC_LOC31 (_LEUART_ROUTELOC0_RXLOC_LOC31 << 0) /**< Shifted mode LOC31 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 727 #define _LEUART_ROUTELOC0_TXLOC_SHIFT 8 /**< Shift value for LEUART_TXLOC */
sahilmgandhi 18:6a4db94011d3 728 #define _LEUART_ROUTELOC0_TXLOC_MASK 0x1F00UL /**< Bit mask for LEUART_TXLOC */
sahilmgandhi 18:6a4db94011d3 729 #define _LEUART_ROUTELOC0_TXLOC_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 730 #define _LEUART_ROUTELOC0_TXLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 731 #define _LEUART_ROUTELOC0_TXLOC_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 732 #define _LEUART_ROUTELOC0_TXLOC_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 733 #define _LEUART_ROUTELOC0_TXLOC_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 734 #define _LEUART_ROUTELOC0_TXLOC_LOC4 0x00000004UL /**< Mode LOC4 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 735 #define _LEUART_ROUTELOC0_TXLOC_LOC5 0x00000005UL /**< Mode LOC5 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 736 #define _LEUART_ROUTELOC0_TXLOC_LOC6 0x00000006UL /**< Mode LOC6 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 737 #define _LEUART_ROUTELOC0_TXLOC_LOC7 0x00000007UL /**< Mode LOC7 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 738 #define _LEUART_ROUTELOC0_TXLOC_LOC8 0x00000008UL /**< Mode LOC8 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 739 #define _LEUART_ROUTELOC0_TXLOC_LOC9 0x00000009UL /**< Mode LOC9 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 740 #define _LEUART_ROUTELOC0_TXLOC_LOC10 0x0000000AUL /**< Mode LOC10 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 741 #define _LEUART_ROUTELOC0_TXLOC_LOC11 0x0000000BUL /**< Mode LOC11 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 742 #define _LEUART_ROUTELOC0_TXLOC_LOC12 0x0000000CUL /**< Mode LOC12 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 743 #define _LEUART_ROUTELOC0_TXLOC_LOC13 0x0000000DUL /**< Mode LOC13 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 744 #define _LEUART_ROUTELOC0_TXLOC_LOC14 0x0000000EUL /**< Mode LOC14 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 745 #define _LEUART_ROUTELOC0_TXLOC_LOC15 0x0000000FUL /**< Mode LOC15 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 746 #define _LEUART_ROUTELOC0_TXLOC_LOC16 0x00000010UL /**< Mode LOC16 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 747 #define _LEUART_ROUTELOC0_TXLOC_LOC17 0x00000011UL /**< Mode LOC17 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 748 #define _LEUART_ROUTELOC0_TXLOC_LOC18 0x00000012UL /**< Mode LOC18 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 749 #define _LEUART_ROUTELOC0_TXLOC_LOC19 0x00000013UL /**< Mode LOC19 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 750 #define _LEUART_ROUTELOC0_TXLOC_LOC20 0x00000014UL /**< Mode LOC20 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 751 #define _LEUART_ROUTELOC0_TXLOC_LOC21 0x00000015UL /**< Mode LOC21 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 752 #define _LEUART_ROUTELOC0_TXLOC_LOC22 0x00000016UL /**< Mode LOC22 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 753 #define _LEUART_ROUTELOC0_TXLOC_LOC23 0x00000017UL /**< Mode LOC23 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 754 #define _LEUART_ROUTELOC0_TXLOC_LOC24 0x00000018UL /**< Mode LOC24 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 755 #define _LEUART_ROUTELOC0_TXLOC_LOC25 0x00000019UL /**< Mode LOC25 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 756 #define _LEUART_ROUTELOC0_TXLOC_LOC26 0x0000001AUL /**< Mode LOC26 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 757 #define _LEUART_ROUTELOC0_TXLOC_LOC27 0x0000001BUL /**< Mode LOC27 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 758 #define _LEUART_ROUTELOC0_TXLOC_LOC28 0x0000001CUL /**< Mode LOC28 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 759 #define _LEUART_ROUTELOC0_TXLOC_LOC29 0x0000001DUL /**< Mode LOC29 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 760 #define _LEUART_ROUTELOC0_TXLOC_LOC30 0x0000001EUL /**< Mode LOC30 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 761 #define _LEUART_ROUTELOC0_TXLOC_LOC31 0x0000001FUL /**< Mode LOC31 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 762 #define LEUART_ROUTELOC0_TXLOC_LOC0 (_LEUART_ROUTELOC0_TXLOC_LOC0 << 8) /**< Shifted mode LOC0 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 763 #define LEUART_ROUTELOC0_TXLOC_DEFAULT (_LEUART_ROUTELOC0_TXLOC_DEFAULT << 8) /**< Shifted mode DEFAULT for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 764 #define LEUART_ROUTELOC0_TXLOC_LOC1 (_LEUART_ROUTELOC0_TXLOC_LOC1 << 8) /**< Shifted mode LOC1 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 765 #define LEUART_ROUTELOC0_TXLOC_LOC2 (_LEUART_ROUTELOC0_TXLOC_LOC2 << 8) /**< Shifted mode LOC2 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 766 #define LEUART_ROUTELOC0_TXLOC_LOC3 (_LEUART_ROUTELOC0_TXLOC_LOC3 << 8) /**< Shifted mode LOC3 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 767 #define LEUART_ROUTELOC0_TXLOC_LOC4 (_LEUART_ROUTELOC0_TXLOC_LOC4 << 8) /**< Shifted mode LOC4 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 768 #define LEUART_ROUTELOC0_TXLOC_LOC5 (_LEUART_ROUTELOC0_TXLOC_LOC5 << 8) /**< Shifted mode LOC5 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 769 #define LEUART_ROUTELOC0_TXLOC_LOC6 (_LEUART_ROUTELOC0_TXLOC_LOC6 << 8) /**< Shifted mode LOC6 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 770 #define LEUART_ROUTELOC0_TXLOC_LOC7 (_LEUART_ROUTELOC0_TXLOC_LOC7 << 8) /**< Shifted mode LOC7 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 771 #define LEUART_ROUTELOC0_TXLOC_LOC8 (_LEUART_ROUTELOC0_TXLOC_LOC8 << 8) /**< Shifted mode LOC8 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 772 #define LEUART_ROUTELOC0_TXLOC_LOC9 (_LEUART_ROUTELOC0_TXLOC_LOC9 << 8) /**< Shifted mode LOC9 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 773 #define LEUART_ROUTELOC0_TXLOC_LOC10 (_LEUART_ROUTELOC0_TXLOC_LOC10 << 8) /**< Shifted mode LOC10 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 774 #define LEUART_ROUTELOC0_TXLOC_LOC11 (_LEUART_ROUTELOC0_TXLOC_LOC11 << 8) /**< Shifted mode LOC11 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 775 #define LEUART_ROUTELOC0_TXLOC_LOC12 (_LEUART_ROUTELOC0_TXLOC_LOC12 << 8) /**< Shifted mode LOC12 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 776 #define LEUART_ROUTELOC0_TXLOC_LOC13 (_LEUART_ROUTELOC0_TXLOC_LOC13 << 8) /**< Shifted mode LOC13 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 777 #define LEUART_ROUTELOC0_TXLOC_LOC14 (_LEUART_ROUTELOC0_TXLOC_LOC14 << 8) /**< Shifted mode LOC14 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 778 #define LEUART_ROUTELOC0_TXLOC_LOC15 (_LEUART_ROUTELOC0_TXLOC_LOC15 << 8) /**< Shifted mode LOC15 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 779 #define LEUART_ROUTELOC0_TXLOC_LOC16 (_LEUART_ROUTELOC0_TXLOC_LOC16 << 8) /**< Shifted mode LOC16 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 780 #define LEUART_ROUTELOC0_TXLOC_LOC17 (_LEUART_ROUTELOC0_TXLOC_LOC17 << 8) /**< Shifted mode LOC17 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 781 #define LEUART_ROUTELOC0_TXLOC_LOC18 (_LEUART_ROUTELOC0_TXLOC_LOC18 << 8) /**< Shifted mode LOC18 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 782 #define LEUART_ROUTELOC0_TXLOC_LOC19 (_LEUART_ROUTELOC0_TXLOC_LOC19 << 8) /**< Shifted mode LOC19 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 783 #define LEUART_ROUTELOC0_TXLOC_LOC20 (_LEUART_ROUTELOC0_TXLOC_LOC20 << 8) /**< Shifted mode LOC20 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 784 #define LEUART_ROUTELOC0_TXLOC_LOC21 (_LEUART_ROUTELOC0_TXLOC_LOC21 << 8) /**< Shifted mode LOC21 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 785 #define LEUART_ROUTELOC0_TXLOC_LOC22 (_LEUART_ROUTELOC0_TXLOC_LOC22 << 8) /**< Shifted mode LOC22 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 786 #define LEUART_ROUTELOC0_TXLOC_LOC23 (_LEUART_ROUTELOC0_TXLOC_LOC23 << 8) /**< Shifted mode LOC23 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 787 #define LEUART_ROUTELOC0_TXLOC_LOC24 (_LEUART_ROUTELOC0_TXLOC_LOC24 << 8) /**< Shifted mode LOC24 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 788 #define LEUART_ROUTELOC0_TXLOC_LOC25 (_LEUART_ROUTELOC0_TXLOC_LOC25 << 8) /**< Shifted mode LOC25 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 789 #define LEUART_ROUTELOC0_TXLOC_LOC26 (_LEUART_ROUTELOC0_TXLOC_LOC26 << 8) /**< Shifted mode LOC26 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 790 #define LEUART_ROUTELOC0_TXLOC_LOC27 (_LEUART_ROUTELOC0_TXLOC_LOC27 << 8) /**< Shifted mode LOC27 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 791 #define LEUART_ROUTELOC0_TXLOC_LOC28 (_LEUART_ROUTELOC0_TXLOC_LOC28 << 8) /**< Shifted mode LOC28 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 792 #define LEUART_ROUTELOC0_TXLOC_LOC29 (_LEUART_ROUTELOC0_TXLOC_LOC29 << 8) /**< Shifted mode LOC29 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 793 #define LEUART_ROUTELOC0_TXLOC_LOC30 (_LEUART_ROUTELOC0_TXLOC_LOC30 << 8) /**< Shifted mode LOC30 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 794 #define LEUART_ROUTELOC0_TXLOC_LOC31 (_LEUART_ROUTELOC0_TXLOC_LOC31 << 8) /**< Shifted mode LOC31 for LEUART_ROUTELOC0 */
sahilmgandhi 18:6a4db94011d3 795
sahilmgandhi 18:6a4db94011d3 796 /* Bit fields for LEUART INPUT */
sahilmgandhi 18:6a4db94011d3 797 #define _LEUART_INPUT_RESETVALUE 0x00000000UL /**< Default value for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 798 #define _LEUART_INPUT_MASK 0x0000002FUL /**< Mask for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 799 #define _LEUART_INPUT_RXPRSSEL_SHIFT 0 /**< Shift value for LEUART_RXPRSSEL */
sahilmgandhi 18:6a4db94011d3 800 #define _LEUART_INPUT_RXPRSSEL_MASK 0xFUL /**< Bit mask for LEUART_RXPRSSEL */
sahilmgandhi 18:6a4db94011d3 801 #define _LEUART_INPUT_RXPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 802 #define _LEUART_INPUT_RXPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 803 #define _LEUART_INPUT_RXPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 804 #define _LEUART_INPUT_RXPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 805 #define _LEUART_INPUT_RXPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 806 #define _LEUART_INPUT_RXPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 807 #define _LEUART_INPUT_RXPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 808 #define _LEUART_INPUT_RXPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 809 #define _LEUART_INPUT_RXPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 810 #define _LEUART_INPUT_RXPRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 811 #define _LEUART_INPUT_RXPRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 812 #define _LEUART_INPUT_RXPRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 813 #define _LEUART_INPUT_RXPRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 814 #define LEUART_INPUT_RXPRSSEL_DEFAULT (_LEUART_INPUT_RXPRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 815 #define LEUART_INPUT_RXPRSSEL_PRSCH0 (_LEUART_INPUT_RXPRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 816 #define LEUART_INPUT_RXPRSSEL_PRSCH1 (_LEUART_INPUT_RXPRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 817 #define LEUART_INPUT_RXPRSSEL_PRSCH2 (_LEUART_INPUT_RXPRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 818 #define LEUART_INPUT_RXPRSSEL_PRSCH3 (_LEUART_INPUT_RXPRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 819 #define LEUART_INPUT_RXPRSSEL_PRSCH4 (_LEUART_INPUT_RXPRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 820 #define LEUART_INPUT_RXPRSSEL_PRSCH5 (_LEUART_INPUT_RXPRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 821 #define LEUART_INPUT_RXPRSSEL_PRSCH6 (_LEUART_INPUT_RXPRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 822 #define LEUART_INPUT_RXPRSSEL_PRSCH7 (_LEUART_INPUT_RXPRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 823 #define LEUART_INPUT_RXPRSSEL_PRSCH8 (_LEUART_INPUT_RXPRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 824 #define LEUART_INPUT_RXPRSSEL_PRSCH9 (_LEUART_INPUT_RXPRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 825 #define LEUART_INPUT_RXPRSSEL_PRSCH10 (_LEUART_INPUT_RXPRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 826 #define LEUART_INPUT_RXPRSSEL_PRSCH11 (_LEUART_INPUT_RXPRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 827 #define LEUART_INPUT_RXPRS (0x1UL << 5) /**< PRS RX Enable */
sahilmgandhi 18:6a4db94011d3 828 #define _LEUART_INPUT_RXPRS_SHIFT 5 /**< Shift value for LEUART_RXPRS */
sahilmgandhi 18:6a4db94011d3 829 #define _LEUART_INPUT_RXPRS_MASK 0x20UL /**< Bit mask for LEUART_RXPRS */
sahilmgandhi 18:6a4db94011d3 830 #define _LEUART_INPUT_RXPRS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 831 #define LEUART_INPUT_RXPRS_DEFAULT (_LEUART_INPUT_RXPRS_DEFAULT << 5) /**< Shifted mode DEFAULT for LEUART_INPUT */
sahilmgandhi 18:6a4db94011d3 832
sahilmgandhi 18:6a4db94011d3 833 /** @} End of group EFR32MG1P_LEUART */
sahilmgandhi 18:6a4db94011d3 834 /** @} End of group Parts */
sahilmgandhi 18:6a4db94011d3 835