MacroRat
Mouse code for the MacroRat
mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
| sahilmgandhi | 18:6a4db94011d3 | 3 | * @file stm32f4xx_hal_dfsdm.h |
| sahilmgandhi | 18:6a4db94011d3 | 4 | * @author MCD Application Team |
| sahilmgandhi | 18:6a4db94011d3 | 5 | * @version V1.5.0 |
| sahilmgandhi | 18:6a4db94011d3 | 6 | * @date 06-May-2016 |
| sahilmgandhi | 18:6a4db94011d3 | 7 | * @brief Header file of DFSDM HAL module. |
| sahilmgandhi | 18:6a4db94011d3 | 8 | ****************************************************************************** |
| sahilmgandhi | 18:6a4db94011d3 | 9 | * @attention |
| sahilmgandhi | 18:6a4db94011d3 | 10 | * |
| sahilmgandhi | 18:6a4db94011d3 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| sahilmgandhi | 18:6a4db94011d3 | 12 | * |
| sahilmgandhi | 18:6a4db94011d3 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| sahilmgandhi | 18:6a4db94011d3 | 14 | * are permitted provided that the following conditions are met: |
| sahilmgandhi | 18:6a4db94011d3 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| sahilmgandhi | 18:6a4db94011d3 | 16 | * this list of conditions and the following disclaimer. |
| sahilmgandhi | 18:6a4db94011d3 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| sahilmgandhi | 18:6a4db94011d3 | 18 | * this list of conditions and the following disclaimer in the documentation |
| sahilmgandhi | 18:6a4db94011d3 | 19 | * and/or other materials provided with the distribution. |
| sahilmgandhi | 18:6a4db94011d3 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| sahilmgandhi | 18:6a4db94011d3 | 21 | * may be used to endorse or promote products derived from this software |
| sahilmgandhi | 18:6a4db94011d3 | 22 | * without specific prior written permission. |
| sahilmgandhi | 18:6a4db94011d3 | 23 | * |
| sahilmgandhi | 18:6a4db94011d3 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| sahilmgandhi | 18:6a4db94011d3 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| sahilmgandhi | 18:6a4db94011d3 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| sahilmgandhi | 18:6a4db94011d3 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| sahilmgandhi | 18:6a4db94011d3 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| sahilmgandhi | 18:6a4db94011d3 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| sahilmgandhi | 18:6a4db94011d3 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| sahilmgandhi | 18:6a4db94011d3 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| sahilmgandhi | 18:6a4db94011d3 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| sahilmgandhi | 18:6a4db94011d3 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| sahilmgandhi | 18:6a4db94011d3 | 34 | * |
| sahilmgandhi | 18:6a4db94011d3 | 35 | ****************************************************************************** |
| sahilmgandhi | 18:6a4db94011d3 | 36 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 37 | |
| sahilmgandhi | 18:6a4db94011d3 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 39 | #ifndef __STM32F4xx_HAL_DFSDM_H |
| sahilmgandhi | 18:6a4db94011d3 | 40 | #define __STM32F4xx_HAL_DFSDM_H |
| sahilmgandhi | 18:6a4db94011d3 | 41 | |
| sahilmgandhi | 18:6a4db94011d3 | 42 | #ifdef __cplusplus |
| sahilmgandhi | 18:6a4db94011d3 | 43 | extern "C" { |
| sahilmgandhi | 18:6a4db94011d3 | 44 | #endif |
| sahilmgandhi | 18:6a4db94011d3 | 45 | |
| sahilmgandhi | 18:6a4db94011d3 | 46 | #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) |
| sahilmgandhi | 18:6a4db94011d3 | 47 | /* Includes ------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 48 | #include "stm32f4xx_hal_def.h" |
| sahilmgandhi | 18:6a4db94011d3 | 49 | |
| sahilmgandhi | 18:6a4db94011d3 | 50 | /** @addtogroup STM32F4xx_HAL_Driver |
| sahilmgandhi | 18:6a4db94011d3 | 51 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 52 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 53 | |
| sahilmgandhi | 18:6a4db94011d3 | 54 | /** @addtogroup DFSDM |
| sahilmgandhi | 18:6a4db94011d3 | 55 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 56 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 57 | |
| sahilmgandhi | 18:6a4db94011d3 | 58 | /* Exported types ------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 59 | /** @defgroup DFSDM_Exported_Types DFSDM Exported Types |
| sahilmgandhi | 18:6a4db94011d3 | 60 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 61 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 62 | |
| sahilmgandhi | 18:6a4db94011d3 | 63 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 64 | * @brief HAL DFSDM Channel states definition |
| sahilmgandhi | 18:6a4db94011d3 | 65 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 66 | typedef enum |
| sahilmgandhi | 18:6a4db94011d3 | 67 | { |
| sahilmgandhi | 18:6a4db94011d3 | 68 | HAL_DFSDM_CHANNEL_STATE_RESET = 0x00U, /*!< DFSDM channel not initialized */ |
| sahilmgandhi | 18:6a4db94011d3 | 69 | HAL_DFSDM_CHANNEL_STATE_READY = 0x01U, /*!< DFSDM channel initialized and ready for use */ |
| sahilmgandhi | 18:6a4db94011d3 | 70 | HAL_DFSDM_CHANNEL_STATE_ERROR = 0xFFU /*!< DFSDM channel state error */ |
| sahilmgandhi | 18:6a4db94011d3 | 71 | }HAL_DFSDM_Channel_StateTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 72 | |
| sahilmgandhi | 18:6a4db94011d3 | 73 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 74 | * @brief DFSDM channel output clock structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 75 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 76 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 77 | { |
| sahilmgandhi | 18:6a4db94011d3 | 78 | FunctionalState Activation; /*!< Output clock enable/disable */ |
| sahilmgandhi | 18:6a4db94011d3 | 79 | uint32_t Selection; /*!< Output clock is system clock or audio clock. |
| sahilmgandhi | 18:6a4db94011d3 | 80 | This parameter can be a value of @ref DFSDM_Channel_OuputClock */ |
| sahilmgandhi | 18:6a4db94011d3 | 81 | uint32_t Divider; /*!< Output clock divider. |
| sahilmgandhi | 18:6a4db94011d3 | 82 | This parameter must be a number between Min_Data = 2 and Max_Data = 256 */ |
| sahilmgandhi | 18:6a4db94011d3 | 83 | }DFSDM_Channel_OutputClockTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 84 | |
| sahilmgandhi | 18:6a4db94011d3 | 85 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 86 | * @brief DFSDM channel input structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 87 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 88 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 89 | { |
| sahilmgandhi | 18:6a4db94011d3 | 90 | uint32_t Multiplexer; /*!< Input is external serial inputs or internal register. |
| sahilmgandhi | 18:6a4db94011d3 | 91 | This parameter can be a value of @ref DFSDM_Channel_InputMultiplexer */ |
| sahilmgandhi | 18:6a4db94011d3 | 92 | uint32_t DataPacking; /*!< Standard, interleaved or dual mode for internal register. |
| sahilmgandhi | 18:6a4db94011d3 | 93 | This parameter can be a value of @ref DFSDM_Channel_DataPacking */ |
| sahilmgandhi | 18:6a4db94011d3 | 94 | uint32_t Pins; /*!< Input pins are taken from same or following channel. |
| sahilmgandhi | 18:6a4db94011d3 | 95 | This parameter can be a value of @ref DFSDM_Channel_InputPins */ |
| sahilmgandhi | 18:6a4db94011d3 | 96 | }DFSDM_Channel_InputTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 97 | |
| sahilmgandhi | 18:6a4db94011d3 | 98 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 99 | * @brief DFSDM channel serial interface structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 100 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 101 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 102 | { |
| sahilmgandhi | 18:6a4db94011d3 | 103 | uint32_t Type; /*!< SPI or Manchester modes. |
| sahilmgandhi | 18:6a4db94011d3 | 104 | This parameter can be a value of @ref DFSDM_Channel_SerialInterfaceType */ |
| sahilmgandhi | 18:6a4db94011d3 | 105 | uint32_t SpiClock; /*!< SPI clock select (external or internal with different sampling point). |
| sahilmgandhi | 18:6a4db94011d3 | 106 | This parameter can be a value of @ref DFSDM_Channel_SpiClock */ |
| sahilmgandhi | 18:6a4db94011d3 | 107 | }DFSDM_Channel_SerialInterfaceTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 108 | |
| sahilmgandhi | 18:6a4db94011d3 | 109 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 110 | * @brief DFSDM channel analog watchdog structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 111 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 112 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 113 | { |
| sahilmgandhi | 18:6a4db94011d3 | 114 | uint32_t FilterOrder; /*!< Analog watchdog Sinc filter order. |
| sahilmgandhi | 18:6a4db94011d3 | 115 | This parameter can be a value of @ref DFSDM_Channel_AwdFilterOrder */ |
| sahilmgandhi | 18:6a4db94011d3 | 116 | uint32_t Oversampling; /*!< Analog watchdog filter oversampling ratio. |
| sahilmgandhi | 18:6a4db94011d3 | 117 | This parameter must be a number between Min_Data = 1 and Max_Data = 32 */ |
| sahilmgandhi | 18:6a4db94011d3 | 118 | }DFSDM_Channel_AwdTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 119 | |
| sahilmgandhi | 18:6a4db94011d3 | 120 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 121 | * @brief DFSDM channel init structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 122 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 123 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 124 | { |
| sahilmgandhi | 18:6a4db94011d3 | 125 | DFSDM_Channel_OutputClockTypeDef OutputClock; /*!< DFSDM channel output clock parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 126 | DFSDM_Channel_InputTypeDef Input; /*!< DFSDM channel input parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 127 | DFSDM_Channel_SerialInterfaceTypeDef SerialInterface; /*!< DFSDM channel serial interface parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 128 | DFSDM_Channel_AwdTypeDef Awd; /*!< DFSDM channel analog watchdog parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 129 | int32_t Offset; /*!< DFSDM channel offset. |
| sahilmgandhi | 18:6a4db94011d3 | 130 | This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */ |
| sahilmgandhi | 18:6a4db94011d3 | 131 | uint32_t RightBitShift; /*!< DFSDM channel right bit shift. |
| sahilmgandhi | 18:6a4db94011d3 | 132 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F */ |
| sahilmgandhi | 18:6a4db94011d3 | 133 | }DFSDM_Channel_InitTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 134 | |
| sahilmgandhi | 18:6a4db94011d3 | 135 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 136 | * @brief DFSDM channel handle structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 137 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 138 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 139 | { |
| sahilmgandhi | 18:6a4db94011d3 | 140 | DFSDM_Channel_TypeDef *Instance; /*!< DFSDM channel instance */ |
| sahilmgandhi | 18:6a4db94011d3 | 141 | DFSDM_Channel_InitTypeDef Init; /*!< DFSDM channel init parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 142 | HAL_DFSDM_Channel_StateTypeDef State; /*!< DFSDM channel state */ |
| sahilmgandhi | 18:6a4db94011d3 | 143 | }DFSDM_Channel_HandleTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 144 | |
| sahilmgandhi | 18:6a4db94011d3 | 145 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 146 | * @brief HAL DFSDM Filter states definition |
| sahilmgandhi | 18:6a4db94011d3 | 147 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 148 | typedef enum |
| sahilmgandhi | 18:6a4db94011d3 | 149 | { |
| sahilmgandhi | 18:6a4db94011d3 | 150 | HAL_DFSDM_FILTER_STATE_RESET = 0x00U, /*!< DFSDM filter not initialized */ |
| sahilmgandhi | 18:6a4db94011d3 | 151 | HAL_DFSDM_FILTER_STATE_READY = 0x01U, /*!< DFSDM filter initialized and ready for use */ |
| sahilmgandhi | 18:6a4db94011d3 | 152 | HAL_DFSDM_FILTER_STATE_REG = 0x02U, /*!< DFSDM filter regular conversion in progress */ |
| sahilmgandhi | 18:6a4db94011d3 | 153 | HAL_DFSDM_FILTER_STATE_INJ = 0x03U, /*!< DFSDM filter injected conversion in progress */ |
| sahilmgandhi | 18:6a4db94011d3 | 154 | HAL_DFSDM_FILTER_STATE_REG_INJ = 0x04U, /*!< DFSDM filter regular and injected conversions in progress */ |
| sahilmgandhi | 18:6a4db94011d3 | 155 | HAL_DFSDM_FILTER_STATE_ERROR = 0xFFU /*!< DFSDM filter state error */ |
| sahilmgandhi | 18:6a4db94011d3 | 156 | }HAL_DFSDM_Filter_StateTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 157 | |
| sahilmgandhi | 18:6a4db94011d3 | 158 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 159 | * @brief DFSDM filter regular conversion parameters structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 160 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 161 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 162 | { |
| sahilmgandhi | 18:6a4db94011d3 | 163 | uint32_t Trigger; /*!< Trigger used to start regular conversion: software or synchronous. |
| sahilmgandhi | 18:6a4db94011d3 | 164 | This parameter can be a value of @ref DFSDM_Filter_Trigger */ |
| sahilmgandhi | 18:6a4db94011d3 | 165 | FunctionalState FastMode; /*!< Enable/disable fast mode for regular conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 166 | FunctionalState DmaMode; /*!< Enable/disable DMA for regular conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 167 | }DFSDM_Filter_RegularParamTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 168 | |
| sahilmgandhi | 18:6a4db94011d3 | 169 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 170 | * @brief DFSDM filter injected conversion parameters structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 171 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 172 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 173 | { |
| sahilmgandhi | 18:6a4db94011d3 | 174 | uint32_t Trigger; /*!< Trigger used to start injected conversion: software, external or synchronous. |
| sahilmgandhi | 18:6a4db94011d3 | 175 | This parameter can be a value of @ref DFSDM_Filter_Trigger */ |
| sahilmgandhi | 18:6a4db94011d3 | 176 | FunctionalState ScanMode; /*!< Enable/disable scanning mode for injected conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 177 | FunctionalState DmaMode; /*!< Enable/disable DMA for injected conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 178 | uint32_t ExtTrigger; /*!< External trigger. |
| sahilmgandhi | 18:6a4db94011d3 | 179 | This parameter can be a value of @ref DFSDM_Filter_ExtTrigger */ |
| sahilmgandhi | 18:6a4db94011d3 | 180 | uint32_t ExtTriggerEdge; /*!< External trigger edge: rising, falling or both. |
| sahilmgandhi | 18:6a4db94011d3 | 181 | This parameter can be a value of @ref DFSDM_Filter_ExtTriggerEdge */ |
| sahilmgandhi | 18:6a4db94011d3 | 182 | }DFSDM_Filter_InjectedParamTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 183 | |
| sahilmgandhi | 18:6a4db94011d3 | 184 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 185 | * @brief DFSDM filter parameters structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 186 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 187 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 188 | { |
| sahilmgandhi | 18:6a4db94011d3 | 189 | uint32_t SincOrder; /*!< Sinc filter order. |
| sahilmgandhi | 18:6a4db94011d3 | 190 | This parameter can be a value of @ref DFSDM_Filter_SincOrder */ |
| sahilmgandhi | 18:6a4db94011d3 | 191 | uint32_t Oversampling; /*!< Filter oversampling ratio. |
| sahilmgandhi | 18:6a4db94011d3 | 192 | This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */ |
| sahilmgandhi | 18:6a4db94011d3 | 193 | uint32_t IntOversampling; /*!< Integrator oversampling ratio. |
| sahilmgandhi | 18:6a4db94011d3 | 194 | This parameter must be a number between Min_Data = 1 and Max_Data = 256 */ |
| sahilmgandhi | 18:6a4db94011d3 | 195 | }DFSDM_Filter_FilterParamTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 196 | |
| sahilmgandhi | 18:6a4db94011d3 | 197 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 198 | * @brief DFSDM filter init structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 199 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 200 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 201 | { |
| sahilmgandhi | 18:6a4db94011d3 | 202 | DFSDM_Filter_RegularParamTypeDef RegularParam; /*!< DFSDM regular conversion parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 203 | DFSDM_Filter_InjectedParamTypeDef InjectedParam; /*!< DFSDM injected conversion parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 204 | DFSDM_Filter_FilterParamTypeDef FilterParam; /*!< DFSDM filter parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 205 | }DFSDM_Filter_InitTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 206 | |
| sahilmgandhi | 18:6a4db94011d3 | 207 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 208 | * @brief DFSDM filter handle structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 209 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 210 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 211 | { |
| sahilmgandhi | 18:6a4db94011d3 | 212 | DFSDM_Filter_TypeDef *Instance; /*!< DFSDM filter instance */ |
| sahilmgandhi | 18:6a4db94011d3 | 213 | DFSDM_Filter_InitTypeDef Init; /*!< DFSDM filter init parameters */ |
| sahilmgandhi | 18:6a4db94011d3 | 214 | DMA_HandleTypeDef *hdmaReg; /*!< Pointer on DMA handler for regular conversions */ |
| sahilmgandhi | 18:6a4db94011d3 | 215 | DMA_HandleTypeDef *hdmaInj; /*!< Pointer on DMA handler for injected conversions */ |
| sahilmgandhi | 18:6a4db94011d3 | 216 | uint32_t RegularContMode; /*!< Regular conversion continuous mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 217 | uint32_t RegularTrigger; /*!< Trigger used for regular conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 218 | uint32_t InjectedTrigger; /*!< Trigger used for injected conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 219 | uint32_t ExtTriggerEdge; /*!< Rising, falling or both edges selected */ |
| sahilmgandhi | 18:6a4db94011d3 | 220 | FunctionalState InjectedScanMode; /*!< Injected scanning mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 221 | uint32_t InjectedChannelsNbr; /*!< Number of channels in injected sequence */ |
| sahilmgandhi | 18:6a4db94011d3 | 222 | uint32_t InjConvRemaining; /*!< Injected conversions remaining */ |
| sahilmgandhi | 18:6a4db94011d3 | 223 | HAL_DFSDM_Filter_StateTypeDef State; /*!< DFSDM filter state */ |
| sahilmgandhi | 18:6a4db94011d3 | 224 | uint32_t ErrorCode; /*!< DFSDM filter error code */ |
| sahilmgandhi | 18:6a4db94011d3 | 225 | }DFSDM_Filter_HandleTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 226 | |
| sahilmgandhi | 18:6a4db94011d3 | 227 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 228 | * @brief DFSDM filter analog watchdog parameters structure definition |
| sahilmgandhi | 18:6a4db94011d3 | 229 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 230 | typedef struct |
| sahilmgandhi | 18:6a4db94011d3 | 231 | { |
| sahilmgandhi | 18:6a4db94011d3 | 232 | uint32_t DataSource; /*!< Values from digital filter or from channel watchdog filter. |
| sahilmgandhi | 18:6a4db94011d3 | 233 | This parameter can be a value of @ref DFSDM_Filter_AwdDataSource */ |
| sahilmgandhi | 18:6a4db94011d3 | 234 | uint32_t Channel; /*!< Analog watchdog channel selection. |
| sahilmgandhi | 18:6a4db94011d3 | 235 | This parameter can be a values combination of @ref DFSDM_Channel_Selection */ |
| sahilmgandhi | 18:6a4db94011d3 | 236 | int32_t HighThreshold; /*!< High threshold for the analog watchdog. |
| sahilmgandhi | 18:6a4db94011d3 | 237 | This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */ |
| sahilmgandhi | 18:6a4db94011d3 | 238 | int32_t LowThreshold; /*!< Low threshold for the analog watchdog. |
| sahilmgandhi | 18:6a4db94011d3 | 239 | This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */ |
| sahilmgandhi | 18:6a4db94011d3 | 240 | uint32_t HighBreakSignal; /*!< Break signal assigned to analog watchdog high threshold event. |
| sahilmgandhi | 18:6a4db94011d3 | 241 | This parameter can be a values combination of @ref DFSDM_BreakSignals */ |
| sahilmgandhi | 18:6a4db94011d3 | 242 | uint32_t LowBreakSignal; /*!< Break signal assigned to analog watchdog low threshold event. |
| sahilmgandhi | 18:6a4db94011d3 | 243 | This parameter can be a values combination of @ref DFSDM_BreakSignals */ |
| sahilmgandhi | 18:6a4db94011d3 | 244 | }DFSDM_Filter_AwdParamTypeDef; |
| sahilmgandhi | 18:6a4db94011d3 | 245 | |
| sahilmgandhi | 18:6a4db94011d3 | 246 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 247 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 248 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 249 | /* End of exported types -----------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 250 | |
| sahilmgandhi | 18:6a4db94011d3 | 251 | /* Exported constants --------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 252 | /** @defgroup DFSDM_Exported_Constants DFSDM Exported Constants |
| sahilmgandhi | 18:6a4db94011d3 | 253 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 254 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 255 | |
| sahilmgandhi | 18:6a4db94011d3 | 256 | /** @defgroup DFSDM_Channel_OuputClock DFSDM channel output clock selection |
| sahilmgandhi | 18:6a4db94011d3 | 257 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 258 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 259 | #define DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM ((uint32_t)0x00000000U) /*!< Source for ouput clock is system clock */ |
| sahilmgandhi | 18:6a4db94011d3 | 260 | #define DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO DFSDM_CHCFGR1_CKOUTSRC /*!< Source for ouput clock is audio clock */ |
| sahilmgandhi | 18:6a4db94011d3 | 261 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 262 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 263 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 264 | |
| sahilmgandhi | 18:6a4db94011d3 | 265 | /** @defgroup DFSDM_Channel_InputMultiplexer DFSDM channel input multiplexer |
| sahilmgandhi | 18:6a4db94011d3 | 266 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 267 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 268 | #define DFSDM_CHANNEL_EXTERNAL_INPUTS ((uint32_t)0x00000000U) /*!< Data are taken from external inputs */ |
| sahilmgandhi | 18:6a4db94011d3 | 269 | #define DFSDM_CHANNEL_INTERNAL_REGISTER DFSDM_CHCFGR1_DATMPX_1 /*!< Data are taken from internal register */ |
| sahilmgandhi | 18:6a4db94011d3 | 270 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 271 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 272 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 273 | |
| sahilmgandhi | 18:6a4db94011d3 | 274 | /** @defgroup DFSDM_Channel_DataPacking DFSDM channel input data packing |
| sahilmgandhi | 18:6a4db94011d3 | 275 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 276 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 277 | #define DFSDM_CHANNEL_STANDARD_MODE ((uint32_t)0x00000000U) /*!< Standard data packing mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 278 | #define DFSDM_CHANNEL_INTERLEAVED_MODE DFSDM_CHCFGR1_DATPACK_0 /*!< Interleaved data packing mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 279 | #define DFSDM_CHANNEL_DUAL_MODE DFSDM_CHCFGR1_DATPACK_1 /*!< Dual data packing mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 280 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 281 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 282 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 283 | |
| sahilmgandhi | 18:6a4db94011d3 | 284 | /** @defgroup DFSDM_Channel_InputPins DFSDM channel input pins |
| sahilmgandhi | 18:6a4db94011d3 | 285 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 286 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 287 | #define DFSDM_CHANNEL_SAME_CHANNEL_PINS ((uint32_t)0x00000000U) /*!< Input from pins on same channel */ |
| sahilmgandhi | 18:6a4db94011d3 | 288 | #define DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS DFSDM_CHCFGR1_CHINSEL /*!< Input from pins on following channel */ |
| sahilmgandhi | 18:6a4db94011d3 | 289 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 290 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 291 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 292 | |
| sahilmgandhi | 18:6a4db94011d3 | 293 | /** @defgroup DFSDM_Channel_SerialInterfaceType DFSDM channel serial interface type |
| sahilmgandhi | 18:6a4db94011d3 | 294 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 295 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 296 | #define DFSDM_CHANNEL_SPI_RISING ((uint32_t)0x00000000U) /*!< SPI with rising edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 297 | #define DFSDM_CHANNEL_SPI_FALLING DFSDM_CHCFGR1_SITP_0 /*!< SPI with falling edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 298 | #define DFSDM_CHANNEL_MANCHESTER_RISING DFSDM_CHCFGR1_SITP_1 /*!< Manchester with rising edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 299 | #define DFSDM_CHANNEL_MANCHESTER_FALLING DFSDM_CHCFGR1_SITP /*!< Manchester with falling edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 300 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 301 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 302 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 303 | |
| sahilmgandhi | 18:6a4db94011d3 | 304 | /** @defgroup DFSDM_Channel_SpiClock DFSDM channel SPI clock selection |
| sahilmgandhi | 18:6a4db94011d3 | 305 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 306 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 307 | #define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL ((uint32_t)0x00000000U) /*!< External SPI clock */ |
| sahilmgandhi | 18:6a4db94011d3 | 308 | #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL DFSDM_CHCFGR1_SPICKSEL_0 /*!< Internal SPI clock */ |
| sahilmgandhi | 18:6a4db94011d3 | 309 | #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING DFSDM_CHCFGR1_SPICKSEL_1 /*!< Internal SPI clock divided by 2, falling edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 310 | #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING DFSDM_CHCFGR1_SPICKSEL /*!< Internal SPI clock divided by 2, rising edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 311 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 312 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 313 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 314 | |
| sahilmgandhi | 18:6a4db94011d3 | 315 | /** @defgroup DFSDM_Channel_AwdFilterOrder DFSDM channel analog watchdog filter order |
| sahilmgandhi | 18:6a4db94011d3 | 316 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 317 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 318 | #define DFSDM_CHANNEL_FASTSINC_ORDER ((uint32_t)0x00000000U) /*!< FastSinc filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 319 | #define DFSDM_CHANNEL_SINC1_ORDER DFSDM_CHAWSCDR_AWFORD_0 /*!< Sinc 1 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 320 | #define DFSDM_CHANNEL_SINC2_ORDER DFSDM_CHAWSCDR_AWFORD_1 /*!< Sinc 2 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 321 | #define DFSDM_CHANNEL_SINC3_ORDER DFSDM_CHAWSCDR_AWFORD /*!< Sinc 3 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 322 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 323 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 324 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 325 | |
| sahilmgandhi | 18:6a4db94011d3 | 326 | /** @defgroup DFSDM_Filter_Trigger DFSDM filter conversion trigger |
| sahilmgandhi | 18:6a4db94011d3 | 327 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 328 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 329 | #define DFSDM_FILTER_SW_TRIGGER ((uint32_t)0x00000000U) /*!< Software trigger */ |
| sahilmgandhi | 18:6a4db94011d3 | 330 | #define DFSDM_FILTER_SYNC_TRIGGER ((uint32_t)0x00000001U) /*!< Synchronous with DFSDM_FLT0 */ |
| sahilmgandhi | 18:6a4db94011d3 | 331 | #define DFSDM_FILTER_EXT_TRIGGER ((uint32_t)0x00000002U) /*!< External trigger (only for injected conversion) */ |
| sahilmgandhi | 18:6a4db94011d3 | 332 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 333 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 334 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 335 | |
| sahilmgandhi | 18:6a4db94011d3 | 336 | /** @defgroup DFSDM_Filter_ExtTrigger DFSDM filter external trigger |
| sahilmgandhi | 18:6a4db94011d3 | 337 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 338 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 339 | #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO ((uint32_t)0x00000000U) /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 340 | #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_0 /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 341 | #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1 /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 342 | #define DFSDM_FILTER_EXT_TRIG_TIM10_OC1 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 343 | #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO DFSDM_FLTCR1_JEXTSEL_2 /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 344 | #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 345 | #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 346 | #define DFSDM_FILTER_EXT_TRIG_EXTI15 DFSDM_FLTCR1_JEXTSEL /*!< For DFSDM filter 0 and 1*/ |
| sahilmgandhi | 18:6a4db94011d3 | 347 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 348 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 349 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 350 | |
| sahilmgandhi | 18:6a4db94011d3 | 351 | /** @defgroup DFSDM_Filter_ExtTriggerEdge DFSDM filter external trigger edge |
| sahilmgandhi | 18:6a4db94011d3 | 352 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 353 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 354 | #define DFSDM_FILTER_EXT_TRIG_RISING_EDGE DFSDM_FLTCR1_JEXTEN_0 /*!< External rising edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 355 | #define DFSDM_FILTER_EXT_TRIG_FALLING_EDGE DFSDM_FLTCR1_JEXTEN_1 /*!< External falling edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 356 | #define DFSDM_FILTER_EXT_TRIG_BOTH_EDGES DFSDM_FLTCR1_JEXTEN /*!< External rising and falling edges */ |
| sahilmgandhi | 18:6a4db94011d3 | 357 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 358 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 359 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 360 | |
| sahilmgandhi | 18:6a4db94011d3 | 361 | /** @defgroup DFSDM_Filter_SincOrder DFSDM filter sinc order |
| sahilmgandhi | 18:6a4db94011d3 | 362 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 363 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 364 | #define DFSDM_FILTER_FASTSINC_ORDER ((uint32_t)0x00000000U) /*!< FastSinc filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 365 | #define DFSDM_FILTER_SINC1_ORDER DFSDM_FLTFCR_FORD_0 /*!< Sinc 1 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 366 | #define DFSDM_FILTER_SINC2_ORDER DFSDM_FLTFCR_FORD_1 /*!< Sinc 2 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 367 | #define DFSDM_FILTER_SINC3_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_1) /*!< Sinc 3 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 368 | #define DFSDM_FILTER_SINC4_ORDER DFSDM_FLTFCR_FORD_2 /*!< Sinc 4 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 369 | #define DFSDM_FILTER_SINC5_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_2) /*!< Sinc 5 filter type */ |
| sahilmgandhi | 18:6a4db94011d3 | 370 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 371 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 372 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 373 | |
| sahilmgandhi | 18:6a4db94011d3 | 374 | /** @defgroup DFSDM_Filter_AwdDataSource DFSDM filter analog watchdog data source |
| sahilmgandhi | 18:6a4db94011d3 | 375 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 376 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 377 | #define DFSDM_FILTER_AWD_FILTER_DATA ((uint32_t)0x00000000U) /*!< From digital filter */ |
| sahilmgandhi | 18:6a4db94011d3 | 378 | #define DFSDM_FILTER_AWD_CHANNEL_DATA DFSDM_FLTCR1_AWFSEL /*!< From analog watchdog channel */ |
| sahilmgandhi | 18:6a4db94011d3 | 379 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 380 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 381 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 382 | |
| sahilmgandhi | 18:6a4db94011d3 | 383 | /** @defgroup DFSDM_Filter_ErrorCode DFSDM filter error code |
| sahilmgandhi | 18:6a4db94011d3 | 384 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 385 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 386 | #define DFSDM_FILTER_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ |
| sahilmgandhi | 18:6a4db94011d3 | 387 | #define DFSDM_FILTER_ERROR_REGULAR_OVERRUN ((uint32_t)0x00000001U) /*!< Overrun occurs during regular conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 388 | #define DFSDM_FILTER_ERROR_INJECTED_OVERRUN ((uint32_t)0x00000002U) /*!< Overrun occurs during injected conversion */ |
| sahilmgandhi | 18:6a4db94011d3 | 389 | #define DFSDM_FILTER_ERROR_DMA ((uint32_t)0x00000003U) /*!< DMA error occurs */ |
| sahilmgandhi | 18:6a4db94011d3 | 390 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 391 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 392 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 393 | |
| sahilmgandhi | 18:6a4db94011d3 | 394 | /** @defgroup DFSDM_BreakSignals DFSDM break signals |
| sahilmgandhi | 18:6a4db94011d3 | 395 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 396 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 397 | #define DFSDM_NO_BREAK_SIGNAL ((uint32_t)0x00000000U) /*!< No break signal */ |
| sahilmgandhi | 18:6a4db94011d3 | 398 | #define DFSDM_BREAK_SIGNAL_0 ((uint32_t)0x00000001U) /*!< Break signal 0 */ |
| sahilmgandhi | 18:6a4db94011d3 | 399 | #define DFSDM_BREAK_SIGNAL_1 ((uint32_t)0x00000002U) /*!< Break signal 1 */ |
| sahilmgandhi | 18:6a4db94011d3 | 400 | #define DFSDM_BREAK_SIGNAL_2 ((uint32_t)0x00000004U) /*!< Break signal 2 */ |
| sahilmgandhi | 18:6a4db94011d3 | 401 | #define DFSDM_BREAK_SIGNAL_3 ((uint32_t)0x00000008U) /*!< Break signal 3 */ |
| sahilmgandhi | 18:6a4db94011d3 | 402 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 403 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 404 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 405 | |
| sahilmgandhi | 18:6a4db94011d3 | 406 | /** @defgroup DFSDM_Channel_Selection DFSDM Channel Selection |
| sahilmgandhi | 18:6a4db94011d3 | 407 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 408 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 409 | /* DFSDM Channels ------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 410 | /* The DFSDM channels are defined as follows: |
| sahilmgandhi | 18:6a4db94011d3 | 411 | - in 16-bit LSB the channel mask is set |
| sahilmgandhi | 18:6a4db94011d3 | 412 | - in 16-bit MSB the channel number is set |
| sahilmgandhi | 18:6a4db94011d3 | 413 | e.g. for channel 3 definition: |
| sahilmgandhi | 18:6a4db94011d3 | 414 | - the channel mask is 0x00000008U (bit 3 is set) |
| sahilmgandhi | 18:6a4db94011d3 | 415 | - the channel number 3 is 0x00030000 |
| sahilmgandhi | 18:6a4db94011d3 | 416 | --> Consequently, channel 3 definition is 0x00000008U | 0x00030000 = 0x00030008 */ |
| sahilmgandhi | 18:6a4db94011d3 | 417 | #define DFSDM_CHANNEL_0 ((uint32_t)0x00000001U) |
| sahilmgandhi | 18:6a4db94011d3 | 418 | #define DFSDM_CHANNEL_1 ((uint32_t)0x00010002U) |
| sahilmgandhi | 18:6a4db94011d3 | 419 | #define DFSDM_CHANNEL_2 ((uint32_t)0x00020004U) |
| sahilmgandhi | 18:6a4db94011d3 | 420 | #define DFSDM_CHANNEL_3 ((uint32_t)0x00030008U) |
| sahilmgandhi | 18:6a4db94011d3 | 421 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 422 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 423 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 424 | |
| sahilmgandhi | 18:6a4db94011d3 | 425 | /** @defgroup DFSDM_ContinuousMode DFSDM Continuous Mode |
| sahilmgandhi | 18:6a4db94011d3 | 426 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 427 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 428 | #define DFSDM_CONTINUOUS_CONV_OFF ((uint32_t)0x00000000U) /*!< Conversion are not continuous */ |
| sahilmgandhi | 18:6a4db94011d3 | 429 | #define DFSDM_CONTINUOUS_CONV_ON ((uint32_t)0x00000001U) /*!< Conversion are continuous */ |
| sahilmgandhi | 18:6a4db94011d3 | 430 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 431 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 432 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 433 | |
| sahilmgandhi | 18:6a4db94011d3 | 434 | /** @defgroup DFSDM_AwdThreshold DFSDM analog watchdog threshold |
| sahilmgandhi | 18:6a4db94011d3 | 435 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 436 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 437 | #define DFSDM_AWD_HIGH_THRESHOLD ((uint32_t)0x00000000U) /*!< Analog watchdog high threshold */ |
| sahilmgandhi | 18:6a4db94011d3 | 438 | #define DFSDM_AWD_LOW_THRESHOLD ((uint32_t)0x00000001U) /*!< Analog watchdog low threshold */ |
| sahilmgandhi | 18:6a4db94011d3 | 439 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 440 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 441 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 442 | |
| sahilmgandhi | 18:6a4db94011d3 | 443 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 444 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 445 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 446 | /* End of exported constants -------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 447 | |
| sahilmgandhi | 18:6a4db94011d3 | 448 | /* Exported macros -----------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 449 | /** @defgroup DFSDM_Exported_Macros DFSDM Exported Macros |
| sahilmgandhi | 18:6a4db94011d3 | 450 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 451 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 452 | |
| sahilmgandhi | 18:6a4db94011d3 | 453 | /** @brief Reset DFSDM channel handle state. |
| sahilmgandhi | 18:6a4db94011d3 | 454 | * @param __HANDLE__: DFSDM channel handle. |
| sahilmgandhi | 18:6a4db94011d3 | 455 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 456 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 457 | #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET) |
| sahilmgandhi | 18:6a4db94011d3 | 458 | |
| sahilmgandhi | 18:6a4db94011d3 | 459 | /** @brief Reset DFSDM filter handle state. |
| sahilmgandhi | 18:6a4db94011d3 | 460 | * @param __HANDLE__: DFSDM filter handle. |
| sahilmgandhi | 18:6a4db94011d3 | 461 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 462 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 463 | #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET) |
| sahilmgandhi | 18:6a4db94011d3 | 464 | |
| sahilmgandhi | 18:6a4db94011d3 | 465 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 466 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 467 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 468 | /* End of exported macros ----------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 469 | |
| sahilmgandhi | 18:6a4db94011d3 | 470 | /* Exported functions --------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 471 | /** @addtogroup DFSDM_Exported_Functions DFSDM Exported Functions |
| sahilmgandhi | 18:6a4db94011d3 | 472 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 473 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 474 | |
| sahilmgandhi | 18:6a4db94011d3 | 475 | /** @addtogroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions |
| sahilmgandhi | 18:6a4db94011d3 | 476 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 477 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 478 | /* Channel initialization and de-initialization functions *********************/ |
| sahilmgandhi | 18:6a4db94011d3 | 479 | HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 480 | HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 481 | void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 482 | void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 483 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 484 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 485 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 486 | |
| sahilmgandhi | 18:6a4db94011d3 | 487 | /** @addtogroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions |
| sahilmgandhi | 18:6a4db94011d3 | 488 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 489 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 490 | /* Channel operation functions ************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 491 | HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 492 | HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 493 | HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 494 | HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 495 | |
| sahilmgandhi | 18:6a4db94011d3 | 496 | HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal); |
| sahilmgandhi | 18:6a4db94011d3 | 497 | HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal); |
| sahilmgandhi | 18:6a4db94011d3 | 498 | HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 499 | HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 500 | |
| sahilmgandhi | 18:6a4db94011d3 | 501 | int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 502 | HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset); |
| sahilmgandhi | 18:6a4db94011d3 | 503 | |
| sahilmgandhi | 18:6a4db94011d3 | 504 | HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout); |
| sahilmgandhi | 18:6a4db94011d3 | 505 | HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout); |
| sahilmgandhi | 18:6a4db94011d3 | 506 | |
| sahilmgandhi | 18:6a4db94011d3 | 507 | void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 508 | void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 509 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 510 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 511 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 512 | |
| sahilmgandhi | 18:6a4db94011d3 | 513 | /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function |
| sahilmgandhi | 18:6a4db94011d3 | 514 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 515 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 516 | /* Channel state function *****************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 517 | HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel); |
| sahilmgandhi | 18:6a4db94011d3 | 518 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 519 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 520 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 521 | |
| sahilmgandhi | 18:6a4db94011d3 | 522 | /** @addtogroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions |
| sahilmgandhi | 18:6a4db94011d3 | 523 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 524 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 525 | /* Filter initialization and de-initialization functions *********************/ |
| sahilmgandhi | 18:6a4db94011d3 | 526 | HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 527 | HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 528 | void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 529 | void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 530 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 531 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 532 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 533 | |
| sahilmgandhi | 18:6a4db94011d3 | 534 | /** @addtogroup DFSDM_Exported_Functions_Group2_Filter Filter control functions |
| sahilmgandhi | 18:6a4db94011d3 | 535 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 536 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 537 | /* Filter control functions *********************/ |
| sahilmgandhi | 18:6a4db94011d3 | 538 | HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, |
| sahilmgandhi | 18:6a4db94011d3 | 539 | uint32_t Channel, |
| sahilmgandhi | 18:6a4db94011d3 | 540 | uint32_t ContinuousMode); |
| sahilmgandhi | 18:6a4db94011d3 | 541 | HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, |
| sahilmgandhi | 18:6a4db94011d3 | 542 | uint32_t Channel); |
| sahilmgandhi | 18:6a4db94011d3 | 543 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 544 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 545 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 546 | |
| sahilmgandhi | 18:6a4db94011d3 | 547 | /** @addtogroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions |
| sahilmgandhi | 18:6a4db94011d3 | 548 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 549 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 550 | /* Filter operation functions *********************/ |
| sahilmgandhi | 18:6a4db94011d3 | 551 | HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 552 | HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 553 | HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length); |
| sahilmgandhi | 18:6a4db94011d3 | 554 | HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length); |
| sahilmgandhi | 18:6a4db94011d3 | 555 | HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 556 | HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 557 | HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 558 | HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 559 | HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 560 | HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length); |
| sahilmgandhi | 18:6a4db94011d3 | 561 | HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length); |
| sahilmgandhi | 18:6a4db94011d3 | 562 | HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 563 | HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 564 | HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 565 | HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, |
| sahilmgandhi | 18:6a4db94011d3 | 566 | DFSDM_Filter_AwdParamTypeDef* awdParam); |
| sahilmgandhi | 18:6a4db94011d3 | 567 | HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 568 | HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel); |
| sahilmgandhi | 18:6a4db94011d3 | 569 | HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 570 | |
| sahilmgandhi | 18:6a4db94011d3 | 571 | int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel); |
| sahilmgandhi | 18:6a4db94011d3 | 572 | int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel); |
| sahilmgandhi | 18:6a4db94011d3 | 573 | int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel); |
| sahilmgandhi | 18:6a4db94011d3 | 574 | int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel); |
| sahilmgandhi | 18:6a4db94011d3 | 575 | uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 576 | |
| sahilmgandhi | 18:6a4db94011d3 | 577 | void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 578 | |
| sahilmgandhi | 18:6a4db94011d3 | 579 | HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout); |
| sahilmgandhi | 18:6a4db94011d3 | 580 | HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout); |
| sahilmgandhi | 18:6a4db94011d3 | 581 | |
| sahilmgandhi | 18:6a4db94011d3 | 582 | void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 583 | void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 584 | void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 585 | void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 586 | void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold); |
| sahilmgandhi | 18:6a4db94011d3 | 587 | void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 588 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 589 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 590 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 591 | |
| sahilmgandhi | 18:6a4db94011d3 | 592 | /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions |
| sahilmgandhi | 18:6a4db94011d3 | 593 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 594 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 595 | /* Filter state functions *****************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 596 | HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 597 | uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); |
| sahilmgandhi | 18:6a4db94011d3 | 598 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 599 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 600 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 601 | |
| sahilmgandhi | 18:6a4db94011d3 | 602 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 603 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 604 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 605 | /* End of exported functions -------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 606 | |
| sahilmgandhi | 18:6a4db94011d3 | 607 | /* Private macros ------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 608 | /** @defgroup DFSDM_Private_Macros DFSDM Private Macros |
| sahilmgandhi | 18:6a4db94011d3 | 609 | * @{ |
| sahilmgandhi | 18:6a4db94011d3 | 610 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 611 | #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK(CLOCK) (((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 612 | ((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO)) |
| sahilmgandhi | 18:6a4db94011d3 | 613 | #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(DIVIDER) ((2U <= (DIVIDER)) && ((DIVIDER) <= 256U)) |
| sahilmgandhi | 18:6a4db94011d3 | 614 | #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 615 | ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER)) |
| sahilmgandhi | 18:6a4db94011d3 | 616 | #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 617 | ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 618 | ((MODE) == DFSDM_CHANNEL_DUAL_MODE)) |
| sahilmgandhi | 18:6a4db94011d3 | 619 | #define IS_DFSDM_CHANNEL_INPUT_PINS(PINS) (((PINS) == DFSDM_CHANNEL_SAME_CHANNEL_PINS) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 620 | ((PINS) == DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS)) |
| sahilmgandhi | 18:6a4db94011d3 | 621 | #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 622 | ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 623 | ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 624 | ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING)) |
| sahilmgandhi | 18:6a4db94011d3 | 625 | #define IS_DFSDM_CHANNEL_SPI_CLOCK(TYPE) (((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 626 | ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 627 | ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 628 | ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING)) |
| sahilmgandhi | 18:6a4db94011d3 | 629 | #define IS_DFSDM_CHANNEL_FILTER_ORDER(ORDER) (((ORDER) == DFSDM_CHANNEL_FASTSINC_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 630 | ((ORDER) == DFSDM_CHANNEL_SINC1_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 631 | ((ORDER) == DFSDM_CHANNEL_SINC2_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 632 | ((ORDER) == DFSDM_CHANNEL_SINC3_ORDER)) |
| sahilmgandhi | 18:6a4db94011d3 | 633 | #define IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 32U)) |
| sahilmgandhi | 18:6a4db94011d3 | 634 | #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607)) |
| sahilmgandhi | 18:6a4db94011d3 | 635 | #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1FU) |
| sahilmgandhi | 18:6a4db94011d3 | 636 | #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFFU) |
| sahilmgandhi | 18:6a4db94011d3 | 637 | #define IS_DFSDM_FILTER_REG_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 638 | ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER)) |
| sahilmgandhi | 18:6a4db94011d3 | 639 | #define IS_DFSDM_FILTER_INJ_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 640 | ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 641 | ((TRIG) == DFSDM_FILTER_EXT_TRIGGER)) |
| sahilmgandhi | 18:6a4db94011d3 | 642 | #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 643 | ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 644 | ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 645 | ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM10_OC1) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 646 | ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 647 | ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 648 | ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 649 | ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15)) |
| sahilmgandhi | 18:6a4db94011d3 | 650 | #define IS_DFSDM_FILTER_EXT_TRIG_EDGE(EDGE) (((EDGE) == DFSDM_FILTER_EXT_TRIG_RISING_EDGE) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 651 | ((EDGE) == DFSDM_FILTER_EXT_TRIG_FALLING_EDGE) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 652 | ((EDGE) == DFSDM_FILTER_EXT_TRIG_BOTH_EDGES)) |
| sahilmgandhi | 18:6a4db94011d3 | 653 | #define IS_DFSDM_FILTER_SINC_ORDER(ORDER) (((ORDER) == DFSDM_FILTER_FASTSINC_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 654 | ((ORDER) == DFSDM_FILTER_SINC1_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 655 | ((ORDER) == DFSDM_FILTER_SINC2_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 656 | ((ORDER) == DFSDM_FILTER_SINC3_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 657 | ((ORDER) == DFSDM_FILTER_SINC4_ORDER) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 658 | ((ORDER) == DFSDM_FILTER_SINC5_ORDER)) |
| sahilmgandhi | 18:6a4db94011d3 | 659 | #define IS_DFSDM_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 1024U)) |
| sahilmgandhi | 18:6a4db94011d3 | 660 | #define IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 256U)) |
| sahilmgandhi | 18:6a4db94011d3 | 661 | #define IS_DFSDM_FILTER_AWD_DATA_SOURCE(DATA) (((DATA) == DFSDM_FILTER_AWD_FILTER_DATA) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 662 | ((DATA) == DFSDM_FILTER_AWD_CHANNEL_DATA)) |
| sahilmgandhi | 18:6a4db94011d3 | 663 | #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607)) |
| sahilmgandhi | 18:6a4db94011d3 | 664 | #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0x0FU) |
| sahilmgandhi | 18:6a4db94011d3 | 665 | #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 666 | ((CHANNEL) == DFSDM_CHANNEL_1) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 667 | ((CHANNEL) == DFSDM_CHANNEL_2) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 668 | ((CHANNEL) == DFSDM_CHANNEL_3)) |
| sahilmgandhi | 18:6a4db94011d3 | 669 | #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x0003000FU)) |
| sahilmgandhi | 18:6a4db94011d3 | 670 | #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \ |
| sahilmgandhi | 18:6a4db94011d3 | 671 | ((MODE) == DFSDM_CONTINUOUS_CONV_ON)) |
| sahilmgandhi | 18:6a4db94011d3 | 672 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 673 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 674 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 675 | /* End of private macros -----------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 676 | |
| sahilmgandhi | 18:6a4db94011d3 | 677 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 678 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 679 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 680 | |
| sahilmgandhi | 18:6a4db94011d3 | 681 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 682 | * @} |
| sahilmgandhi | 18:6a4db94011d3 | 683 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 684 | #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ |
| sahilmgandhi | 18:6a4db94011d3 | 685 | #ifdef __cplusplus |
| sahilmgandhi | 18:6a4db94011d3 | 686 | } |
| sahilmgandhi | 18:6a4db94011d3 | 687 | #endif |
| sahilmgandhi | 18:6a4db94011d3 | 688 | |
| sahilmgandhi | 18:6a4db94011d3 | 689 | #endif /* __STM32F4xx_HAL_DFSDM_H */ |
| sahilmgandhi | 18:6a4db94011d3 | 690 | |
| sahilmgandhi | 18:6a4db94011d3 | 691 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |