MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc_ex.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_adc_ex.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of ADC HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_ADC_EX_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_ADC_EX_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup ADCEx
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup ADCEx_Exported_Types ADC Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief ADC Configuration injected Channel structure definition
sahilmgandhi 18:6a4db94011d3 64 * @note Parameters of this structure are shared within 2 scopes:
sahilmgandhi 18:6a4db94011d3 65 * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
sahilmgandhi 18:6a4db94011d3 66 * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
sahilmgandhi 18:6a4db94011d3 67 * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
sahilmgandhi 18:6a4db94011d3 68 * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
sahilmgandhi 18:6a4db94011d3 69 * ADC state can be either:
sahilmgandhi 18:6a4db94011d3 70 * - For all parameters: ADC disabled
sahilmgandhi 18:6a4db94011d3 71 * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group.
sahilmgandhi 18:6a4db94011d3 72 * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group.
sahilmgandhi 18:6a4db94011d3 73 */
sahilmgandhi 18:6a4db94011d3 74 typedef struct
sahilmgandhi 18:6a4db94011d3 75 {
sahilmgandhi 18:6a4db94011d3 76 uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
sahilmgandhi 18:6a4db94011d3 77 This parameter can be a value of @ref ADC_channels
sahilmgandhi 18:6a4db94011d3 78 Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
sahilmgandhi 18:6a4db94011d3 79 uint32_t InjectedRank; /*!< Rank in the injected group sequencer
sahilmgandhi 18:6a4db94011d3 80 This parameter must be a value of @ref ADCEx_injected_rank
sahilmgandhi 18:6a4db94011d3 81 Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
sahilmgandhi 18:6a4db94011d3 82 uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
sahilmgandhi 18:6a4db94011d3 83 Unit: ADC clock cycles
sahilmgandhi 18:6a4db94011d3 84 Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
sahilmgandhi 18:6a4db94011d3 85 This parameter can be a value of @ref ADC_sampling_times
sahilmgandhi 18:6a4db94011d3 86 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
sahilmgandhi 18:6a4db94011d3 87 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
sahilmgandhi 18:6a4db94011d3 88 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
sahilmgandhi 18:6a4db94011d3 89 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
sahilmgandhi 18:6a4db94011d3 90 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
sahilmgandhi 18:6a4db94011d3 91 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
sahilmgandhi 18:6a4db94011d3 92 Offset value must be a positive number.
sahilmgandhi 18:6a4db94011d3 93 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
sahilmgandhi 18:6a4db94011d3 94 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
sahilmgandhi 18:6a4db94011d3 95 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
sahilmgandhi 18:6a4db94011d3 96 To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
sahilmgandhi 18:6a4db94011d3 97 This parameter must be a number between Min_Data = 1 and Max_Data = 4.
sahilmgandhi 18:6a4db94011d3 98 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 99 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 100 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
sahilmgandhi 18:6a4db94011d3 101 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
sahilmgandhi 18:6a4db94011d3 102 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
sahilmgandhi 18:6a4db94011d3 103 This parameter can be set to ENABLE or DISABLE.
sahilmgandhi 18:6a4db94011d3 104 Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
sahilmgandhi 18:6a4db94011d3 105 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 106 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 107 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
sahilmgandhi 18:6a4db94011d3 108 This parameter can be set to ENABLE or DISABLE.
sahilmgandhi 18:6a4db94011d3 109 Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
sahilmgandhi 18:6a4db94011d3 110 Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
sahilmgandhi 18:6a4db94011d3 111 Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
sahilmgandhi 18:6a4db94011d3 112 To maintain JAUTO always enabled, DMA must be configured in circular mode.
sahilmgandhi 18:6a4db94011d3 113 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 114 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 115 uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
sahilmgandhi 18:6a4db94011d3 116 If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
sahilmgandhi 18:6a4db94011d3 117 If set to external trigger source, triggering is on event rising edge.
sahilmgandhi 18:6a4db94011d3 118 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected
sahilmgandhi 18:6a4db94011d3 119 Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
sahilmgandhi 18:6a4db94011d3 120 If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
sahilmgandhi 18:6a4db94011d3 121 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 122 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 123 uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
sahilmgandhi 18:6a4db94011d3 124 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected.
sahilmgandhi 18:6a4db94011d3 125 If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
sahilmgandhi 18:6a4db94011d3 126 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 127 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 128 }ADC_InjectionConfTypeDef;
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 /**
sahilmgandhi 18:6a4db94011d3 131 * @brief ADC Configuration multi-mode structure definition
sahilmgandhi 18:6a4db94011d3 132 */
sahilmgandhi 18:6a4db94011d3 133 typedef struct
sahilmgandhi 18:6a4db94011d3 134 {
sahilmgandhi 18:6a4db94011d3 135 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
sahilmgandhi 18:6a4db94011d3 136 This parameter can be a value of @ref ADCEx_Common_mode */
sahilmgandhi 18:6a4db94011d3 137 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
sahilmgandhi 18:6a4db94011d3 138 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
sahilmgandhi 18:6a4db94011d3 139 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
sahilmgandhi 18:6a4db94011d3 140 This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
sahilmgandhi 18:6a4db94011d3 141 }ADC_MultiModeTypeDef;
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 /**
sahilmgandhi 18:6a4db94011d3 144 * @}
sahilmgandhi 18:6a4db94011d3 145 */
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 148 /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
sahilmgandhi 18:6a4db94011d3 149 * @{
sahilmgandhi 18:6a4db94011d3 150 */
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 /** @defgroup ADCEx_Common_mode ADC Common Mode
sahilmgandhi 18:6a4db94011d3 153 * @{
sahilmgandhi 18:6a4db94011d3 154 */
sahilmgandhi 18:6a4db94011d3 155 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 156 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
sahilmgandhi 18:6a4db94011d3 157 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
sahilmgandhi 18:6a4db94011d3 158 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
sahilmgandhi 18:6a4db94011d3 159 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
sahilmgandhi 18:6a4db94011d3 160 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
sahilmgandhi 18:6a4db94011d3 161 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
sahilmgandhi 18:6a4db94011d3 162 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
sahilmgandhi 18:6a4db94011d3 163 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
sahilmgandhi 18:6a4db94011d3 164 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
sahilmgandhi 18:6a4db94011d3 165 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
sahilmgandhi 18:6a4db94011d3 166 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
sahilmgandhi 18:6a4db94011d3 167 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
sahilmgandhi 18:6a4db94011d3 168 /**
sahilmgandhi 18:6a4db94011d3 169 * @}
sahilmgandhi 18:6a4db94011d3 170 */
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
sahilmgandhi 18:6a4db94011d3 173 * @{
sahilmgandhi 18:6a4db94011d3 174 */
sahilmgandhi 18:6a4db94011d3 175 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000U) /*!< DMA mode disabled */
sahilmgandhi 18:6a4db94011d3 176 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
sahilmgandhi 18:6a4db94011d3 177 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
sahilmgandhi 18:6a4db94011d3 178 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
sahilmgandhi 18:6a4db94011d3 179 /**
sahilmgandhi 18:6a4db94011d3 180 * @}
sahilmgandhi 18:6a4db94011d3 181 */
sahilmgandhi 18:6a4db94011d3 182
sahilmgandhi 18:6a4db94011d3 183 /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
sahilmgandhi 18:6a4db94011d3 184 * @{
sahilmgandhi 18:6a4db94011d3 185 */
sahilmgandhi 18:6a4db94011d3 186 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 187 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
sahilmgandhi 18:6a4db94011d3 188 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
sahilmgandhi 18:6a4db94011d3 189 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
sahilmgandhi 18:6a4db94011d3 190 /**
sahilmgandhi 18:6a4db94011d3 191 * @}
sahilmgandhi 18:6a4db94011d3 192 */
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
sahilmgandhi 18:6a4db94011d3 195 * @{
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 198 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
sahilmgandhi 18:6a4db94011d3 199 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
sahilmgandhi 18:6a4db94011d3 200 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 201 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
sahilmgandhi 18:6a4db94011d3 202 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 203 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
sahilmgandhi 18:6a4db94011d3 204 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 205 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
sahilmgandhi 18:6a4db94011d3 206 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 207 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
sahilmgandhi 18:6a4db94011d3 208 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 209 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
sahilmgandhi 18:6a4db94011d3 210 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 211 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
sahilmgandhi 18:6a4db94011d3 212 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
sahilmgandhi 18:6a4db94011d3 213 #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U)
sahilmgandhi 18:6a4db94011d3 214 /**
sahilmgandhi 18:6a4db94011d3 215 * @}
sahilmgandhi 18:6a4db94011d3 216 */
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 /** @defgroup ADCEx_injected_rank ADC Injected Rank
sahilmgandhi 18:6a4db94011d3 219 * @{
sahilmgandhi 18:6a4db94011d3 220 */
sahilmgandhi 18:6a4db94011d3 221 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 222 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002U)
sahilmgandhi 18:6a4db94011d3 223 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003U)
sahilmgandhi 18:6a4db94011d3 224 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004U)
sahilmgandhi 18:6a4db94011d3 225 /**
sahilmgandhi 18:6a4db94011d3 226 * @}
sahilmgandhi 18:6a4db94011d3 227 */
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 /** @defgroup ADCEx_channels ADC Specific Channels
sahilmgandhi 18:6a4db94011d3 230 * @{
sahilmgandhi 18:6a4db94011d3 231 */
sahilmgandhi 18:6a4db94011d3 232 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
sahilmgandhi 18:6a4db94011d3 233 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
sahilmgandhi 18:6a4db94011d3 234 defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
sahilmgandhi 18:6a4db94011d3 235 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 236 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
sahilmgandhi 18:6a4db94011d3 237 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cxs */
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 #if defined(STM32F411xE) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
sahilmgandhi 18:6a4db94011d3 240 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 241 #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT ((uint32_t)0x10000000U) /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
sahilmgandhi 18:6a4db94011d3 242 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
sahilmgandhi 18:6a4db94011d3 243 #endif /* STM32F411xE || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 244 /**
sahilmgandhi 18:6a4db94011d3 245 * @}
sahilmgandhi 18:6a4db94011d3 246 */
sahilmgandhi 18:6a4db94011d3 247
sahilmgandhi 18:6a4db94011d3 248
sahilmgandhi 18:6a4db94011d3 249 /**
sahilmgandhi 18:6a4db94011d3 250 * @}
sahilmgandhi 18:6a4db94011d3 251 */
sahilmgandhi 18:6a4db94011d3 252
sahilmgandhi 18:6a4db94011d3 253 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 254 /** @defgroup ADC_Exported_Macros ADC Exported Macros
sahilmgandhi 18:6a4db94011d3 255 * @{
sahilmgandhi 18:6a4db94011d3 256 */
sahilmgandhi 18:6a4db94011d3 257 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
sahilmgandhi 18:6a4db94011d3 258 /**
sahilmgandhi 18:6a4db94011d3 259 * @brief Disable internal path of ADC channel Vbat
sahilmgandhi 18:6a4db94011d3 260 * @Note Use case of this macro:
sahilmgandhi 18:6a4db94011d3 261 * On devices STM32F42x and STM32F43x, ADC internal channels
sahilmgandhi 18:6a4db94011d3 262 * Vbat and VrefInt share the same internal path, only
sahilmgandhi 18:6a4db94011d3 263 * one of them can be enabled.This macro is to be used when ADC
sahilmgandhi 18:6a4db94011d3 264 * channels Vbat and VrefInt are selected, and must be called
sahilmgandhi 18:6a4db94011d3 265 * before starting conversion of ADC channel VrefInt in order
sahilmgandhi 18:6a4db94011d3 266 * to disable ADC channel Vbat.
sahilmgandhi 18:6a4db94011d3 267 * @retval None
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269 #define __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() (ADC->CCR &= ~(ADC_CCR_VBATE))
sahilmgandhi 18:6a4db94011d3 270 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
sahilmgandhi 18:6a4db94011d3 271 /**
sahilmgandhi 18:6a4db94011d3 272 * @}
sahilmgandhi 18:6a4db94011d3 273 */
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 276 /** @addtogroup ADCEx_Exported_Functions
sahilmgandhi 18:6a4db94011d3 277 * @{
sahilmgandhi 18:6a4db94011d3 278 */
sahilmgandhi 18:6a4db94011d3 279
sahilmgandhi 18:6a4db94011d3 280 /** @addtogroup ADCEx_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 281 * @{
sahilmgandhi 18:6a4db94011d3 282 */
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284 /* I/O operation functions ******************************************************/
sahilmgandhi 18:6a4db94011d3 285 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 286 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 287 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 288 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 289 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 290 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
sahilmgandhi 18:6a4db94011d3 291 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
sahilmgandhi 18:6a4db94011d3 292 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 293 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 294 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 /* Peripheral Control functions *************************************************/
sahilmgandhi 18:6a4db94011d3 297 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
sahilmgandhi 18:6a4db94011d3 298 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 /**
sahilmgandhi 18:6a4db94011d3 301 * @}
sahilmgandhi 18:6a4db94011d3 302 */
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 /**
sahilmgandhi 18:6a4db94011d3 305 * @}
sahilmgandhi 18:6a4db94011d3 306 */
sahilmgandhi 18:6a4db94011d3 307 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 308 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 309 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 310 /** @defgroup ADCEx_Private_Constants ADC Private Constants
sahilmgandhi 18:6a4db94011d3 311 * @{
sahilmgandhi 18:6a4db94011d3 312 */
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 /**
sahilmgandhi 18:6a4db94011d3 315 * @}
sahilmgandhi 18:6a4db94011d3 316 */
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 319 /** @defgroup ADCEx_Private_Macros ADC Private Macros
sahilmgandhi 18:6a4db94011d3 320 * @{
sahilmgandhi 18:6a4db94011d3 321 */
sahilmgandhi 18:6a4db94011d3 322 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
sahilmgandhi 18:6a4db94011d3 323 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
sahilmgandhi 18:6a4db94011d3 324 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
sahilmgandhi 18:6a4db94011d3 325 defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 326 #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
sahilmgandhi 18:6a4db94011d3 327 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 328
sahilmgandhi 18:6a4db94011d3 329 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
sahilmgandhi 18:6a4db94011d3 330 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 331 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
sahilmgandhi 18:6a4db94011d3 332 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
sahilmgandhi 18:6a4db94011d3 333 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 334
sahilmgandhi 18:6a4db94011d3 335 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
sahilmgandhi 18:6a4db94011d3 336 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
sahilmgandhi 18:6a4db94011d3 337 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
sahilmgandhi 18:6a4db94011d3 338 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
sahilmgandhi 18:6a4db94011d3 339 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
sahilmgandhi 18:6a4db94011d3 340 ((MODE) == ADC_DUALMODE_INTERL) || \
sahilmgandhi 18:6a4db94011d3 341 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
sahilmgandhi 18:6a4db94011d3 342 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
sahilmgandhi 18:6a4db94011d3 343 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
sahilmgandhi 18:6a4db94011d3 344 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
sahilmgandhi 18:6a4db94011d3 345 ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
sahilmgandhi 18:6a4db94011d3 346 ((MODE) == ADC_TRIPLEMODE_INTERL) || \
sahilmgandhi 18:6a4db94011d3 347 ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
sahilmgandhi 18:6a4db94011d3 348 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
sahilmgandhi 18:6a4db94011d3 349 ((MODE) == ADC_DMAACCESSMODE_1) || \
sahilmgandhi 18:6a4db94011d3 350 ((MODE) == ADC_DMAACCESSMODE_2) || \
sahilmgandhi 18:6a4db94011d3 351 ((MODE) == ADC_DMAACCESSMODE_3))
sahilmgandhi 18:6a4db94011d3 352 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
sahilmgandhi 18:6a4db94011d3 353 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
sahilmgandhi 18:6a4db94011d3 354 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
sahilmgandhi 18:6a4db94011d3 355 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
sahilmgandhi 18:6a4db94011d3 356 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
sahilmgandhi 18:6a4db94011d3 357 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
sahilmgandhi 18:6a4db94011d3 358 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
sahilmgandhi 18:6a4db94011d3 359 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
sahilmgandhi 18:6a4db94011d3 360 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
sahilmgandhi 18:6a4db94011d3 361 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
sahilmgandhi 18:6a4db94011d3 362 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
sahilmgandhi 18:6a4db94011d3 363 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
sahilmgandhi 18:6a4db94011d3 364 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
sahilmgandhi 18:6a4db94011d3 365 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
sahilmgandhi 18:6a4db94011d3 366 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
sahilmgandhi 18:6a4db94011d3 367 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
sahilmgandhi 18:6a4db94011d3 368 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
sahilmgandhi 18:6a4db94011d3 369 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
sahilmgandhi 18:6a4db94011d3 370 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
sahilmgandhi 18:6a4db94011d3 371 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
sahilmgandhi 18:6a4db94011d3 372 ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
sahilmgandhi 18:6a4db94011d3 373 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1U)) && ((LENGTH) <= ((uint32_t)4U)))
sahilmgandhi 18:6a4db94011d3 374 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1U)) && ((RANK) <= ((uint32_t)4U)))
sahilmgandhi 18:6a4db94011d3 375
sahilmgandhi 18:6a4db94011d3 376 /**
sahilmgandhi 18:6a4db94011d3 377 * @brief Set the selected injected Channel rank.
sahilmgandhi 18:6a4db94011d3 378 * @param _CHANNELNB_: Channel number.
sahilmgandhi 18:6a4db94011d3 379 * @param _RANKNB_: Rank number.
sahilmgandhi 18:6a4db94011d3 380 * @param _JSQR_JL_: Sequence length.
sahilmgandhi 18:6a4db94011d3 381 * @retval None
sahilmgandhi 18:6a4db94011d3 382 */
sahilmgandhi 18:6a4db94011d3 383 #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))
sahilmgandhi 18:6a4db94011d3 384
sahilmgandhi 18:6a4db94011d3 385 /**
sahilmgandhi 18:6a4db94011d3 386 * @}
sahilmgandhi 18:6a4db94011d3 387 */
sahilmgandhi 18:6a4db94011d3 388
sahilmgandhi 18:6a4db94011d3 389 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 390 /** @defgroup ADCEx_Private_Functions ADC Private Functions
sahilmgandhi 18:6a4db94011d3 391 * @{
sahilmgandhi 18:6a4db94011d3 392 */
sahilmgandhi 18:6a4db94011d3 393
sahilmgandhi 18:6a4db94011d3 394 /**
sahilmgandhi 18:6a4db94011d3 395 * @}
sahilmgandhi 18:6a4db94011d3 396 */
sahilmgandhi 18:6a4db94011d3 397
sahilmgandhi 18:6a4db94011d3 398 /**
sahilmgandhi 18:6a4db94011d3 399 * @}
sahilmgandhi 18:6a4db94011d3 400 */
sahilmgandhi 18:6a4db94011d3 401
sahilmgandhi 18:6a4db94011d3 402 /**
sahilmgandhi 18:6a4db94011d3 403 * @}
sahilmgandhi 18:6a4db94011d3 404 */
sahilmgandhi 18:6a4db94011d3 405
sahilmgandhi 18:6a4db94011d3 406 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 407 }
sahilmgandhi 18:6a4db94011d3 408 #endif
sahilmgandhi 18:6a4db94011d3 409
sahilmgandhi 18:6a4db94011d3 410 #endif /*__STM32F4xx_ADC_EX_H */
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412
sahilmgandhi 18:6a4db94011d3 413 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/