MouseCode - Mouse code for the MacroRat

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Mouse code for the MacroRat

Dependencies: ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_usart.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:: sahilmgandhi
Date:: Sat Jun 03 00:22:44 2017 +0000
Revision:: 46:b156ef445742
Parent:: 18:6a4db94011d3

Final code for internal battlebot competition.

Who changed what in which revision?

User	Revision	Line number	New contents of line
sahilmgandhi	18:6a4db94011d3	1	/**
sahilmgandhi	18:6a4db94011d3	2	******************************************************************************
sahilmgandhi	18:6a4db94011d3	3	* @file stm32f2xx_hal_usart.c
sahilmgandhi	18:6a4db94011d3	4	* @author MCD Application Team
sahilmgandhi	18:6a4db94011d3	5	* @version V1.1.3
sahilmgandhi	18:6a4db94011d3	6	* @date 29-June-2016
sahilmgandhi	18:6a4db94011d3	7	* @brief USART HAL module driver.
sahilmgandhi	18:6a4db94011d3	8	* This file provides firmware functions to manage the following
sahilmgandhi	18:6a4db94011d3	9	* functionalities of the Universal Synchronous Asynchronous Receiver Transmitter (USART) peripheral:
sahilmgandhi	18:6a4db94011d3	10	* + Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	11	* + IO operation functions
sahilmgandhi	18:6a4db94011d3	12	* + Peripheral Control functions
sahilmgandhi	18:6a4db94011d3	13	@verbatim
sahilmgandhi	18:6a4db94011d3	14	==============================================================================
sahilmgandhi	18:6a4db94011d3	15	##### How to use this driver #####
sahilmgandhi	18:6a4db94011d3	16	==============================================================================
sahilmgandhi	18:6a4db94011d3	17	[..]
sahilmgandhi	18:6a4db94011d3	18	The USART HAL driver can be used as follows:
sahilmgandhi	18:6a4db94011d3	19
sahilmgandhi	18:6a4db94011d3	20	(#) Declare a USART_HandleTypeDef handle structure.
sahilmgandhi	18:6a4db94011d3	21	(#) Initialize the USART low level resources by implementing the HAL_USART_MspInit () API:
sahilmgandhi	18:6a4db94011d3	22	(##) Enable the USARTx interface clock.
sahilmgandhi	18:6a4db94011d3	23	(##) USART pins configuration:
sahilmgandhi	18:6a4db94011d3	24	(+++) Enable the clock for the USART GPIOs.
sahilmgandhi	18:6a4db94011d3	25	(+++) Configure these USART pins as alternate function pull-up.
sahilmgandhi	18:6a4db94011d3	26	(##) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(),
sahilmgandhi	18:6a4db94011d3	27	HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
sahilmgandhi	18:6a4db94011d3	28	(+++) Configure the USARTx interrupt priority.
sahilmgandhi	18:6a4db94011d3	29	(+++) Enable the NVIC USART IRQ handle.
sahilmgandhi	18:6a4db94011d3	30	(##) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	31	HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
sahilmgandhi	18:6a4db94011d3	32	(+++) Declare a DMA handle structure for the Tx/Rx stream.
sahilmgandhi	18:6a4db94011d3	33	(+++) Enable the DMAx interface clock.
sahilmgandhi	18:6a4db94011d3	34	(+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
sahilmgandhi	18:6a4db94011d3	35	(+++) Configure the DMA Tx/Rx Stream.
sahilmgandhi	18:6a4db94011d3	36	(+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
sahilmgandhi	18:6a4db94011d3	37	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx Stream.
sahilmgandhi	18:6a4db94011d3	38
sahilmgandhi	18:6a4db94011d3	39	(#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
sahilmgandhi	18:6a4db94011d3	40	flow control and Mode(Receiver/Transmitter) in the husart Init structure.
sahilmgandhi	18:6a4db94011d3	41
sahilmgandhi	18:6a4db94011d3	42	(#) Initialize the USART registers by calling the HAL_USART_Init() API:
sahilmgandhi	18:6a4db94011d3	43	(++) These APIs configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
sahilmgandhi	18:6a4db94011d3	44	by calling the customized HAL_USART_MspInit(&husart) API.
sahilmgandhi	18:6a4db94011d3	45
sahilmgandhi	18:6a4db94011d3	46	-@@- The specific USART interrupts (Transmission complete interrupt,
sahilmgandhi	18:6a4db94011d3	47	RXNE interrupt and Error Interrupts) will be managed using the macros
sahilmgandhi	18:6a4db94011d3	48	__HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
sahilmgandhi	18:6a4db94011d3	49
sahilmgandhi	18:6a4db94011d3	50	(#) Three operation modes are available within this driver :
sahilmgandhi	18:6a4db94011d3	51
sahilmgandhi	18:6a4db94011d3	52	* Polling mode IO operation *
sahilmgandhi	18:6a4db94011d3	53	=================================
sahilmgandhi	18:6a4db94011d3	54	[..]
sahilmgandhi	18:6a4db94011d3	55	(+) Send an amount of data in blocking mode using HAL_USART_Transmit()
sahilmgandhi	18:6a4db94011d3	56	(+) Receive an amount of data in blocking mode using HAL_USART_Receive()
sahilmgandhi	18:6a4db94011d3	57
sahilmgandhi	18:6a4db94011d3	58	* Interrupt mode IO operation *
sahilmgandhi	18:6a4db94011d3	59	===================================
sahilmgandhi	18:6a4db94011d3	60	[..]
sahilmgandhi	18:6a4db94011d3	61	(+) Send an amount of data in non blocking mode using HAL_USART_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	62	(+) At transmission end of transfer HAL_USART_TxHalfCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	63	add his own code by customization of function pointer HAL_USART_TxCpltCallback
sahilmgandhi	18:6a4db94011d3	64	(+) Receive an amount of data in non blocking mode using HAL_USART_Receive_IT()
sahilmgandhi	18:6a4db94011d3	65	(+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	66	add his own code by customization of function pointer HAL_USART_RxCpltCallback
sahilmgandhi	18:6a4db94011d3	67	(+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	68	add his own code by customization of function pointer HAL_USART_ErrorCallback
sahilmgandhi	18:6a4db94011d3	69
sahilmgandhi	18:6a4db94011d3	70	* DMA mode IO operation *
sahilmgandhi	18:6a4db94011d3	71	==============================
sahilmgandhi	18:6a4db94011d3	72	[..]
sahilmgandhi	18:6a4db94011d3	73	(+) Send an amount of data in non blocking mode (DMA) using HAL_USART_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	74	(+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	75	add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
sahilmgandhi	18:6a4db94011d3	76	(+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	77	add his own code by customization of function pointer HAL_USART_TxCpltCallback
sahilmgandhi	18:6a4db94011d3	78	(+) Receive an amount of data in non blocking mode (DMA) using HAL_USART_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	79	(+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	80	add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
sahilmgandhi	18:6a4db94011d3	81	(+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	82	add his own code by customization of function pointer HAL_USART_RxCpltCallback
sahilmgandhi	18:6a4db94011d3	83	(+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	84	add his own code by customization of function pointer HAL_USART_ErrorCallback
sahilmgandhi	18:6a4db94011d3	85	(+) Pause the DMA Transfer using HAL_USART_DMAPause()
sahilmgandhi	18:6a4db94011d3	86	(+) Resume the DMA Transfer using HAL_USART_DMAResume()
sahilmgandhi	18:6a4db94011d3	87	(+) Stop the DMA Transfer using HAL_USART_DMAStop()
sahilmgandhi	18:6a4db94011d3	88
sahilmgandhi	18:6a4db94011d3	89	* USART HAL driver macros list *
sahilmgandhi	18:6a4db94011d3	90	=============================================
sahilmgandhi	18:6a4db94011d3	91	[..]
sahilmgandhi	18:6a4db94011d3	92	Below the list of most used macros in USART HAL driver.
sahilmgandhi	18:6a4db94011d3	93
sahilmgandhi	18:6a4db94011d3	94	(+) __HAL_USART_ENABLE: Enable the USART peripheral
sahilmgandhi	18:6a4db94011d3	95	(+) __HAL_USART_DISABLE: Disable the USART peripheral
sahilmgandhi	18:6a4db94011d3	96	(+) __HAL_USART_GET_FLAG : Check whether the specified USART flag is set or not
sahilmgandhi	18:6a4db94011d3	97	(+) __HAL_USART_CLEAR_FLAG : Clear the specified USART pending flag
sahilmgandhi	18:6a4db94011d3	98	(+) __HAL_USART_ENABLE_IT: Enable the specified USART interrupt
sahilmgandhi	18:6a4db94011d3	99	(+) __HAL_USART_DISABLE_IT: Disable the specified USART interrupt
sahilmgandhi	18:6a4db94011d3	100
sahilmgandhi	18:6a4db94011d3	101	[..]
sahilmgandhi	18:6a4db94011d3	102	(@) You can refer to the USART HAL driver header file for more useful macros
sahilmgandhi	18:6a4db94011d3	103
sahilmgandhi	18:6a4db94011d3	104	@endverbatim
sahilmgandhi	18:6a4db94011d3	105	******************************************************************************
sahilmgandhi	18:6a4db94011d3	106	* @attention
sahilmgandhi	18:6a4db94011d3	107	*
sahilmgandhi	18:6a4db94011d3	108	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi	18:6a4db94011d3	109	*
sahilmgandhi	18:6a4db94011d3	110	* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi	18:6a4db94011d3	111	* are permitted provided that the following conditions are met:
sahilmgandhi	18:6a4db94011d3	112	* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi	18:6a4db94011d3	113	* this list of conditions and the following disclaimer.
sahilmgandhi	18:6a4db94011d3	114	* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi	18:6a4db94011d3	115	* this list of conditions and the following disclaimer in the documentation
sahilmgandhi	18:6a4db94011d3	116	* and/or other materials provided with the distribution.
sahilmgandhi	18:6a4db94011d3	117	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi	18:6a4db94011d3	118	* may be used to endorse or promote products derived from this software
sahilmgandhi	18:6a4db94011d3	119	* without specific prior written permission.
sahilmgandhi	18:6a4db94011d3	120	*
sahilmgandhi	18:6a4db94011d3	121	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi	18:6a4db94011d3	122	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi	18:6a4db94011d3	123	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi	18:6a4db94011d3	124	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi	18:6a4db94011d3	125	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi	18:6a4db94011d3	126	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi	18:6a4db94011d3	127	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi	18:6a4db94011d3	128	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi	18:6a4db94011d3	129	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi	18:6a4db94011d3	130	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi	18:6a4db94011d3	131	*
sahilmgandhi	18:6a4db94011d3	132	******************************************************************************
sahilmgandhi	18:6a4db94011d3	133	*/
sahilmgandhi	18:6a4db94011d3	134
sahilmgandhi	18:6a4db94011d3	135	/* Includes ------------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	136	#include "stm32f2xx_hal.h"
sahilmgandhi	18:6a4db94011d3	137
sahilmgandhi	18:6a4db94011d3	138	/** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi	18:6a4db94011d3	139	* @{
sahilmgandhi	18:6a4db94011d3	140	*/
sahilmgandhi	18:6a4db94011d3	141
sahilmgandhi	18:6a4db94011d3	142	/** @defgroup USART USART
sahilmgandhi	18:6a4db94011d3	143	* @brief HAL USART Synchronous module driver
sahilmgandhi	18:6a4db94011d3	144	* @{
sahilmgandhi	18:6a4db94011d3	145	*/
sahilmgandhi	18:6a4db94011d3	146	#ifdef HAL_USART_MODULE_ENABLED
sahilmgandhi	18:6a4db94011d3	147	/* Private typedef -----------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	148	/* Private define ------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	149	/** @addtogroup USART_Private_Constants
sahilmgandhi	18:6a4db94011d3	150	* @{
sahilmgandhi	18:6a4db94011d3	151	*/
sahilmgandhi	18:6a4db94011d3	152	#define DUMMY_DATA 0xFFFFU
sahilmgandhi	18:6a4db94011d3	153	#define USART_TIMEOUT_VALUE 22000U
sahilmgandhi	18:6a4db94011d3	154	/**
sahilmgandhi	18:6a4db94011d3	155	* @}
sahilmgandhi	18:6a4db94011d3	156	*/
sahilmgandhi	18:6a4db94011d3	157	/* Private macro -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	158	/* Private variables ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	159	/* Private function prototypes -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	160	/* Private functions ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	161	/** @addtogroup USART_Private_Functions
sahilmgandhi	18:6a4db94011d3	162	* @{
sahilmgandhi	18:6a4db94011d3	163	*/
sahilmgandhi	18:6a4db94011d3	164	static void USART_EndTxTransfer(USART_HandleTypeDef *husart);
sahilmgandhi	18:6a4db94011d3	165	static void USART_EndRxTransfer(USART_HandleTypeDef *husart);
sahilmgandhi	18:6a4db94011d3	166	static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
sahilmgandhi	18:6a4db94011d3	167	static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
sahilmgandhi	18:6a4db94011d3	168	static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
sahilmgandhi	18:6a4db94011d3	169	static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
sahilmgandhi	18:6a4db94011d3	170	static void USART_SetConfig (USART_HandleTypeDef *husart);
sahilmgandhi	18:6a4db94011d3	171	static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	172	static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	173	static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	174	static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	175	static void USART_DMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	176	static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	177
sahilmgandhi	18:6a4db94011d3	178	static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
sahilmgandhi	18:6a4db94011d3	179	/**
sahilmgandhi	18:6a4db94011d3	180	* @}
sahilmgandhi	18:6a4db94011d3	181	*/
sahilmgandhi	18:6a4db94011d3	182
sahilmgandhi	18:6a4db94011d3	183	/* Exported functions --------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	184	/** @defgroup USART_Exported_Functions USART Exported Functions
sahilmgandhi	18:6a4db94011d3	185	* @{
sahilmgandhi	18:6a4db94011d3	186	*/
sahilmgandhi	18:6a4db94011d3	187
sahilmgandhi	18:6a4db94011d3	188	/** @defgroup USART_Exported_Functions_Group1 USART Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	189	* @brief Initialization and Configuration functions
sahilmgandhi	18:6a4db94011d3	190	*
sahilmgandhi	18:6a4db94011d3	191	@verbatim
sahilmgandhi	18:6a4db94011d3	192	==============================================================================
sahilmgandhi	18:6a4db94011d3	193	##### Initialization and Configuration functions #####
sahilmgandhi	18:6a4db94011d3	194	==============================================================================
sahilmgandhi	18:6a4db94011d3	195	[..]
sahilmgandhi	18:6a4db94011d3	196	This subsection provides a set of functions allowing to initialize the USART
sahilmgandhi	18:6a4db94011d3	197	in asynchronous and in synchronous modes.
sahilmgandhi	18:6a4db94011d3	198	(+) For the asynchronous mode only these parameters can be configured:
sahilmgandhi	18:6a4db94011d3	199	(++) Baud Rate
sahilmgandhi	18:6a4db94011d3	200	(++) Word Length
sahilmgandhi	18:6a4db94011d3	201	(++) Stop Bit
sahilmgandhi	18:6a4db94011d3	202	(++) Parity: If the parity is enabled, then the MSB bit of the data written
sahilmgandhi	18:6a4db94011d3	203	in the data register is transmitted but is changed by the parity bit.
sahilmgandhi	18:6a4db94011d3	204	Depending on the frame length defined by the M bit (8-bits or 9-bits),
sahilmgandhi	18:6a4db94011d3	205	please refer to Reference manual for possible USART frame formats.
sahilmgandhi	18:6a4db94011d3	206	(++) USART polarity
sahilmgandhi	18:6a4db94011d3	207	(++) USART phase
sahilmgandhi	18:6a4db94011d3	208	(++) USART LastBit
sahilmgandhi	18:6a4db94011d3	209	(++) Receiver/transmitter modes
sahilmgandhi	18:6a4db94011d3	210
sahilmgandhi	18:6a4db94011d3	211	[..]
sahilmgandhi	18:6a4db94011d3	212	The HAL_USART_Init() function follows the USART synchronous configuration
sahilmgandhi	18:6a4db94011d3	213	procedure (details for the procedure are available in reference manual (RM0329)).
sahilmgandhi	18:6a4db94011d3	214
sahilmgandhi	18:6a4db94011d3	215	@endverbatim
sahilmgandhi	18:6a4db94011d3	216	* @{
sahilmgandhi	18:6a4db94011d3	217	*/
sahilmgandhi	18:6a4db94011d3	218
sahilmgandhi	18:6a4db94011d3	219	/**
sahilmgandhi	18:6a4db94011d3	220	* @brief Initializes the USART mode according to the specified
sahilmgandhi	18:6a4db94011d3	221	* parameters in the USART_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	222	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	223	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	224	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	225	*/
sahilmgandhi	18:6a4db94011d3	226	HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	227	{
sahilmgandhi	18:6a4db94011d3	228	/* Check the USART handle allocation */
sahilmgandhi	18:6a4db94011d3	229	if(husart == NULL)
sahilmgandhi	18:6a4db94011d3	230	{
sahilmgandhi	18:6a4db94011d3	231	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	232	}
sahilmgandhi	18:6a4db94011d3	233
sahilmgandhi	18:6a4db94011d3	234	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	235	assert_param(IS_USART_INSTANCE(husart->Instance));
sahilmgandhi	18:6a4db94011d3	236
sahilmgandhi	18:6a4db94011d3	237	if(husart->State == HAL_USART_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	238	{
sahilmgandhi	18:6a4db94011d3	239	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	240	husart->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	241	/* Init the low level hardware */
sahilmgandhi	18:6a4db94011d3	242	HAL_USART_MspInit(husart);
sahilmgandhi	18:6a4db94011d3	243	}
sahilmgandhi	18:6a4db94011d3	244
sahilmgandhi	18:6a4db94011d3	245	husart->State = HAL_USART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	246
sahilmgandhi	18:6a4db94011d3	247	/* Set the USART Communication parameters */
sahilmgandhi	18:6a4db94011d3	248	USART_SetConfig(husart);
sahilmgandhi	18:6a4db94011d3	249
sahilmgandhi	18:6a4db94011d3	250	/* In USART mode, the following bits must be kept cleared:
sahilmgandhi	18:6a4db94011d3	251	- LINEN bit in the USART_CR2 register
sahilmgandhi	18:6a4db94011d3	252	- HDSEL, SCEN and IREN bits in the USART_CR3 register */
sahilmgandhi	18:6a4db94011d3	253	CLEAR_BIT(husart->Instance->CR2, USART_CR2_LINEN);
sahilmgandhi	18:6a4db94011d3	254	CLEAR_BIT(husart->Instance->CR3, (USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN));
sahilmgandhi	18:6a4db94011d3	255
sahilmgandhi	18:6a4db94011d3	256	/* Enable the Peripheral */
sahilmgandhi	18:6a4db94011d3	257	__HAL_USART_ENABLE(husart);
sahilmgandhi	18:6a4db94011d3	258
sahilmgandhi	18:6a4db94011d3	259	/* Initialize the USART state */
sahilmgandhi	18:6a4db94011d3	260	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	261	husart->State= HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	262
sahilmgandhi	18:6a4db94011d3	263	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	264	}
sahilmgandhi	18:6a4db94011d3	265
sahilmgandhi	18:6a4db94011d3	266	/**
sahilmgandhi	18:6a4db94011d3	267	* @brief DeInitializes the USART peripheral.
sahilmgandhi	18:6a4db94011d3	268	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	269	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	270	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	271	*/
sahilmgandhi	18:6a4db94011d3	272	HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	273	{
sahilmgandhi	18:6a4db94011d3	274	/* Check the USART handle allocation */
sahilmgandhi	18:6a4db94011d3	275	if(husart == NULL)
sahilmgandhi	18:6a4db94011d3	276	{
sahilmgandhi	18:6a4db94011d3	277	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	278	}
sahilmgandhi	18:6a4db94011d3	279
sahilmgandhi	18:6a4db94011d3	280	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	281	assert_param(IS_USART_INSTANCE(husart->Instance));
sahilmgandhi	18:6a4db94011d3	282
sahilmgandhi	18:6a4db94011d3	283	husart->State = HAL_USART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	284
sahilmgandhi	18:6a4db94011d3	285	/* Disable the Peripheral */
sahilmgandhi	18:6a4db94011d3	286	__HAL_USART_DISABLE(husart);
sahilmgandhi	18:6a4db94011d3	287
sahilmgandhi	18:6a4db94011d3	288	/* DeInit the low level hardware */
sahilmgandhi	18:6a4db94011d3	289	HAL_USART_MspDeInit(husart);
sahilmgandhi	18:6a4db94011d3	290
sahilmgandhi	18:6a4db94011d3	291	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	292	husart->State = HAL_USART_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	293
sahilmgandhi	18:6a4db94011d3	294	/* Release Lock */
sahilmgandhi	18:6a4db94011d3	295	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	296
sahilmgandhi	18:6a4db94011d3	297	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	298	}
sahilmgandhi	18:6a4db94011d3	299
sahilmgandhi	18:6a4db94011d3	300	/**
sahilmgandhi	18:6a4db94011d3	301	* @brief USART MSP Init.
sahilmgandhi	18:6a4db94011d3	302	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	303	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	304	* @retval None
sahilmgandhi	18:6a4db94011d3	305	*/
sahilmgandhi	18:6a4db94011d3	306	__weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	307	{
sahilmgandhi	18:6a4db94011d3	308	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	309	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	310	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	311	the HAL_USART_MspInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	312	*/
sahilmgandhi	18:6a4db94011d3	313	}
sahilmgandhi	18:6a4db94011d3	314
sahilmgandhi	18:6a4db94011d3	315	/**
sahilmgandhi	18:6a4db94011d3	316	* @brief USART MSP DeInit.
sahilmgandhi	18:6a4db94011d3	317	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	318	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	319	* @retval None
sahilmgandhi	18:6a4db94011d3	320	*/
sahilmgandhi	18:6a4db94011d3	321	__weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	322	{
sahilmgandhi	18:6a4db94011d3	323	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	324	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	325	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	326	the HAL_USART_MspDeInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	327	*/
sahilmgandhi	18:6a4db94011d3	328	}
sahilmgandhi	18:6a4db94011d3	329
sahilmgandhi	18:6a4db94011d3	330	/**
sahilmgandhi	18:6a4db94011d3	331	* @}
sahilmgandhi	18:6a4db94011d3	332	*/
sahilmgandhi	18:6a4db94011d3	333
sahilmgandhi	18:6a4db94011d3	334	/** @defgroup USART_Exported_Functions_Group2 IO operation functions
sahilmgandhi	18:6a4db94011d3	335	* @brief USART Transmit and Receive functions
sahilmgandhi	18:6a4db94011d3	336	*
sahilmgandhi	18:6a4db94011d3	337	@verbatim
sahilmgandhi	18:6a4db94011d3	338	==============================================================================
sahilmgandhi	18:6a4db94011d3	339	##### IO operation functions #####
sahilmgandhi	18:6a4db94011d3	340	==============================================================================
sahilmgandhi	18:6a4db94011d3	341	[..]
sahilmgandhi	18:6a4db94011d3	342	This subsection provides a set of functions allowing to manage the USART synchronous
sahilmgandhi	18:6a4db94011d3	343	data transfers.
sahilmgandhi	18:6a4db94011d3	344
sahilmgandhi	18:6a4db94011d3	345	[..]
sahilmgandhi	18:6a4db94011d3	346	The USART supports master mode only: it cannot receive or send data related to an input
sahilmgandhi	18:6a4db94011d3	347	clock (SCLK is always an output).
sahilmgandhi	18:6a4db94011d3	348
sahilmgandhi	18:6a4db94011d3	349	(#) There are two modes of transfer:
sahilmgandhi	18:6a4db94011d3	350	(++) Blocking mode: The communication is performed in polling mode.
sahilmgandhi	18:6a4db94011d3	351	The HAL status of all data processing is returned by the same function
sahilmgandhi	18:6a4db94011d3	352	after finishing transfer.
sahilmgandhi	18:6a4db94011d3	353	(++) No-Blocking mode: The communication is performed using Interrupts
sahilmgandhi	18:6a4db94011d3	354	or DMA, These API's return the HAL status.
sahilmgandhi	18:6a4db94011d3	355	The end of the data processing will be indicated through the
sahilmgandhi	18:6a4db94011d3	356	dedicated USART IRQ when using Interrupt mode or the DMA IRQ when
sahilmgandhi	18:6a4db94011d3	357	using DMA mode.
sahilmgandhi	18:6a4db94011d3	358	The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	359	user callbacks
sahilmgandhi	18:6a4db94011d3	360	will be executed respectively at the end of the transmit or Receive process
sahilmgandhi	18:6a4db94011d3	361	The HAL_USART_ErrorCallback() user callback will be executed when a communication
sahilmgandhi	18:6a4db94011d3	362	error is detected
sahilmgandhi	18:6a4db94011d3	363
sahilmgandhi	18:6a4db94011d3	364	(#) Blocking mode APIs are :
sahilmgandhi	18:6a4db94011d3	365	(++) HAL_USART_Transmit() in simplex mode
sahilmgandhi	18:6a4db94011d3	366	(++) HAL_USART_Receive() in full duplex receive only
sahilmgandhi	18:6a4db94011d3	367	(++) HAL_USART_TransmitReceive() in full duplex mode
sahilmgandhi	18:6a4db94011d3	368
sahilmgandhi	18:6a4db94011d3	369	(#) Non Blocking mode APIs with Interrupt are :
sahilmgandhi	18:6a4db94011d3	370	(++) HAL_USART_Transmit_IT()in simplex mode
sahilmgandhi	18:6a4db94011d3	371	(++) HAL_USART_Receive_IT() in full duplex receive only
sahilmgandhi	18:6a4db94011d3	372	(++) HAL_USART_TransmitReceive_IT() in full duplex mode
sahilmgandhi	18:6a4db94011d3	373	(++) HAL_USART_IRQHandler()
sahilmgandhi	18:6a4db94011d3	374
sahilmgandhi	18:6a4db94011d3	375	(#) Non Blocking mode functions with DMA are :
sahilmgandhi	18:6a4db94011d3	376	(++) HAL_USART_Transmit_DMA()in simplex mode
sahilmgandhi	18:6a4db94011d3	377	(++) HAL_USART_Receive_DMA() in full duplex receive only
sahilmgandhi	18:6a4db94011d3	378	(++) HAL_USART_TransmitReceie_DMA() in full duplex mode
sahilmgandhi	18:6a4db94011d3	379	(++) HAL_USART_DMAPause()
sahilmgandhi	18:6a4db94011d3	380	(++) HAL_USART_DMAResume()
sahilmgandhi	18:6a4db94011d3	381	(++) HAL_USART_DMAStop()
sahilmgandhi	18:6a4db94011d3	382
sahilmgandhi	18:6a4db94011d3	383	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
sahilmgandhi	18:6a4db94011d3	384	(++) HAL_USART_TxHalfCpltCallback()
sahilmgandhi	18:6a4db94011d3	385	(++) HAL_USART_TxCpltCallback()
sahilmgandhi	18:6a4db94011d3	386	(++) HAL_USART_RxHalfCpltCallback()
sahilmgandhi	18:6a4db94011d3	387	(++) HAL_USART_RxCpltCallback()
sahilmgandhi	18:6a4db94011d3	388	(++) HAL_USART_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	389	(++) HAL_USART_TxRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	390
sahilmgandhi	18:6a4db94011d3	391	@endverbatim
sahilmgandhi	18:6a4db94011d3	392	* @{
sahilmgandhi	18:6a4db94011d3	393	*/
sahilmgandhi	18:6a4db94011d3	394
sahilmgandhi	18:6a4db94011d3	395	/**
sahilmgandhi	18:6a4db94011d3	396	* @brief Simplex Send an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	397	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	398	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	399	* @param pTxData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	400	* @param Size: Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	401	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	402	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	403	*/
sahilmgandhi	18:6a4db94011d3	404	HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef husart, uint8_t pTxData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	405	{
sahilmgandhi	18:6a4db94011d3	406	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	407	uint32_t tickstart = 0U;
sahilmgandhi	18:6a4db94011d3	408
sahilmgandhi	18:6a4db94011d3	409	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	410	{
sahilmgandhi	18:6a4db94011d3	411	if((pTxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	412	{
sahilmgandhi	18:6a4db94011d3	413	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	414	}
sahilmgandhi	18:6a4db94011d3	415
sahilmgandhi	18:6a4db94011d3	416	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	417	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	418
sahilmgandhi	18:6a4db94011d3	419	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	420	husart->State = HAL_USART_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	421
sahilmgandhi	18:6a4db94011d3	422	/* Init tickstart for timeout managment */
sahilmgandhi	18:6a4db94011d3	423	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	424
sahilmgandhi	18:6a4db94011d3	425	husart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	426	husart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	427	while(husart->TxXferCount > 0U)
sahilmgandhi	18:6a4db94011d3	428	{
sahilmgandhi	18:6a4db94011d3	429	husart->TxXferCount--;
sahilmgandhi	18:6a4db94011d3	430	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	431	{
sahilmgandhi	18:6a4db94011d3	432	/* Wait for TC flag in order to write data in DR */
sahilmgandhi	18:6a4db94011d3	433	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	434	{
sahilmgandhi	18:6a4db94011d3	435	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	436	}
sahilmgandhi	18:6a4db94011d3	437	tmp = (uint16_t*) pTxData;
sahilmgandhi	18:6a4db94011d3	438	husart->Instance->DR = (*tmp & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	439	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	440	{
sahilmgandhi	18:6a4db94011d3	441	pTxData += 2U;
sahilmgandhi	18:6a4db94011d3	442	}
sahilmgandhi	18:6a4db94011d3	443	else
sahilmgandhi	18:6a4db94011d3	444	{
sahilmgandhi	18:6a4db94011d3	445	pTxData += 1U;
sahilmgandhi	18:6a4db94011d3	446	}
sahilmgandhi	18:6a4db94011d3	447	}
sahilmgandhi	18:6a4db94011d3	448	else
sahilmgandhi	18:6a4db94011d3	449	{
sahilmgandhi	18:6a4db94011d3	450	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	451	{
sahilmgandhi	18:6a4db94011d3	452	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	453	}
sahilmgandhi	18:6a4db94011d3	454	husart->Instance->DR = (*pTxData++ & (uint8_t)0xFFU);
sahilmgandhi	18:6a4db94011d3	455	}
sahilmgandhi	18:6a4db94011d3	456	}
sahilmgandhi	18:6a4db94011d3	457
sahilmgandhi	18:6a4db94011d3	458	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	459	{
sahilmgandhi	18:6a4db94011d3	460	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	461	}
sahilmgandhi	18:6a4db94011d3	462
sahilmgandhi	18:6a4db94011d3	463	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	464
sahilmgandhi	18:6a4db94011d3	465	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	466	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	467
sahilmgandhi	18:6a4db94011d3	468	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	469	}
sahilmgandhi	18:6a4db94011d3	470	else
sahilmgandhi	18:6a4db94011d3	471	{
sahilmgandhi	18:6a4db94011d3	472	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	473	}
sahilmgandhi	18:6a4db94011d3	474	}
sahilmgandhi	18:6a4db94011d3	475
sahilmgandhi	18:6a4db94011d3	476	/**
sahilmgandhi	18:6a4db94011d3	477	* @brief Full-Duplex Receive an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	478	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	479	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	480	* @param pRxData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	481	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	482	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	483	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	484	*/
sahilmgandhi	18:6a4db94011d3	485	HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef husart, uint8_t pRxData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	486	{
sahilmgandhi	18:6a4db94011d3	487	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	488	uint32_t tickstart = 0U;
sahilmgandhi	18:6a4db94011d3	489
sahilmgandhi	18:6a4db94011d3	490	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	491	{
sahilmgandhi	18:6a4db94011d3	492	if((pRxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	493	{
sahilmgandhi	18:6a4db94011d3	494	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	495	}
sahilmgandhi	18:6a4db94011d3	496	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	497	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	498
sahilmgandhi	18:6a4db94011d3	499	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	500	husart->State = HAL_USART_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	501
sahilmgandhi	18:6a4db94011d3	502	/* Init tickstart for timeout managment */
sahilmgandhi	18:6a4db94011d3	503	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	504
sahilmgandhi	18:6a4db94011d3	505	husart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	506	husart->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	507	/* Check the remain data to be received */
sahilmgandhi	18:6a4db94011d3	508	while(husart->RxXferCount > 0U)
sahilmgandhi	18:6a4db94011d3	509	{
sahilmgandhi	18:6a4db94011d3	510	husart->RxXferCount--;
sahilmgandhi	18:6a4db94011d3	511	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	512	{
sahilmgandhi	18:6a4db94011d3	513	/* Wait until TXE flag is set to send dummy byte in order to generate the clock for the slave to send data */
sahilmgandhi	18:6a4db94011d3	514	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	515	{
sahilmgandhi	18:6a4db94011d3	516	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	517	}
sahilmgandhi	18:6a4db94011d3	518	/* Send dummy byte in order to generate clock */
sahilmgandhi	18:6a4db94011d3	519	husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	520
sahilmgandhi	18:6a4db94011d3	521	/* Wait for RXNE Flag */
sahilmgandhi	18:6a4db94011d3	522	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	523	{
sahilmgandhi	18:6a4db94011d3	524	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	525	}
sahilmgandhi	18:6a4db94011d3	526	tmp = (uint16_t*) pRxData ;
sahilmgandhi	18:6a4db94011d3	527	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	528	{
sahilmgandhi	18:6a4db94011d3	529	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	530	pRxData +=2;
sahilmgandhi	18:6a4db94011d3	531	}
sahilmgandhi	18:6a4db94011d3	532	else
sahilmgandhi	18:6a4db94011d3	533	{
sahilmgandhi	18:6a4db94011d3	534	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	535	pRxData +=1;
sahilmgandhi	18:6a4db94011d3	536	}
sahilmgandhi	18:6a4db94011d3	537	}
sahilmgandhi	18:6a4db94011d3	538	else
sahilmgandhi	18:6a4db94011d3	539	{
sahilmgandhi	18:6a4db94011d3	540	/* Wait until TXE flag is set to send dummy byte in order to generate the clock for the slave to send data */
sahilmgandhi	18:6a4db94011d3	541	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	542	{
sahilmgandhi	18:6a4db94011d3	543	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	544	}
sahilmgandhi	18:6a4db94011d3	545
sahilmgandhi	18:6a4db94011d3	546	/* Send Dummy Byte in order to generate clock */
sahilmgandhi	18:6a4db94011d3	547	husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	548
sahilmgandhi	18:6a4db94011d3	549	/* Wait until RXNE flag is set to receive the byte */
sahilmgandhi	18:6a4db94011d3	550	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	551	{
sahilmgandhi	18:6a4db94011d3	552	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	553	}
sahilmgandhi	18:6a4db94011d3	554	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	555	{
sahilmgandhi	18:6a4db94011d3	556	/* Receive data */
sahilmgandhi	18:6a4db94011d3	557	*pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	558	}
sahilmgandhi	18:6a4db94011d3	559	else
sahilmgandhi	18:6a4db94011d3	560	{
sahilmgandhi	18:6a4db94011d3	561	/* Receive data */
sahilmgandhi	18:6a4db94011d3	562	*pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
sahilmgandhi	18:6a4db94011d3	563	}
sahilmgandhi	18:6a4db94011d3	564
sahilmgandhi	18:6a4db94011d3	565	}
sahilmgandhi	18:6a4db94011d3	566	}
sahilmgandhi	18:6a4db94011d3	567
sahilmgandhi	18:6a4db94011d3	568	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	569
sahilmgandhi	18:6a4db94011d3	570	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	571	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	572
sahilmgandhi	18:6a4db94011d3	573	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	574	}
sahilmgandhi	18:6a4db94011d3	575	else
sahilmgandhi	18:6a4db94011d3	576	{
sahilmgandhi	18:6a4db94011d3	577	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	578	}
sahilmgandhi	18:6a4db94011d3	579	}
sahilmgandhi	18:6a4db94011d3	580
sahilmgandhi	18:6a4db94011d3	581	/**
sahilmgandhi	18:6a4db94011d3	582	* @brief Full-Duplex Send receive an amount of data in full-duplex mode (blocking mode).
sahilmgandhi	18:6a4db94011d3	583	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	584	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	585	* @param pTxData: Pointer to data transmitted buffer
sahilmgandhi	18:6a4db94011d3	586	* @param pRxData: Pointer to data received buffer
sahilmgandhi	18:6a4db94011d3	587	* @param Size: Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	588	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	589	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	590	*/
sahilmgandhi	18:6a4db94011d3	591	HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef husart, uint8_t pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	592	{
sahilmgandhi	18:6a4db94011d3	593	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	594	uint32_t tickstart = 0U;
sahilmgandhi	18:6a4db94011d3	595
sahilmgandhi	18:6a4db94011d3	596	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	597	{
sahilmgandhi	18:6a4db94011d3	598	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	599	{
sahilmgandhi	18:6a4db94011d3	600	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	601	}
sahilmgandhi	18:6a4db94011d3	602	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	603	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	604
sahilmgandhi	18:6a4db94011d3	605	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	606	husart->State = HAL_USART_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	607
sahilmgandhi	18:6a4db94011d3	608	/* Init tickstart for timeout managment */
sahilmgandhi	18:6a4db94011d3	609	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	610
sahilmgandhi	18:6a4db94011d3	611	husart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	612	husart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	613	husart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	614	husart->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	615
sahilmgandhi	18:6a4db94011d3	616	/* Check the remain data to be received */
sahilmgandhi	18:6a4db94011d3	617	while(husart->TxXferCount > 0U)
sahilmgandhi	18:6a4db94011d3	618	{
sahilmgandhi	18:6a4db94011d3	619	husart->TxXferCount--;
sahilmgandhi	18:6a4db94011d3	620	husart->RxXferCount--;
sahilmgandhi	18:6a4db94011d3	621	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	622	{
sahilmgandhi	18:6a4db94011d3	623	/* Wait for TC flag in order to write data in DR */
sahilmgandhi	18:6a4db94011d3	624	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	625	{
sahilmgandhi	18:6a4db94011d3	626	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	627	}
sahilmgandhi	18:6a4db94011d3	628	tmp = (uint16_t*) pTxData;
sahilmgandhi	18:6a4db94011d3	629	husart->Instance->DR = (*tmp & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	630	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	631	{
sahilmgandhi	18:6a4db94011d3	632	pTxData += 2U;
sahilmgandhi	18:6a4db94011d3	633	}
sahilmgandhi	18:6a4db94011d3	634	else
sahilmgandhi	18:6a4db94011d3	635	{
sahilmgandhi	18:6a4db94011d3	636	pTxData += 1U;
sahilmgandhi	18:6a4db94011d3	637	}
sahilmgandhi	18:6a4db94011d3	638
sahilmgandhi	18:6a4db94011d3	639	/* Wait for RXNE Flag */
sahilmgandhi	18:6a4db94011d3	640	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	641	{
sahilmgandhi	18:6a4db94011d3	642	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	643	}
sahilmgandhi	18:6a4db94011d3	644	tmp = (uint16_t*) pRxData ;
sahilmgandhi	18:6a4db94011d3	645	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	646	{
sahilmgandhi	18:6a4db94011d3	647	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	648	pRxData += 2U;
sahilmgandhi	18:6a4db94011d3	649	}
sahilmgandhi	18:6a4db94011d3	650	else
sahilmgandhi	18:6a4db94011d3	651	{
sahilmgandhi	18:6a4db94011d3	652	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	653	pRxData += 1U;
sahilmgandhi	18:6a4db94011d3	654	}
sahilmgandhi	18:6a4db94011d3	655	}
sahilmgandhi	18:6a4db94011d3	656	else
sahilmgandhi	18:6a4db94011d3	657	{
sahilmgandhi	18:6a4db94011d3	658	/* Wait for TC flag in order to write data in DR */
sahilmgandhi	18:6a4db94011d3	659	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	660	{
sahilmgandhi	18:6a4db94011d3	661	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	662	}
sahilmgandhi	18:6a4db94011d3	663	husart->Instance->DR = (*pTxData++ & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	664
sahilmgandhi	18:6a4db94011d3	665	/* Wait for RXNE Flag */
sahilmgandhi	18:6a4db94011d3	666	if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	667	{
sahilmgandhi	18:6a4db94011d3	668	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	669	}
sahilmgandhi	18:6a4db94011d3	670	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	671	{
sahilmgandhi	18:6a4db94011d3	672	/* Receive data */
sahilmgandhi	18:6a4db94011d3	673	*pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	674	}
sahilmgandhi	18:6a4db94011d3	675	else
sahilmgandhi	18:6a4db94011d3	676	{
sahilmgandhi	18:6a4db94011d3	677	/* Receive data */
sahilmgandhi	18:6a4db94011d3	678	*pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
sahilmgandhi	18:6a4db94011d3	679	}
sahilmgandhi	18:6a4db94011d3	680	}
sahilmgandhi	18:6a4db94011d3	681	}
sahilmgandhi	18:6a4db94011d3	682
sahilmgandhi	18:6a4db94011d3	683	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	684
sahilmgandhi	18:6a4db94011d3	685	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	686	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	687
sahilmgandhi	18:6a4db94011d3	688	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	689	}
sahilmgandhi	18:6a4db94011d3	690	else
sahilmgandhi	18:6a4db94011d3	691	{
sahilmgandhi	18:6a4db94011d3	692	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	693	}
sahilmgandhi	18:6a4db94011d3	694	}
sahilmgandhi	18:6a4db94011d3	695
sahilmgandhi	18:6a4db94011d3	696	/**
sahilmgandhi	18:6a4db94011d3	697	* @brief Simplex Send an amount of data in non-blocking mode.
sahilmgandhi	18:6a4db94011d3	698	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	699	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	700	* @param pTxData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	701	* @param Size: Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	702	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	703	* @note The USART errors are not managed to avoid the overrun error.
sahilmgandhi	18:6a4db94011d3	704	*/
sahilmgandhi	18:6a4db94011d3	705	HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef husart, uint8_t pTxData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	706	{
sahilmgandhi	18:6a4db94011d3	707	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	708	{
sahilmgandhi	18:6a4db94011d3	709	if((pTxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	710	{
sahilmgandhi	18:6a4db94011d3	711	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	712	}
sahilmgandhi	18:6a4db94011d3	713
sahilmgandhi	18:6a4db94011d3	714	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	715	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	716
sahilmgandhi	18:6a4db94011d3	717	husart->pTxBuffPtr = pTxData;
sahilmgandhi	18:6a4db94011d3	718	husart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	719	husart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	720
sahilmgandhi	18:6a4db94011d3	721	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	722	husart->State = HAL_USART_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	723
sahilmgandhi	18:6a4db94011d3	724	/* The USART Error Interrupts: (Frame error, Noise error, Overrun error)
sahilmgandhi	18:6a4db94011d3	725	are not managed by the USART transmit process to avoid the overrun interrupt
sahilmgandhi	18:6a4db94011d3	726	when the USART mode is configured for transmit and receive "USART_MODE_TX_RX"
sahilmgandhi	18:6a4db94011d3	727	to benefit for the frame error and noise interrupts the USART mode should be
sahilmgandhi	18:6a4db94011d3	728	configured only for transmit "USART_MODE_TX"
sahilmgandhi	18:6a4db94011d3	729	The __HAL_USART_ENABLE_IT(husart, USART_IT_ERR) can be used to enable the Frame error,
sahilmgandhi	18:6a4db94011d3	730	Noise error interrupt */
sahilmgandhi	18:6a4db94011d3	731
sahilmgandhi	18:6a4db94011d3	732	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	733	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	734
sahilmgandhi	18:6a4db94011d3	735	/* Enable the USART Transmit Data Register Empty Interrupt */
sahilmgandhi	18:6a4db94011d3	736	SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
sahilmgandhi	18:6a4db94011d3	737
sahilmgandhi	18:6a4db94011d3	738	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	739	}
sahilmgandhi	18:6a4db94011d3	740	else
sahilmgandhi	18:6a4db94011d3	741	{
sahilmgandhi	18:6a4db94011d3	742	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	743	}
sahilmgandhi	18:6a4db94011d3	744	}
sahilmgandhi	18:6a4db94011d3	745
sahilmgandhi	18:6a4db94011d3	746	/**
sahilmgandhi	18:6a4db94011d3	747	* @brief Simplex Receive an amount of data in non-blocking mode.
sahilmgandhi	18:6a4db94011d3	748	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	749	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	750	* @param pRxData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	751	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	752	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	753	*/
sahilmgandhi	18:6a4db94011d3	754	HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef husart, uint8_t pRxData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	755	{
sahilmgandhi	18:6a4db94011d3	756	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	757	{
sahilmgandhi	18:6a4db94011d3	758	if((pRxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	759	{
sahilmgandhi	18:6a4db94011d3	760	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	761	}
sahilmgandhi	18:6a4db94011d3	762	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	763	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	764
sahilmgandhi	18:6a4db94011d3	765	husart->pRxBuffPtr = pRxData;
sahilmgandhi	18:6a4db94011d3	766	husart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	767	husart->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	768
sahilmgandhi	18:6a4db94011d3	769	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	770	husart->State = HAL_USART_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	771
sahilmgandhi	18:6a4db94011d3	772	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	773	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	774
sahilmgandhi	18:6a4db94011d3	775	/* Enable the USART Parity Error and Data Register not empty Interrupts */
sahilmgandhi	18:6a4db94011d3	776	SET_BIT(husart->Instance->CR1, USART_CR1_PEIE \| USART_CR1_RXNEIE);
sahilmgandhi	18:6a4db94011d3	777
sahilmgandhi	18:6a4db94011d3	778	/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	779	SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	780
sahilmgandhi	18:6a4db94011d3	781	/* Send dummy byte in order to generate the clock for the slave to send data */
sahilmgandhi	18:6a4db94011d3	782	husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	783
sahilmgandhi	18:6a4db94011d3	784	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	785	}
sahilmgandhi	18:6a4db94011d3	786	else
sahilmgandhi	18:6a4db94011d3	787	{
sahilmgandhi	18:6a4db94011d3	788	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	789	}
sahilmgandhi	18:6a4db94011d3	790	}
sahilmgandhi	18:6a4db94011d3	791
sahilmgandhi	18:6a4db94011d3	792	/**
sahilmgandhi	18:6a4db94011d3	793	* @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
sahilmgandhi	18:6a4db94011d3	794	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	795	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	796	* @param pTxData: Pointer to data transmitted buffer
sahilmgandhi	18:6a4db94011d3	797	* @param pRxData: Pointer to data received buffer
sahilmgandhi	18:6a4db94011d3	798	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	799	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	800	*/
sahilmgandhi	18:6a4db94011d3	801	HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef husart, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	802	{
sahilmgandhi	18:6a4db94011d3	803	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	804	{
sahilmgandhi	18:6a4db94011d3	805	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	806	{
sahilmgandhi	18:6a4db94011d3	807	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	808	}
sahilmgandhi	18:6a4db94011d3	809	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	810	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	811
sahilmgandhi	18:6a4db94011d3	812	husart->pRxBuffPtr = pRxData;
sahilmgandhi	18:6a4db94011d3	813	husart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	814	husart->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	815	husart->pTxBuffPtr = pTxData;
sahilmgandhi	18:6a4db94011d3	816	husart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	817	husart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	818
sahilmgandhi	18:6a4db94011d3	819	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	820	husart->State = HAL_USART_STATE_BUSY_TX_RX;
sahilmgandhi	18:6a4db94011d3	821
sahilmgandhi	18:6a4db94011d3	822	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	823	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	824
sahilmgandhi	18:6a4db94011d3	825	/* Enable the USART Data Register not empty Interrupt */
sahilmgandhi	18:6a4db94011d3	826	SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
sahilmgandhi	18:6a4db94011d3	827
sahilmgandhi	18:6a4db94011d3	828	/* Enable the USART Parity Error Interrupt */
sahilmgandhi	18:6a4db94011d3	829	SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	830
sahilmgandhi	18:6a4db94011d3	831	/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	832	SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	833
sahilmgandhi	18:6a4db94011d3	834	/* Enable the USART Transmit Data Register Empty Interrupt */
sahilmgandhi	18:6a4db94011d3	835	SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
sahilmgandhi	18:6a4db94011d3	836
sahilmgandhi	18:6a4db94011d3	837	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	838	}
sahilmgandhi	18:6a4db94011d3	839	else
sahilmgandhi	18:6a4db94011d3	840	{
sahilmgandhi	18:6a4db94011d3	841	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	842	}
sahilmgandhi	18:6a4db94011d3	843	}
sahilmgandhi	18:6a4db94011d3	844
sahilmgandhi	18:6a4db94011d3	845	/**
sahilmgandhi	18:6a4db94011d3	846	* @brief Simplex Send an amount of data in non-blocking mode.
sahilmgandhi	18:6a4db94011d3	847	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	848	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	849	* @param pTxData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	850	* @param Size: Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	851	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	852	*/
sahilmgandhi	18:6a4db94011d3	853	HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef husart, uint8_t pTxData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	854	{
sahilmgandhi	18:6a4db94011d3	855	uint32_t *tmp;
sahilmgandhi	18:6a4db94011d3	856
sahilmgandhi	18:6a4db94011d3	857	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	858	{
sahilmgandhi	18:6a4db94011d3	859	if((pTxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	860	{
sahilmgandhi	18:6a4db94011d3	861	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	862	}
sahilmgandhi	18:6a4db94011d3	863	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	864	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	865
sahilmgandhi	18:6a4db94011d3	866	husart->pTxBuffPtr = pTxData;
sahilmgandhi	18:6a4db94011d3	867	husart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	868	husart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	869
sahilmgandhi	18:6a4db94011d3	870	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	871	husart->State = HAL_USART_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	872
sahilmgandhi	18:6a4db94011d3	873	/* Set the USART DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	874	husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
sahilmgandhi	18:6a4db94011d3	875
sahilmgandhi	18:6a4db94011d3	876	/* Set the USART DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	877	husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
sahilmgandhi	18:6a4db94011d3	878
sahilmgandhi	18:6a4db94011d3	879	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	880	husart->hdmatx->XferErrorCallback = USART_DMAError;
sahilmgandhi	18:6a4db94011d3	881
sahilmgandhi	18:6a4db94011d3	882	/* Set the DMA abort callback */
sahilmgandhi	18:6a4db94011d3	883	husart->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	884
sahilmgandhi	18:6a4db94011d3	885	/* Enable the USART transmit DMA Stream */
sahilmgandhi	18:6a4db94011d3	886	tmp = (uint32_t*)&pTxData;
sahilmgandhi	18:6a4db94011d3	887	HAL_DMA_Start_IT(husart->hdmatx, (uint32_t)tmp, (uint32_t)&husart->Instance->DR, Size);
sahilmgandhi	18:6a4db94011d3	888
sahilmgandhi	18:6a4db94011d3	889	/* Clear the TC flag in the SR register by writing 0 to it */
sahilmgandhi	18:6a4db94011d3	890	__HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC);
sahilmgandhi	18:6a4db94011d3	891
sahilmgandhi	18:6a4db94011d3	892	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	893	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	894
sahilmgandhi	18:6a4db94011d3	895	/* Enable the DMA transfer for transmit request by setting the DMAT bit
sahilmgandhi	18:6a4db94011d3	896	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	897	SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	898
sahilmgandhi	18:6a4db94011d3	899	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	900	}
sahilmgandhi	18:6a4db94011d3	901	else
sahilmgandhi	18:6a4db94011d3	902	{
sahilmgandhi	18:6a4db94011d3	903	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	904	}
sahilmgandhi	18:6a4db94011d3	905	}
sahilmgandhi	18:6a4db94011d3	906
sahilmgandhi	18:6a4db94011d3	907	/**
sahilmgandhi	18:6a4db94011d3	908	* @brief Full-Duplex Receive an amount of data in non-blocking mode.
sahilmgandhi	18:6a4db94011d3	909	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	910	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	911	* @param pRxData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	912	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	913	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	914	* @note The USART DMA transmit stream must be configured in order to generate the clock for the slave.
sahilmgandhi	18:6a4db94011d3	915	* @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit.
sahilmgandhi	18:6a4db94011d3	916	*/
sahilmgandhi	18:6a4db94011d3	917	HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef husart, uint8_t pRxData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	918	{
sahilmgandhi	18:6a4db94011d3	919	uint32_t *tmp;
sahilmgandhi	18:6a4db94011d3	920
sahilmgandhi	18:6a4db94011d3	921	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	922	{
sahilmgandhi	18:6a4db94011d3	923	if((pRxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	924	{
sahilmgandhi	18:6a4db94011d3	925	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	926	}
sahilmgandhi	18:6a4db94011d3	927
sahilmgandhi	18:6a4db94011d3	928	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	929	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	930
sahilmgandhi	18:6a4db94011d3	931	husart->pRxBuffPtr = pRxData;
sahilmgandhi	18:6a4db94011d3	932	husart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	933	husart->pTxBuffPtr = pRxData;
sahilmgandhi	18:6a4db94011d3	934	husart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	935
sahilmgandhi	18:6a4db94011d3	936	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	937	husart->State = HAL_USART_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	938
sahilmgandhi	18:6a4db94011d3	939	/* Set the USART DMA Rx transfer complete callback */
sahilmgandhi	18:6a4db94011d3	940	husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
sahilmgandhi	18:6a4db94011d3	941
sahilmgandhi	18:6a4db94011d3	942	/* Set the USART DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	943	husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
sahilmgandhi	18:6a4db94011d3	944
sahilmgandhi	18:6a4db94011d3	945	/* Set the USART DMA Rx transfer error callback */
sahilmgandhi	18:6a4db94011d3	946	husart->hdmarx->XferErrorCallback = USART_DMAError;
sahilmgandhi	18:6a4db94011d3	947
sahilmgandhi	18:6a4db94011d3	948	/* Set the DMA abort callback */
sahilmgandhi	18:6a4db94011d3	949	husart->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	950
sahilmgandhi	18:6a4db94011d3	951	/* Set the USART Tx DMA transfer complete callback as NULL because the communication closing
sahilmgandhi	18:6a4db94011d3	952	is performed in DMA reception complete callback */
sahilmgandhi	18:6a4db94011d3	953	husart->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	954	husart->hdmatx->XferCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	955
sahilmgandhi	18:6a4db94011d3	956	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	957	husart->hdmatx->XferErrorCallback = USART_DMAError;
sahilmgandhi	18:6a4db94011d3	958
sahilmgandhi	18:6a4db94011d3	959	/* Set the DMA AbortCpltCallback */
sahilmgandhi	18:6a4db94011d3	960	husart->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	961
sahilmgandhi	18:6a4db94011d3	962	/* Enable the USART receive DMA Stream */
sahilmgandhi	18:6a4db94011d3	963	tmp = (uint32_t*)&pRxData;
sahilmgandhi	18:6a4db94011d3	964	HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, (uint32_t)tmp, Size);
sahilmgandhi	18:6a4db94011d3	965
sahilmgandhi	18:6a4db94011d3	966	/* Enable the USART transmit DMA Stream: the transmit stream is used in order
sahilmgandhi	18:6a4db94011d3	967	to generate in the non-blocking mode the clock to the slave device,
sahilmgandhi	18:6a4db94011d3	968	this mode isn't a simplex receive mode but a full-duplex receive one */
sahilmgandhi	18:6a4db94011d3	969	HAL_DMA_Start_IT(husart->hdmatx, (uint32_t)tmp, (uint32_t)&husart->Instance->DR, Size);
sahilmgandhi	18:6a4db94011d3	970
sahilmgandhi	18:6a4db94011d3	971	/* Clear the Overrun flag just before enabling the DMA Rx request: mandatory for the second transfer
sahilmgandhi	18:6a4db94011d3	972	when using the USART in circular mode */
sahilmgandhi	18:6a4db94011d3	973	__HAL_USART_CLEAR_OREFLAG(husart);
sahilmgandhi	18:6a4db94011d3	974
sahilmgandhi	18:6a4db94011d3	975	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	976	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	977
sahilmgandhi	18:6a4db94011d3	978	/* Enable the USART Parity Error Interrupt */
sahilmgandhi	18:6a4db94011d3	979	SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	980
sahilmgandhi	18:6a4db94011d3	981	/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	982	SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	983
sahilmgandhi	18:6a4db94011d3	984	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
sahilmgandhi	18:6a4db94011d3	985	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	986	SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	987
sahilmgandhi	18:6a4db94011d3	988	/* Enable the DMA transfer for transmit request by setting the DMAT bit
sahilmgandhi	18:6a4db94011d3	989	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	990	SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	991
sahilmgandhi	18:6a4db94011d3	992	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	993	}
sahilmgandhi	18:6a4db94011d3	994	else
sahilmgandhi	18:6a4db94011d3	995	{
sahilmgandhi	18:6a4db94011d3	996	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	997	}
sahilmgandhi	18:6a4db94011d3	998	}
sahilmgandhi	18:6a4db94011d3	999
sahilmgandhi	18:6a4db94011d3	1000	/**
sahilmgandhi	18:6a4db94011d3	1001	* @brief Full-Duplex Transmit Receive an amount of data in non-blocking mode.
sahilmgandhi	18:6a4db94011d3	1002	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1003	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1004	* @param pTxData: Pointer to data transmitted buffer
sahilmgandhi	18:6a4db94011d3	1005	* @param pRxData: Pointer to data received buffer
sahilmgandhi	18:6a4db94011d3	1006	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	1007	* @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit.
sahilmgandhi	18:6a4db94011d3	1008	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1009	*/
sahilmgandhi	18:6a4db94011d3	1010	HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef husart, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1011	{
sahilmgandhi	18:6a4db94011d3	1012	uint32_t *tmp;
sahilmgandhi	18:6a4db94011d3	1013
sahilmgandhi	18:6a4db94011d3	1014	if(husart->State == HAL_USART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1015	{
sahilmgandhi	18:6a4db94011d3	1016	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1017	{
sahilmgandhi	18:6a4db94011d3	1018	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1019	}
sahilmgandhi	18:6a4db94011d3	1020	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1021	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	1022
sahilmgandhi	18:6a4db94011d3	1023	husart->pRxBuffPtr = pRxData;
sahilmgandhi	18:6a4db94011d3	1024	husart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	1025	husart->pTxBuffPtr = pTxData;
sahilmgandhi	18:6a4db94011d3	1026	husart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	1027
sahilmgandhi	18:6a4db94011d3	1028	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1029	husart->State = HAL_USART_STATE_BUSY_TX_RX;
sahilmgandhi	18:6a4db94011d3	1030
sahilmgandhi	18:6a4db94011d3	1031	/* Set the USART DMA Rx transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1032	husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
sahilmgandhi	18:6a4db94011d3	1033
sahilmgandhi	18:6a4db94011d3	1034	/* Set the USART DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1035	husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
sahilmgandhi	18:6a4db94011d3	1036
sahilmgandhi	18:6a4db94011d3	1037	/* Set the USART DMA Tx transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1038	husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
sahilmgandhi	18:6a4db94011d3	1039
sahilmgandhi	18:6a4db94011d3	1040	/* Set the USART DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1041	husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
sahilmgandhi	18:6a4db94011d3	1042
sahilmgandhi	18:6a4db94011d3	1043	/* Set the USART DMA Tx transfer error callback */
sahilmgandhi	18:6a4db94011d3	1044	husart->hdmatx->XferErrorCallback = USART_DMAError;
sahilmgandhi	18:6a4db94011d3	1045
sahilmgandhi	18:6a4db94011d3	1046	/* Set the USART DMA Rx transfer error callback */
sahilmgandhi	18:6a4db94011d3	1047	husart->hdmarx->XferErrorCallback = USART_DMAError;
sahilmgandhi	18:6a4db94011d3	1048
sahilmgandhi	18:6a4db94011d3	1049	/* Set the DMA abort callback */
sahilmgandhi	18:6a4db94011d3	1050	husart->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1051
sahilmgandhi	18:6a4db94011d3	1052	/* Enable the USART receive DMA Stream */
sahilmgandhi	18:6a4db94011d3	1053	tmp = (uint32_t*)&pRxData;
sahilmgandhi	18:6a4db94011d3	1054	HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, (uint32_t)tmp, Size);
sahilmgandhi	18:6a4db94011d3	1055
sahilmgandhi	18:6a4db94011d3	1056	/* Enable the USART transmit DMA Stream */
sahilmgandhi	18:6a4db94011d3	1057	tmp = (uint32_t*)&pTxData;
sahilmgandhi	18:6a4db94011d3	1058	HAL_DMA_Start_IT(husart->hdmatx, (uint32_t)tmp, (uint32_t)&husart->Instance->DR, Size);
sahilmgandhi	18:6a4db94011d3	1059
sahilmgandhi	18:6a4db94011d3	1060	/* Clear the TC flag in the SR register by writing 0 to it */
sahilmgandhi	18:6a4db94011d3	1061	__HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC);
sahilmgandhi	18:6a4db94011d3	1062
sahilmgandhi	18:6a4db94011d3	1063	/* Clear the Overrun flag: mandatory for the second transfer in circular mode */
sahilmgandhi	18:6a4db94011d3	1064	__HAL_USART_CLEAR_OREFLAG(husart);
sahilmgandhi	18:6a4db94011d3	1065
sahilmgandhi	18:6a4db94011d3	1066	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1067	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	1068
sahilmgandhi	18:6a4db94011d3	1069	/* Enable the USART Parity Error Interrupt */
sahilmgandhi	18:6a4db94011d3	1070	SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1071
sahilmgandhi	18:6a4db94011d3	1072	/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	1073	SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1074
sahilmgandhi	18:6a4db94011d3	1075	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
sahilmgandhi	18:6a4db94011d3	1076	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	1077	SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1078
sahilmgandhi	18:6a4db94011d3	1079	/* Enable the DMA transfer for transmit request by setting the DMAT bit
sahilmgandhi	18:6a4db94011d3	1080	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	1081	SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1082
sahilmgandhi	18:6a4db94011d3	1083	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1084	}
sahilmgandhi	18:6a4db94011d3	1085	else
sahilmgandhi	18:6a4db94011d3	1086	{
sahilmgandhi	18:6a4db94011d3	1087	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1088	}
sahilmgandhi	18:6a4db94011d3	1089	}
sahilmgandhi	18:6a4db94011d3	1090
sahilmgandhi	18:6a4db94011d3	1091	/**
sahilmgandhi	18:6a4db94011d3	1092	* @brief Pauses the DMA Transfer.
sahilmgandhi	18:6a4db94011d3	1093	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1094	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1095	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1096	*/
sahilmgandhi	18:6a4db94011d3	1097	HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1098	{
sahilmgandhi	18:6a4db94011d3	1099	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1100	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	1101
sahilmgandhi	18:6a4db94011d3	1102	/* Disable the USART DMA Tx request */
sahilmgandhi	18:6a4db94011d3	1103	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1104
sahilmgandhi	18:6a4db94011d3	1105	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1106	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	1107
sahilmgandhi	18:6a4db94011d3	1108	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1109	}
sahilmgandhi	18:6a4db94011d3	1110
sahilmgandhi	18:6a4db94011d3	1111	/**
sahilmgandhi	18:6a4db94011d3	1112	* @brief Resumes the DMA Transfer.
sahilmgandhi	18:6a4db94011d3	1113	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1114	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1115	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1116	*/
sahilmgandhi	18:6a4db94011d3	1117	HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1118	{
sahilmgandhi	18:6a4db94011d3	1119	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1120	__HAL_LOCK(husart);
sahilmgandhi	18:6a4db94011d3	1121
sahilmgandhi	18:6a4db94011d3	1122	/* Enable the USART DMA Tx request */
sahilmgandhi	18:6a4db94011d3	1123	SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1124
sahilmgandhi	18:6a4db94011d3	1125	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1126	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	1127
sahilmgandhi	18:6a4db94011d3	1128	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1129	}
sahilmgandhi	18:6a4db94011d3	1130
sahilmgandhi	18:6a4db94011d3	1131	/**
sahilmgandhi	18:6a4db94011d3	1132	* @brief Stops the DMA Transfer.
sahilmgandhi	18:6a4db94011d3	1133	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1134	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1135	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1136	*/
sahilmgandhi	18:6a4db94011d3	1137	HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1138	{
sahilmgandhi	18:6a4db94011d3	1139	uint32_t dmarequest = 0x00U;
sahilmgandhi	18:6a4db94011d3	1140	/* The Lock is not implemented on this API to allow the user application
sahilmgandhi	18:6a4db94011d3	1141	to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback():
sahilmgandhi	18:6a4db94011d3	1142	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
sahilmgandhi	18:6a4db94011d3	1143	and the correspond call back is executed HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback()
sahilmgandhi	18:6a4db94011d3	1144	*/
sahilmgandhi	18:6a4db94011d3	1145
sahilmgandhi	18:6a4db94011d3	1146	/* Stop USART DMA Tx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1147	dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1148	if((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1149	{
sahilmgandhi	18:6a4db94011d3	1150	USART_EndTxTransfer(husart);
sahilmgandhi	18:6a4db94011d3	1151
sahilmgandhi	18:6a4db94011d3	1152	/* Abort the USART DMA Tx channel */
sahilmgandhi	18:6a4db94011d3	1153	if(husart->hdmatx != NULL)
sahilmgandhi	18:6a4db94011d3	1154	{
sahilmgandhi	18:6a4db94011d3	1155	HAL_DMA_Abort(husart->hdmatx);
sahilmgandhi	18:6a4db94011d3	1156	}
sahilmgandhi	18:6a4db94011d3	1157
sahilmgandhi	18:6a4db94011d3	1158	/* Disable the USART Tx DMA request */
sahilmgandhi	18:6a4db94011d3	1159	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1160	}
sahilmgandhi	18:6a4db94011d3	1161
sahilmgandhi	18:6a4db94011d3	1162	/* Stop USART DMA Rx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1163	dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1164	if((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1165	{
sahilmgandhi	18:6a4db94011d3	1166	USART_EndRxTransfer(husart);
sahilmgandhi	18:6a4db94011d3	1167
sahilmgandhi	18:6a4db94011d3	1168	/* Abort the USART DMA Rx channel */
sahilmgandhi	18:6a4db94011d3	1169	if(husart->hdmarx != NULL)
sahilmgandhi	18:6a4db94011d3	1170	{
sahilmgandhi	18:6a4db94011d3	1171	HAL_DMA_Abort(husart->hdmarx);
sahilmgandhi	18:6a4db94011d3	1172	}
sahilmgandhi	18:6a4db94011d3	1173
sahilmgandhi	18:6a4db94011d3	1174	/* Disable the USART Rx DMA request */
sahilmgandhi	18:6a4db94011d3	1175	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1176	}
sahilmgandhi	18:6a4db94011d3	1177
sahilmgandhi	18:6a4db94011d3	1178	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1179	}
sahilmgandhi	18:6a4db94011d3	1180
sahilmgandhi	18:6a4db94011d3	1181	/**
sahilmgandhi	18:6a4db94011d3	1182	* @brief This function handles USART interrupt request.
sahilmgandhi	18:6a4db94011d3	1183	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1184	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1185	* @retval None
sahilmgandhi	18:6a4db94011d3	1186	*/
sahilmgandhi	18:6a4db94011d3	1187	void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1188	{
sahilmgandhi	18:6a4db94011d3	1189	uint32_t isrflags = READ_REG(husart->Instance->SR);
sahilmgandhi	18:6a4db94011d3	1190	uint32_t cr1its = READ_REG(husart->Instance->CR1);
sahilmgandhi	18:6a4db94011d3	1191	uint32_t cr3its = READ_REG(husart->Instance->CR3);
sahilmgandhi	18:6a4db94011d3	1192	uint32_t errorflags = 0x00U;
sahilmgandhi	18:6a4db94011d3	1193	uint32_t dmarequest = 0x00U;
sahilmgandhi	18:6a4db94011d3	1194
sahilmgandhi	18:6a4db94011d3	1195	/* If no error occurs */
sahilmgandhi	18:6a4db94011d3	1196	errorflags = (isrflags & (uint32_t)(USART_SR_PE \| USART_SR_FE \| USART_SR_ORE \| USART_SR_NE));
sahilmgandhi	18:6a4db94011d3	1197	if(errorflags == RESET)
sahilmgandhi	18:6a4db94011d3	1198	{
sahilmgandhi	18:6a4db94011d3	1199	/* USART in mode Receiver -------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1200	if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1201	{
sahilmgandhi	18:6a4db94011d3	1202	if(husart->State == HAL_USART_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1203	{
sahilmgandhi	18:6a4db94011d3	1204	USART_Receive_IT(husart);
sahilmgandhi	18:6a4db94011d3	1205	}
sahilmgandhi	18:6a4db94011d3	1206	else
sahilmgandhi	18:6a4db94011d3	1207	{
sahilmgandhi	18:6a4db94011d3	1208	USART_TransmitReceive_IT(husart);
sahilmgandhi	18:6a4db94011d3	1209	}
sahilmgandhi	18:6a4db94011d3	1210	return;
sahilmgandhi	18:6a4db94011d3	1211	}
sahilmgandhi	18:6a4db94011d3	1212	}
sahilmgandhi	18:6a4db94011d3	1213	/* If some errors occur */
sahilmgandhi	18:6a4db94011d3	1214	if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) \|\| ((cr1its & (USART_CR1_RXNEIE \| USART_CR1_PEIE)) != RESET)))
sahilmgandhi	18:6a4db94011d3	1215	{
sahilmgandhi	18:6a4db94011d3	1216	/* USART parity error interrupt occurred ----------------------------------*/
sahilmgandhi	18:6a4db94011d3	1217	if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1218	{
sahilmgandhi	18:6a4db94011d3	1219	husart->ErrorCode \|= HAL_USART_ERROR_PE;
sahilmgandhi	18:6a4db94011d3	1220	}
sahilmgandhi	18:6a4db94011d3	1221
sahilmgandhi	18:6a4db94011d3	1222	/* USART noise error interrupt occurred --------------------------------*/
sahilmgandhi	18:6a4db94011d3	1223	if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1224	{
sahilmgandhi	18:6a4db94011d3	1225	husart->ErrorCode \|= HAL_USART_ERROR_NE;
sahilmgandhi	18:6a4db94011d3	1226	}
sahilmgandhi	18:6a4db94011d3	1227
sahilmgandhi	18:6a4db94011d3	1228	/* USART frame error interrupt occurred --------------------------------*/
sahilmgandhi	18:6a4db94011d3	1229	if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1230	{
sahilmgandhi	18:6a4db94011d3	1231	husart->ErrorCode \|= HAL_USART_ERROR_FE;
sahilmgandhi	18:6a4db94011d3	1232	}
sahilmgandhi	18:6a4db94011d3	1233
sahilmgandhi	18:6a4db94011d3	1234	/* USART Over-Run interrupt occurred -----------------------------------*/
sahilmgandhi	18:6a4db94011d3	1235	if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1236	{
sahilmgandhi	18:6a4db94011d3	1237	husart->ErrorCode \|= HAL_USART_ERROR_ORE;
sahilmgandhi	18:6a4db94011d3	1238	}
sahilmgandhi	18:6a4db94011d3	1239
sahilmgandhi	18:6a4db94011d3	1240	if(husart->ErrorCode != HAL_USART_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	1241	{
sahilmgandhi	18:6a4db94011d3	1242	/* USART in mode Receiver -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1243	if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1244	{
sahilmgandhi	18:6a4db94011d3	1245	if(husart->State == HAL_USART_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1246	{
sahilmgandhi	18:6a4db94011d3	1247	USART_Receive_IT(husart);
sahilmgandhi	18:6a4db94011d3	1248	}
sahilmgandhi	18:6a4db94011d3	1249	else
sahilmgandhi	18:6a4db94011d3	1250	{
sahilmgandhi	18:6a4db94011d3	1251	USART_TransmitReceive_IT(husart);
sahilmgandhi	18:6a4db94011d3	1252	}
sahilmgandhi	18:6a4db94011d3	1253	}
sahilmgandhi	18:6a4db94011d3	1254	/* If Overrun error occurs, or if any error occurs in DMA mode reception,
sahilmgandhi	18:6a4db94011d3	1255	consider error as blocking */
sahilmgandhi	18:6a4db94011d3	1256	dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1257	if(((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) \|\| dmarequest)
sahilmgandhi	18:6a4db94011d3	1258	{
sahilmgandhi	18:6a4db94011d3	1259	/* Set the USART state ready to be able to start again the process,
sahilmgandhi	18:6a4db94011d3	1260	Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
sahilmgandhi	18:6a4db94011d3	1261	USART_EndRxTransfer(husart);
sahilmgandhi	18:6a4db94011d3	1262
sahilmgandhi	18:6a4db94011d3	1263	/* Disable the USART DMA Rx request if enabled */
sahilmgandhi	18:6a4db94011d3	1264	if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
sahilmgandhi	18:6a4db94011d3	1265	{
sahilmgandhi	18:6a4db94011d3	1266	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1267
sahilmgandhi	18:6a4db94011d3	1268	/* Abort the USART DMA Rx channel */
sahilmgandhi	18:6a4db94011d3	1269	if(husart->hdmarx != NULL)
sahilmgandhi	18:6a4db94011d3	1270	{
sahilmgandhi	18:6a4db94011d3	1271	/* Set the USART DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	1272	will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	1273	husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
sahilmgandhi	18:6a4db94011d3	1274
sahilmgandhi	18:6a4db94011d3	1275	if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1276	{
sahilmgandhi	18:6a4db94011d3	1277	/* Call Directly XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	1278	husart->hdmarx->XferAbortCallback(husart->hdmarx);
sahilmgandhi	18:6a4db94011d3	1279	}
sahilmgandhi	18:6a4db94011d3	1280	}
sahilmgandhi	18:6a4db94011d3	1281	else
sahilmgandhi	18:6a4db94011d3	1282	{
sahilmgandhi	18:6a4db94011d3	1283	/* Call user error callback */
sahilmgandhi	18:6a4db94011d3	1284	HAL_USART_ErrorCallback(husart);
sahilmgandhi	18:6a4db94011d3	1285	}
sahilmgandhi	18:6a4db94011d3	1286	}
sahilmgandhi	18:6a4db94011d3	1287	else
sahilmgandhi	18:6a4db94011d3	1288	{
sahilmgandhi	18:6a4db94011d3	1289	/* Call user error callback */
sahilmgandhi	18:6a4db94011d3	1290	HAL_USART_ErrorCallback(husart);
sahilmgandhi	18:6a4db94011d3	1291	}
sahilmgandhi	18:6a4db94011d3	1292	}
sahilmgandhi	18:6a4db94011d3	1293	else
sahilmgandhi	18:6a4db94011d3	1294	{
sahilmgandhi	18:6a4db94011d3	1295	/* Call user error callback */
sahilmgandhi	18:6a4db94011d3	1296	HAL_USART_ErrorCallback(husart);
sahilmgandhi	18:6a4db94011d3	1297	husart->ErrorCode = HAL_USART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1298	}
sahilmgandhi	18:6a4db94011d3	1299	}
sahilmgandhi	18:6a4db94011d3	1300	return;
sahilmgandhi	18:6a4db94011d3	1301	}
sahilmgandhi	18:6a4db94011d3	1302
sahilmgandhi	18:6a4db94011d3	1303	/* USART in mode Transmitter -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1304	if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1305	{
sahilmgandhi	18:6a4db94011d3	1306	if(husart->State == HAL_USART_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1307	{
sahilmgandhi	18:6a4db94011d3	1308	USART_Transmit_IT(husart);
sahilmgandhi	18:6a4db94011d3	1309	}
sahilmgandhi	18:6a4db94011d3	1310	else
sahilmgandhi	18:6a4db94011d3	1311	{
sahilmgandhi	18:6a4db94011d3	1312	USART_TransmitReceive_IT(husart);
sahilmgandhi	18:6a4db94011d3	1313	}
sahilmgandhi	18:6a4db94011d3	1314	return;
sahilmgandhi	18:6a4db94011d3	1315	}
sahilmgandhi	18:6a4db94011d3	1316
sahilmgandhi	18:6a4db94011d3	1317	/* USART in mode Transmitter (transmission end) ----------------------------*/
sahilmgandhi	18:6a4db94011d3	1318	if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1319	{
sahilmgandhi	18:6a4db94011d3	1320	USART_EndTransmit_IT(husart);
sahilmgandhi	18:6a4db94011d3	1321	return;
sahilmgandhi	18:6a4db94011d3	1322	}
sahilmgandhi	18:6a4db94011d3	1323	}
sahilmgandhi	18:6a4db94011d3	1324
sahilmgandhi	18:6a4db94011d3	1325	/**
sahilmgandhi	18:6a4db94011d3	1326	* @brief Tx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1327	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1328	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1329	* @retval None
sahilmgandhi	18:6a4db94011d3	1330	*/
sahilmgandhi	18:6a4db94011d3	1331	__weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1332	{
sahilmgandhi	18:6a4db94011d3	1333	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1334	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	1335	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1336	the HAL_USART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1337	*/
sahilmgandhi	18:6a4db94011d3	1338	}
sahilmgandhi	18:6a4db94011d3	1339
sahilmgandhi	18:6a4db94011d3	1340	/**
sahilmgandhi	18:6a4db94011d3	1341	* @brief Tx Half Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1342	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1343	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1344	* @retval None
sahilmgandhi	18:6a4db94011d3	1345	*/
sahilmgandhi	18:6a4db94011d3	1346	__weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1347	{
sahilmgandhi	18:6a4db94011d3	1348	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1349	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	1350	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1351	the HAL_USART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1352	*/
sahilmgandhi	18:6a4db94011d3	1353	}
sahilmgandhi	18:6a4db94011d3	1354
sahilmgandhi	18:6a4db94011d3	1355	/**
sahilmgandhi	18:6a4db94011d3	1356	* @brief Rx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1357	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1358	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1359	* @retval None
sahilmgandhi	18:6a4db94011d3	1360	*/
sahilmgandhi	18:6a4db94011d3	1361	__weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1362	{
sahilmgandhi	18:6a4db94011d3	1363	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1364	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	1365	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1366	the HAL_USART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1367	*/
sahilmgandhi	18:6a4db94011d3	1368	}
sahilmgandhi	18:6a4db94011d3	1369
sahilmgandhi	18:6a4db94011d3	1370	/**
sahilmgandhi	18:6a4db94011d3	1371	* @brief Rx Half Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1372	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1373	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1374	* @retval None
sahilmgandhi	18:6a4db94011d3	1375	*/
sahilmgandhi	18:6a4db94011d3	1376	__weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1377	{
sahilmgandhi	18:6a4db94011d3	1378	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1379	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	1380	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1381	the HAL_USART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1382	*/
sahilmgandhi	18:6a4db94011d3	1383	}
sahilmgandhi	18:6a4db94011d3	1384
sahilmgandhi	18:6a4db94011d3	1385	/**
sahilmgandhi	18:6a4db94011d3	1386	* @brief Tx/Rx Transfers completed callback for the non-blocking process.
sahilmgandhi	18:6a4db94011d3	1387	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1388	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1389	* @retval None
sahilmgandhi	18:6a4db94011d3	1390	*/
sahilmgandhi	18:6a4db94011d3	1391	__weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1392	{
sahilmgandhi	18:6a4db94011d3	1393	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1394	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	1395	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1396	the HAL_USART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1397	*/
sahilmgandhi	18:6a4db94011d3	1398	}
sahilmgandhi	18:6a4db94011d3	1399
sahilmgandhi	18:6a4db94011d3	1400	/**
sahilmgandhi	18:6a4db94011d3	1401	* @brief USART error callbacks.
sahilmgandhi	18:6a4db94011d3	1402	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1403	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1404	* @retval None
sahilmgandhi	18:6a4db94011d3	1405	*/
sahilmgandhi	18:6a4db94011d3	1406	__weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1407	{
sahilmgandhi	18:6a4db94011d3	1408	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1409	UNUSED(husart);
sahilmgandhi	18:6a4db94011d3	1410	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1411	the HAL_USART_ErrorCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1412	*/
sahilmgandhi	18:6a4db94011d3	1413	}
sahilmgandhi	18:6a4db94011d3	1414
sahilmgandhi	18:6a4db94011d3	1415	/**
sahilmgandhi	18:6a4db94011d3	1416	* @}
sahilmgandhi	18:6a4db94011d3	1417	*/
sahilmgandhi	18:6a4db94011d3	1418
sahilmgandhi	18:6a4db94011d3	1419	/** @defgroup USART_Exported_Functions_Group3 Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	1420	* @brief USART State and Errors functions
sahilmgandhi	18:6a4db94011d3	1421	*
sahilmgandhi	18:6a4db94011d3	1422	@verbatim
sahilmgandhi	18:6a4db94011d3	1423	==============================================================================
sahilmgandhi	18:6a4db94011d3	1424	##### Peripheral State and Errors functions #####
sahilmgandhi	18:6a4db94011d3	1425	==============================================================================
sahilmgandhi	18:6a4db94011d3	1426	[..]
sahilmgandhi	18:6a4db94011d3	1427	This subsection provides a set of functions allowing to return the State of
sahilmgandhi	18:6a4db94011d3	1428	USART communication
sahilmgandhi	18:6a4db94011d3	1429	process, return Peripheral Errors occurred during communication process
sahilmgandhi	18:6a4db94011d3	1430	(+) HAL_USART_GetState() API can be helpful to check in run-time the state
sahilmgandhi	18:6a4db94011d3	1431	of the USART peripheral.
sahilmgandhi	18:6a4db94011d3	1432	(+) HAL_USART_GetError() check in run-time errors that could be occurred during
sahilmgandhi	18:6a4db94011d3	1433	communication.
sahilmgandhi	18:6a4db94011d3	1434	@endverbatim
sahilmgandhi	18:6a4db94011d3	1435	* @{
sahilmgandhi	18:6a4db94011d3	1436	*/
sahilmgandhi	18:6a4db94011d3	1437
sahilmgandhi	18:6a4db94011d3	1438	/**
sahilmgandhi	18:6a4db94011d3	1439	* @brief Returns the USART state.
sahilmgandhi	18:6a4db94011d3	1440	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1441	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1442	* @retval HAL state
sahilmgandhi	18:6a4db94011d3	1443	*/
sahilmgandhi	18:6a4db94011d3	1444	HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1445	{
sahilmgandhi	18:6a4db94011d3	1446	return husart->State;
sahilmgandhi	18:6a4db94011d3	1447	}
sahilmgandhi	18:6a4db94011d3	1448
sahilmgandhi	18:6a4db94011d3	1449	/**
sahilmgandhi	18:6a4db94011d3	1450	* @brief Return the USART error code
sahilmgandhi	18:6a4db94011d3	1451	* @param husart : pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1452	* the configuration information for the specified USART.
sahilmgandhi	18:6a4db94011d3	1453	* @retval USART Error Code
sahilmgandhi	18:6a4db94011d3	1454	*/
sahilmgandhi	18:6a4db94011d3	1455	uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1456	{
sahilmgandhi	18:6a4db94011d3	1457	return husart->ErrorCode;
sahilmgandhi	18:6a4db94011d3	1458	}
sahilmgandhi	18:6a4db94011d3	1459
sahilmgandhi	18:6a4db94011d3	1460	/**
sahilmgandhi	18:6a4db94011d3	1461	* @}
sahilmgandhi	18:6a4db94011d3	1462	*/
sahilmgandhi	18:6a4db94011d3	1463
sahilmgandhi	18:6a4db94011d3	1464	/**
sahilmgandhi	18:6a4db94011d3	1465	* @brief DMA USART transmit process complete callback.
sahilmgandhi	18:6a4db94011d3	1466	* @param hdma: DMA handle
sahilmgandhi	18:6a4db94011d3	1467	* @retval None
sahilmgandhi	18:6a4db94011d3	1468	*/
sahilmgandhi	18:6a4db94011d3	1469	static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1470	{
sahilmgandhi	18:6a4db94011d3	1471	USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1472	/* DMA Normal mode */
sahilmgandhi	18:6a4db94011d3	1473	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
sahilmgandhi	18:6a4db94011d3	1474	{
sahilmgandhi	18:6a4db94011d3	1475	husart->TxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1476	if(husart->State == HAL_USART_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1477	{
sahilmgandhi	18:6a4db94011d3	1478	/* Disable the DMA transfer for transmit request by resetting the DMAT bit
sahilmgandhi	18:6a4db94011d3	1479	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	1480	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1481
sahilmgandhi	18:6a4db94011d3	1482	/* Enable the USART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1483	SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
sahilmgandhi	18:6a4db94011d3	1484	}
sahilmgandhi	18:6a4db94011d3	1485	}
sahilmgandhi	18:6a4db94011d3	1486	/* DMA Circular mode */
sahilmgandhi	18:6a4db94011d3	1487	else
sahilmgandhi	18:6a4db94011d3	1488	{
sahilmgandhi	18:6a4db94011d3	1489	if(husart->State == HAL_USART_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1490	{
sahilmgandhi	18:6a4db94011d3	1491	HAL_USART_TxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1492	}
sahilmgandhi	18:6a4db94011d3	1493	}
sahilmgandhi	18:6a4db94011d3	1494	}
sahilmgandhi	18:6a4db94011d3	1495
sahilmgandhi	18:6a4db94011d3	1496	/**
sahilmgandhi	18:6a4db94011d3	1497	* @brief DMA USART transmit process half complete callback
sahilmgandhi	18:6a4db94011d3	1498	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1499	* the configuration information for the specified DMA module.
sahilmgandhi	18:6a4db94011d3	1500	* @retval None
sahilmgandhi	18:6a4db94011d3	1501	*/
sahilmgandhi	18:6a4db94011d3	1502	static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1503	{
sahilmgandhi	18:6a4db94011d3	1504	USART_HandleTypeDef* husart = (USART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1505
sahilmgandhi	18:6a4db94011d3	1506	HAL_USART_TxHalfCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1507	}
sahilmgandhi	18:6a4db94011d3	1508
sahilmgandhi	18:6a4db94011d3	1509	/**
sahilmgandhi	18:6a4db94011d3	1510	* @brief DMA USART receive process complete callback.
sahilmgandhi	18:6a4db94011d3	1511	* @param hdma: DMA handle
sahilmgandhi	18:6a4db94011d3	1512	* @retval None
sahilmgandhi	18:6a4db94011d3	1513	*/
sahilmgandhi	18:6a4db94011d3	1514	static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1515	{
sahilmgandhi	18:6a4db94011d3	1516	USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1517	/* DMA Normal mode */
sahilmgandhi	18:6a4db94011d3	1518	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
sahilmgandhi	18:6a4db94011d3	1519	{
sahilmgandhi	18:6a4db94011d3	1520	husart->RxXferCount = 0x00U;
sahilmgandhi	18:6a4db94011d3	1521
sahilmgandhi	18:6a4db94011d3	1522	/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
sahilmgandhi	18:6a4db94011d3	1523	CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1524	CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1525
sahilmgandhi	18:6a4db94011d3	1526	if(husart->State == HAL_USART_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1527	{
sahilmgandhi	18:6a4db94011d3	1528	/* Disable the DMA transfer for the Transmit/receiver requests by setting the DMAT/DMAR bit
sahilmgandhi	18:6a4db94011d3	1529	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	1530	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1531
sahilmgandhi	18:6a4db94011d3	1532	husart->State= HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1533	HAL_USART_RxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1534	}
sahilmgandhi	18:6a4db94011d3	1535	/* The USART state is HAL_USART_STATE_BUSY_TX_RX */
sahilmgandhi	18:6a4db94011d3	1536	else
sahilmgandhi	18:6a4db94011d3	1537	{
sahilmgandhi	18:6a4db94011d3	1538	/* Disable the DMA transfer for the Transmit/receiver requests by setting the DMAT/DMAR bit
sahilmgandhi	18:6a4db94011d3	1539	in the USART CR3 register */
sahilmgandhi	18:6a4db94011d3	1540	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1541	CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1542
sahilmgandhi	18:6a4db94011d3	1543	husart->State= HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1544	HAL_USART_TxRxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1545	}
sahilmgandhi	18:6a4db94011d3	1546	}
sahilmgandhi	18:6a4db94011d3	1547	/* DMA circular mode */
sahilmgandhi	18:6a4db94011d3	1548	else
sahilmgandhi	18:6a4db94011d3	1549	{
sahilmgandhi	18:6a4db94011d3	1550	if(husart->State == HAL_USART_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1551	{
sahilmgandhi	18:6a4db94011d3	1552	HAL_USART_RxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1553	}
sahilmgandhi	18:6a4db94011d3	1554	/* The USART state is HAL_USART_STATE_BUSY_TX_RX */
sahilmgandhi	18:6a4db94011d3	1555	else
sahilmgandhi	18:6a4db94011d3	1556	{
sahilmgandhi	18:6a4db94011d3	1557	HAL_USART_TxRxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1558	}
sahilmgandhi	18:6a4db94011d3	1559	}
sahilmgandhi	18:6a4db94011d3	1560	}
sahilmgandhi	18:6a4db94011d3	1561
sahilmgandhi	18:6a4db94011d3	1562	/**
sahilmgandhi	18:6a4db94011d3	1563	* @brief DMA USART receive process half complete callback
sahilmgandhi	18:6a4db94011d3	1564	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1565	* the configuration information for the specified DMA module.
sahilmgandhi	18:6a4db94011d3	1566	* @retval None
sahilmgandhi	18:6a4db94011d3	1567	*/
sahilmgandhi	18:6a4db94011d3	1568	static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1569	{
sahilmgandhi	18:6a4db94011d3	1570	USART_HandleTypeDef* husart = (USART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1571
sahilmgandhi	18:6a4db94011d3	1572	HAL_USART_RxHalfCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1573	}
sahilmgandhi	18:6a4db94011d3	1574
sahilmgandhi	18:6a4db94011d3	1575	/**
sahilmgandhi	18:6a4db94011d3	1576	* @brief DMA USART communication error callback.
sahilmgandhi	18:6a4db94011d3	1577	* @param hdma: DMA handle
sahilmgandhi	18:6a4db94011d3	1578	* @retval None
sahilmgandhi	18:6a4db94011d3	1579	*/
sahilmgandhi	18:6a4db94011d3	1580	static void USART_DMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1581	{
sahilmgandhi	18:6a4db94011d3	1582	uint32_t dmarequest = 0x00U;
sahilmgandhi	18:6a4db94011d3	1583	USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1584	husart->RxXferCount = 0x00U;
sahilmgandhi	18:6a4db94011d3	1585	husart->TxXferCount = 0x00U;
sahilmgandhi	18:6a4db94011d3	1586
sahilmgandhi	18:6a4db94011d3	1587	/* Stop USART DMA Tx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1588	dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1589	if((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1590	{
sahilmgandhi	18:6a4db94011d3	1591	USART_EndTxTransfer(husart);
sahilmgandhi	18:6a4db94011d3	1592	}
sahilmgandhi	18:6a4db94011d3	1593
sahilmgandhi	18:6a4db94011d3	1594	/* Stop USART DMA Rx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1595	dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1596	if((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1597	{
sahilmgandhi	18:6a4db94011d3	1598	USART_EndRxTransfer(husart);
sahilmgandhi	18:6a4db94011d3	1599	}
sahilmgandhi	18:6a4db94011d3	1600
sahilmgandhi	18:6a4db94011d3	1601	husart->ErrorCode \|= HAL_USART_ERROR_DMA;
sahilmgandhi	18:6a4db94011d3	1602	husart->State= HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1603
sahilmgandhi	18:6a4db94011d3	1604	HAL_USART_ErrorCallback(husart);
sahilmgandhi	18:6a4db94011d3	1605	}
sahilmgandhi	18:6a4db94011d3	1606
sahilmgandhi	18:6a4db94011d3	1607	/**
sahilmgandhi	18:6a4db94011d3	1608	* @brief This function handles USART Communication Timeout.
sahilmgandhi	18:6a4db94011d3	1609	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1610	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1611	* @param Flag: specifies the USART flag to check.
sahilmgandhi	18:6a4db94011d3	1612	* @param Status: The new Flag status (SET or RESET).
sahilmgandhi	18:6a4db94011d3	1613	* @param Tickstart: Tick start value.
sahilmgandhi	18:6a4db94011d3	1614	* @param Timeout: Timeout duration.
sahilmgandhi	18:6a4db94011d3	1615	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1616	*/
sahilmgandhi	18:6a4db94011d3	1617	static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1618	{
sahilmgandhi	18:6a4db94011d3	1619	/* Wait until flag is set */
sahilmgandhi	18:6a4db94011d3	1620	while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
sahilmgandhi	18:6a4db94011d3	1621	{
sahilmgandhi	18:6a4db94011d3	1622	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	1623	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	1624	{
sahilmgandhi	18:6a4db94011d3	1625	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	1626	{
sahilmgandhi	18:6a4db94011d3	1627	/* Disable the USART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1628	CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
sahilmgandhi	18:6a4db94011d3	1629
sahilmgandhi	18:6a4db94011d3	1630	/* Disable the USART RXNE Interrupt */
sahilmgandhi	18:6a4db94011d3	1631	CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
sahilmgandhi	18:6a4db94011d3	1632
sahilmgandhi	18:6a4db94011d3	1633	/* Disable the USART Parity Error Interrupt */
sahilmgandhi	18:6a4db94011d3	1634	CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1635
sahilmgandhi	18:6a4db94011d3	1636	/* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	1637	CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1638
sahilmgandhi	18:6a4db94011d3	1639	husart->State= HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1640
sahilmgandhi	18:6a4db94011d3	1641	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1642	__HAL_UNLOCK(husart);
sahilmgandhi	18:6a4db94011d3	1643
sahilmgandhi	18:6a4db94011d3	1644	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1645	}
sahilmgandhi	18:6a4db94011d3	1646	}
sahilmgandhi	18:6a4db94011d3	1647	}
sahilmgandhi	18:6a4db94011d3	1648	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1649	}
sahilmgandhi	18:6a4db94011d3	1650
sahilmgandhi	18:6a4db94011d3	1651	/**
sahilmgandhi	18:6a4db94011d3	1652	* @brief End ongoing Tx transfer on USART peripheral (following error detection or Transmit completion).
sahilmgandhi	18:6a4db94011d3	1653	* @param husart: USART handle.
sahilmgandhi	18:6a4db94011d3	1654	* @retval None
sahilmgandhi	18:6a4db94011d3	1655	*/
sahilmgandhi	18:6a4db94011d3	1656	static void USART_EndTxTransfer(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1657	{
sahilmgandhi	18:6a4db94011d3	1658	/* Disable TXEIE and TCIE interrupts */
sahilmgandhi	18:6a4db94011d3	1659	CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE \| USART_CR1_TCIE));
sahilmgandhi	18:6a4db94011d3	1660
sahilmgandhi	18:6a4db94011d3	1661	/* At end of Tx process, restore husart->State to Ready */
sahilmgandhi	18:6a4db94011d3	1662	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1663	}
sahilmgandhi	18:6a4db94011d3	1664
sahilmgandhi	18:6a4db94011d3	1665	/**
sahilmgandhi	18:6a4db94011d3	1666	* @brief End ongoing Rx transfer on USART peripheral (following error detection or Reception completion).
sahilmgandhi	18:6a4db94011d3	1667	* @param husart: USART handle.
sahilmgandhi	18:6a4db94011d3	1668	* @retval None
sahilmgandhi	18:6a4db94011d3	1669	*/
sahilmgandhi	18:6a4db94011d3	1670	static void USART_EndRxTransfer(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1671	{
sahilmgandhi	18:6a4db94011d3	1672	/* Disable RXNE, PE and ERR interrupts */
sahilmgandhi	18:6a4db94011d3	1673	CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE \| USART_CR1_PEIE));
sahilmgandhi	18:6a4db94011d3	1674	CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1675
sahilmgandhi	18:6a4db94011d3	1676	/* At end of Rx process, restore husart->State to Ready */
sahilmgandhi	18:6a4db94011d3	1677	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1678	}
sahilmgandhi	18:6a4db94011d3	1679
sahilmgandhi	18:6a4db94011d3	1680	/**
sahilmgandhi	18:6a4db94011d3	1681	* @brief DMA USART communication abort callback, when initiated by HAL services on Error
sahilmgandhi	18:6a4db94011d3	1682	* (To be called at end of DMA Abort procedure following error occurrence).
sahilmgandhi	18:6a4db94011d3	1683	* @param hdma DMA handle.
sahilmgandhi	18:6a4db94011d3	1684	* @retval None
sahilmgandhi	18:6a4db94011d3	1685	*/
sahilmgandhi	18:6a4db94011d3	1686	static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1687	{
sahilmgandhi	18:6a4db94011d3	1688	USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1689	husart->RxXferCount = 0x00U;
sahilmgandhi	18:6a4db94011d3	1690	husart->TxXferCount = 0x00U;
sahilmgandhi	18:6a4db94011d3	1691
sahilmgandhi	18:6a4db94011d3	1692	HAL_USART_ErrorCallback(husart);
sahilmgandhi	18:6a4db94011d3	1693	}
sahilmgandhi	18:6a4db94011d3	1694
sahilmgandhi	18:6a4db94011d3	1695	/**
sahilmgandhi	18:6a4db94011d3	1696	* @brief Simplex Send an amount of data in non-blocking mode.
sahilmgandhi	18:6a4db94011d3	1697	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1698	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1699	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1700	* @note The USART errors are not managed to avoid the overrun error.
sahilmgandhi	18:6a4db94011d3	1701	*/
sahilmgandhi	18:6a4db94011d3	1702	static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1703	{
sahilmgandhi	18:6a4db94011d3	1704	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	1705
sahilmgandhi	18:6a4db94011d3	1706	if(husart->State == HAL_USART_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1707	{
sahilmgandhi	18:6a4db94011d3	1708	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	1709	{
sahilmgandhi	18:6a4db94011d3	1710	tmp = (uint16_t*) husart->pTxBuffPtr;
sahilmgandhi	18:6a4db94011d3	1711	husart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	1712	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1713	{
sahilmgandhi	18:6a4db94011d3	1714	husart->pTxBuffPtr += 2U;
sahilmgandhi	18:6a4db94011d3	1715	}
sahilmgandhi	18:6a4db94011d3	1716	else
sahilmgandhi	18:6a4db94011d3	1717	{
sahilmgandhi	18:6a4db94011d3	1718	husart->pTxBuffPtr += 1U;
sahilmgandhi	18:6a4db94011d3	1719	}
sahilmgandhi	18:6a4db94011d3	1720	}
sahilmgandhi	18:6a4db94011d3	1721	else
sahilmgandhi	18:6a4db94011d3	1722	{
sahilmgandhi	18:6a4db94011d3	1723	husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1724	}
sahilmgandhi	18:6a4db94011d3	1725
sahilmgandhi	18:6a4db94011d3	1726	if(--husart->TxXferCount == 0U)
sahilmgandhi	18:6a4db94011d3	1727	{
sahilmgandhi	18:6a4db94011d3	1728	/* Disable the USART Transmit data register empty Interrupt */
sahilmgandhi	18:6a4db94011d3	1729	CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
sahilmgandhi	18:6a4db94011d3	1730
sahilmgandhi	18:6a4db94011d3	1731	/* Enable the USART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1732	SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
sahilmgandhi	18:6a4db94011d3	1733	}
sahilmgandhi	18:6a4db94011d3	1734	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1735	}
sahilmgandhi	18:6a4db94011d3	1736	else
sahilmgandhi	18:6a4db94011d3	1737	{
sahilmgandhi	18:6a4db94011d3	1738	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1739	}
sahilmgandhi	18:6a4db94011d3	1740	}
sahilmgandhi	18:6a4db94011d3	1741
sahilmgandhi	18:6a4db94011d3	1742	/**
sahilmgandhi	18:6a4db94011d3	1743	* @brief Wraps up transmission in non blocking mode.
sahilmgandhi	18:6a4db94011d3	1744	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1745	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1746	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1747	*/
sahilmgandhi	18:6a4db94011d3	1748	static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1749	{
sahilmgandhi	18:6a4db94011d3	1750	/* Disable the USART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1751	CLEAR_BIT(husart->Instance->CR1, USART_CR1_TCIE);
sahilmgandhi	18:6a4db94011d3	1752
sahilmgandhi	18:6a4db94011d3	1753	/* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	1754	CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1755
sahilmgandhi	18:6a4db94011d3	1756	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1757
sahilmgandhi	18:6a4db94011d3	1758	HAL_USART_TxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1759
sahilmgandhi	18:6a4db94011d3	1760	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1761	}
sahilmgandhi	18:6a4db94011d3	1762
sahilmgandhi	18:6a4db94011d3	1763	/**
sahilmgandhi	18:6a4db94011d3	1764	* @brief Simplex Receive an amount of data in non-blocking mode.
sahilmgandhi	18:6a4db94011d3	1765	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1766	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1767	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1768	*/
sahilmgandhi	18:6a4db94011d3	1769	static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1770	{
sahilmgandhi	18:6a4db94011d3	1771	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	1772	if(husart->State == HAL_USART_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1773	{
sahilmgandhi	18:6a4db94011d3	1774	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	1775	{
sahilmgandhi	18:6a4db94011d3	1776	tmp = (uint16_t*) husart->pRxBuffPtr;
sahilmgandhi	18:6a4db94011d3	1777	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1778	{
sahilmgandhi	18:6a4db94011d3	1779	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	1780	husart->pRxBuffPtr += 2U;
sahilmgandhi	18:6a4db94011d3	1781	}
sahilmgandhi	18:6a4db94011d3	1782	else
sahilmgandhi	18:6a4db94011d3	1783	{
sahilmgandhi	18:6a4db94011d3	1784	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1785	husart->pRxBuffPtr += 1U;
sahilmgandhi	18:6a4db94011d3	1786	}
sahilmgandhi	18:6a4db94011d3	1787	if(--husart->RxXferCount != 0x00U)
sahilmgandhi	18:6a4db94011d3	1788	{
sahilmgandhi	18:6a4db94011d3	1789	/* Send dummy byte in order to generate the clock for the slave to send the next data */
sahilmgandhi	18:6a4db94011d3	1790	husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	1791	}
sahilmgandhi	18:6a4db94011d3	1792	}
sahilmgandhi	18:6a4db94011d3	1793	else
sahilmgandhi	18:6a4db94011d3	1794	{
sahilmgandhi	18:6a4db94011d3	1795	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1796	{
sahilmgandhi	18:6a4db94011d3	1797	*husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1798	}
sahilmgandhi	18:6a4db94011d3	1799	else
sahilmgandhi	18:6a4db94011d3	1800	{
sahilmgandhi	18:6a4db94011d3	1801	*husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
sahilmgandhi	18:6a4db94011d3	1802	}
sahilmgandhi	18:6a4db94011d3	1803
sahilmgandhi	18:6a4db94011d3	1804	if(--husart->RxXferCount != 0x00U)
sahilmgandhi	18:6a4db94011d3	1805	{
sahilmgandhi	18:6a4db94011d3	1806	/* Send dummy byte in order to generate the clock for the slave to send the next data */
sahilmgandhi	18:6a4db94011d3	1807	husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1808	}
sahilmgandhi	18:6a4db94011d3	1809	}
sahilmgandhi	18:6a4db94011d3	1810
sahilmgandhi	18:6a4db94011d3	1811	if(husart->RxXferCount == 0U)
sahilmgandhi	18:6a4db94011d3	1812	{
sahilmgandhi	18:6a4db94011d3	1813	/* Disable the USART RXNE Interrupt */
sahilmgandhi	18:6a4db94011d3	1814	CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
sahilmgandhi	18:6a4db94011d3	1815
sahilmgandhi	18:6a4db94011d3	1816	/* Disable the USART Parity Error Interrupt */
sahilmgandhi	18:6a4db94011d3	1817	CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1818
sahilmgandhi	18:6a4db94011d3	1819	/* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	1820	CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1821
sahilmgandhi	18:6a4db94011d3	1822	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1823	HAL_USART_RxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1824
sahilmgandhi	18:6a4db94011d3	1825	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1826	}
sahilmgandhi	18:6a4db94011d3	1827	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1828	}
sahilmgandhi	18:6a4db94011d3	1829	else
sahilmgandhi	18:6a4db94011d3	1830	{
sahilmgandhi	18:6a4db94011d3	1831	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1832	}
sahilmgandhi	18:6a4db94011d3	1833	}
sahilmgandhi	18:6a4db94011d3	1834
sahilmgandhi	18:6a4db94011d3	1835	/**
sahilmgandhi	18:6a4db94011d3	1836	* @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
sahilmgandhi	18:6a4db94011d3	1837	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1838	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1839	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1840	*/
sahilmgandhi	18:6a4db94011d3	1841	static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1842	{
sahilmgandhi	18:6a4db94011d3	1843	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	1844
sahilmgandhi	18:6a4db94011d3	1845	if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
sahilmgandhi	18:6a4db94011d3	1846	{
sahilmgandhi	18:6a4db94011d3	1847	if(husart->TxXferCount != 0x00U)
sahilmgandhi	18:6a4db94011d3	1848	{
sahilmgandhi	18:6a4db94011d3	1849	if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
sahilmgandhi	18:6a4db94011d3	1850	{
sahilmgandhi	18:6a4db94011d3	1851	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	1852	{
sahilmgandhi	18:6a4db94011d3	1853	tmp = (uint16_t*) husart->pTxBuffPtr;
sahilmgandhi	18:6a4db94011d3	1854	husart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	1855	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1856	{
sahilmgandhi	18:6a4db94011d3	1857	husart->pTxBuffPtr += 2U;
sahilmgandhi	18:6a4db94011d3	1858	}
sahilmgandhi	18:6a4db94011d3	1859	else
sahilmgandhi	18:6a4db94011d3	1860	{
sahilmgandhi	18:6a4db94011d3	1861	husart->pTxBuffPtr += 1U;
sahilmgandhi	18:6a4db94011d3	1862	}
sahilmgandhi	18:6a4db94011d3	1863	}
sahilmgandhi	18:6a4db94011d3	1864	else
sahilmgandhi	18:6a4db94011d3	1865	{
sahilmgandhi	18:6a4db94011d3	1866	husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1867	}
sahilmgandhi	18:6a4db94011d3	1868	husart->TxXferCount--;
sahilmgandhi	18:6a4db94011d3	1869
sahilmgandhi	18:6a4db94011d3	1870	/* Check the latest data transmitted */
sahilmgandhi	18:6a4db94011d3	1871	if(husart->TxXferCount == 0U)
sahilmgandhi	18:6a4db94011d3	1872	{
sahilmgandhi	18:6a4db94011d3	1873	CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
sahilmgandhi	18:6a4db94011d3	1874	}
sahilmgandhi	18:6a4db94011d3	1875	}
sahilmgandhi	18:6a4db94011d3	1876	}
sahilmgandhi	18:6a4db94011d3	1877
sahilmgandhi	18:6a4db94011d3	1878	if(husart->RxXferCount != 0x00U)
sahilmgandhi	18:6a4db94011d3	1879	{
sahilmgandhi	18:6a4db94011d3	1880	if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
sahilmgandhi	18:6a4db94011d3	1881	{
sahilmgandhi	18:6a4db94011d3	1882	if(husart->Init.WordLength == USART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	1883	{
sahilmgandhi	18:6a4db94011d3	1884	tmp = (uint16_t*) husart->pRxBuffPtr;
sahilmgandhi	18:6a4db94011d3	1885	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1886	{
sahilmgandhi	18:6a4db94011d3	1887	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	1888	husart->pRxBuffPtr += 2U;
sahilmgandhi	18:6a4db94011d3	1889	}
sahilmgandhi	18:6a4db94011d3	1890	else
sahilmgandhi	18:6a4db94011d3	1891	{
sahilmgandhi	18:6a4db94011d3	1892	*tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1893	husart->pRxBuffPtr += 1U;
sahilmgandhi	18:6a4db94011d3	1894	}
sahilmgandhi	18:6a4db94011d3	1895	}
sahilmgandhi	18:6a4db94011d3	1896	else
sahilmgandhi	18:6a4db94011d3	1897	{
sahilmgandhi	18:6a4db94011d3	1898	if(husart->Init.Parity == USART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1899	{
sahilmgandhi	18:6a4db94011d3	1900	*husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1901	}
sahilmgandhi	18:6a4db94011d3	1902	else
sahilmgandhi	18:6a4db94011d3	1903	{
sahilmgandhi	18:6a4db94011d3	1904	*husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
sahilmgandhi	18:6a4db94011d3	1905	}
sahilmgandhi	18:6a4db94011d3	1906	}
sahilmgandhi	18:6a4db94011d3	1907	husart->RxXferCount--;
sahilmgandhi	18:6a4db94011d3	1908	}
sahilmgandhi	18:6a4db94011d3	1909	}
sahilmgandhi	18:6a4db94011d3	1910
sahilmgandhi	18:6a4db94011d3	1911	/* Check the latest data received */
sahilmgandhi	18:6a4db94011d3	1912	if(husart->RxXferCount == 0U)
sahilmgandhi	18:6a4db94011d3	1913	{
sahilmgandhi	18:6a4db94011d3	1914	/* Disable the USART RXNE Interrupt */
sahilmgandhi	18:6a4db94011d3	1915	CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
sahilmgandhi	18:6a4db94011d3	1916
sahilmgandhi	18:6a4db94011d3	1917	/* Disable the USART Parity Error Interrupt */
sahilmgandhi	18:6a4db94011d3	1918	CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1919
sahilmgandhi	18:6a4db94011d3	1920	/* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	1921	CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1922
sahilmgandhi	18:6a4db94011d3	1923	husart->State = HAL_USART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1924
sahilmgandhi	18:6a4db94011d3	1925	HAL_USART_TxRxCpltCallback(husart);
sahilmgandhi	18:6a4db94011d3	1926
sahilmgandhi	18:6a4db94011d3	1927	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1928	}
sahilmgandhi	18:6a4db94011d3	1929
sahilmgandhi	18:6a4db94011d3	1930	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1931	}
sahilmgandhi	18:6a4db94011d3	1932	else
sahilmgandhi	18:6a4db94011d3	1933	{
sahilmgandhi	18:6a4db94011d3	1934	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1935	}
sahilmgandhi	18:6a4db94011d3	1936	}
sahilmgandhi	18:6a4db94011d3	1937
sahilmgandhi	18:6a4db94011d3	1938	/**
sahilmgandhi	18:6a4db94011d3	1939	* @brief Configures the USART pferipheral.
sahilmgandhi	18:6a4db94011d3	1940	* @param husart: pointer to a USART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1941	* the configuration information for the specified USART module.
sahilmgandhi	18:6a4db94011d3	1942	* @retval None
sahilmgandhi	18:6a4db94011d3	1943	*/
sahilmgandhi	18:6a4db94011d3	1944	static void USART_SetConfig(USART_HandleTypeDef *husart)
sahilmgandhi	18:6a4db94011d3	1945	{
sahilmgandhi	18:6a4db94011d3	1946	uint32_t tmpreg = 0x00U;
sahilmgandhi	18:6a4db94011d3	1947
sahilmgandhi	18:6a4db94011d3	1948	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1949	assert_param(IS_USART_INSTANCE(husart->Instance));
sahilmgandhi	18:6a4db94011d3	1950	assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
sahilmgandhi	18:6a4db94011d3	1951	assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
sahilmgandhi	18:6a4db94011d3	1952	assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
sahilmgandhi	18:6a4db94011d3	1953	assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
sahilmgandhi	18:6a4db94011d3	1954	assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
sahilmgandhi	18:6a4db94011d3	1955	assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
sahilmgandhi	18:6a4db94011d3	1956	assert_param(IS_USART_PARITY(husart->Init.Parity));
sahilmgandhi	18:6a4db94011d3	1957	assert_param(IS_USART_MODE(husart->Init.Mode));
sahilmgandhi	18:6a4db94011d3	1958
sahilmgandhi	18:6a4db94011d3	1959	/* The LBCL, CPOL and CPHA bits have to be selected when both the transmitter and the
sahilmgandhi	18:6a4db94011d3	1960	receiver are disabled (TE=RE=0) to ensure that the clock pulses function correctly. */
sahilmgandhi	18:6a4db94011d3	1961	CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TE \| USART_CR1_RE));
sahilmgandhi	18:6a4db94011d3	1962
sahilmgandhi	18:6a4db94011d3	1963	/---------------------------- USART CR2 Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	1964	tmpreg = husart->Instance->CR2;
sahilmgandhi	18:6a4db94011d3	1965	/* Clear CLKEN, CPOL, CPHA and LBCL bits */
sahilmgandhi	18:6a4db94011d3	1966	tmpreg &= (uint32_t)~((uint32_t)(USART_CR2_CPHA \| USART_CR2_CPOL \| USART_CR2_CLKEN \| USART_CR2_LBCL \| USART_CR2_STOP));
sahilmgandhi	18:6a4db94011d3	1967	/* Configure the USART Clock, CPOL, CPHA and LastBit -----------------------*/
sahilmgandhi	18:6a4db94011d3	1968	/* Set CPOL bit according to husart->Init.CLKPolarity value */
sahilmgandhi	18:6a4db94011d3	1969	/* Set CPHA bit according to husart->Init.CLKPhase value */
sahilmgandhi	18:6a4db94011d3	1970	/* Set LBCL bit according to husart->Init.CLKLastBit value */
sahilmgandhi	18:6a4db94011d3	1971	/* Set Stop Bits: Set STOP[13:12] bits according to husart->Init.StopBits value */
sahilmgandhi	18:6a4db94011d3	1972	tmpreg \|= (uint32_t)(USART_CLOCK_ENABLE\| husart->Init.CLKPolarity \|
sahilmgandhi	18:6a4db94011d3	1973	husart->Init.CLKPhase\| husart->Init.CLKLastBit \| husart->Init.StopBits);
sahilmgandhi	18:6a4db94011d3	1974	/* Write to USART CR2 */
sahilmgandhi	18:6a4db94011d3	1975	WRITE_REG(husart->Instance->CR2, (uint32_t)tmpreg);
sahilmgandhi	18:6a4db94011d3	1976
sahilmgandhi	18:6a4db94011d3	1977	/-------------------------- USART CR1 Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1978	tmpreg = husart->Instance->CR1;
sahilmgandhi	18:6a4db94011d3	1979
sahilmgandhi	18:6a4db94011d3	1980	/* Clear M, PCE, PS, TE, RE and OVER8 bits */
sahilmgandhi	18:6a4db94011d3	1981	tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \| USART_CR1_TE \| \
sahilmgandhi	18:6a4db94011d3	1982	USART_CR1_RE \| USART_CR1_OVER8));
sahilmgandhi	18:6a4db94011d3	1983
sahilmgandhi	18:6a4db94011d3	1984	/* Configure the USART Word Length, Parity and mode:
sahilmgandhi	18:6a4db94011d3	1985	Set the M bits according to husart->Init.WordLength value
sahilmgandhi	18:6a4db94011d3	1986	Set PCE and PS bits according to husart->Init.Parity value
sahilmgandhi	18:6a4db94011d3	1987	Set TE and RE bits according to husart->Init.Mode value
sahilmgandhi	18:6a4db94011d3	1988	Force OVER8 bit to 1 in order to reach the max USART frequencies */
sahilmgandhi	18:6a4db94011d3	1989	tmpreg \|= (uint32_t)husart->Init.WordLength \| husart->Init.Parity \| husart->Init.Mode \| USART_CR1_OVER8;
sahilmgandhi	18:6a4db94011d3	1990
sahilmgandhi	18:6a4db94011d3	1991	/* Write to USART CR1 */
sahilmgandhi	18:6a4db94011d3	1992	WRITE_REG(husart->Instance->CR1, (uint32_t)tmpreg);
sahilmgandhi	18:6a4db94011d3	1993
sahilmgandhi	18:6a4db94011d3	1994	/-------------------------- USART CR3 Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1995	/* Clear CTSE and RTSE bits */
sahilmgandhi	18:6a4db94011d3	1996	CLEAR_BIT(husart->Instance->CR3, (USART_CR3_RTSE \| USART_CR3_CTSE));
sahilmgandhi	18:6a4db94011d3	1997
sahilmgandhi	18:6a4db94011d3	1998	/-------------------------- USART BRR Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1999	if((husart->Instance == USART1) \|\| (husart->Instance == USART6))
sahilmgandhi	18:6a4db94011d3	2000	{
sahilmgandhi	18:6a4db94011d3	2001	husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
sahilmgandhi	18:6a4db94011d3	2002	}
sahilmgandhi	18:6a4db94011d3	2003	else
sahilmgandhi	18:6a4db94011d3	2004	{
sahilmgandhi	18:6a4db94011d3	2005	husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK1Freq(), husart->Init.BaudRate);
sahilmgandhi	18:6a4db94011d3	2006	}
sahilmgandhi	18:6a4db94011d3	2007	}
sahilmgandhi	18:6a4db94011d3	2008
sahilmgandhi	18:6a4db94011d3	2009	/**
sahilmgandhi	18:6a4db94011d3	2010	* @}
sahilmgandhi	18:6a4db94011d3	2011	*/
sahilmgandhi	18:6a4db94011d3	2012
sahilmgandhi	18:6a4db94011d3	2013	#endif /* HAL_USART_MODULE_ENABLED */
sahilmgandhi	18:6a4db94011d3	2014	/**
sahilmgandhi	18:6a4db94011d3	2015	* @}
sahilmgandhi	18:6a4db94011d3	2016	*/
sahilmgandhi	18:6a4db94011d3	2017
sahilmgandhi	18:6a4db94011d3	2018	/**
sahilmgandhi	18:6a4db94011d3	2019	* @}
sahilmgandhi	18:6a4db94011d3	2020	*/
sahilmgandhi	18:6a4db94011d3	2021
sahilmgandhi	18:6a4db94011d3	2022	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	25 Apr 2017
Imports:	29
Forks:	0
Commits:	47
Dependents:	0
Dependencies:	2
Followers:	5

The code in this repository is Apache licensed.

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_usart.c@46:b156ef445742, 2017-06-03 (annotated)

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