MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/test_map.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file test_map.h
sahilmgandhi 18:6a4db94011d3 4 * @brief Test hw module register map
sahilmgandhi 18:6a4db94011d3 5 * @internal
sahilmgandhi 18:6a4db94011d3 6 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 7 * $Rev: 2848 $
sahilmgandhi 18:6a4db94011d3 8 * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup test
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * @details
sahilmgandhi 18:6a4db94011d3 30 */
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 #ifndef TEST_MAP_H_
sahilmgandhi 18:6a4db94011d3 33 #define TEST_MAP_H_
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 /*************************************************************************************************
sahilmgandhi 18:6a4db94011d3 36 * *
sahilmgandhi 18:6a4db94011d3 37 * Header files *
sahilmgandhi 18:6a4db94011d3 38 * *
sahilmgandhi 18:6a4db94011d3 39 *************************************************************************************************/
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 #include "architecture.h"
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /**************************************************************************************************
sahilmgandhi 18:6a4db94011d3 44 * *
sahilmgandhi 18:6a4db94011d3 45 * Type definitions *
sahilmgandhi 18:6a4db94011d3 46 * *
sahilmgandhi 18:6a4db94011d3 47 **************************************************************************************************/
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** General test registers
sahilmgandhi 18:6a4db94011d3 50 *
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52 typedef struct {
sahilmgandhi 18:6a4db94011d3 53 __IO uint32_t UNLOCK;
sahilmgandhi 18:6a4db94011d3 54 __IO uint32_t ANA_TEST_MUX;
sahilmgandhi 18:6a4db94011d3 55 __IO uint32_t OVD_ENA_MODE;
sahilmgandhi 18:6a4db94011d3 56 __IO uint32_t OVD_VAL;
sahilmgandhi 18:6a4db94011d3 57 __IO uint32_t ANA_TEST_MODE;
sahilmgandhi 18:6a4db94011d3 58 __IO uint32_t CLK_TEST_MODE;
sahilmgandhi 18:6a4db94011d3 59 union {
sahilmgandhi 18:6a4db94011d3 60 struct {
sahilmgandhi 18:6a4db94011d3 61 __IO uint32_t PAD0:1;
sahilmgandhi 18:6a4db94011d3 62 __IO uint32_t PAD1:1;
sahilmgandhi 18:6a4db94011d3 63 __IO uint32_t FORCE_SOURCE:1;
sahilmgandhi 18:6a4db94011d3 64 __IO uint32_t FORCE_SINK:1;
sahilmgandhi 18:6a4db94011d3 65 __IO uint32_t PD_CONTROL:3;
sahilmgandhi 18:6a4db94011d3 66 __IO uint32_t PAD3:1;
sahilmgandhi 18:6a4db94011d3 67 __IO uint32_t BYPASS_PLL_REG:1;
sahilmgandhi 18:6a4db94011d3 68 __IO uint32_t PAD4:4;
sahilmgandhi 18:6a4db94011d3 69 __IO uint32_t DITHER_MODE:1;
sahilmgandhi 18:6a4db94011d3 70 __IO uint32_t PLL_MODE:1;
sahilmgandhi 18:6a4db94011d3 71 __IO uint32_t FORCE_LOCK:1;
sahilmgandhi 18:6a4db94011d3 72 } BITS;
sahilmgandhi 18:6a4db94011d3 73 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 74 } PLL_TEST_MODE;
sahilmgandhi 18:6a4db94011d3 75 __IO uint32_t RX_TEST_MODE;
sahilmgandhi 18:6a4db94011d3 76 __IO uint32_t PMU_TEST_MODE;
sahilmgandhi 18:6a4db94011d3 77 } TestReg_t, *TestReg_pt;
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 /** Digital test registers
sahilmgandhi 18:6a4db94011d3 80 *
sahilmgandhi 18:6a4db94011d3 81 */
sahilmgandhi 18:6a4db94011d3 82 typedef struct {
sahilmgandhi 18:6a4db94011d3 83 union {
sahilmgandhi 18:6a4db94011d3 84 struct {
sahilmgandhi 18:6a4db94011d3 85 __IO uint32_t PAD0 :4; /**< */
sahilmgandhi 18:6a4db94011d3 86 __IO uint32_t DIO4 :4; /**< DIO4 Test Mux Control */
sahilmgandhi 18:6a4db94011d3 87 __IO uint32_t DIO5 :4; /**< DIO5 Test Mux Control */
sahilmgandhi 18:6a4db94011d3 88 __IO uint32_t DIO6 :4; /**< DIO6 Test Mux Control */
sahilmgandhi 18:6a4db94011d3 89 __IO uint32_t DIO7 :4; /**< DIO7 Test Mux Control */
sahilmgandhi 18:6a4db94011d3 90 __IO uint32_t DIO8 :4; /**< DIO8 Test Mux Control */
sahilmgandhi 18:6a4db94011d3 91 __IO uint32_t DIO9 :4; /**< DIO9 Test Mux Control */
sahilmgandhi 18:6a4db94011d3 92 __IO uint32_t DIO10 :4; /**< DIO10 Test Mux Control */
sahilmgandhi 18:6a4db94011d3 93 } BITS;
sahilmgandhi 18:6a4db94011d3 94 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 95 } DIG_TEST_MUX;
sahilmgandhi 18:6a4db94011d3 96 __IO uint32_t DIG_TEST_MODE;
sahilmgandhi 18:6a4db94011d3 97 union {
sahilmgandhi 18:6a4db94011d3 98 struct {
sahilmgandhi 18:6a4db94011d3 99 __IO uint32_t PAD0 :12; /**< */
sahilmgandhi 18:6a4db94011d3 100 __IO uint32_t DIO5 :3; /**< DIO5 Input Test Mux Control */
sahilmgandhi 18:6a4db94011d3 101 __IO uint32_t DIO6 :3; /**< DIO6 Input Test Mux Control */
sahilmgandhi 18:6a4db94011d3 102 __IO uint32_t DIO7 :3; /**< DIO7 Input Test Mux Control */
sahilmgandhi 18:6a4db94011d3 103 __IO uint32_t DIO8 :3; /**< DIO8 Input Test Mux Control */
sahilmgandhi 18:6a4db94011d3 104 __IO uint32_t DIO9 :3; /**< DIO9 Input Test Mux Control */
sahilmgandhi 18:6a4db94011d3 105 __IO uint32_t DIO10 :3; /**< DIO10 Input Test Mux Control */
sahilmgandhi 18:6a4db94011d3 106 } BITS;
sahilmgandhi 18:6a4db94011d3 107 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 108 } DIG_IN_TEST_MUX;
sahilmgandhi 18:6a4db94011d3 109 __IO uint32_t SCAN_MODE;
sahilmgandhi 18:6a4db94011d3 110 __IO uint32_t BIST_TEST_MUX;
sahilmgandhi 18:6a4db94011d3 111 __IO uint32_t RAM_DIAG_ADDR;
sahilmgandhi 18:6a4db94011d3 112 __IO uint32_t RAM_DIAG_DATA;
sahilmgandhi 18:6a4db94011d3 113 __IO uint32_t SRAMA_DIAG_COMP;
sahilmgandhi 18:6a4db94011d3 114 __IO uint32_t SRAMB_DIAG_COMP;
sahilmgandhi 18:6a4db94011d3 115 __IO uint32_t RAM_BUF_TEST_MODE;
sahilmgandhi 18:6a4db94011d3 116 } TestDigReg_t, *TestDigReg_pt;
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 /** NVM test registers
sahilmgandhi 18:6a4db94011d3 119 *
sahilmgandhi 18:6a4db94011d3 120 */
sahilmgandhi 18:6a4db94011d3 121 typedef struct {
sahilmgandhi 18:6a4db94011d3 122 __O uint32_t PAD;
sahilmgandhi 18:6a4db94011d3 123 } TestNvmReg_t, *TestNvmReg_pt;
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 #endif /* TEST_MAP_H_ */