Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 17 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 18 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 __IO uint32_t* IOCON_REGISTERS[18] = {
sahilmgandhi 18:6a4db94011d3 21 &LPC_IOCON->PIO0_0 , &LPC_IOCON->PIO0_1 , &LPC_IOCON->PIO0_2 ,
sahilmgandhi 18:6a4db94011d3 22 &LPC_IOCON->PIO0_3 , &LPC_IOCON->PIO0_4 , &LPC_IOCON->PIO0_5 ,
sahilmgandhi 18:6a4db94011d3 23 &LPC_IOCON->PIO0_6 , &LPC_IOCON->PIO0_7 , &LPC_IOCON->PIO0_8 ,
sahilmgandhi 18:6a4db94011d3 24 &LPC_IOCON->PIO0_9 , &LPC_IOCON->PIO0_10, &LPC_IOCON->PIO0_11,
sahilmgandhi 18:6a4db94011d3 25 &LPC_IOCON->PIO0_12, &LPC_IOCON->PIO0_13, &LPC_IOCON->PIO0_14,
sahilmgandhi 18:6a4db94011d3 26 &LPC_IOCON->PIO0_15, &LPC_IOCON->PIO0_16, &LPC_IOCON->PIO0_17,
sahilmgandhi 18:6a4db94011d3 27 };
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 void pin_function(PinName pin, int function) {
sahilmgandhi 18:6a4db94011d3 30 if (function == 0) {
sahilmgandhi 18:6a4db94011d3 31 // Disable initial fixed function for P0_2, P0_3 and P0_5
sahilmgandhi 18:6a4db94011d3 32 uint32_t enable = 0;
sahilmgandhi 18:6a4db94011d3 33 if (pin == P0_2)
sahilmgandhi 18:6a4db94011d3 34 enable = 1 << 3;
sahilmgandhi 18:6a4db94011d3 35 else if (pin == P0_3)
sahilmgandhi 18:6a4db94011d3 36 enable = 1 << 2;
sahilmgandhi 18:6a4db94011d3 37 else if (pin == P0_5)
sahilmgandhi 18:6a4db94011d3 38 enable = 1 << 6;
sahilmgandhi 18:6a4db94011d3 39 LPC_SWM->PINENABLE0 |= enable;
sahilmgandhi 18:6a4db94011d3 40 }
sahilmgandhi 18:6a4db94011d3 41 }
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 void pin_mode(PinName pin, PinMode mode) {
sahilmgandhi 18:6a4db94011d3 44 MBED_ASSERT(pin != (PinName)NC);
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 if ((pin == 10) || (pin == 11)) {
sahilmgandhi 18:6a4db94011d3 47 // True open-drain pins can be configured for different I2C-bus speeds
sahilmgandhi 18:6a4db94011d3 48 return;
sahilmgandhi 18:6a4db94011d3 49 }
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 __IO uint32_t *reg = IOCON_REGISTERS[pin];
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 if (mode == OpenDrain) {
sahilmgandhi 18:6a4db94011d3 54 *reg |= (1 << 10);
sahilmgandhi 18:6a4db94011d3 55 } else {
sahilmgandhi 18:6a4db94011d3 56 uint32_t tmp = *reg;
sahilmgandhi 18:6a4db94011d3 57 tmp &= ~(0x3 << 3);
sahilmgandhi 18:6a4db94011d3 58 tmp |= (mode & 0x3) << 3;
sahilmgandhi 18:6a4db94011d3 59 *reg = tmp;
sahilmgandhi 18:6a4db94011d3 60 }
sahilmgandhi 18:6a4db94011d3 61 }