MacroRat
Mouse code for the MacroRat
mbed-dev/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_gpio.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| sahilmgandhi | 18:6a4db94011d3 | 1 | /**************************************************************************//** |
| sahilmgandhi | 18:6a4db94011d3 | 2 | * @file gpio.h |
| sahilmgandhi | 18:6a4db94011d3 | 3 | * @version V1.00 |
| sahilmgandhi | 18:6a4db94011d3 | 4 | * $Revision: 12 $ |
| sahilmgandhi | 18:6a4db94011d3 | 5 | * $Date: 14/10/06 11:46a $ |
| sahilmgandhi | 18:6a4db94011d3 | 6 | * @brief NUC472/NUC442 GPIO driver header file |
| sahilmgandhi | 18:6a4db94011d3 | 7 | * |
| sahilmgandhi | 18:6a4db94011d3 | 8 | * @note |
| sahilmgandhi | 18:6a4db94011d3 | 9 | * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved. |
| sahilmgandhi | 18:6a4db94011d3 | 10 | *****************************************************************************/ |
| sahilmgandhi | 18:6a4db94011d3 | 11 | #ifndef __GPIO_H__ |
| sahilmgandhi | 18:6a4db94011d3 | 12 | #define __GPIO_H__ |
| sahilmgandhi | 18:6a4db94011d3 | 13 | |
| sahilmgandhi | 18:6a4db94011d3 | 14 | #ifdef __cplusplus |
| sahilmgandhi | 18:6a4db94011d3 | 15 | extern "C" |
| sahilmgandhi | 18:6a4db94011d3 | 16 | { |
| sahilmgandhi | 18:6a4db94011d3 | 17 | #endif |
| sahilmgandhi | 18:6a4db94011d3 | 18 | |
| sahilmgandhi | 18:6a4db94011d3 | 19 | |
| sahilmgandhi | 18:6a4db94011d3 | 20 | /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver |
| sahilmgandhi | 18:6a4db94011d3 | 21 | @{ |
| sahilmgandhi | 18:6a4db94011d3 | 22 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 23 | |
| sahilmgandhi | 18:6a4db94011d3 | 24 | /** @addtogroup NUC472_442_GPIO_Driver GPIO Driver |
| sahilmgandhi | 18:6a4db94011d3 | 25 | @{ |
| sahilmgandhi | 18:6a4db94011d3 | 26 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 27 | |
| sahilmgandhi | 18:6a4db94011d3 | 28 | /** @addtogroup NUC472_442_GPIO_EXPORTED_CONSTANTS GPIO Exported Constants |
| sahilmgandhi | 18:6a4db94011d3 | 29 | @{ |
| sahilmgandhi | 18:6a4db94011d3 | 30 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 31 | #define GPIO_PIN_MAX 16 /*!< Specify Maximum Pins of Each GPIO Port */ |
| sahilmgandhi | 18:6a4db94011d3 | 32 | |
| sahilmgandhi | 18:6a4db94011d3 | 33 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 34 | /* MODE Constant Definitions */ |
| sahilmgandhi | 18:6a4db94011d3 | 35 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 36 | #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 37 | #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 38 | #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 39 | #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 40 | |
| sahilmgandhi | 18:6a4db94011d3 | 41 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 42 | /* GPIO Interrupt Type Constant Definitions */ |
| sahilmgandhi | 18:6a4db94011d3 | 43 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 44 | #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 45 | #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 46 | #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge */ |
| sahilmgandhi | 18:6a4db94011d3 | 47 | #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High */ |
| sahilmgandhi | 18:6a4db94011d3 | 48 | #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level */ |
| sahilmgandhi | 18:6a4db94011d3 | 49 | |
| sahilmgandhi | 18:6a4db94011d3 | 50 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 51 | /* IMD Constant Definitions */ |
| sahilmgandhi | 18:6a4db94011d3 | 52 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 53 | #define GPIO_IMD_EDGE 0UL /*!< IMD Setting for Edge Trigger Mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 54 | #define GPIO_IMD_LEVEL 1UL /*!< IMD Setting for Edge Level Mode */ |
| sahilmgandhi | 18:6a4db94011d3 | 55 | |
| sahilmgandhi | 18:6a4db94011d3 | 56 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 57 | /* DBCTL Constant Definitions */ |
| sahilmgandhi | 18:6a4db94011d3 | 58 | /*---------------------------------------------------------------------------------------------------------*/ |
| sahilmgandhi | 18:6a4db94011d3 | 59 | #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< DBCTL setting for all IO pins edge detection circuit is always active after reset */ |
| sahilmgandhi | 18:6a4db94011d3 | 60 | #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 */ |
| sahilmgandhi | 18:6a4db94011d3 | 61 | |
| sahilmgandhi | 18:6a4db94011d3 | 62 | #define GPIO_DBCTL_DBCLKSRC_IRC10K 0x00000010UL /*!< DBCTL setting for de-bounce counter clock source is the internal 10 kHz */ |
| sahilmgandhi | 18:6a4db94011d3 | 63 | #define GPIO_DBCTL_DBCLKSRC_HCLK 0x00000000UL /*!< DBCTL setting for de-bounce counter clock source is the internal HCLK */ |
| sahilmgandhi | 18:6a4db94011d3 | 64 | |
| sahilmgandhi | 18:6a4db94011d3 | 65 | #define GPIO_DBCTL_DBCLKSEL_1 0x00000000UL /*!< DBCTL setting for sampling cycle = 1 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 66 | #define GPIO_DBCTL_DBCLKSEL_2 0x00000001UL /*!< DBCTL setting for sampling cycle = 2 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 67 | #define GPIO_DBCTL_DBCLKSEL_4 0x00000002UL /*!< v setting for sampling cycle = 4 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 68 | #define GPIO_DBCTL_DBCLKSEL_8 0x00000003UL /*!< DBCTL setting for sampling cycle = 8 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 69 | #define GPIO_DBCTL_DBCLKSEL_16 0x00000004UL /*!< DBCTL setting for sampling cycle = 16 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 70 | #define GPIO_DBCTL_DBCLKSEL_32 0x00000005UL /*!< DBCTL setting for sampling cycle = 32 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 71 | #define GPIO_DBCTL_DBCLKSEL_64 0x00000006UL /*!< DBCTL setting for sampling cycle = 64 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 72 | #define GPIO_DBCTL_DBCLKSEL_128 0x00000007UL /*!< DBCTL setting for sampling cycle = 128 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 73 | #define GPIO_DBCTL_DBCLKSEL_256 0x00000008UL /*!< DBCTL setting for sampling cycle = 256 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 74 | #define GPIO_DBCTL_DBCLKSEL_512 0x00000009UL /*!< DBCTL setting for sampling cycle = 512 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 75 | #define GPIO_DBCTL_DBCLKSEL_1024 0x0000000AUL /*!< DBCTL setting for sampling cycle = 1024 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 76 | #define GPIO_DBCTL_DBCLKSEL_2048 0x0000000BUL /*!< DBCTL setting for sampling cycle = 2048 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 77 | #define GPIO_DBCTL_DBCLKSEL_4096 0x0000000CUL /*!< DBCTL setting for sampling cycle = 4096 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 78 | #define GPIO_DBCTL_DBCLKSEL_8192 0x0000000DUL /*!< DBCTL setting for sampling cycle = 8192 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 79 | #define GPIO_DBCTL_DBCLKSEL_16384 0x0000000EUL /*!< DBCTL setting for sampling cycle = 16384 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 80 | #define GPIO_DBCTL_DBCLKSEL_32768 0x0000000FUL /*!< DBCTL setting for sampling cycle = 32768 clocks */ |
| sahilmgandhi | 18:6a4db94011d3 | 81 | |
| sahilmgandhi | 18:6a4db94011d3 | 82 | /** Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping. |
| sahilmgandhi | 18:6a4db94011d3 | 83 | * Example 1: |
| sahilmgandhi | 18:6a4db94011d3 | 84 | * |
| sahilmgandhi | 18:6a4db94011d3 | 85 | * PA0 = 1; |
| sahilmgandhi | 18:6a4db94011d3 | 86 | * |
| sahilmgandhi | 18:6a4db94011d3 | 87 | * It is used to set PA0 to high; |
| sahilmgandhi | 18:6a4db94011d3 | 88 | * |
| sahilmgandhi | 18:6a4db94011d3 | 89 | * Example 2: |
| sahilmgandhi | 18:6a4db94011d3 | 90 | * |
| sahilmgandhi | 18:6a4db94011d3 | 91 | * if (PA0) |
| sahilmgandhi | 18:6a4db94011d3 | 92 | * PA0 = 0; |
| sahilmgandhi | 18:6a4db94011d3 | 93 | * |
| sahilmgandhi | 18:6a4db94011d3 | 94 | * If PA0 pin status is high, then set PA0 data output to low. |
| sahilmgandhi | 18:6a4db94011d3 | 95 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 96 | #define GPIO_PIN_ADDR(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2)))) |
| sahilmgandhi | 18:6a4db94011d3 | 97 | #define PA0 GPIO_PIN_ADDR(0, 0) /*!< Specify PA0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 98 | #define PA1 GPIO_PIN_ADDR(0, 1) /*!< Specify PA1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 99 | #define PA2 GPIO_PIN_ADDR(0, 2) /*!< Specify PA2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 100 | #define PA3 GPIO_PIN_ADDR(0, 3) /*!< Specify PA3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 101 | #define PA4 GPIO_PIN_ADDR(0, 4) /*!< Specify PA4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 102 | #define PA5 GPIO_PIN_ADDR(0, 5) /*!< Specify PA5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 103 | #define PA6 GPIO_PIN_ADDR(0, 6) /*!< Specify PA6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 104 | #define PA7 GPIO_PIN_ADDR(0, 7) /*!< Specify PA7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 105 | #define PA8 GPIO_PIN_ADDR(0, 8) /*!< Specify PA8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 106 | #define PA9 GPIO_PIN_ADDR(0, 9) /*!< Specify PA9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 107 | #define PA10 GPIO_PIN_ADDR(0, 10) /*!< Specify PA10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 108 | #define PA11 GPIO_PIN_ADDR(0, 11) /*!< Specify PA11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 109 | #define PA12 GPIO_PIN_ADDR(0, 12) /*!< Specify PA12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 110 | #define PA13 GPIO_PIN_ADDR(0, 13) /*!< Specify PA13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 111 | #define PA14 GPIO_PIN_ADDR(0, 14) /*!< Specify PA14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 112 | #define PA15 GPIO_PIN_ADDR(0, 15) /*!< Specify PA15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 113 | |
| sahilmgandhi | 18:6a4db94011d3 | 114 | #define PB0 GPIO_PIN_ADDR(1, 0) /*!< Specify PB0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 115 | #define PB1 GPIO_PIN_ADDR(1, 1) /*!< Specify PB1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 116 | #define PB2 GPIO_PIN_ADDR(1, 2) /*!< Specify PB2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 117 | #define PB3 GPIO_PIN_ADDR(1, 3) /*!< Specify PB3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 118 | #define PB4 GPIO_PIN_ADDR(1, 4) /*!< Specify PB4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 119 | #define PB5 GPIO_PIN_ADDR(1, 5) /*!< Specify PB5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 120 | #define PB6 GPIO_PIN_ADDR(1, 6) /*!< Specify PB6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 121 | #define PB7 GPIO_PIN_ADDR(1, 7) /*!< Specify PB7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 122 | #define PB8 GPIO_PIN_ADDR(1, 8) /*!< Specify PB8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 123 | #define PB9 GPIO_PIN_ADDR(1, 9) /*!< Specify PB9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 124 | #define PB10 GPIO_PIN_ADDR(1, 10) /*!< Specify PB10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 125 | #define PB11 GPIO_PIN_ADDR(1, 11) /*!< Specify PB11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 126 | #define PB12 GPIO_PIN_ADDR(1, 12) /*!< Specify PB12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 127 | #define PB13 GPIO_PIN_ADDR(1, 13) /*!< Specify PB13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 128 | #define PB14 GPIO_PIN_ADDR(1, 14) /*!< Specify PB14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 129 | #define PB15 GPIO_PIN_ADDR(1, 15) /*!< Specify PB15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 130 | |
| sahilmgandhi | 18:6a4db94011d3 | 131 | #define PC0 GPIO_PIN_ADDR(2, 0) /*!< Specify PC0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 132 | #define PC1 GPIO_PIN_ADDR(2, 1) /*!< Specify PC1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 133 | #define PC2 GPIO_PIN_ADDR(2, 2) /*!< Specify PC2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 134 | #define PC3 GPIO_PIN_ADDR(2, 3) /*!< Specify PC3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 135 | #define PC4 GPIO_PIN_ADDR(2, 4) /*!< Specify PC4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 136 | #define PC5 GPIO_PIN_ADDR(2, 5) /*!< Specify PC5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 137 | #define PC6 GPIO_PIN_ADDR(2, 6) /*!< Specify PC6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 138 | #define PC7 GPIO_PIN_ADDR(2, 7) /*!< Specify PC7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 139 | #define PC8 GPIO_PIN_ADDR(2, 8) /*!< Specify PC8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 140 | #define PC9 GPIO_PIN_ADDR(2, 9) /*!< Specify PC9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 141 | #define PC10 GPIO_PIN_ADDR(2, 10) /*!< Specify PC10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 142 | #define PC11 GPIO_PIN_ADDR(2, 11) /*!< Specify PC11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 143 | #define PC12 GPIO_PIN_ADDR(2, 12) /*!< Specify PC12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 144 | #define PC13 GPIO_PIN_ADDR(2, 13) /*!< Specify PC13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 145 | #define PC14 GPIO_PIN_ADDR(2, 14) /*!< Specify PC14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 146 | #define PC15 GPIO_PIN_ADDR(2, 15) /*!< Specify PC15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 147 | |
| sahilmgandhi | 18:6a4db94011d3 | 148 | #define PD0 GPIO_PIN_ADDR(3, 0) /*!< Specify PD0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 149 | #define PD1 GPIO_PIN_ADDR(3, 1) /*!< Specify PD1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 150 | #define PD2 GPIO_PIN_ADDR(3, 2) /*!< Specify PD2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 151 | #define PD3 GPIO_PIN_ADDR(3, 3) /*!< Specify PD3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 152 | #define PD4 GPIO_PIN_ADDR(3, 4) /*!< Specify PD4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 153 | #define PD5 GPIO_PIN_ADDR(3, 5) /*!< Specify PD5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 154 | #define PD6 GPIO_PIN_ADDR(3, 6) /*!< Specify PD6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 155 | #define PD7 GPIO_PIN_ADDR(3, 7) /*!< Specify PD7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 156 | #define PD8 GPIO_PIN_ADDR(3, 8) /*!< Specify PD8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 157 | #define PD9 GPIO_PIN_ADDR(3, 9) /*!< Specify PD9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 158 | #define PD10 GPIO_PIN_ADDR(3, 10) /*!< Specify PD10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 159 | #define PD11 GPIO_PIN_ADDR(3, 11) /*!< Specify PD11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 160 | #define PD12 GPIO_PIN_ADDR(3, 12) /*!< Specify PD12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 161 | #define PD13 GPIO_PIN_ADDR(3, 13) /*!< Specify PD13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 162 | #define PD14 GPIO_PIN_ADDR(3, 14) /*!< Specify PD14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 163 | #define PD15 GPIO_PIN_ADDR(3, 15) /*!< Specify PD15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 164 | |
| sahilmgandhi | 18:6a4db94011d3 | 165 | #define PE0 GPIO_PIN_ADDR(4, 0) /*!< Specify PE0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 166 | #define PE1 GPIO_PIN_ADDR(4, 1) /*!< Specify PE1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 167 | #define PE2 GPIO_PIN_ADDR(4, 2) /*!< Specify PE2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 168 | #define PE3 GPIO_PIN_ADDR(4, 3) /*!< Specify PE3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 169 | #define PE4 GPIO_PIN_ADDR(4, 4) /*!< Specify PE4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 170 | #define PE5 GPIO_PIN_ADDR(4, 5) /*!< Specify PE5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 171 | #define PE6 GPIO_PIN_ADDR(4, 6) /*!< Specify PE6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 172 | #define PE7 GPIO_PIN_ADDR(4, 7) /*!< Specify PE7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 173 | #define PE8 GPIO_PIN_ADDR(4, 8) /*!< Specify PE8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 174 | #define PE9 GPIO_PIN_ADDR(4, 9) /*!< Specify PE9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 175 | #define PE10 GPIO_PIN_ADDR(4, 10) /*!< Specify PE10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 176 | #define PE11 GPIO_PIN_ADDR(4, 11) /*!< Specify PE11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 177 | #define PE12 GPIO_PIN_ADDR(4, 12) /*!< Specify PE12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 178 | #define PE13 GPIO_PIN_ADDR(4, 13) /*!< Specify PE13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 179 | #define PE14 GPIO_PIN_ADDR(4, 14) /*!< Specify PE14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 180 | #define PE15 GPIO_PIN_ADDR(4, 15) /*!< Specify PE15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 181 | |
| sahilmgandhi | 18:6a4db94011d3 | 182 | #define PF0 GPIO_PIN_ADDR(5, 0) /*!< Specify PF0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 183 | #define PF1 GPIO_PIN_ADDR(5, 1) /*!< Specify PF1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 184 | #define PF2 GPIO_PIN_ADDR(5, 2) /*!< Specify PF2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 185 | #define PF3 GPIO_PIN_ADDR(5, 3) /*!< Specify PF3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 186 | #define PF4 GPIO_PIN_ADDR(5, 4) /*!< Specify PF4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 187 | #define PF5 GPIO_PIN_ADDR(5, 5) /*!< Specify PF5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 188 | #define PF6 GPIO_PIN_ADDR(5, 6) /*!< Specify PF6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 189 | #define PF7 GPIO_PIN_ADDR(5, 7) /*!< Specify PF7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 190 | #define PF8 GPIO_PIN_ADDR(5, 8) /*!< Specify PF8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 191 | #define PF9 GPIO_PIN_ADDR(5, 9) /*!< Specify PF9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 192 | #define PF10 GPIO_PIN_ADDR(5, 10) /*!< Specify PF10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 193 | #define PF11 GPIO_PIN_ADDR(5, 11) /*!< Specify PF11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 194 | #define PF12 GPIO_PIN_ADDR(5, 12) /*!< Specify PF12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 195 | #define PF13 GPIO_PIN_ADDR(5, 13) /*!< Specify PF13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 196 | #define PF14 GPIO_PIN_ADDR(5, 14) /*!< Specify PF14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 197 | #define PF15 GPIO_PIN_ADDR(5, 15) /*!< Specify PF15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 198 | |
| sahilmgandhi | 18:6a4db94011d3 | 199 | #define PG0 GPIO_PIN_ADDR(6, 0) /*!< Specify PG0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 200 | #define PG1 GPIO_PIN_ADDR(6, 1) /*!< Specify PG1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 201 | #define PG2 GPIO_PIN_ADDR(6, 2) /*!< Specify PG2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 202 | #define PG3 GPIO_PIN_ADDR(6, 3) /*!< Specify PG3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 203 | #define PG4 GPIO_PIN_ADDR(6, 4) /*!< Specify PG4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 204 | #define PG5 GPIO_PIN_ADDR(6, 5) /*!< Specify PG5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 205 | #define PG6 GPIO_PIN_ADDR(6, 6) /*!< Specify PG6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 206 | #define PG7 GPIO_PIN_ADDR(6, 7) /*!< Specify PG7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 207 | #define PG8 GPIO_PIN_ADDR(6, 8) /*!< Specify PG8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 208 | #define PG9 GPIO_PIN_ADDR(6, 9) /*!< Specify PG9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 209 | #define PG10 GPIO_PIN_ADDR(6, 10) /*!< Specify PG10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 210 | #define PG11 GPIO_PIN_ADDR(6, 11) /*!< Specify PG11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 211 | #define PG12 GPIO_PIN_ADDR(6, 12) /*!< Specify PG12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 212 | #define PG13 GPIO_PIN_ADDR(6, 13) /*!< Specify PG13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 213 | #define PG14 GPIO_PIN_ADDR(6, 14) /*!< Specify PG14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 214 | #define PG15 GPIO_PIN_ADDR(6, 15) /*!< Specify PG15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 215 | |
| sahilmgandhi | 18:6a4db94011d3 | 216 | #define PH0 GPIO_PIN_ADDR(7, 0) /*!< Specify PH0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 217 | #define PH1 GPIO_PIN_ADDR(7, 1) /*!< Specify PH1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 218 | #define PH2 GPIO_PIN_ADDR(7, 2) /*!< Specify PH2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 219 | #define PH3 GPIO_PIN_ADDR(7, 3) /*!< Specify PH3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 220 | #define PH4 GPIO_PIN_ADDR(7, 4) /*!< Specify PH4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 221 | #define PH5 GPIO_PIN_ADDR(7, 5) /*!< Specify PH5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 222 | #define PH6 GPIO_PIN_ADDR(7, 6) /*!< Specify PH6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 223 | #define PH7 GPIO_PIN_ADDR(7, 7) /*!< Specify PH7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 224 | #define PH8 GPIO_PIN_ADDR(7, 8) /*!< Specify PH8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 225 | #define PH9 GPIO_PIN_ADDR(7, 9) /*!< Specify PH9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 226 | #define PH10 GPIO_PIN_ADDR(7, 10) /*!< Specify PH10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 227 | #define PH11 GPIO_PIN_ADDR(7, 11) /*!< Specify PH11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 228 | #define PH12 GPIO_PIN_ADDR(7, 12) /*!< Specify PH12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 229 | #define PH13 GPIO_PIN_ADDR(7, 13) /*!< Specify PH13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 230 | #define PH14 GPIO_PIN_ADDR(7, 14) /*!< Specify PH14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 231 | #define PH15 GPIO_PIN_ADDR(7, 15) /*!< Specify PH15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 232 | |
| sahilmgandhi | 18:6a4db94011d3 | 233 | #define PI0 GPIO_PIN_ADDR(8, 0) /*!< Specify PI0 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 234 | #define PI1 GPIO_PIN_ADDR(8, 1) /*!< Specify PI1 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 235 | #define PI2 GPIO_PIN_ADDR(8, 2) /*!< Specify PI2 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 236 | #define PI3 GPIO_PIN_ADDR(8, 3) /*!< Specify PI3 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 237 | #define PI4 GPIO_PIN_ADDR(8, 4) /*!< Specify PI4 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 238 | #define PI5 GPIO_PIN_ADDR(8, 5) /*!< Specify PI5 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 239 | #define PI6 GPIO_PIN_ADDR(8, 6) /*!< Specify PI6 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 240 | #define PI7 GPIO_PIN_ADDR(8, 7) /*!< Specify PI7 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 241 | #define PI8 GPIO_PIN_ADDR(8, 8) /*!< Specify PI8 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 242 | #define PI9 GPIO_PIN_ADDR(8, 9) /*!< Specify PI9 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 243 | #define PI10 GPIO_PIN_ADDR(8, 10) /*!< Specify PI10 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 244 | #define PI11 GPIO_PIN_ADDR(8, 11) /*!< Specify PI11 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 245 | #define PI12 GPIO_PIN_ADDR(8, 12) /*!< Specify PI12 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 246 | #define PI13 GPIO_PIN_ADDR(8, 13) /*!< Specify PI13 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 247 | #define PI14 GPIO_PIN_ADDR(8, 14) /*!< Specify PI14 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 248 | #define PI15 GPIO_PIN_ADDR(8, 15) /*!< Specify PI15 Pin Data Input/Output */ |
| sahilmgandhi | 18:6a4db94011d3 | 249 | |
| sahilmgandhi | 18:6a4db94011d3 | 250 | /*@}*/ /* end of group NUC472_442_GPIO_EXPORTED_CONSTANTS */ |
| sahilmgandhi | 18:6a4db94011d3 | 251 | |
| sahilmgandhi | 18:6a4db94011d3 | 252 | /** @addtogroup NUC472_442_GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions |
| sahilmgandhi | 18:6a4db94011d3 | 253 | @{ |
| sahilmgandhi | 18:6a4db94011d3 | 254 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 255 | |
| sahilmgandhi | 18:6a4db94011d3 | 256 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 257 | * @brief Clear GPIO Pin Interrupt Flag |
| sahilmgandhi | 18:6a4db94011d3 | 258 | * |
| sahilmgandhi | 18:6a4db94011d3 | 259 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 260 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 261 | * |
| sahilmgandhi | 18:6a4db94011d3 | 262 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 263 | * |
| sahilmgandhi | 18:6a4db94011d3 | 264 | * @details Clear the interrupt status of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 265 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 266 | #define GPIO_CLR_INT_FLAG(gpio, u32PinMask) ((gpio)->INTSRC = u32PinMask) |
| sahilmgandhi | 18:6a4db94011d3 | 267 | |
| sahilmgandhi | 18:6a4db94011d3 | 268 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 269 | * @brief Disable Pin De-bounce Function |
| sahilmgandhi | 18:6a4db94011d3 | 270 | * |
| sahilmgandhi | 18:6a4db94011d3 | 271 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 272 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 273 | * |
| sahilmgandhi | 18:6a4db94011d3 | 274 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 275 | * |
| sahilmgandhi | 18:6a4db94011d3 | 276 | * @details Disable the interrupt de-bounce function of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 277 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 278 | #define GPIO_DISABLE_DEBOUNCE(gpio, u32PinMask) ((gpio)->DBEN &= ~u32PinMask) |
| sahilmgandhi | 18:6a4db94011d3 | 279 | |
| sahilmgandhi | 18:6a4db94011d3 | 280 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 281 | * @brief Enable Pin De-bounce Function |
| sahilmgandhi | 18:6a4db94011d3 | 282 | * |
| sahilmgandhi | 18:6a4db94011d3 | 283 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 284 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 285 | * |
| sahilmgandhi | 18:6a4db94011d3 | 286 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 287 | * |
| sahilmgandhi | 18:6a4db94011d3 | 288 | * @details Enable the interrupt de-bounce function of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 289 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 290 | #define GPIO_ENABLE_DEBOUNCE(gpio, u32PinMask) ((gpio)->DBEN |= u32PinMask) |
| sahilmgandhi | 18:6a4db94011d3 | 291 | |
| sahilmgandhi | 18:6a4db94011d3 | 292 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 293 | * @brief Disable I/O Digital Input Path |
| sahilmgandhi | 18:6a4db94011d3 | 294 | * |
| sahilmgandhi | 18:6a4db94011d3 | 295 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 296 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 297 | * |
| sahilmgandhi | 18:6a4db94011d3 | 298 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 299 | * |
| sahilmgandhi | 18:6a4db94011d3 | 300 | * @details Disable I/O digital input path of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 301 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 302 | #define GPIO_DISABLE_DIGITAL_PATH(gpio, u32PinMask) ((gpio)->DINOFF |= (u32PinMask << 16)) |
| sahilmgandhi | 18:6a4db94011d3 | 303 | |
| sahilmgandhi | 18:6a4db94011d3 | 304 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 305 | * @brief Enable I/O Digital Input Path |
| sahilmgandhi | 18:6a4db94011d3 | 306 | * |
| sahilmgandhi | 18:6a4db94011d3 | 307 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 308 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 309 | * |
| sahilmgandhi | 18:6a4db94011d3 | 310 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 311 | * |
| sahilmgandhi | 18:6a4db94011d3 | 312 | * @details Enable I/O digital input path of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 313 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 314 | #define GPIO_ENABLE_DIGITAL_PATH(gpio, u32PinMask) ((gpio)->DINOFF &= ~(u32PinMask << 16)) |
| sahilmgandhi | 18:6a4db94011d3 | 315 | |
| sahilmgandhi | 18:6a4db94011d3 | 316 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 317 | * @brief Disable I/O DOUT mask |
| sahilmgandhi | 18:6a4db94011d3 | 318 | * |
| sahilmgandhi | 18:6a4db94011d3 | 319 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 320 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 321 | * |
| sahilmgandhi | 18:6a4db94011d3 | 322 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 323 | * |
| sahilmgandhi | 18:6a4db94011d3 | 324 | * @details Disable I/O DOUT mask of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 325 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 326 | #define GPIO_DISABLE_DOUT_MASK(gpio, u32PinMask) ((gpio)->DATMSK |= u32PinMask) |
| sahilmgandhi | 18:6a4db94011d3 | 327 | |
| sahilmgandhi | 18:6a4db94011d3 | 328 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 329 | * @brief Enable I/O DOUT mask |
| sahilmgandhi | 18:6a4db94011d3 | 330 | * |
| sahilmgandhi | 18:6a4db94011d3 | 331 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 332 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 333 | * |
| sahilmgandhi | 18:6a4db94011d3 | 334 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 335 | * |
| sahilmgandhi | 18:6a4db94011d3 | 336 | * @details Enable I/O DOUT mask of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 337 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 338 | #define GPIO_ENABLE_DOUT_MASK(gpio, u32PinMask) ((gpio)->DATMSK &= ~u32PinMask) |
| sahilmgandhi | 18:6a4db94011d3 | 339 | |
| sahilmgandhi | 18:6a4db94011d3 | 340 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 341 | * @brief Get GPIO Pin Interrupt Flag |
| sahilmgandhi | 18:6a4db94011d3 | 342 | * |
| sahilmgandhi | 18:6a4db94011d3 | 343 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 344 | * @param[in] u32PinMask The single or multiple pins of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 345 | * |
| sahilmgandhi | 18:6a4db94011d3 | 346 | * @retval 0 No interrupt at specified GPIO pin |
| sahilmgandhi | 18:6a4db94011d3 | 347 | * @retval 1 The specified GPIO pin generate an interrupt |
| sahilmgandhi | 18:6a4db94011d3 | 348 | * |
| sahilmgandhi | 18:6a4db94011d3 | 349 | * @details Get the interrupt status of specified GPIO pin. |
| sahilmgandhi | 18:6a4db94011d3 | 350 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 351 | #define GPIO_GET_INT_FLAG(gpio, u32PinMask) ((gpio)->INTSRC & u32PinMask) |
| sahilmgandhi | 18:6a4db94011d3 | 352 | |
| sahilmgandhi | 18:6a4db94011d3 | 353 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 354 | * @brief Set De-bounce Sampling Cycle Time |
| sahilmgandhi | 18:6a4db94011d3 | 355 | * |
| sahilmgandhi | 18:6a4db94011d3 | 356 | * @param[in] u32ClkSrc The de-bounce counter clock source. It could be \ref GPIO_DBCTL_DBCLKSRC_HCLK or \ref GPIO_DBCTL_DBCLKSRC_IRC10K. |
| sahilmgandhi | 18:6a4db94011d3 | 357 | * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be \n |
| sahilmgandhi | 18:6a4db94011d3 | 358 | * \ref GPIO_DBCTL_DBCLKSEL_1, \ref GPIO_DBCTL_DBCLKSEL_2, \ref GPIO_DBCTL_DBCLKSEL_4, \ref GPIO_DBCTL_DBCLKSEL_8, \n |
| sahilmgandhi | 18:6a4db94011d3 | 359 | * \ref GPIO_DBCTL_DBCLKSEL_16, \ref GPIO_DBCTL_DBCLKSEL_32, \ref GPIO_DBCTL_DBCLKSEL_64, \ref GPIO_DBCTL_DBCLKSEL_128, \n |
| sahilmgandhi | 18:6a4db94011d3 | 360 | * \ref GPIO_DBCTL_DBCLKSEL_256, \ref GPIO_DBCTL_DBCLKSEL_512, \ref GPIO_DBCTL_DBCLKSEL_1024, \ref GPIO_DBCTL_DBCLKSEL_2048, \n |
| sahilmgandhi | 18:6a4db94011d3 | 361 | * \ref GPIO_DBCTL_DBCLKSEL_4096, \ref GPIO_DBCTL_DBCLKSEL_8192, \ref GPIO_DBCTL_DBCLKSEL_16384, \ref GPIO_DBCTL_DBCLKSEL_32768. |
| sahilmgandhi | 18:6a4db94011d3 | 362 | * |
| sahilmgandhi | 18:6a4db94011d3 | 363 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 364 | * |
| sahilmgandhi | 18:6a4db94011d3 | 365 | * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n |
| sahilmgandhi | 18:6a4db94011d3 | 366 | * Example: _GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_IRC10K, GPIO_DBCTL_DBCLKSEL_4). \n |
| sahilmgandhi | 18:6a4db94011d3 | 367 | * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n |
| sahilmgandhi | 18:6a4db94011d3 | 368 | * Then the target de-bounce sampling cycle time is (2^4)*(1/(10*1000)) s = 16*0.0001 s = 1600 us, |
| sahilmgandhi | 18:6a4db94011d3 | 369 | * and system will sampling interrupt input once per 1600 us. |
| sahilmgandhi | 18:6a4db94011d3 | 370 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 371 | #define GPIO_SET_DEBOUNCE_TIME(u32ClkSrc, u32ClkSel) (GPIO->DBCTL = (GPIO_DBCTL_ICLKON_Msk | u32ClkSrc | u32ClkSel)) |
| sahilmgandhi | 18:6a4db94011d3 | 372 | |
| sahilmgandhi | 18:6a4db94011d3 | 373 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 374 | * @brief Get GPIO Port IN Data |
| sahilmgandhi | 18:6a4db94011d3 | 375 | * |
| sahilmgandhi | 18:6a4db94011d3 | 376 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 377 | * |
| sahilmgandhi | 18:6a4db94011d3 | 378 | * @retval The specified port data |
| sahilmgandhi | 18:6a4db94011d3 | 379 | * |
| sahilmgandhi | 18:6a4db94011d3 | 380 | * @details Get the PIN register of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 381 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 382 | #define GPIO_GET_IN_DATA(gpio) ((gpio)->PIN) |
| sahilmgandhi | 18:6a4db94011d3 | 383 | |
| sahilmgandhi | 18:6a4db94011d3 | 384 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 385 | * @brief Set GPIO Port OUT Data |
| sahilmgandhi | 18:6a4db94011d3 | 386 | * |
| sahilmgandhi | 18:6a4db94011d3 | 387 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 388 | * @param[in] u32Data GPIO port data. |
| sahilmgandhi | 18:6a4db94011d3 | 389 | * |
| sahilmgandhi | 18:6a4db94011d3 | 390 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 391 | * |
| sahilmgandhi | 18:6a4db94011d3 | 392 | * @details Set the Data into specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 393 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 394 | #define GPIO_SET_OUT_DATA(gpio, u32Data) ((gpio)->DOUT = (u32Data)) |
| sahilmgandhi | 18:6a4db94011d3 | 395 | |
| sahilmgandhi | 18:6a4db94011d3 | 396 | |
| sahilmgandhi | 18:6a4db94011d3 | 397 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 398 | * @brief Toggle Specified GPIO pin |
| sahilmgandhi | 18:6a4db94011d3 | 399 | * |
| sahilmgandhi | 18:6a4db94011d3 | 400 | * @param[in] u32Pin Pxy |
| sahilmgandhi | 18:6a4db94011d3 | 401 | * |
| sahilmgandhi | 18:6a4db94011d3 | 402 | * @retval None |
| sahilmgandhi | 18:6a4db94011d3 | 403 | * |
| sahilmgandhi | 18:6a4db94011d3 | 404 | * @details Toggle the specified GPIO pint. |
| sahilmgandhi | 18:6a4db94011d3 | 405 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 406 | #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1) |
| sahilmgandhi | 18:6a4db94011d3 | 407 | |
| sahilmgandhi | 18:6a4db94011d3 | 408 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 409 | * @brief Enable External GPIO interrupt 0 |
| sahilmgandhi | 18:6a4db94011d3 | 410 | * |
| sahilmgandhi | 18:6a4db94011d3 | 411 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 412 | * @param[in] u32Pin The pin of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 413 | * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n |
| sahilmgandhi | 18:6a4db94011d3 | 414 | * \ref GPIO_INT_RISING, \ref GPIO_INT_FALLING, \ref GPIO_INT_BOTH_EDGE, \ref GPIO_INT_HIGH, \ref GPIO_INT_LOW. |
| sahilmgandhi | 18:6a4db94011d3 | 415 | * |
| sahilmgandhi | 18:6a4db94011d3 | 416 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 417 | * |
| sahilmgandhi | 18:6a4db94011d3 | 418 | * @details This function is used to enable specified GPIO pin interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 419 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 420 | #define GPIO_EnableEINT0 GPIO_EnableInt |
| sahilmgandhi | 18:6a4db94011d3 | 421 | |
| sahilmgandhi | 18:6a4db94011d3 | 422 | |
| sahilmgandhi | 18:6a4db94011d3 | 423 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 424 | * @brief Disable External GPIO interrupt 0 |
| sahilmgandhi | 18:6a4db94011d3 | 425 | * |
| sahilmgandhi | 18:6a4db94011d3 | 426 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 427 | * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 15. |
| sahilmgandhi | 18:6a4db94011d3 | 428 | * |
| sahilmgandhi | 18:6a4db94011d3 | 429 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 430 | * |
| sahilmgandhi | 18:6a4db94011d3 | 431 | * @details This function is used to enable specified GPIO pin interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 432 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 433 | #define GPIO_DisableEINT0 GPIO_DisableInt |
| sahilmgandhi | 18:6a4db94011d3 | 434 | |
| sahilmgandhi | 18:6a4db94011d3 | 435 | |
| sahilmgandhi | 18:6a4db94011d3 | 436 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 437 | * @brief Enable External GPIO interrupt 1 |
| sahilmgandhi | 18:6a4db94011d3 | 438 | * |
| sahilmgandhi | 18:6a4db94011d3 | 439 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 440 | * @param[in] u32Pin The pin of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 441 | * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n |
| sahilmgandhi | 18:6a4db94011d3 | 442 | * \ref GPIO_INT_RISING, \ref GPIO_INT_FALLING, \ref GPIO_INT_BOTH_EDGE, \ref GPIO_INT_HIGH, \ref GPIO_INT_LOW. |
| sahilmgandhi | 18:6a4db94011d3 | 443 | * |
| sahilmgandhi | 18:6a4db94011d3 | 444 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 445 | * |
| sahilmgandhi | 18:6a4db94011d3 | 446 | * @details This function is used to enable specified GPIO pin interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 447 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 448 | #define GPIO_EnableEINT1 GPIO_EnableInt |
| sahilmgandhi | 18:6a4db94011d3 | 449 | |
| sahilmgandhi | 18:6a4db94011d3 | 450 | |
| sahilmgandhi | 18:6a4db94011d3 | 451 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 452 | * @brief Disable External GPIO interrupt 1 |
| sahilmgandhi | 18:6a4db94011d3 | 453 | * |
| sahilmgandhi | 18:6a4db94011d3 | 454 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 455 | * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 15. |
| sahilmgandhi | 18:6a4db94011d3 | 456 | * |
| sahilmgandhi | 18:6a4db94011d3 | 457 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 458 | * |
| sahilmgandhi | 18:6a4db94011d3 | 459 | * @details This function is used to enable specified GPIO pin interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 460 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 461 | #define GPIO_DisableEINT1 GPIO_DisableInt |
| sahilmgandhi | 18:6a4db94011d3 | 462 | |
| sahilmgandhi | 18:6a4db94011d3 | 463 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 464 | * @brief Enable External GPIO interrupt n |
| sahilmgandhi | 18:6a4db94011d3 | 465 | * |
| sahilmgandhi | 18:6a4db94011d3 | 466 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 467 | * @param[in] u32Pin The pin of specified GPIO port. |
| sahilmgandhi | 18:6a4db94011d3 | 468 | * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n |
| sahilmgandhi | 18:6a4db94011d3 | 469 | * \ref GPIO_INT_RISING, \ref GPIO_INT_FALLING, \ref GPIO_INT_BOTH_EDGE, \ref GPIO_INT_HIGH, \ref GPIO_INT_LOW. |
| sahilmgandhi | 18:6a4db94011d3 | 470 | * |
| sahilmgandhi | 18:6a4db94011d3 | 471 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 472 | * |
| sahilmgandhi | 18:6a4db94011d3 | 473 | * @details This function is used to enable specified GPIO pin interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 474 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 475 | #define GPIO_EnableEINT GPIO_EnableInt |
| sahilmgandhi | 18:6a4db94011d3 | 476 | |
| sahilmgandhi | 18:6a4db94011d3 | 477 | |
| sahilmgandhi | 18:6a4db94011d3 | 478 | /** |
| sahilmgandhi | 18:6a4db94011d3 | 479 | * @brief Disable External GPIO interrupt n |
| sahilmgandhi | 18:6a4db94011d3 | 480 | * |
| sahilmgandhi | 18:6a4db94011d3 | 481 | * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI |
| sahilmgandhi | 18:6a4db94011d3 | 482 | * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 15. |
| sahilmgandhi | 18:6a4db94011d3 | 483 | * |
| sahilmgandhi | 18:6a4db94011d3 | 484 | * @return None |
| sahilmgandhi | 18:6a4db94011d3 | 485 | * |
| sahilmgandhi | 18:6a4db94011d3 | 486 | * @details This function is used to enable specified GPIO pin interrupt. |
| sahilmgandhi | 18:6a4db94011d3 | 487 | */ |
| sahilmgandhi | 18:6a4db94011d3 | 488 | #define GPIO_DisableEINT GPIO_DisableInt |
| sahilmgandhi | 18:6a4db94011d3 | 489 | |
| sahilmgandhi | 18:6a4db94011d3 | 490 | |
| sahilmgandhi | 18:6a4db94011d3 | 491 | void GPIO_SetMode(GPIO_T *gpio, uint32_t u32PinMask, uint32_t u32Mode); |
| sahilmgandhi | 18:6a4db94011d3 | 492 | void GPIO_EnableInt(GPIO_T *gpio, uint32_t u32Pin, uint32_t u32IntAttribs); |
| sahilmgandhi | 18:6a4db94011d3 | 493 | void GPIO_DisableInt(GPIO_T *gpio, uint32_t u32Pin); |
| sahilmgandhi | 18:6a4db94011d3 | 494 | |
| sahilmgandhi | 18:6a4db94011d3 | 495 | |
| sahilmgandhi | 18:6a4db94011d3 | 496 | |
| sahilmgandhi | 18:6a4db94011d3 | 497 | /*@}*/ /* end of group NUC472_442_GPIO_EXPORTED_FUNCTIONS */ |
| sahilmgandhi | 18:6a4db94011d3 | 498 | |
| sahilmgandhi | 18:6a4db94011d3 | 499 | /*@}*/ /* end of group NUC472_442_GPIO_Driver */ |
| sahilmgandhi | 18:6a4db94011d3 | 500 | |
| sahilmgandhi | 18:6a4db94011d3 | 501 | /*@}*/ /* end of group NUC472_442_Device_Driver */ |
| sahilmgandhi | 18:6a4db94011d3 | 502 | |
| sahilmgandhi | 18:6a4db94011d3 | 503 | #ifdef __cplusplus |
| sahilmgandhi | 18:6a4db94011d3 | 504 | } |
| sahilmgandhi | 18:6a4db94011d3 | 505 | #endif |
| sahilmgandhi | 18:6a4db94011d3 | 506 | |
| sahilmgandhi | 18:6a4db94011d3 | 507 | #endif //__GPIO_H__ |
| sahilmgandhi | 18:6a4db94011d3 | 508 | |
| sahilmgandhi | 18:6a4db94011d3 | 509 | /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/ |