Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2015 Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 3 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 4 *
sahilmgandhi 18:6a4db94011d3 5 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 6 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * 1. Redistributions of source code must retain the above copyright notice, this list
sahilmgandhi 18:6a4db94011d3 9 * of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 12 * integrated circuit in a product or a software update for such product, must reproduce
sahilmgandhi 18:6a4db94011d3 13 * the above copyright notice, this list of conditions and the following disclaimer in
sahilmgandhi 18:6a4db94011d3 14 * the documentation and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
sahilmgandhi 18:6a4db94011d3 17 * used to endorse or promote products derived from this software without specific prior
sahilmgandhi 18:6a4db94011d3 18 * written permission.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * 4. This software, with or without modification, must only be used with a
sahilmgandhi 18:6a4db94011d3 21 * Nordic Semiconductor ASA integrated circuit.
sahilmgandhi 18:6a4db94011d3 22 *
sahilmgandhi 18:6a4db94011d3 23 * 5. Any software provided in binary or object form under this license must not be reverse
sahilmgandhi 18:6a4db94011d3 24 * engineered, decompiled, modified and/or disassembled.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
sahilmgandhi 18:6a4db94011d3 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
sahilmgandhi 18:6a4db94011d3 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
sahilmgandhi 18:6a4db94011d3 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
sahilmgandhi 18:6a4db94011d3 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
sahilmgandhi 18:6a4db94011d3 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
sahilmgandhi 18:6a4db94011d3 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
sahilmgandhi 18:6a4db94011d3 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
sahilmgandhi 18:6a4db94011d3 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 36 *
sahilmgandhi 18:6a4db94011d3 37 */
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 #include "nrf_drv_gpiote.h"
sahilmgandhi 18:6a4db94011d3 41 #include "nrf_drv_common.h"
sahilmgandhi 18:6a4db94011d3 42 #include "nrf_drv_config.h"
sahilmgandhi 18:6a4db94011d3 43 #include "app_util_platform.h"
sahilmgandhi 18:6a4db94011d3 44 #include "nrf_assert.h"
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #define FORBIDDEN_HANDLER_ADDRESS ((nrf_drv_gpiote_evt_handler_t)UINT32_MAX)
sahilmgandhi 18:6a4db94011d3 47 #define PIN_NOT_USED (-1)
sahilmgandhi 18:6a4db94011d3 48 #define PIN_USED (-2)
sahilmgandhi 18:6a4db94011d3 49 #define NO_CHANNELS (-1)
sahilmgandhi 18:6a4db94011d3 50 #define SENSE_FIELD_POS (6)
sahilmgandhi 18:6a4db94011d3 51 #define SENSE_FIELD_MASK (0xC0)
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /**
sahilmgandhi 18:6a4db94011d3 54 * @brief Macro for conveting task-event index to an address of an event register.
sahilmgandhi 18:6a4db94011d3 55 *
sahilmgandhi 18:6a4db94011d3 56 * Macro utilizes the fact that registers are grouped together in ascending order.
sahilmgandhi 18:6a4db94011d3 57 */
sahilmgandhi 18:6a4db94011d3 58 #define TE_IDX_TO_EVENT_ADDR(idx) (nrf_gpiote_events_t)((uint32_t)NRF_GPIOTE_EVENTS_IN_0+(sizeof(uint32_t)*(idx)))
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /**
sahilmgandhi 18:6a4db94011d3 61 * @brief Macro for conveting task-event index to an address of a task register.
sahilmgandhi 18:6a4db94011d3 62 *
sahilmgandhi 18:6a4db94011d3 63 * Macro utilizes the fact that registers are grouped together in ascending order.
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 #define TE_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_OUT_0+(sizeof(uint32_t)*(idx)))
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 //lint -save -e661
sahilmgandhi 18:6a4db94011d3 68 typedef struct
sahilmgandhi 18:6a4db94011d3 69 {
sahilmgandhi 18:6a4db94011d3 70 nrf_drv_gpiote_evt_handler_t handlers[NUMBER_OF_GPIO_TE+GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS];
sahilmgandhi 18:6a4db94011d3 71 int8_t pin_assignments[NUMBER_OF_PINS];
sahilmgandhi 18:6a4db94011d3 72 int8_t port_handlers_pins[GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS];
sahilmgandhi 18:6a4db94011d3 73 nrf_drv_state_t state;
sahilmgandhi 18:6a4db94011d3 74 } gpiote_control_block_t;
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 static gpiote_control_block_t m_cb;
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 __STATIC_INLINE bool pin_in_use(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 79 {
sahilmgandhi 18:6a4db94011d3 80 return (m_cb.pin_assignments[pin] != PIN_NOT_USED);
sahilmgandhi 18:6a4db94011d3 81 }
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 __STATIC_INLINE bool pin_in_use_as_non_task_out(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 84 {
sahilmgandhi 18:6a4db94011d3 85 return (m_cb.pin_assignments[pin] == PIN_USED);
sahilmgandhi 18:6a4db94011d3 86 }
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 __STATIC_INLINE bool pin_in_use_by_te(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 89 {
sahilmgandhi 18:6a4db94011d3 90 return (m_cb.pin_assignments[pin] >= 0 && m_cb.pin_assignments[pin] < NUMBER_OF_GPIO_TE) ? true : false;
sahilmgandhi 18:6a4db94011d3 91 }
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 __STATIC_INLINE bool pin_in_use_by_port(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 94 {
sahilmgandhi 18:6a4db94011d3 95 return (m_cb.pin_assignments[pin] >= NUMBER_OF_GPIO_TE);
sahilmgandhi 18:6a4db94011d3 96 }
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 __STATIC_INLINE bool pin_in_use_by_gpiote(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 99 {
sahilmgandhi 18:6a4db94011d3 100 return (m_cb.pin_assignments[pin] >= 0);
sahilmgandhi 18:6a4db94011d3 101 }
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 __STATIC_INLINE void pin_in_use_by_te_set(uint32_t pin,
sahilmgandhi 18:6a4db94011d3 104 uint32_t channel_id,
sahilmgandhi 18:6a4db94011d3 105 nrf_drv_gpiote_evt_handler_t handler,
sahilmgandhi 18:6a4db94011d3 106 bool is_channel)
sahilmgandhi 18:6a4db94011d3 107 {
sahilmgandhi 18:6a4db94011d3 108 m_cb.pin_assignments[pin] = channel_id;
sahilmgandhi 18:6a4db94011d3 109 m_cb.handlers[channel_id] = handler;
sahilmgandhi 18:6a4db94011d3 110 if (!is_channel)
sahilmgandhi 18:6a4db94011d3 111 {
sahilmgandhi 18:6a4db94011d3 112 m_cb.port_handlers_pins[channel_id-NUMBER_OF_GPIO_TE] = (int8_t)pin;
sahilmgandhi 18:6a4db94011d3 113 }
sahilmgandhi 18:6a4db94011d3 114 }
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 __STATIC_INLINE void pin_in_use_set(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 117 {
sahilmgandhi 18:6a4db94011d3 118 m_cb.pin_assignments[pin] = PIN_USED;
sahilmgandhi 18:6a4db94011d3 119 }
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 __STATIC_INLINE void pin_in_use_clear(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 122 {
sahilmgandhi 18:6a4db94011d3 123 m_cb.pin_assignments[pin] = PIN_NOT_USED;
sahilmgandhi 18:6a4db94011d3 124 }
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 __STATIC_INLINE int8_t channel_port_get(uint32_t pin)
sahilmgandhi 18:6a4db94011d3 127 {
sahilmgandhi 18:6a4db94011d3 128 return m_cb.pin_assignments[pin];
sahilmgandhi 18:6a4db94011d3 129 }
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 __STATIC_INLINE nrf_drv_gpiote_evt_handler_t channel_handler_get(uint32_t channel)
sahilmgandhi 18:6a4db94011d3 132 {
sahilmgandhi 18:6a4db94011d3 133 return m_cb.handlers[channel];
sahilmgandhi 18:6a4db94011d3 134 }
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 static int8_t channel_port_alloc(uint32_t pin,nrf_drv_gpiote_evt_handler_t handler, bool channel)
sahilmgandhi 18:6a4db94011d3 137 {
sahilmgandhi 18:6a4db94011d3 138 int8_t channel_id = NO_CHANNELS;
sahilmgandhi 18:6a4db94011d3 139 uint32_t i;
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 uint32_t start_idx = channel ? 0 : NUMBER_OF_GPIO_TE;
sahilmgandhi 18:6a4db94011d3 142 uint32_t end_idx = channel ? NUMBER_OF_GPIO_TE : (NUMBER_OF_GPIO_TE+GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS);
sahilmgandhi 18:6a4db94011d3 143 //critical section
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 for (i = start_idx; i < end_idx; i++)
sahilmgandhi 18:6a4db94011d3 146 {
sahilmgandhi 18:6a4db94011d3 147 if (m_cb.handlers[i] == FORBIDDEN_HANDLER_ADDRESS)
sahilmgandhi 18:6a4db94011d3 148 {
sahilmgandhi 18:6a4db94011d3 149 pin_in_use_by_te_set(pin, i, handler, channel);
sahilmgandhi 18:6a4db94011d3 150 channel_id = i;
sahilmgandhi 18:6a4db94011d3 151 break;
sahilmgandhi 18:6a4db94011d3 152 }
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154 //critical section
sahilmgandhi 18:6a4db94011d3 155 return channel_id;
sahilmgandhi 18:6a4db94011d3 156 }
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158 static void channel_free(uint8_t channel_id)
sahilmgandhi 18:6a4db94011d3 159 {
sahilmgandhi 18:6a4db94011d3 160 m_cb.handlers[channel_id] = FORBIDDEN_HANDLER_ADDRESS;
sahilmgandhi 18:6a4db94011d3 161 if (channel_id >= NUMBER_OF_GPIO_TE)
sahilmgandhi 18:6a4db94011d3 162 {
sahilmgandhi 18:6a4db94011d3 163 m_cb.port_handlers_pins[channel_id-NUMBER_OF_GPIO_TE] = (int8_t)PIN_NOT_USED;
sahilmgandhi 18:6a4db94011d3 164 }
sahilmgandhi 18:6a4db94011d3 165 }
sahilmgandhi 18:6a4db94011d3 166
sahilmgandhi 18:6a4db94011d3 167 ret_code_t nrf_drv_gpiote_init(void)
sahilmgandhi 18:6a4db94011d3 168 {
sahilmgandhi 18:6a4db94011d3 169 if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED)
sahilmgandhi 18:6a4db94011d3 170 {
sahilmgandhi 18:6a4db94011d3 171 return NRF_ERROR_INVALID_STATE;
sahilmgandhi 18:6a4db94011d3 172 }
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 uint8_t i;
sahilmgandhi 18:6a4db94011d3 175 for (i = 0; i < NUMBER_OF_PINS; i++)
sahilmgandhi 18:6a4db94011d3 176 {
sahilmgandhi 18:6a4db94011d3 177 pin_in_use_clear(i);
sahilmgandhi 18:6a4db94011d3 178 }
sahilmgandhi 18:6a4db94011d3 179 for (i = 0; i < (NUMBER_OF_GPIO_TE+GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS); i++)
sahilmgandhi 18:6a4db94011d3 180 {
sahilmgandhi 18:6a4db94011d3 181 channel_free(i);
sahilmgandhi 18:6a4db94011d3 182 }
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 nrf_drv_common_irq_enable(GPIOTE_IRQn, GPIOTE_CONFIG_IRQ_PRIORITY);
sahilmgandhi 18:6a4db94011d3 185 nrf_gpiote_int_enable(GPIOTE_INTENSET_PORT_Msk);
sahilmgandhi 18:6a4db94011d3 186 m_cb.state = NRF_DRV_STATE_INITIALIZED;
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 189 }
sahilmgandhi 18:6a4db94011d3 190
sahilmgandhi 18:6a4db94011d3 191 bool nrf_drv_gpiote_is_init(void)
sahilmgandhi 18:6a4db94011d3 192 {
sahilmgandhi 18:6a4db94011d3 193 return (m_cb.state != NRF_DRV_STATE_UNINITIALIZED) ? true : false;
sahilmgandhi 18:6a4db94011d3 194 }
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 void nrf_drv_gpiote_uninit(void)
sahilmgandhi 18:6a4db94011d3 197 {
sahilmgandhi 18:6a4db94011d3 198 ASSERT(m_cb.state!=NRF_DRV_STATE_UNINITIALIZED);
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200 uint32_t i;
sahilmgandhi 18:6a4db94011d3 201 for (i = 0; i < NUMBER_OF_PINS; i++)
sahilmgandhi 18:6a4db94011d3 202 {
sahilmgandhi 18:6a4db94011d3 203 if (pin_in_use_as_non_task_out(i))
sahilmgandhi 18:6a4db94011d3 204 {
sahilmgandhi 18:6a4db94011d3 205 nrf_drv_gpiote_out_uninit(i);
sahilmgandhi 18:6a4db94011d3 206 }
sahilmgandhi 18:6a4db94011d3 207 else if( pin_in_use_by_gpiote(i))
sahilmgandhi 18:6a4db94011d3 208 {
sahilmgandhi 18:6a4db94011d3 209 /* Disable gpiote_in is having the same effect on out pin as gpiote_out_uninit on
sahilmgandhi 18:6a4db94011d3 210 * so it can be called on all pins used by GPIOTE.
sahilmgandhi 18:6a4db94011d3 211 */
sahilmgandhi 18:6a4db94011d3 212 nrf_drv_gpiote_in_uninit(i);
sahilmgandhi 18:6a4db94011d3 213 }
sahilmgandhi 18:6a4db94011d3 214 }
sahilmgandhi 18:6a4db94011d3 215 m_cb.state = NRF_DRV_STATE_UNINITIALIZED;
sahilmgandhi 18:6a4db94011d3 216 }
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 ret_code_t nrf_drv_gpiote_out_init(nrf_drv_gpiote_pin_t pin,
sahilmgandhi 18:6a4db94011d3 219 nrf_drv_gpiote_out_config_t const * p_config)
sahilmgandhi 18:6a4db94011d3 220 {
sahilmgandhi 18:6a4db94011d3 221 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 222 ASSERT(m_cb.state == NRF_DRV_STATE_INITIALIZED);
sahilmgandhi 18:6a4db94011d3 223 ASSERT(p_config);
sahilmgandhi 18:6a4db94011d3 224
sahilmgandhi 18:6a4db94011d3 225 ret_code_t result = NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 if (pin_in_use(pin))
sahilmgandhi 18:6a4db94011d3 228 {
sahilmgandhi 18:6a4db94011d3 229 result = NRF_ERROR_INVALID_STATE;
sahilmgandhi 18:6a4db94011d3 230 }
sahilmgandhi 18:6a4db94011d3 231 else
sahilmgandhi 18:6a4db94011d3 232 {
sahilmgandhi 18:6a4db94011d3 233 if (p_config->task_pin)
sahilmgandhi 18:6a4db94011d3 234 {
sahilmgandhi 18:6a4db94011d3 235 int8_t channel = channel_port_alloc(pin, NULL, true);
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 if (channel != NO_CHANNELS)
sahilmgandhi 18:6a4db94011d3 238 {
sahilmgandhi 18:6a4db94011d3 239 nrf_gpiote_task_configure(channel, pin, p_config->action, p_config->init_state);
sahilmgandhi 18:6a4db94011d3 240 }
sahilmgandhi 18:6a4db94011d3 241 else
sahilmgandhi 18:6a4db94011d3 242 {
sahilmgandhi 18:6a4db94011d3 243 result = NRF_ERROR_NO_MEM;
sahilmgandhi 18:6a4db94011d3 244 }
sahilmgandhi 18:6a4db94011d3 245 }
sahilmgandhi 18:6a4db94011d3 246 else
sahilmgandhi 18:6a4db94011d3 247 {
sahilmgandhi 18:6a4db94011d3 248 pin_in_use_set(pin);
sahilmgandhi 18:6a4db94011d3 249 }
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 if (result == NRF_SUCCESS)
sahilmgandhi 18:6a4db94011d3 252 {
sahilmgandhi 18:6a4db94011d3 253 if (p_config->init_state == NRF_GPIOTE_INITIAL_VALUE_HIGH)
sahilmgandhi 18:6a4db94011d3 254 {
sahilmgandhi 18:6a4db94011d3 255 nrf_gpio_pin_set(pin);
sahilmgandhi 18:6a4db94011d3 256 }
sahilmgandhi 18:6a4db94011d3 257 else
sahilmgandhi 18:6a4db94011d3 258 {
sahilmgandhi 18:6a4db94011d3 259 nrf_gpio_pin_clear(pin);
sahilmgandhi 18:6a4db94011d3 260 }
sahilmgandhi 18:6a4db94011d3 261
sahilmgandhi 18:6a4db94011d3 262 nrf_gpio_cfg_output(pin);
sahilmgandhi 18:6a4db94011d3 263 }
sahilmgandhi 18:6a4db94011d3 264 }
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 return result;
sahilmgandhi 18:6a4db94011d3 267 }
sahilmgandhi 18:6a4db94011d3 268
sahilmgandhi 18:6a4db94011d3 269 void nrf_drv_gpiote_out_uninit(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 270 {
sahilmgandhi 18:6a4db94011d3 271 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 272 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 273
sahilmgandhi 18:6a4db94011d3 274 if (pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 275 {
sahilmgandhi 18:6a4db94011d3 276 channel_free((uint8_t)channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 277 nrf_gpiote_te_default(channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 278 }
sahilmgandhi 18:6a4db94011d3 279 pin_in_use_clear(pin);
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 nrf_gpio_cfg_default(pin);
sahilmgandhi 18:6a4db94011d3 282 }
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284 void nrf_drv_gpiote_out_set(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 285 {
sahilmgandhi 18:6a4db94011d3 286 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 287 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 288 ASSERT(!pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 289
sahilmgandhi 18:6a4db94011d3 290 nrf_gpio_pin_set(pin);
sahilmgandhi 18:6a4db94011d3 291 }
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293 void nrf_drv_gpiote_out_clear(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 294 {
sahilmgandhi 18:6a4db94011d3 295 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 296 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 297 ASSERT(!pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 nrf_gpio_pin_clear(pin);
sahilmgandhi 18:6a4db94011d3 300 }
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 void nrf_drv_gpiote_out_toggle(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 303 {
sahilmgandhi 18:6a4db94011d3 304 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 305 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 306 ASSERT(!pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 nrf_gpio_pin_toggle(pin);
sahilmgandhi 18:6a4db94011d3 309 }
sahilmgandhi 18:6a4db94011d3 310
sahilmgandhi 18:6a4db94011d3 311 void nrf_drv_gpiote_out_task_enable(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 312 {
sahilmgandhi 18:6a4db94011d3 313 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 314 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 315 ASSERT(pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317 nrf_gpiote_task_enable(m_cb.pin_assignments[pin]);
sahilmgandhi 18:6a4db94011d3 318 }
sahilmgandhi 18:6a4db94011d3 319
sahilmgandhi 18:6a4db94011d3 320 void nrf_drv_gpiote_out_task_disable(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 321 {
sahilmgandhi 18:6a4db94011d3 322 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 323 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 324 ASSERT(pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 325
sahilmgandhi 18:6a4db94011d3 326 nrf_gpiote_task_disable(m_cb.pin_assignments[pin]);
sahilmgandhi 18:6a4db94011d3 327 }
sahilmgandhi 18:6a4db94011d3 328
sahilmgandhi 18:6a4db94011d3 329 uint32_t nrf_drv_gpiote_out_task_addr_get(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 330 {
sahilmgandhi 18:6a4db94011d3 331 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 332 ASSERT(pin_in_use_by_te(pin));
sahilmgandhi 18:6a4db94011d3 333
sahilmgandhi 18:6a4db94011d3 334 nrf_gpiote_tasks_t task = TE_IDX_TO_TASK_ADDR(channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 335 return nrf_gpiote_task_addr_get(task);
sahilmgandhi 18:6a4db94011d3 336 }
sahilmgandhi 18:6a4db94011d3 337
sahilmgandhi 18:6a4db94011d3 338 void nrf_drv_gpiote_out_task_force(nrf_drv_gpiote_pin_t pin, uint8_t state)
sahilmgandhi 18:6a4db94011d3 339 {
sahilmgandhi 18:6a4db94011d3 340 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 341 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 342 ASSERT(pin_in_use_by_te(pin));
sahilmgandhi 18:6a4db94011d3 343
sahilmgandhi 18:6a4db94011d3 344 nrf_gpiote_outinit_t init_val = state ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW;
sahilmgandhi 18:6a4db94011d3 345 nrf_gpiote_task_force(m_cb.pin_assignments[pin], init_val);
sahilmgandhi 18:6a4db94011d3 346 }
sahilmgandhi 18:6a4db94011d3 347
sahilmgandhi 18:6a4db94011d3 348 void nrf_drv_gpiote_out_task_trigger(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 349 {
sahilmgandhi 18:6a4db94011d3 350 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 351 ASSERT(pin_in_use(pin));
sahilmgandhi 18:6a4db94011d3 352 ASSERT(pin_in_use_by_te(pin));
sahilmgandhi 18:6a4db94011d3 353
sahilmgandhi 18:6a4db94011d3 354 nrf_gpiote_tasks_t task = TE_IDX_TO_TASK_ADDR(channel_port_get(pin));;
sahilmgandhi 18:6a4db94011d3 355 nrf_gpiote_task_set(task);
sahilmgandhi 18:6a4db94011d3 356 }
sahilmgandhi 18:6a4db94011d3 357
sahilmgandhi 18:6a4db94011d3 358 ret_code_t nrf_drv_gpiote_in_init(nrf_drv_gpiote_pin_t pin,
sahilmgandhi 18:6a4db94011d3 359 nrf_drv_gpiote_in_config_t const * p_config,
sahilmgandhi 18:6a4db94011d3 360 nrf_drv_gpiote_evt_handler_t evt_handler)
sahilmgandhi 18:6a4db94011d3 361 {
sahilmgandhi 18:6a4db94011d3 362 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 363 ret_code_t result = NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 364 /* Only one GPIOTE channel can be assigned to one physical pin. */
sahilmgandhi 18:6a4db94011d3 365 if (pin_in_use_by_gpiote(pin))
sahilmgandhi 18:6a4db94011d3 366 {
sahilmgandhi 18:6a4db94011d3 367 result = NRF_ERROR_INVALID_STATE;
sahilmgandhi 18:6a4db94011d3 368 }
sahilmgandhi 18:6a4db94011d3 369 else
sahilmgandhi 18:6a4db94011d3 370 {
sahilmgandhi 18:6a4db94011d3 371 int8_t channel = channel_port_alloc(pin, evt_handler, p_config->hi_accuracy);
sahilmgandhi 18:6a4db94011d3 372 if (channel != NO_CHANNELS)
sahilmgandhi 18:6a4db94011d3 373 {
sahilmgandhi 18:6a4db94011d3 374 if (p_config->is_watcher)
sahilmgandhi 18:6a4db94011d3 375 {
sahilmgandhi 18:6a4db94011d3 376 nrf_gpio_cfg_watcher(pin);
sahilmgandhi 18:6a4db94011d3 377 }
sahilmgandhi 18:6a4db94011d3 378 else
sahilmgandhi 18:6a4db94011d3 379 {
sahilmgandhi 18:6a4db94011d3 380 nrf_gpio_cfg_input(pin,p_config->pull);
sahilmgandhi 18:6a4db94011d3 381 }
sahilmgandhi 18:6a4db94011d3 382
sahilmgandhi 18:6a4db94011d3 383 if (p_config->hi_accuracy)
sahilmgandhi 18:6a4db94011d3 384 {
sahilmgandhi 18:6a4db94011d3 385 nrf_gpiote_event_configure(channel, pin,p_config->sense);
sahilmgandhi 18:6a4db94011d3 386 }
sahilmgandhi 18:6a4db94011d3 387 else
sahilmgandhi 18:6a4db94011d3 388 {
sahilmgandhi 18:6a4db94011d3 389 m_cb.port_handlers_pins[channel-NUMBER_OF_GPIO_TE] |= (p_config->sense)<< SENSE_FIELD_POS;
sahilmgandhi 18:6a4db94011d3 390 }
sahilmgandhi 18:6a4db94011d3 391 }
sahilmgandhi 18:6a4db94011d3 392 else
sahilmgandhi 18:6a4db94011d3 393 {
sahilmgandhi 18:6a4db94011d3 394 result = NRF_ERROR_NO_MEM;
sahilmgandhi 18:6a4db94011d3 395 }
sahilmgandhi 18:6a4db94011d3 396 }
sahilmgandhi 18:6a4db94011d3 397 return result;
sahilmgandhi 18:6a4db94011d3 398 }
sahilmgandhi 18:6a4db94011d3 399
sahilmgandhi 18:6a4db94011d3 400 void nrf_drv_gpiote_in_event_enable(nrf_drv_gpiote_pin_t pin, bool int_enable)
sahilmgandhi 18:6a4db94011d3 401 {
sahilmgandhi 18:6a4db94011d3 402 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 403 ASSERT(pin_in_use_by_gpiote(pin));
sahilmgandhi 18:6a4db94011d3 404 if (pin_in_use_by_port(pin))
sahilmgandhi 18:6a4db94011d3 405 {
sahilmgandhi 18:6a4db94011d3 406 uint8_t pin_and_sense = m_cb.port_handlers_pins[channel_port_get(pin)-NUMBER_OF_GPIO_TE];
sahilmgandhi 18:6a4db94011d3 407 nrf_gpiote_polarity_t polarity = (nrf_gpiote_polarity_t)(pin_and_sense >> SENSE_FIELD_POS);
sahilmgandhi 18:6a4db94011d3 408 nrf_gpio_pin_sense_t sense;
sahilmgandhi 18:6a4db94011d3 409 if (polarity == NRF_GPIOTE_POLARITY_TOGGLE)
sahilmgandhi 18:6a4db94011d3 410 {
sahilmgandhi 18:6a4db94011d3 411 /* read current pin state and set for next sense to oposit */
sahilmgandhi 18:6a4db94011d3 412 sense = (nrf_gpio_pins_read() & (1 << pin)) ?
sahilmgandhi 18:6a4db94011d3 413 NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
sahilmgandhi 18:6a4db94011d3 414 }
sahilmgandhi 18:6a4db94011d3 415 else
sahilmgandhi 18:6a4db94011d3 416 {
sahilmgandhi 18:6a4db94011d3 417 sense = (polarity == NRF_GPIOTE_POLARITY_LOTOHI) ?
sahilmgandhi 18:6a4db94011d3 418 NRF_GPIO_PIN_SENSE_HIGH : NRF_GPIO_PIN_SENSE_LOW;
sahilmgandhi 18:6a4db94011d3 419 }
sahilmgandhi 18:6a4db94011d3 420 nrf_gpio_cfg_sense_set(pin,sense);
sahilmgandhi 18:6a4db94011d3 421 }
sahilmgandhi 18:6a4db94011d3 422 else if(pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 423 {
sahilmgandhi 18:6a4db94011d3 424 int32_t channel = (int32_t)channel_port_get(pin);
sahilmgandhi 18:6a4db94011d3 425 nrf_gpiote_events_t event = TE_IDX_TO_EVENT_ADDR(channel);
sahilmgandhi 18:6a4db94011d3 426
sahilmgandhi 18:6a4db94011d3 427 nrf_gpiote_event_enable(channel);
sahilmgandhi 18:6a4db94011d3 428
sahilmgandhi 18:6a4db94011d3 429 nrf_gpiote_event_clear(event);
sahilmgandhi 18:6a4db94011d3 430 if (int_enable)
sahilmgandhi 18:6a4db94011d3 431 {
sahilmgandhi 18:6a4db94011d3 432 nrf_drv_gpiote_evt_handler_t handler = channel_handler_get(channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 433 // Enable the interrupt only if event handler was provided.
sahilmgandhi 18:6a4db94011d3 434 if (handler)
sahilmgandhi 18:6a4db94011d3 435 {
sahilmgandhi 18:6a4db94011d3 436 nrf_gpiote_int_enable(1 << channel);
sahilmgandhi 18:6a4db94011d3 437 }
sahilmgandhi 18:6a4db94011d3 438 }
sahilmgandhi 18:6a4db94011d3 439 }
sahilmgandhi 18:6a4db94011d3 440 }
sahilmgandhi 18:6a4db94011d3 441
sahilmgandhi 18:6a4db94011d3 442 void nrf_drv_gpiote_in_event_disable(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 443 {
sahilmgandhi 18:6a4db94011d3 444 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 445 ASSERT(pin_in_use_by_gpiote(pin));
sahilmgandhi 18:6a4db94011d3 446 if (pin_in_use_by_port(pin))
sahilmgandhi 18:6a4db94011d3 447 {
sahilmgandhi 18:6a4db94011d3 448 nrf_gpio_cfg_sense_set(pin,NRF_GPIO_PIN_NOSENSE);
sahilmgandhi 18:6a4db94011d3 449 }
sahilmgandhi 18:6a4db94011d3 450 else if(pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 451 {
sahilmgandhi 18:6a4db94011d3 452 int32_t channel = (int32_t)channel_port_get(pin);
sahilmgandhi 18:6a4db94011d3 453 nrf_gpiote_event_disable(channel);
sahilmgandhi 18:6a4db94011d3 454 nrf_gpiote_int_disable(1 << channel);
sahilmgandhi 18:6a4db94011d3 455 }
sahilmgandhi 18:6a4db94011d3 456 }
sahilmgandhi 18:6a4db94011d3 457
sahilmgandhi 18:6a4db94011d3 458 void nrf_drv_gpiote_in_uninit(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 459 {
sahilmgandhi 18:6a4db94011d3 460 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 461 ASSERT(pin_in_use_by_gpiote(pin));
sahilmgandhi 18:6a4db94011d3 462 nrf_drv_gpiote_in_event_disable(pin);
sahilmgandhi 18:6a4db94011d3 463 if(pin_in_use_by_te(pin))
sahilmgandhi 18:6a4db94011d3 464 {
sahilmgandhi 18:6a4db94011d3 465 nrf_gpiote_te_default(channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 466 }
sahilmgandhi 18:6a4db94011d3 467 nrf_gpio_cfg_default(pin);
sahilmgandhi 18:6a4db94011d3 468 channel_free((uint8_t)channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 469 pin_in_use_clear(pin);
sahilmgandhi 18:6a4db94011d3 470 }
sahilmgandhi 18:6a4db94011d3 471
sahilmgandhi 18:6a4db94011d3 472 bool nrf_drv_gpiote_in_is_set(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 473 {
sahilmgandhi 18:6a4db94011d3 474 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 475 return nrf_gpio_pin_read(pin) ? true : false;
sahilmgandhi 18:6a4db94011d3 476 }
sahilmgandhi 18:6a4db94011d3 477
sahilmgandhi 18:6a4db94011d3 478 uint32_t nrf_drv_gpiote_in_event_addr_get(nrf_drv_gpiote_pin_t pin)
sahilmgandhi 18:6a4db94011d3 479 {
sahilmgandhi 18:6a4db94011d3 480 ASSERT(pin < NUMBER_OF_PINS);
sahilmgandhi 18:6a4db94011d3 481 ASSERT(pin_in_use_by_te(pin));
sahilmgandhi 18:6a4db94011d3 482
sahilmgandhi 18:6a4db94011d3 483 nrf_gpiote_events_t event = TE_IDX_TO_EVENT_ADDR(channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 484 return nrf_gpiote_event_addr_get(event);
sahilmgandhi 18:6a4db94011d3 485 }
sahilmgandhi 18:6a4db94011d3 486
sahilmgandhi 18:6a4db94011d3 487 void GPIOTE_IRQHandler(void)
sahilmgandhi 18:6a4db94011d3 488 {
sahilmgandhi 18:6a4db94011d3 489 uint32_t status = 0;
sahilmgandhi 18:6a4db94011d3 490 uint32_t input = 0;
sahilmgandhi 18:6a4db94011d3 491
sahilmgandhi 18:6a4db94011d3 492 /* collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/
sahilmgandhi 18:6a4db94011d3 493 uint32_t i;
sahilmgandhi 18:6a4db94011d3 494 nrf_gpiote_events_t event = NRF_GPIOTE_EVENTS_IN_0;
sahilmgandhi 18:6a4db94011d3 495 uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;
sahilmgandhi 18:6a4db94011d3 496 for (i = 0; i < NUMBER_OF_GPIO_TE; i++)
sahilmgandhi 18:6a4db94011d3 497 {
sahilmgandhi 18:6a4db94011d3 498 if (nrf_gpiote_event_is_set(event) && nrf_gpiote_int_is_enabled(mask))
sahilmgandhi 18:6a4db94011d3 499 {
sahilmgandhi 18:6a4db94011d3 500 nrf_gpiote_event_clear(event);
sahilmgandhi 18:6a4db94011d3 501 status |= mask;
sahilmgandhi 18:6a4db94011d3 502 }
sahilmgandhi 18:6a4db94011d3 503 mask <<= 1;
sahilmgandhi 18:6a4db94011d3 504 /* Incrementing to next event, utilizing the fact that events are grouped together
sahilmgandhi 18:6a4db94011d3 505 * in ascending order. */
sahilmgandhi 18:6a4db94011d3 506 event = (nrf_gpiote_events_t)((uint32_t)event + sizeof(uint32_t));
sahilmgandhi 18:6a4db94011d3 507 }
sahilmgandhi 18:6a4db94011d3 508
sahilmgandhi 18:6a4db94011d3 509 /* collect PORT status event, if event is set read pins state. Processing is postponed to the
sahilmgandhi 18:6a4db94011d3 510 * end of interrupt. */
sahilmgandhi 18:6a4db94011d3 511 if (nrf_gpiote_event_is_set(NRF_GPIOTE_EVENTS_PORT))
sahilmgandhi 18:6a4db94011d3 512 {
sahilmgandhi 18:6a4db94011d3 513 nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT);
sahilmgandhi 18:6a4db94011d3 514 status |= (uint32_t)NRF_GPIOTE_INT_PORT_MASK;
sahilmgandhi 18:6a4db94011d3 515 input = nrf_gpio_pins_read();
sahilmgandhi 18:6a4db94011d3 516 }
sahilmgandhi 18:6a4db94011d3 517
sahilmgandhi 18:6a4db94011d3 518 /* Process pin events. */
sahilmgandhi 18:6a4db94011d3 519 if (status & NRF_GPIOTE_INT_IN_MASK)
sahilmgandhi 18:6a4db94011d3 520 {
sahilmgandhi 18:6a4db94011d3 521 mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;
sahilmgandhi 18:6a4db94011d3 522 for (i = 0; i < NUMBER_OF_GPIO_TE; i++)
sahilmgandhi 18:6a4db94011d3 523 {
sahilmgandhi 18:6a4db94011d3 524 if (mask & status)
sahilmgandhi 18:6a4db94011d3 525 {
sahilmgandhi 18:6a4db94011d3 526 nrf_drv_gpiote_pin_t pin = nrf_gpiote_event_pin_get(i);
sahilmgandhi 18:6a4db94011d3 527 nrf_gpiote_polarity_t polarity = nrf_gpiote_event_polarity_get(i);
sahilmgandhi 18:6a4db94011d3 528 nrf_drv_gpiote_evt_handler_t handler = channel_handler_get(i);
sahilmgandhi 18:6a4db94011d3 529 handler(pin,polarity);
sahilmgandhi 18:6a4db94011d3 530 }
sahilmgandhi 18:6a4db94011d3 531 mask <<= 1;
sahilmgandhi 18:6a4db94011d3 532 }
sahilmgandhi 18:6a4db94011d3 533 }
sahilmgandhi 18:6a4db94011d3 534
sahilmgandhi 18:6a4db94011d3 535 if (status & (uint32_t)NRF_GPIOTE_INT_PORT_MASK)
sahilmgandhi 18:6a4db94011d3 536 {
sahilmgandhi 18:6a4db94011d3 537 /* Process port event. */
sahilmgandhi 18:6a4db94011d3 538 uint8_t repeat = 0;
sahilmgandhi 18:6a4db94011d3 539 uint32_t toggle_mask = 0;
sahilmgandhi 18:6a4db94011d3 540 uint32_t pins_to_check = 0xFFFFFFFFuL;
sahilmgandhi 18:6a4db94011d3 541
sahilmgandhi 18:6a4db94011d3 542 do
sahilmgandhi 18:6a4db94011d3 543 {
sahilmgandhi 18:6a4db94011d3 544 repeat = 0;
sahilmgandhi 18:6a4db94011d3 545 for (i = 0; i < GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS; i++)
sahilmgandhi 18:6a4db94011d3 546 {
sahilmgandhi 18:6a4db94011d3 547 uint8_t pin_and_sense = m_cb.port_handlers_pins[i];
sahilmgandhi 18:6a4db94011d3 548 nrf_drv_gpiote_pin_t pin = (pin_and_sense & ~SENSE_FIELD_MASK);
sahilmgandhi 18:6a4db94011d3 549
sahilmgandhi 18:6a4db94011d3 550 if ((m_cb.port_handlers_pins[i] != PIN_NOT_USED)
sahilmgandhi 18:6a4db94011d3 551 && ((1UL << pin) & pins_to_check))
sahilmgandhi 18:6a4db94011d3 552 {
sahilmgandhi 18:6a4db94011d3 553 nrf_gpiote_polarity_t polarity =
sahilmgandhi 18:6a4db94011d3 554 (nrf_gpiote_polarity_t)((pin_and_sense & SENSE_FIELD_MASK) >> SENSE_FIELD_POS);
sahilmgandhi 18:6a4db94011d3 555 nrf_drv_gpiote_evt_handler_t handler = channel_handler_get(channel_port_get(pin));
sahilmgandhi 18:6a4db94011d3 556 if (handler || polarity == NRF_GPIOTE_POLARITY_TOGGLE)
sahilmgandhi 18:6a4db94011d3 557 {
sahilmgandhi 18:6a4db94011d3 558 mask = 1 << pin;
sahilmgandhi 18:6a4db94011d3 559 if (polarity == NRF_GPIOTE_POLARITY_TOGGLE)
sahilmgandhi 18:6a4db94011d3 560 {
sahilmgandhi 18:6a4db94011d3 561 toggle_mask |= mask;
sahilmgandhi 18:6a4db94011d3 562 }
sahilmgandhi 18:6a4db94011d3 563 nrf_gpio_pin_sense_t sense = nrf_gpio_pin_sense_get(pin);
sahilmgandhi 18:6a4db94011d3 564
sahilmgandhi 18:6a4db94011d3 565 if (((mask & input) && (sense==NRF_GPIO_PIN_SENSE_HIGH)) ||
sahilmgandhi 18:6a4db94011d3 566 (!(mask & input) && (sense==NRF_GPIO_PIN_SENSE_LOW)) )
sahilmgandhi 18:6a4db94011d3 567 {
sahilmgandhi 18:6a4db94011d3 568 if (polarity == NRF_GPIOTE_POLARITY_TOGGLE)
sahilmgandhi 18:6a4db94011d3 569 {
sahilmgandhi 18:6a4db94011d3 570 nrf_gpio_pin_sense_t next_sense = (sense == NRF_GPIO_PIN_SENSE_HIGH) ?
sahilmgandhi 18:6a4db94011d3 571 NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
sahilmgandhi 18:6a4db94011d3 572 nrf_gpio_cfg_sense_set(pin, next_sense);
sahilmgandhi 18:6a4db94011d3 573 ++repeat;
sahilmgandhi 18:6a4db94011d3 574 }
sahilmgandhi 18:6a4db94011d3 575 if (handler)
sahilmgandhi 18:6a4db94011d3 576 {
sahilmgandhi 18:6a4db94011d3 577 handler(pin, polarity);
sahilmgandhi 18:6a4db94011d3 578 }
sahilmgandhi 18:6a4db94011d3 579 }
sahilmgandhi 18:6a4db94011d3 580 }
sahilmgandhi 18:6a4db94011d3 581 }
sahilmgandhi 18:6a4db94011d3 582 }
sahilmgandhi 18:6a4db94011d3 583
sahilmgandhi 18:6a4db94011d3 584 if (repeat)
sahilmgandhi 18:6a4db94011d3 585 {
sahilmgandhi 18:6a4db94011d3 586 // When one of the pins in low-accuracy and toggle mode becomes active,
sahilmgandhi 18:6a4db94011d3 587 // it's sense mode is inverted to clear the internal SENSE signal.
sahilmgandhi 18:6a4db94011d3 588 // State of any other enabled low-accuracy input in toggle mode must be checked
sahilmgandhi 18:6a4db94011d3 589 // explicitly, because it does not trigger the interrput when SENSE signal is active.
sahilmgandhi 18:6a4db94011d3 590 // For more information about SENSE functionality, refer to Product Specification.
sahilmgandhi 18:6a4db94011d3 591 uint32_t new_input = nrf_gpio_pins_read();
sahilmgandhi 18:6a4db94011d3 592 if (new_input == input)
sahilmgandhi 18:6a4db94011d3 593 {
sahilmgandhi 18:6a4db94011d3 594 //No change.
sahilmgandhi 18:6a4db94011d3 595 repeat = 0;
sahilmgandhi 18:6a4db94011d3 596 }
sahilmgandhi 18:6a4db94011d3 597 else
sahilmgandhi 18:6a4db94011d3 598 {
sahilmgandhi 18:6a4db94011d3 599 input = new_input;
sahilmgandhi 18:6a4db94011d3 600 pins_to_check = toggle_mask;
sahilmgandhi 18:6a4db94011d3 601 }
sahilmgandhi 18:6a4db94011d3 602 }
sahilmgandhi 18:6a4db94011d3 603 }
sahilmgandhi 18:6a4db94011d3 604 while (repeat);
sahilmgandhi 18:6a4db94011d3 605 }
sahilmgandhi 18:6a4db94011d3 606 }
sahilmgandhi 18:6a4db94011d3 607 //lint -restore