MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_nvic.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2000 Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 3 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 4 *
sahilmgandhi 18:6a4db94011d3 5 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 6 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * 1. Redistributions of source code must retain the above copyright notice, this list
sahilmgandhi 18:6a4db94011d3 9 * of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 12 * integrated circuit in a product or a software update for such product, must reproduce
sahilmgandhi 18:6a4db94011d3 13 * the above copyright notice, this list of conditions and the following disclaimer in
sahilmgandhi 18:6a4db94011d3 14 * the documentation and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
sahilmgandhi 18:6a4db94011d3 17 * used to endorse or promote products derived from this software without specific prior
sahilmgandhi 18:6a4db94011d3 18 * written permission.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * 4. This software, with or without modification, must only be used with a
sahilmgandhi 18:6a4db94011d3 21 * Nordic Semiconductor ASA integrated circuit.
sahilmgandhi 18:6a4db94011d3 22 *
sahilmgandhi 18:6a4db94011d3 23 * 5. Any software provided in binary or object form under this license must not be reverse
sahilmgandhi 18:6a4db94011d3 24 * engineered, decompiled, modified and/or disassembled.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
sahilmgandhi 18:6a4db94011d3 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
sahilmgandhi 18:6a4db94011d3 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
sahilmgandhi 18:6a4db94011d3 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
sahilmgandhi 18:6a4db94011d3 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
sahilmgandhi 18:6a4db94011d3 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
sahilmgandhi 18:6a4db94011d3 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
sahilmgandhi 18:6a4db94011d3 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
sahilmgandhi 18:6a4db94011d3 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 36 *
sahilmgandhi 18:6a4db94011d3 37 */
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 /**
sahilmgandhi 18:6a4db94011d3 40 * @defgroup nrf_nvic_api SoftDevice NVIC API
sahilmgandhi 18:6a4db94011d3 41 * @{
sahilmgandhi 18:6a4db94011d3 42 *
sahilmgandhi 18:6a4db94011d3 43 * @note In order to use this module, the following code has to be added to a .c file:
sahilmgandhi 18:6a4db94011d3 44 * \code
sahilmgandhi 18:6a4db94011d3 45 * nrf_nvic_state_t nrf_nvic_state;
sahilmgandhi 18:6a4db94011d3 46 * \endcode
sahilmgandhi 18:6a4db94011d3 47 *
sahilmgandhi 18:6a4db94011d3 48 * @note Definitions and declarations starting with __ (double underscore) in this header file are
sahilmgandhi 18:6a4db94011d3 49 * not intended for direct use by the application.
sahilmgandhi 18:6a4db94011d3 50 *
sahilmgandhi 18:6a4db94011d3 51 * @brief APIs for the accessing NVIC when using a SoftDevice.
sahilmgandhi 18:6a4db94011d3 52 *
sahilmgandhi 18:6a4db94011d3 53 */
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 #ifndef NRF_NVIC_H__
sahilmgandhi 18:6a4db94011d3 56 #define NRF_NVIC_H__
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 #include <stdint.h>
sahilmgandhi 18:6a4db94011d3 59 #include "nrf.h"
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 #include "nrf_error_soc.h"
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 64 extern "C" {
sahilmgandhi 18:6a4db94011d3 65 #endif
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 /**@addtogroup NRF_NVIC_DEFINES Defines
sahilmgandhi 18:6a4db94011d3 68 * @{ */
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 /**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions
sahilmgandhi 18:6a4db94011d3 71 * @{ */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 #define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 #ifdef NRF51
sahilmgandhi 18:6a4db94011d3 76 #define __NRF_NVIC_ISER_COUNT (1) /**< The number of ISER/ICER registers in the NVIC that are used. */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 /**@brief Interrupts used by the SoftDevice. */
sahilmgandhi 18:6a4db94011d3 79 #define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \
sahilmgandhi 18:6a4db94011d3 80 (1U << POWER_CLOCK_IRQn) \
sahilmgandhi 18:6a4db94011d3 81 | (1U << RADIO_IRQn) \
sahilmgandhi 18:6a4db94011d3 82 | (1U << RTC0_IRQn) \
sahilmgandhi 18:6a4db94011d3 83 | (1U << TIMER0_IRQn) \
sahilmgandhi 18:6a4db94011d3 84 | (1U << RNG_IRQn) \
sahilmgandhi 18:6a4db94011d3 85 | (1U << ECB_IRQn) \
sahilmgandhi 18:6a4db94011d3 86 | (1U << CCM_AAR_IRQn) \
sahilmgandhi 18:6a4db94011d3 87 | (1U << TEMP_IRQn) \
sahilmgandhi 18:6a4db94011d3 88 | (1U << __NRF_NVIC_NVMC_IRQn) \
sahilmgandhi 18:6a4db94011d3 89 | (1U << (uint32_t)SWI4_IRQn) \
sahilmgandhi 18:6a4db94011d3 90 | (1U << (uint32_t)SWI5_IRQn) \
sahilmgandhi 18:6a4db94011d3 91 ))
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 /**@brief Interrupts available for to application. */
sahilmgandhi 18:6a4db94011d3 94 #define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0)
sahilmgandhi 18:6a4db94011d3 95 #endif
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 #ifdef NRF52
sahilmgandhi 18:6a4db94011d3 98 #define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 /**@brief Interrupts used by the SoftDevice. */
sahilmgandhi 18:6a4db94011d3 101 #define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \
sahilmgandhi 18:6a4db94011d3 102 (1U << POWER_CLOCK_IRQn) \
sahilmgandhi 18:6a4db94011d3 103 | (1U << RADIO_IRQn) \
sahilmgandhi 18:6a4db94011d3 104 | (1U << RTC0_IRQn) \
sahilmgandhi 18:6a4db94011d3 105 | (1U << TIMER0_IRQn) \
sahilmgandhi 18:6a4db94011d3 106 | (1U << RNG_IRQn) \
sahilmgandhi 18:6a4db94011d3 107 | (1U << ECB_IRQn) \
sahilmgandhi 18:6a4db94011d3 108 | (1U << CCM_AAR_IRQn) \
sahilmgandhi 18:6a4db94011d3 109 | (1U << TEMP_IRQn) \
sahilmgandhi 18:6a4db94011d3 110 | (1U << __NRF_NVIC_NVMC_IRQn) \
sahilmgandhi 18:6a4db94011d3 111 | (1U << (uint32_t)SWI4_EGU4_IRQn) \
sahilmgandhi 18:6a4db94011d3 112 | (1U << (uint32_t)SWI5_EGU5_IRQn) \
sahilmgandhi 18:6a4db94011d3 113 ))
sahilmgandhi 18:6a4db94011d3 114 #define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0)
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 /**@brief Interrupts available for to application. */
sahilmgandhi 18:6a4db94011d3 117 #define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0)
sahilmgandhi 18:6a4db94011d3 118 #define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1)
sahilmgandhi 18:6a4db94011d3 119 #endif
sahilmgandhi 18:6a4db94011d3 120 /**@} */
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 /**@} */
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 /**@addtogroup NRF_NVIC_VARIABLES Variables
sahilmgandhi 18:6a4db94011d3 125 * @{ */
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 /**@brief Type representing the state struct for the SoftDevice NVIC module. */
sahilmgandhi 18:6a4db94011d3 128 typedef struct
sahilmgandhi 18:6a4db94011d3 129 {
sahilmgandhi 18:6a4db94011d3 130 uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */
sahilmgandhi 18:6a4db94011d3 131 uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */
sahilmgandhi 18:6a4db94011d3 132 } nrf_nvic_state_t;
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 /**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an
sahilmgandhi 18:6a4db94011d3 135 * application source file. */
sahilmgandhi 18:6a4db94011d3 136 extern nrf_nvic_state_t nrf_nvic_state;
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 /**@} */
sahilmgandhi 18:6a4db94011d3 139
sahilmgandhi 18:6a4db94011d3 140 /**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions
sahilmgandhi 18:6a4db94011d3 141 * @{ */
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 /**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts.
sahilmgandhi 18:6a4db94011d3 144 *
sahilmgandhi 18:6a4db94011d3 145 * @retval The value of PRIMASK prior to disabling the interrupts.
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147 static inline int __sd_nvic_irq_disable(void)
sahilmgandhi 18:6a4db94011d3 148 {
sahilmgandhi 18:6a4db94011d3 149 int pm = __get_PRIMASK();
sahilmgandhi 18:6a4db94011d3 150 __disable_irq();
sahilmgandhi 18:6a4db94011d3 151 return pm;
sahilmgandhi 18:6a4db94011d3 152 }
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 /**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts.
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156 static inline void __sd_nvic_irq_enable(void)
sahilmgandhi 18:6a4db94011d3 157 {
sahilmgandhi 18:6a4db94011d3 158 __enable_irq();
sahilmgandhi 18:6a4db94011d3 159 }
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 /**@brief Checks if IRQn is available to application
sahilmgandhi 18:6a4db94011d3 162 * @param[in] IRQn irq to check
sahilmgandhi 18:6a4db94011d3 163 *
sahilmgandhi 18:6a4db94011d3 164 * @retval 1 (true) if the irq to check is available to the application
sahilmgandhi 18:6a4db94011d3 165 */
sahilmgandhi 18:6a4db94011d3 166 static inline uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn)
sahilmgandhi 18:6a4db94011d3 167 {
sahilmgandhi 18:6a4db94011d3 168 if (IRQn < 32)
sahilmgandhi 18:6a4db94011d3 169 {
sahilmgandhi 18:6a4db94011d3 170 return ((1UL<<IRQn) & __NRF_NVIC_APP_IRQS_0) != 0;
sahilmgandhi 18:6a4db94011d3 171 }
sahilmgandhi 18:6a4db94011d3 172 #ifdef NRF52
sahilmgandhi 18:6a4db94011d3 173 else if (IRQn < 64)
sahilmgandhi 18:6a4db94011d3 174 {
sahilmgandhi 18:6a4db94011d3 175 return ((1UL<<(IRQn-32)) & __NRF_NVIC_APP_IRQS_1) != 0;
sahilmgandhi 18:6a4db94011d3 176 }
sahilmgandhi 18:6a4db94011d3 177 #endif
sahilmgandhi 18:6a4db94011d3 178 else
sahilmgandhi 18:6a4db94011d3 179 {
sahilmgandhi 18:6a4db94011d3 180 return 1;
sahilmgandhi 18:6a4db94011d3 181 }
sahilmgandhi 18:6a4db94011d3 182 }
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 /**@brief Checks if IRQn is available to application
sahilmgandhi 18:6a4db94011d3 185 * @param[in] priority priority to check
sahilmgandhi 18:6a4db94011d3 186 *
sahilmgandhi 18:6a4db94011d3 187 * @retval 1 (true) if the priority to check is available to the application
sahilmgandhi 18:6a4db94011d3 188 */
sahilmgandhi 18:6a4db94011d3 189 static inline uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority)
sahilmgandhi 18:6a4db94011d3 190 {
sahilmgandhi 18:6a4db94011d3 191 if(priority >= (1 << __NVIC_PRIO_BITS))
sahilmgandhi 18:6a4db94011d3 192 {
sahilmgandhi 18:6a4db94011d3 193 return 0;
sahilmgandhi 18:6a4db94011d3 194 }
sahilmgandhi 18:6a4db94011d3 195 #ifdef NRF51
sahilmgandhi 18:6a4db94011d3 196 if( priority == 0
sahilmgandhi 18:6a4db94011d3 197 || priority == 2
sahilmgandhi 18:6a4db94011d3 198 )
sahilmgandhi 18:6a4db94011d3 199 {
sahilmgandhi 18:6a4db94011d3 200 return 0;
sahilmgandhi 18:6a4db94011d3 201 }
sahilmgandhi 18:6a4db94011d3 202 #endif
sahilmgandhi 18:6a4db94011d3 203 #ifdef NRF52
sahilmgandhi 18:6a4db94011d3 204 if( priority == 0
sahilmgandhi 18:6a4db94011d3 205 || priority == 1
sahilmgandhi 18:6a4db94011d3 206 || priority == 4
sahilmgandhi 18:6a4db94011d3 207 || priority == 5
sahilmgandhi 18:6a4db94011d3 208 )
sahilmgandhi 18:6a4db94011d3 209 {
sahilmgandhi 18:6a4db94011d3 210 return 0;
sahilmgandhi 18:6a4db94011d3 211 }
sahilmgandhi 18:6a4db94011d3 212 #endif
sahilmgandhi 18:6a4db94011d3 213 return 1;
sahilmgandhi 18:6a4db94011d3 214 }
sahilmgandhi 18:6a4db94011d3 215
sahilmgandhi 18:6a4db94011d3 216 /**@} */
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 /**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions
sahilmgandhi 18:6a4db94011d3 219 * @{ */
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 /**@brief Enable External Interrupt.
sahilmgandhi 18:6a4db94011d3 222 * @note Corresponds to NVIC_EnableIRQ in CMSIS.
sahilmgandhi 18:6a4db94011d3 223 *
sahilmgandhi 18:6a4db94011d3 224 * @pre IRQn is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 225 *
sahilmgandhi 18:6a4db94011d3 226 * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS.
sahilmgandhi 18:6a4db94011d3 227 *
sahilmgandhi 18:6a4db94011d3 228 * @retval ::NRF_SUCCESS The interrupt was enabled.
sahilmgandhi 18:6a4db94011d3 229 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
sahilmgandhi 18:6a4db94011d3 230 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application.
sahilmgandhi 18:6a4db94011d3 231 */
sahilmgandhi 18:6a4db94011d3 232 static inline uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn)
sahilmgandhi 18:6a4db94011d3 233 {
sahilmgandhi 18:6a4db94011d3 234 if (!__sd_nvic_app_accessible_irq(IRQn))
sahilmgandhi 18:6a4db94011d3 235 {
sahilmgandhi 18:6a4db94011d3 236 return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
sahilmgandhi 18:6a4db94011d3 237 }
sahilmgandhi 18:6a4db94011d3 238 if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn)))
sahilmgandhi 18:6a4db94011d3 239 {
sahilmgandhi 18:6a4db94011d3 240 return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED;
sahilmgandhi 18:6a4db94011d3 241 }
sahilmgandhi 18:6a4db94011d3 242
sahilmgandhi 18:6a4db94011d3 243 if (nrf_nvic_state.__cr_flag)
sahilmgandhi 18:6a4db94011d3 244 {
sahilmgandhi 18:6a4db94011d3 245 nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F));
sahilmgandhi 18:6a4db94011d3 246 }
sahilmgandhi 18:6a4db94011d3 247 else
sahilmgandhi 18:6a4db94011d3 248 {
sahilmgandhi 18:6a4db94011d3 249 NVIC_EnableIRQ(IRQn);
sahilmgandhi 18:6a4db94011d3 250 }
sahilmgandhi 18:6a4db94011d3 251 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 252 }
sahilmgandhi 18:6a4db94011d3 253
sahilmgandhi 18:6a4db94011d3 254 /**@brief Disable External Interrupt.
sahilmgandhi 18:6a4db94011d3 255 * @note Corresponds to NVIC_DisableIRQ in CMSIS.
sahilmgandhi 18:6a4db94011d3 256 *
sahilmgandhi 18:6a4db94011d3 257 * @pre IRQn is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 258 *
sahilmgandhi 18:6a4db94011d3 259 * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS.
sahilmgandhi 18:6a4db94011d3 260 *
sahilmgandhi 18:6a4db94011d3 261 * @retval ::NRF_SUCCESS The interrupt was disabled.
sahilmgandhi 18:6a4db94011d3 262 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
sahilmgandhi 18:6a4db94011d3 263 */
sahilmgandhi 18:6a4db94011d3 264 static inline uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn)
sahilmgandhi 18:6a4db94011d3 265 {
sahilmgandhi 18:6a4db94011d3 266 if (!__sd_nvic_app_accessible_irq(IRQn))
sahilmgandhi 18:6a4db94011d3 267 {
sahilmgandhi 18:6a4db94011d3 268 return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
sahilmgandhi 18:6a4db94011d3 269 }
sahilmgandhi 18:6a4db94011d3 270
sahilmgandhi 18:6a4db94011d3 271 if (nrf_nvic_state.__cr_flag)
sahilmgandhi 18:6a4db94011d3 272 {
sahilmgandhi 18:6a4db94011d3 273 nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F));
sahilmgandhi 18:6a4db94011d3 274 }
sahilmgandhi 18:6a4db94011d3 275 else
sahilmgandhi 18:6a4db94011d3 276 {
sahilmgandhi 18:6a4db94011d3 277 NVIC_DisableIRQ(IRQn);
sahilmgandhi 18:6a4db94011d3 278 }
sahilmgandhi 18:6a4db94011d3 279
sahilmgandhi 18:6a4db94011d3 280 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 281 }
sahilmgandhi 18:6a4db94011d3 282
sahilmgandhi 18:6a4db94011d3 283 /**@brief Get Pending Interrupt.
sahilmgandhi 18:6a4db94011d3 284 * @note Corresponds to NVIC_GetPendingIRQ in CMSIS.
sahilmgandhi 18:6a4db94011d3 285 *
sahilmgandhi 18:6a4db94011d3 286 * @pre IRQn is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 287 *
sahilmgandhi 18:6a4db94011d3 288 * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS.
sahilmgandhi 18:6a4db94011d3 289 * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ.
sahilmgandhi 18:6a4db94011d3 290 *
sahilmgandhi 18:6a4db94011d3 291 * @retval ::NRF_SUCCESS The interrupt is available for the application.
sahilmgandhi 18:6a4db94011d3 292 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
sahilmgandhi 18:6a4db94011d3 293 */
sahilmgandhi 18:6a4db94011d3 294 static inline uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq)
sahilmgandhi 18:6a4db94011d3 295 {
sahilmgandhi 18:6a4db94011d3 296 if (__sd_nvic_app_accessible_irq(IRQn))
sahilmgandhi 18:6a4db94011d3 297 {
sahilmgandhi 18:6a4db94011d3 298 *p_pending_irq = NVIC_GetPendingIRQ(IRQn);
sahilmgandhi 18:6a4db94011d3 299 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 300 }
sahilmgandhi 18:6a4db94011d3 301 else
sahilmgandhi 18:6a4db94011d3 302 {
sahilmgandhi 18:6a4db94011d3 303 return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
sahilmgandhi 18:6a4db94011d3 304 }
sahilmgandhi 18:6a4db94011d3 305 }
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 /**@brief Set Pending Interrupt.
sahilmgandhi 18:6a4db94011d3 308 * @note Corresponds to NVIC_SetPendingIRQ in CMSIS.
sahilmgandhi 18:6a4db94011d3 309 *
sahilmgandhi 18:6a4db94011d3 310 * @pre IRQn is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 311 *
sahilmgandhi 18:6a4db94011d3 312 * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS.
sahilmgandhi 18:6a4db94011d3 313 *
sahilmgandhi 18:6a4db94011d3 314 * @retval ::NRF_SUCCESS The interrupt is set pending.
sahilmgandhi 18:6a4db94011d3 315 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
sahilmgandhi 18:6a4db94011d3 316 */
sahilmgandhi 18:6a4db94011d3 317 static inline uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn)
sahilmgandhi 18:6a4db94011d3 318 {
sahilmgandhi 18:6a4db94011d3 319 if (__sd_nvic_app_accessible_irq(IRQn))
sahilmgandhi 18:6a4db94011d3 320 {
sahilmgandhi 18:6a4db94011d3 321 NVIC_SetPendingIRQ(IRQn);
sahilmgandhi 18:6a4db94011d3 322 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 323 }
sahilmgandhi 18:6a4db94011d3 324 else
sahilmgandhi 18:6a4db94011d3 325 {
sahilmgandhi 18:6a4db94011d3 326 return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
sahilmgandhi 18:6a4db94011d3 327 }
sahilmgandhi 18:6a4db94011d3 328 }
sahilmgandhi 18:6a4db94011d3 329
sahilmgandhi 18:6a4db94011d3 330 /**@brief Clear Pending Interrupt.
sahilmgandhi 18:6a4db94011d3 331 * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS.
sahilmgandhi 18:6a4db94011d3 332 *
sahilmgandhi 18:6a4db94011d3 333 * @pre IRQn is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 334 *
sahilmgandhi 18:6a4db94011d3 335 * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS.
sahilmgandhi 18:6a4db94011d3 336 *
sahilmgandhi 18:6a4db94011d3 337 * @retval ::NRF_SUCCESS The interrupt pending flag is cleared.
sahilmgandhi 18:6a4db94011d3 338 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
sahilmgandhi 18:6a4db94011d3 339 */
sahilmgandhi 18:6a4db94011d3 340 static inline uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn)
sahilmgandhi 18:6a4db94011d3 341 {
sahilmgandhi 18:6a4db94011d3 342 if (__sd_nvic_app_accessible_irq(IRQn))
sahilmgandhi 18:6a4db94011d3 343 {
sahilmgandhi 18:6a4db94011d3 344 NVIC_ClearPendingIRQ(IRQn);
sahilmgandhi 18:6a4db94011d3 345 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 346 }
sahilmgandhi 18:6a4db94011d3 347 else
sahilmgandhi 18:6a4db94011d3 348 {
sahilmgandhi 18:6a4db94011d3 349 return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
sahilmgandhi 18:6a4db94011d3 350 }
sahilmgandhi 18:6a4db94011d3 351 }
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 /**@brief Set Interrupt Priority.
sahilmgandhi 18:6a4db94011d3 354 * @note Corresponds to NVIC_SetPriority in CMSIS.
sahilmgandhi 18:6a4db94011d3 355 *
sahilmgandhi 18:6a4db94011d3 356 * @pre IRQn is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 357 * @pre Priority is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 358 *
sahilmgandhi 18:6a4db94011d3 359 * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS.
sahilmgandhi 18:6a4db94011d3 360 * @param[in] priority A valid IRQ priority for use by the application.
sahilmgandhi 18:6a4db94011d3 361 *
sahilmgandhi 18:6a4db94011d3 362 * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application.
sahilmgandhi 18:6a4db94011d3 363 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
sahilmgandhi 18:6a4db94011d3 364 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application.
sahilmgandhi 18:6a4db94011d3 365 */
sahilmgandhi 18:6a4db94011d3 366 static inline uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority)
sahilmgandhi 18:6a4db94011d3 367 {
sahilmgandhi 18:6a4db94011d3 368 if (!__sd_nvic_app_accessible_irq(IRQn))
sahilmgandhi 18:6a4db94011d3 369 {
sahilmgandhi 18:6a4db94011d3 370 return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
sahilmgandhi 18:6a4db94011d3 371 }
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373 if (!__sd_nvic_is_app_accessible_priority(priority))
sahilmgandhi 18:6a4db94011d3 374 {
sahilmgandhi 18:6a4db94011d3 375 return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED;
sahilmgandhi 18:6a4db94011d3 376 }
sahilmgandhi 18:6a4db94011d3 377
sahilmgandhi 18:6a4db94011d3 378 NVIC_SetPriority(IRQn, (uint32_t)priority);
sahilmgandhi 18:6a4db94011d3 379 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 380 }
sahilmgandhi 18:6a4db94011d3 381
sahilmgandhi 18:6a4db94011d3 382 /**@brief Get Interrupt Priority.
sahilmgandhi 18:6a4db94011d3 383 * @note Corresponds to NVIC_GetPriority in CMSIS.
sahilmgandhi 18:6a4db94011d3 384 *
sahilmgandhi 18:6a4db94011d3 385 * @pre IRQn is valid and not reserved by the stack.
sahilmgandhi 18:6a4db94011d3 386 *
sahilmgandhi 18:6a4db94011d3 387 * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS.
sahilmgandhi 18:6a4db94011d3 388 * @param[out] p_priority Return value from NVIC_GetPriority.
sahilmgandhi 18:6a4db94011d3 389 *
sahilmgandhi 18:6a4db94011d3 390 * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority.
sahilmgandhi 18:6a4db94011d3 391 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application.
sahilmgandhi 18:6a4db94011d3 392 */
sahilmgandhi 18:6a4db94011d3 393 static inline uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority)
sahilmgandhi 18:6a4db94011d3 394 {
sahilmgandhi 18:6a4db94011d3 395 if (__sd_nvic_app_accessible_irq(IRQn))
sahilmgandhi 18:6a4db94011d3 396 {
sahilmgandhi 18:6a4db94011d3 397 *p_priority = (NVIC_GetPriority(IRQn) & 0xFF);
sahilmgandhi 18:6a4db94011d3 398 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 399 }
sahilmgandhi 18:6a4db94011d3 400 else
sahilmgandhi 18:6a4db94011d3 401 {
sahilmgandhi 18:6a4db94011d3 402 return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE;
sahilmgandhi 18:6a4db94011d3 403 }
sahilmgandhi 18:6a4db94011d3 404 }
sahilmgandhi 18:6a4db94011d3 405
sahilmgandhi 18:6a4db94011d3 406 /**@brief System Reset.
sahilmgandhi 18:6a4db94011d3 407 * @note Corresponds to NVIC_SystemReset in CMSIS.
sahilmgandhi 18:6a4db94011d3 408 *
sahilmgandhi 18:6a4db94011d3 409 * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN
sahilmgandhi 18:6a4db94011d3 410 */
sahilmgandhi 18:6a4db94011d3 411 static inline uint32_t sd_nvic_SystemReset(void)
sahilmgandhi 18:6a4db94011d3 412 {
sahilmgandhi 18:6a4db94011d3 413 NVIC_SystemReset();
sahilmgandhi 18:6a4db94011d3 414 return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN;
sahilmgandhi 18:6a4db94011d3 415 }
sahilmgandhi 18:6a4db94011d3 416
sahilmgandhi 18:6a4db94011d3 417 /**@brief Enters critical region.
sahilmgandhi 18:6a4db94011d3 418 *
sahilmgandhi 18:6a4db94011d3 419 * @post Application interrupts will be disabled.
sahilmgandhi 18:6a4db94011d3 420 * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each
sahilmgandhi 18:6a4db94011d3 421 * execution context
sahilmgandhi 18:6a4db94011d3 422 * @sa sd_nvic_critical_region_exit
sahilmgandhi 18:6a4db94011d3 423 *
sahilmgandhi 18:6a4db94011d3 424 * @retval ::NRF_SUCCESS
sahilmgandhi 18:6a4db94011d3 425 */
sahilmgandhi 18:6a4db94011d3 426 static inline uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region)
sahilmgandhi 18:6a4db94011d3 427 {
sahilmgandhi 18:6a4db94011d3 428 int was_masked = __sd_nvic_irq_disable();
sahilmgandhi 18:6a4db94011d3 429 if (!nrf_nvic_state.__cr_flag)
sahilmgandhi 18:6a4db94011d3 430 {
sahilmgandhi 18:6a4db94011d3 431 nrf_nvic_state.__cr_flag = 1;
sahilmgandhi 18:6a4db94011d3 432 nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 );
sahilmgandhi 18:6a4db94011d3 433 NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0;
sahilmgandhi 18:6a4db94011d3 434 #ifdef NRF52
sahilmgandhi 18:6a4db94011d3 435 nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 );
sahilmgandhi 18:6a4db94011d3 436 NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1;
sahilmgandhi 18:6a4db94011d3 437 #endif
sahilmgandhi 18:6a4db94011d3 438 *p_is_nested_critical_region = 0;
sahilmgandhi 18:6a4db94011d3 439 }
sahilmgandhi 18:6a4db94011d3 440 else
sahilmgandhi 18:6a4db94011d3 441 {
sahilmgandhi 18:6a4db94011d3 442 *p_is_nested_critical_region = 1;
sahilmgandhi 18:6a4db94011d3 443 }
sahilmgandhi 18:6a4db94011d3 444 if (!was_masked)
sahilmgandhi 18:6a4db94011d3 445 {
sahilmgandhi 18:6a4db94011d3 446 __sd_nvic_irq_enable();
sahilmgandhi 18:6a4db94011d3 447 }
sahilmgandhi 18:6a4db94011d3 448 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 449 }
sahilmgandhi 18:6a4db94011d3 450
sahilmgandhi 18:6a4db94011d3 451 /**@brief Exit critical region.
sahilmgandhi 18:6a4db94011d3 452 *
sahilmgandhi 18:6a4db94011d3 453 * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter.
sahilmgandhi 18:6a4db94011d3 454 * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called.
sahilmgandhi 18:6a4db94011d3 455 *
sahilmgandhi 18:6a4db94011d3 456 * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter.
sahilmgandhi 18:6a4db94011d3 457 *
sahilmgandhi 18:6a4db94011d3 458 * @retval ::NRF_SUCCESS
sahilmgandhi 18:6a4db94011d3 459 */
sahilmgandhi 18:6a4db94011d3 460 static inline uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region)
sahilmgandhi 18:6a4db94011d3 461 {
sahilmgandhi 18:6a4db94011d3 462 if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0))
sahilmgandhi 18:6a4db94011d3 463 {
sahilmgandhi 18:6a4db94011d3 464 int was_masked = __sd_nvic_irq_disable();
sahilmgandhi 18:6a4db94011d3 465 NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0];
sahilmgandhi 18:6a4db94011d3 466 #ifdef NRF52
sahilmgandhi 18:6a4db94011d3 467 NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1];
sahilmgandhi 18:6a4db94011d3 468 #endif
sahilmgandhi 18:6a4db94011d3 469 nrf_nvic_state.__cr_flag = 0;
sahilmgandhi 18:6a4db94011d3 470 if (!was_masked)
sahilmgandhi 18:6a4db94011d3 471 {
sahilmgandhi 18:6a4db94011d3 472 __sd_nvic_irq_enable();
sahilmgandhi 18:6a4db94011d3 473 }
sahilmgandhi 18:6a4db94011d3 474 }
sahilmgandhi 18:6a4db94011d3 475
sahilmgandhi 18:6a4db94011d3 476 return NRF_SUCCESS;
sahilmgandhi 18:6a4db94011d3 477 }
sahilmgandhi 18:6a4db94011d3 478 /**@} */
sahilmgandhi 18:6a4db94011d3 479
sahilmgandhi 18:6a4db94011d3 480 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 481 }
sahilmgandhi 18:6a4db94011d3 482 #endif
sahilmgandhi 18:6a4db94011d3 483
sahilmgandhi 18:6a4db94011d3 484 #endif // NRF_NVIC_H__
sahilmgandhi 18:6a4db94011d3 485
sahilmgandhi 18:6a4db94011d3 486 /**@} */