MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/eflash_api.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2015 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #ifndef _EFLASH_DRV_H
sahilmgandhi 18:6a4db94011d3 18 #define _EFLASH_DRV_H
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 #include "fcache_api.h"
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 extern "C" {
sahilmgandhi 18:6a4db94011d3 25 #else
sahilmgandhi 18:6a4db94011d3 26 #include <stdio.h>
sahilmgandhi 18:6a4db94011d3 27 #endif
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 /* eFLASH Address Map */
sahilmgandhi 18:6a4db94011d3 30 #define SYS_EFLASH_BASE 0x40009000
sahilmgandhi 18:6a4db94011d3 31 #define SYS_EFLASH_IRQ_SET_STATUS (SYS_EFLASH_BASE + 0x008)
sahilmgandhi 18:6a4db94011d3 32 #define SYS_EFLASH_IRQ_CLR_STATUS (SYS_EFLASH_BASE + 0x008)
sahilmgandhi 18:6a4db94011d3 33 #define SYS_EFLASH_CTRL (SYS_EFLASH_BASE + 0x014)
sahilmgandhi 18:6a4db94011d3 34 #define SYS_EFLASH_STATUS (SYS_EFLASH_BASE + 0x018)
sahilmgandhi 18:6a4db94011d3 35 #define SYS_EFLASH_CONFIG0 (SYS_EFLASH_BASE + 0x01C)
sahilmgandhi 18:6a4db94011d3 36 #define SYS_EFLASH_WADDR (SYS_EFLASH_BASE + 0x028)
sahilmgandhi 18:6a4db94011d3 37 #define SYS_EFLASH_WDATA (SYS_EFLASH_BASE + 0x02C)
sahilmgandhi 18:6a4db94011d3 38 #define SYS_EFLASH_HWPARAMS0 (SYS_EFLASH_BASE + 0x034)
sahilmgandhi 18:6a4db94011d3 39 #define SYS_EFLASH_PIDR0 (SYS_EFLASH_BASE + 0xFE0)
sahilmgandhi 18:6a4db94011d3 40 #define SYS_EFLASH_PIDR1 (SYS_EFLASH_BASE + 0xFE4)
sahilmgandhi 18:6a4db94011d3 41 #define SYS_EFLASH_PIDR2 (SYS_EFLASH_BASE + 0xFE8)
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /* SYS_EFLASH_CTRL (RW): Flash Control Register */
sahilmgandhi 18:6a4db94011d3 44 #define EFLASH_WRITE 1 /* Write one word on eFlash */
sahilmgandhi 18:6a4db94011d3 45 #define EFLASH_ROW_WRITE (1 << 1) /* Write a row of eFlash */
sahilmgandhi 18:6a4db94011d3 46 #define EFLASH_ERASE (1 << 2) /* Erase one page of eFlash */
sahilmgandhi 18:6a4db94011d3 47 #define EFLASH_MASS_ERASE (1 << 3) /* Erases all pages of the eFlash*/
sahilmgandhi 18:6a4db94011d3 48 #define EFLASH_STOP (1 << 4) /* Stop any write erase operation */
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 /* SYS_EFLASH_STATUS (RO): Status Register */
sahilmgandhi 18:6a4db94011d3 51 #define EFLASH_BUSY_MASK 1 /* EFlash Busy Mask */
sahilmgandhi 18:6a4db94011d3 52 #define EFLASH_BUSY 1 /* EFlash Busy */
sahilmgandhi 18:6a4db94011d3 53 #define EFLASH_LOCK_MASK (1 << 1) /* EFlash Lock Mask */
sahilmgandhi 18:6a4db94011d3 54 #define EFLASH_LOCK (1 << 1) /* EFlash Lock */
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /* SYS_EFLASH_HWPARAMS0 (RO): HW parameters */
sahilmgandhi 18:6a4db94011d3 57 #define EFLASH_FLASHSIZE 0x1F /* Flash Size */
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 /* SYS_EFLASH_PIDR2 (RO): Flash Memory Information */
sahilmgandhi 18:6a4db94011d3 60 #define EFLASH_DES_1 0x7 /* JEP106 Id Mask */
sahilmgandhi 18:6a4db94011d3 61 #define EFLASH_JEDEC 0x8 /* JEDEC assigned val Mask */
sahilmgandhi 18:6a4db94011d3 62 #define EFLASH_REVISION 0xF0 /* Revision number */
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 /* Macros */
sahilmgandhi 18:6a4db94011d3 65 #define EFlash_Readl(reg) *(volatile unsigned int *)reg
sahilmgandhi 18:6a4db94011d3 66 #define EFlash_Writel(reg, val) *(volatile unsigned int *)reg = val;
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68 /* peripheral and component ID values */
sahilmgandhi 18:6a4db94011d3 69 #define FLS_PID4 0x14
sahilmgandhi 18:6a4db94011d3 70 #define FLS_PID5 0x00
sahilmgandhi 18:6a4db94011d3 71 #define FLS_PID6 0x00
sahilmgandhi 18:6a4db94011d3 72 #define FLS_PID7 0x00
sahilmgandhi 18:6a4db94011d3 73 #define FLS_PID0 0x30
sahilmgandhi 18:6a4db94011d3 74 #define FLS_PID1 0xB8
sahilmgandhi 18:6a4db94011d3 75 #define FLS_PID2 0x0B
sahilmgandhi 18:6a4db94011d3 76 #define FLS_PID3 0x00
sahilmgandhi 18:6a4db94011d3 77 #define FLS_CID0 0x0D
sahilmgandhi 18:6a4db94011d3 78 #define FLS_CID1 0xF0
sahilmgandhi 18:6a4db94011d3 79 #define FLS_CID2 0x05
sahilmgandhi 18:6a4db94011d3 80 #define FLS_CID3 0xB1
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 /* Functions */
sahilmgandhi 18:6a4db94011d3 83 /* EFlash_DriverInitialize: eFlash Driver Initialize function */
sahilmgandhi 18:6a4db94011d3 84 void EFlash_DriverInitialize(void);
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 /* EFlash_ClockConfig: eFlash Clock Configuration */
sahilmgandhi 18:6a4db94011d3 87 void EFlash_ClockConfig(void);
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 /*
sahilmgandhi 18:6a4db94011d3 90 * EFlash_Erase: Erases flash banks
sahilmgandhi 18:6a4db94011d3 91 * Mode:
sahilmgandhi 18:6a4db94011d3 92 * 0 - erases bank 0
sahilmgandhi 18:6a4db94011d3 93 * 1 - erases bank 1
sahilmgandhi 18:6a4db94011d3 94 * 2 - erases bank 0 + info pages
sahilmgandhi 18:6a4db94011d3 95 * 3 - erases bank 1 + info pages
sahilmgandhi 18:6a4db94011d3 96 * 4 - erases bank 0 + 1
sahilmgandhi 18:6a4db94011d3 97 * 5 - erases bank 0 + 1 with info pages
sahilmgandhi 18:6a4db94011d3 98 */
sahilmgandhi 18:6a4db94011d3 99 void EFlash_Erase(int mode);
sahilmgandhi 18:6a4db94011d3 100 /* EFlash_ErasePage: Erase a Page */
sahilmgandhi 18:6a4db94011d3 101 void EFlash_ErasePage(unsigned int waddr);
sahilmgandhi 18:6a4db94011d3 102 /*
sahilmgandhi 18:6a4db94011d3 103 * EFlash_Write: Write function
sahilmgandhi 18:6a4db94011d3 104 * Parameters:
sahilmgandhi 18:6a4db94011d3 105 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 106 * data - data to be written
sahilmgandhi 18:6a4db94011d3 107 */
sahilmgandhi 18:6a4db94011d3 108 void EFlash_Write(unsigned int waddr, unsigned int data);
sahilmgandhi 18:6a4db94011d3 109 /*
sahilmgandhi 18:6a4db94011d3 110 * EFlash_WritePage: Write Page function
sahilmgandhi 18:6a4db94011d3 111 * Parameters:
sahilmgandhi 18:6a4db94011d3 112 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 113 * page_size - data to be written
sahilmgandhi 18:6a4db94011d3 114 * buf - buffer containing the data
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116 int EFlash_WritePage(unsigned int waddr,
sahilmgandhi 18:6a4db94011d3 117 unsigned int page_size, unsigned char *buf);
sahilmgandhi 18:6a4db94011d3 118 /*
sahilmgandhi 18:6a4db94011d3 119 * EFlash_Read: Read function
sahilmgandhi 18:6a4db94011d3 120 * Parameters:
sahilmgandhi 18:6a4db94011d3 121 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 122 * Returns:
sahilmgandhi 18:6a4db94011d3 123 * the vaule read at address waddr
sahilmgandhi 18:6a4db94011d3 124 */
sahilmgandhi 18:6a4db94011d3 125 unsigned int EFlash_Read(unsigned int waddr);
sahilmgandhi 18:6a4db94011d3 126 /*
sahilmgandhi 18:6a4db94011d3 127 * EFlash_Verify: Verifies if the eFlash has been written correctly.
sahilmgandhi 18:6a4db94011d3 128 * Parameters:
sahilmgandhi 18:6a4db94011d3 129 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 130 * page_size - data to be written
sahilmgandhi 18:6a4db94011d3 131 * buf - buffer containing the data
sahilmgandhi 18:6a4db94011d3 132 * Returns:
sahilmgandhi 18:6a4db94011d3 133 * (waddr+page_size) - OK or Failed Address
sahilmgandhi 18:6a4db94011d3 134 */
sahilmgandhi 18:6a4db94011d3 135 unsigned int EFlash_Verify(unsigned int waddr,
sahilmgandhi 18:6a4db94011d3 136 unsigned int page_size, unsigned char *buf);
sahilmgandhi 18:6a4db94011d3 137 /*
sahilmgandhi 18:6a4db94011d3 138 * EFlash_BlankCheck: Verifies if there is any Blank Block in eFlash
sahilmgandhi 18:6a4db94011d3 139 * Parameters:
sahilmgandhi 18:6a4db94011d3 140 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 141 * page_size - data to be written
sahilmgandhi 18:6a4db94011d3 142 * pat - pattern of a blank block
sahilmgandhi 18:6a4db94011d3 143 * Returns:
sahilmgandhi 18:6a4db94011d3 144 * 0 - OK or 1- Failed
sahilmgandhi 18:6a4db94011d3 145 */
sahilmgandhi 18:6a4db94011d3 146 int EFlash_BlankCheck(unsigned int waddr,
sahilmgandhi 18:6a4db94011d3 147 unsigned int page_size, unsigned char pat);
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 /* EFlash_Delay function */
sahilmgandhi 18:6a4db94011d3 150 void EFlash_Delay(unsigned int period);
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 /* EFlash_ReturnBank1BaseAddress: Returns start address of bank 1 */
sahilmgandhi 18:6a4db94011d3 153 int EFlash_ReturnBank1BaseAddress(void);
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 156 }
sahilmgandhi 18:6a4db94011d3 157 #endif
sahilmgandhi 18:6a4db94011d3 158 #endif /* _FCACHE_DRV_H */