MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/gpio_object.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * Copyright (c) 2016, STMicroelectronics
sahilmgandhi 18:6a4db94011d3 4 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 7 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 8 *
sahilmgandhi 18:6a4db94011d3 9 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 10 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 12 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 13 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 15 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 16 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 28 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30 #ifndef MBED_GPIO_OBJECT_H
sahilmgandhi 18:6a4db94011d3 31 #define MBED_GPIO_OBJECT_H
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 34 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 35 #include "PortNames.h"
sahilmgandhi 18:6a4db94011d3 36 #include "PeripheralNames.h"
sahilmgandhi 18:6a4db94011d3 37 #include "PinNames.h"
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 40 extern "C" {
sahilmgandhi 18:6a4db94011d3 41 #endif
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /*
sahilmgandhi 18:6a4db94011d3 44 * Note: reg_clr might actually be same as reg_set.
sahilmgandhi 18:6a4db94011d3 45 * Depends on family whether BRR is available on top of BSRR
sahilmgandhi 18:6a4db94011d3 46 * if BRR does not exist, family shall define GPIO_IP_WITHOUT_BRR
sahilmgandhi 18:6a4db94011d3 47 */
sahilmgandhi 18:6a4db94011d3 48 typedef struct {
sahilmgandhi 18:6a4db94011d3 49 uint32_t mask;
sahilmgandhi 18:6a4db94011d3 50 __IO uint32_t *reg_in;
sahilmgandhi 18:6a4db94011d3 51 __IO uint32_t *reg_set;
sahilmgandhi 18:6a4db94011d3 52 __IO uint32_t *reg_clr;
sahilmgandhi 18:6a4db94011d3 53 PinName pin;
sahilmgandhi 18:6a4db94011d3 54 GPIO_TypeDef *gpio;
sahilmgandhi 18:6a4db94011d3 55 uint32_t ll_pin;
sahilmgandhi 18:6a4db94011d3 56 } gpio_t;
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 static inline void gpio_write(gpio_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 59 {
sahilmgandhi 18:6a4db94011d3 60 if (value) {
sahilmgandhi 18:6a4db94011d3 61 *obj->reg_set = obj->mask;
sahilmgandhi 18:6a4db94011d3 62 } else {
sahilmgandhi 18:6a4db94011d3 63 #ifdef GPIO_IP_WITHOUT_BRR
sahilmgandhi 18:6a4db94011d3 64 *obj->reg_clr = obj->mask << 16;
sahilmgandhi 18:6a4db94011d3 65 #else
sahilmgandhi 18:6a4db94011d3 66 *obj->reg_clr = obj->mask;
sahilmgandhi 18:6a4db94011d3 67 #endif
sahilmgandhi 18:6a4db94011d3 68 }
sahilmgandhi 18:6a4db94011d3 69 }
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 static inline int gpio_read(gpio_t *obj)
sahilmgandhi 18:6a4db94011d3 72 {
sahilmgandhi 18:6a4db94011d3 73 return ((*obj->reg_in & obj->mask) ? 1 : 0);
sahilmgandhi 18:6a4db94011d3 74 }
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 static inline int gpio_is_connected(const gpio_t *obj)
sahilmgandhi 18:6a4db94011d3 77 {
sahilmgandhi 18:6a4db94011d3 78 return obj->pin != (PinName)NC;
sahilmgandhi 18:6a4db94011d3 79 }
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 83 }
sahilmgandhi 18:6a4db94011d3 84 #endif
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 #endif