MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l073xx.S@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 ;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
sahilmgandhi 18:6a4db94011d3 2 ;* File Name : startup_stm32l073xx.s
sahilmgandhi 18:6a4db94011d3 3 ;* Author : MCD Application Team
sahilmgandhi 18:6a4db94011d3 4 ;* Version : V1.5.0
sahilmgandhi 18:6a4db94011d3 5 ;* Date : 8-January-2016
sahilmgandhi 18:6a4db94011d3 6 ;* Description : STM32l073xx Devices vector table for MDK-ARM toolchain.
sahilmgandhi 18:6a4db94011d3 7 ;* This module performs:
sahilmgandhi 18:6a4db94011d3 8 ;* - Set the initial SP
sahilmgandhi 18:6a4db94011d3 9 ;* - Set the initial PC == Reset_Handler
sahilmgandhi 18:6a4db94011d3 10 ;* - Set the vector table entries with the exceptions ISR address
sahilmgandhi 18:6a4db94011d3 11 ;* - Branches to __main in the C library (which eventually
sahilmgandhi 18:6a4db94011d3 12 ;* calls main()).
sahilmgandhi 18:6a4db94011d3 13 ;* After Reset the Cortex-M0+ processor is in Thread mode,
sahilmgandhi 18:6a4db94011d3 14 ;* priority is Privileged, and the Stack is set to Main.
sahilmgandhi 18:6a4db94011d3 15 ;* <<< Use Configuration Wizard in Context Menu >>>
sahilmgandhi 18:6a4db94011d3 16 ;*******************************************************************************
sahilmgandhi 18:6a4db94011d3 17 ;*
sahilmgandhi 18:6a4db94011d3 18 ;* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 19 ;* are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 20 ;* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 21 ;* this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 23 ;* this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 24 ;* and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 26 ;* may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 27 ;* without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 28 ;*
sahilmgandhi 18:6a4db94011d3 29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 39 ;*
sahilmgandhi 18:6a4db94011d3 40 ;*******************************************************************************
sahilmgandhi 18:6a4db94011d3 41 ;
sahilmgandhi 18:6a4db94011d3 42 ; Amount of memory (in bytes) allocated for Stack
sahilmgandhi 18:6a4db94011d3 43 ; Tailor this value to your application needs
sahilmgandhi 18:6a4db94011d3 44 ; <h> Stack Configuration
sahilmgandhi 18:6a4db94011d3 45 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
sahilmgandhi 18:6a4db94011d3 46 ; </h>
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 Stack_Size EQU 0x00000400
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 AREA STACK, NOINIT, READWRITE, ALIGN=3
sahilmgandhi 18:6a4db94011d3 51 EXPORT __initial_sp
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 Stack_Mem SPACE Stack_Size
sahilmgandhi 18:6a4db94011d3 54 __initial_sp EQU 0x20005000 ; Top of RAM
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 ; <h> Heap Configuration
sahilmgandhi 18:6a4db94011d3 58 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
sahilmgandhi 18:6a4db94011d3 59 ; </h>
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 Heap_Size EQU 0x00000400
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 AREA HEAP, NOINIT, READWRITE, ALIGN=3
sahilmgandhi 18:6a4db94011d3 64 EXPORT __heap_base
sahilmgandhi 18:6a4db94011d3 65 EXPORT __heap_limit
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 __heap_base
sahilmgandhi 18:6a4db94011d3 68 Heap_Mem SPACE Heap_Size
sahilmgandhi 18:6a4db94011d3 69 __heap_limit EQU (__initial_sp - Stack_Size)
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 PRESERVE8
sahilmgandhi 18:6a4db94011d3 72 THUMB
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 ; Vector Table Mapped to Address 0 at Reset
sahilmgandhi 18:6a4db94011d3 76 AREA RESET, DATA, READONLY
sahilmgandhi 18:6a4db94011d3 77 EXPORT __Vectors
sahilmgandhi 18:6a4db94011d3 78 EXPORT __Vectors_End
sahilmgandhi 18:6a4db94011d3 79 EXPORT __Vectors_Size
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 __Vectors DCD __initial_sp ; Top of Stack
sahilmgandhi 18:6a4db94011d3 82 DCD Reset_Handler ; Reset Handler
sahilmgandhi 18:6a4db94011d3 83 DCD NMI_Handler ; NMI Handler
sahilmgandhi 18:6a4db94011d3 84 DCD HardFault_Handler ; Hard Fault Handler
sahilmgandhi 18:6a4db94011d3 85 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 86 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 87 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 88 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 89 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 90 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 91 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 92 DCD SVC_Handler ; SVCall Handler
sahilmgandhi 18:6a4db94011d3 93 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 94 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 95 DCD PendSV_Handler ; PendSV Handler
sahilmgandhi 18:6a4db94011d3 96 DCD SysTick_Handler ; SysTick Handler
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 ; External Interrupts
sahilmgandhi 18:6a4db94011d3 99 DCD WWDG_IRQHandler ; Window Watchdog
sahilmgandhi 18:6a4db94011d3 100 DCD PVD_IRQHandler ; PVD through EXTI Line detect
sahilmgandhi 18:6a4db94011d3 101 DCD RTC_IRQHandler ; RTC through EXTI Line
sahilmgandhi 18:6a4db94011d3 102 DCD FLASH_IRQHandler ; FLASH
sahilmgandhi 18:6a4db94011d3 103 DCD RCC_CRS_IRQHandler ; RCC and CRS
sahilmgandhi 18:6a4db94011d3 104 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
sahilmgandhi 18:6a4db94011d3 105 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
sahilmgandhi 18:6a4db94011d3 106 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
sahilmgandhi 18:6a4db94011d3 107 DCD TSC_IRQHandler ; TSC
sahilmgandhi 18:6a4db94011d3 108 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
sahilmgandhi 18:6a4db94011d3 109 DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
sahilmgandhi 18:6a4db94011d3 110 DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
sahilmgandhi 18:6a4db94011d3 111 DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
sahilmgandhi 18:6a4db94011d3 112 DCD LPTIM1_IRQHandler ; LPTIM1
sahilmgandhi 18:6a4db94011d3 113 DCD USART4_5_IRQHandler ; USART4 and USART5
sahilmgandhi 18:6a4db94011d3 114 DCD TIM2_IRQHandler ; TIM2
sahilmgandhi 18:6a4db94011d3 115 DCD TIM3_IRQHandler ; TIM3
sahilmgandhi 18:6a4db94011d3 116 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
sahilmgandhi 18:6a4db94011d3 117 DCD TIM7_IRQHandler ; TIM7
sahilmgandhi 18:6a4db94011d3 118 DCD 0 ; Reserved
sahilmgandhi 18:6a4db94011d3 119 DCD TIM21_IRQHandler ; TIM21
sahilmgandhi 18:6a4db94011d3 120 DCD I2C3_IRQHandler ; I2C3
sahilmgandhi 18:6a4db94011d3 121 DCD TIM22_IRQHandler ; TIM22
sahilmgandhi 18:6a4db94011d3 122 DCD I2C1_IRQHandler ; I2C1
sahilmgandhi 18:6a4db94011d3 123 DCD I2C2_IRQHandler ; I2C2
sahilmgandhi 18:6a4db94011d3 124 DCD SPI1_IRQHandler ; SPI1
sahilmgandhi 18:6a4db94011d3 125 DCD SPI2_IRQHandler ; SPI2
sahilmgandhi 18:6a4db94011d3 126 DCD USART1_IRQHandler ; USART1
sahilmgandhi 18:6a4db94011d3 127 DCD USART2_IRQHandler ; USART2
sahilmgandhi 18:6a4db94011d3 128 DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
sahilmgandhi 18:6a4db94011d3 129 DCD LCD_IRQHandler ; LCD
sahilmgandhi 18:6a4db94011d3 130 DCD USB_IRQHandler ; USB
sahilmgandhi 18:6a4db94011d3 131
sahilmgandhi 18:6a4db94011d3 132 __Vectors_End
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 __Vectors_Size EQU __Vectors_End - __Vectors
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 AREA |.text|, CODE, READONLY
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 ; Reset handler routine
sahilmgandhi 18:6a4db94011d3 139 Reset_Handler PROC
sahilmgandhi 18:6a4db94011d3 140 EXPORT Reset_Handler [WEAK]
sahilmgandhi 18:6a4db94011d3 141 IMPORT __main
sahilmgandhi 18:6a4db94011d3 142 IMPORT SystemInit
sahilmgandhi 18:6a4db94011d3 143 LDR R0, =SystemInit
sahilmgandhi 18:6a4db94011d3 144 BLX R0
sahilmgandhi 18:6a4db94011d3 145 LDR R0, =__main
sahilmgandhi 18:6a4db94011d3 146 BX R0
sahilmgandhi 18:6a4db94011d3 147 ENDP
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 ; Dummy Exception Handlers (infinite loops which can be modified)
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 NMI_Handler PROC
sahilmgandhi 18:6a4db94011d3 152 EXPORT NMI_Handler [WEAK]
sahilmgandhi 18:6a4db94011d3 153 B .
sahilmgandhi 18:6a4db94011d3 154 ENDP
sahilmgandhi 18:6a4db94011d3 155 HardFault_Handler\
sahilmgandhi 18:6a4db94011d3 156 PROC
sahilmgandhi 18:6a4db94011d3 157 EXPORT HardFault_Handler [WEAK]
sahilmgandhi 18:6a4db94011d3 158 B .
sahilmgandhi 18:6a4db94011d3 159 ENDP
sahilmgandhi 18:6a4db94011d3 160 SVC_Handler PROC
sahilmgandhi 18:6a4db94011d3 161 EXPORT SVC_Handler [WEAK]
sahilmgandhi 18:6a4db94011d3 162 B .
sahilmgandhi 18:6a4db94011d3 163 ENDP
sahilmgandhi 18:6a4db94011d3 164 PendSV_Handler PROC
sahilmgandhi 18:6a4db94011d3 165 EXPORT PendSV_Handler [WEAK]
sahilmgandhi 18:6a4db94011d3 166 B .
sahilmgandhi 18:6a4db94011d3 167 ENDP
sahilmgandhi 18:6a4db94011d3 168 SysTick_Handler PROC
sahilmgandhi 18:6a4db94011d3 169 EXPORT SysTick_Handler [WEAK]
sahilmgandhi 18:6a4db94011d3 170 B .
sahilmgandhi 18:6a4db94011d3 171 ENDP
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 Default_Handler PROC
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 EXPORT WWDG_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 176 EXPORT PVD_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 177 EXPORT RTC_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 178 EXPORT FLASH_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 179 EXPORT RCC_CRS_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 180 EXPORT EXTI0_1_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 181 EXPORT EXTI2_3_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 182 EXPORT EXTI4_15_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 183 EXPORT TSC_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 184 EXPORT DMA1_Channel1_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 185 EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 186 EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 187 EXPORT ADC1_COMP_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 188 EXPORT LPTIM1_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 189 EXPORT USART4_5_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 190 EXPORT TIM2_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 191 EXPORT TIM3_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 192 EXPORT TIM6_DAC_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 193 EXPORT TIM7_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 194 EXPORT TIM21_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 195 EXPORT TIM22_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 196 EXPORT I2C1_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 197 EXPORT I2C2_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 198 EXPORT I2C3_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 199 EXPORT SPI1_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 200 EXPORT SPI2_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 201 EXPORT USART1_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 202 EXPORT USART2_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 203 EXPORT RNG_LPUART1_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 204 EXPORT LCD_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 205 EXPORT USB_IRQHandler [WEAK]
sahilmgandhi 18:6a4db94011d3 206
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 WWDG_IRQHandler
sahilmgandhi 18:6a4db94011d3 209 PVD_IRQHandler
sahilmgandhi 18:6a4db94011d3 210 RTC_IRQHandler
sahilmgandhi 18:6a4db94011d3 211 FLASH_IRQHandler
sahilmgandhi 18:6a4db94011d3 212 RCC_CRS_IRQHandler
sahilmgandhi 18:6a4db94011d3 213 EXTI0_1_IRQHandler
sahilmgandhi 18:6a4db94011d3 214 EXTI2_3_IRQHandler
sahilmgandhi 18:6a4db94011d3 215 EXTI4_15_IRQHandler
sahilmgandhi 18:6a4db94011d3 216 TSC_IRQHandler
sahilmgandhi 18:6a4db94011d3 217 DMA1_Channel1_IRQHandler
sahilmgandhi 18:6a4db94011d3 218 DMA1_Channel2_3_IRQHandler
sahilmgandhi 18:6a4db94011d3 219 DMA1_Channel4_5_6_7_IRQHandler
sahilmgandhi 18:6a4db94011d3 220 ADC1_COMP_IRQHandler
sahilmgandhi 18:6a4db94011d3 221 LPTIM1_IRQHandler
sahilmgandhi 18:6a4db94011d3 222 USART4_5_IRQHandler
sahilmgandhi 18:6a4db94011d3 223 TIM2_IRQHandler
sahilmgandhi 18:6a4db94011d3 224 TIM3_IRQHandler
sahilmgandhi 18:6a4db94011d3 225 TIM6_DAC_IRQHandler
sahilmgandhi 18:6a4db94011d3 226 TIM7_IRQHandler
sahilmgandhi 18:6a4db94011d3 227 TIM21_IRQHandler
sahilmgandhi 18:6a4db94011d3 228 TIM22_IRQHandler
sahilmgandhi 18:6a4db94011d3 229 I2C1_IRQHandler
sahilmgandhi 18:6a4db94011d3 230 I2C2_IRQHandler
sahilmgandhi 18:6a4db94011d3 231 I2C3_IRQHandler
sahilmgandhi 18:6a4db94011d3 232 SPI1_IRQHandler
sahilmgandhi 18:6a4db94011d3 233 SPI2_IRQHandler
sahilmgandhi 18:6a4db94011d3 234 USART1_IRQHandler
sahilmgandhi 18:6a4db94011d3 235 USART2_IRQHandler
sahilmgandhi 18:6a4db94011d3 236 RNG_LPUART1_IRQHandler
sahilmgandhi 18:6a4db94011d3 237 LCD_IRQHandler
sahilmgandhi 18:6a4db94011d3 238 USB_IRQHandler
sahilmgandhi 18:6a4db94011d3 239
sahilmgandhi 18:6a4db94011d3 240 B .
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 ENDP
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 ALIGN
sahilmgandhi 18:6a4db94011d3 245 END
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****