MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr_ex.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_pwr_ex.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Extended PWR HAL module driver.
sahilmgandhi 18:6a4db94011d3 8 * This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 9 * functionalities of PWR extension peripheral:
sahilmgandhi 18:6a4db94011d3 10 * + Peripheral Extended features functions
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 13 * @attention
sahilmgandhi 18:6a4db94011d3 14 *
sahilmgandhi 18:6a4db94011d3 15 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 16 *
sahilmgandhi 18:6a4db94011d3 17 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 18 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 19 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 20 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 22 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 23 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 25 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 26 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 27 *
sahilmgandhi 18:6a4db94011d3 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 38 *
sahilmgandhi 18:6a4db94011d3 39 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 40 */
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 43 #include "stm32f4xx_hal.h"
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 46 * @{
sahilmgandhi 18:6a4db94011d3 47 */
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @defgroup PWREx PWREx
sahilmgandhi 18:6a4db94011d3 50 * @brief PWR HAL module driver
sahilmgandhi 18:6a4db94011d3 51 * @{
sahilmgandhi 18:6a4db94011d3 52 */
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 #ifdef HAL_PWR_MODULE_ENABLED
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /* Private typedef -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 57 /* Private define ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @addtogroup PWREx_Private_Constants
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61 #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000U
sahilmgandhi 18:6a4db94011d3 62 #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000U
sahilmgandhi 18:6a4db94011d3 63 #define PWR_BKPREG_TIMEOUT_VALUE 1000U
sahilmgandhi 18:6a4db94011d3 64 #define PWR_VOSRDY_TIMEOUT_VALUE 1000U
sahilmgandhi 18:6a4db94011d3 65 /**
sahilmgandhi 18:6a4db94011d3 66 * @}
sahilmgandhi 18:6a4db94011d3 67 */
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 71 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 72 /* Private function prototypes -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 73 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 74 /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
sahilmgandhi 18:6a4db94011d3 75 * @{
sahilmgandhi 18:6a4db94011d3 76 */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
sahilmgandhi 18:6a4db94011d3 79 * @brief Peripheral Extended features functions
sahilmgandhi 18:6a4db94011d3 80 *
sahilmgandhi 18:6a4db94011d3 81 @verbatim
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 ===============================================================================
sahilmgandhi 18:6a4db94011d3 84 ##### Peripheral extended features functions #####
sahilmgandhi 18:6a4db94011d3 85 ===============================================================================
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 *** Main and Backup Regulators configuration ***
sahilmgandhi 18:6a4db94011d3 88 ================================================
sahilmgandhi 18:6a4db94011d3 89 [..]
sahilmgandhi 18:6a4db94011d3 90 (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
sahilmgandhi 18:6a4db94011d3 91 the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
sahilmgandhi 18:6a4db94011d3 92 retained even in Standby or VBAT mode when the low power backup regulator
sahilmgandhi 18:6a4db94011d3 93 is enabled. It can be considered as an internal EEPROM when VBAT is
sahilmgandhi 18:6a4db94011d3 94 always present. You can use the HAL_PWREx_EnableBkUpReg() function to
sahilmgandhi 18:6a4db94011d3 95 enable the low power backup regulator.
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
sahilmgandhi 18:6a4db94011d3 98 the backup SRAM is powered from VDD which replaces the VBAT power supply to
sahilmgandhi 18:6a4db94011d3 99 save battery life.
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 (+) The backup SRAM is not mass erased by a tamper event. It is read
sahilmgandhi 18:6a4db94011d3 102 protected to prevent confidential data, such as cryptographic private
sahilmgandhi 18:6a4db94011d3 103 key, from being accessed. The backup SRAM can be erased only through
sahilmgandhi 18:6a4db94011d3 104 the Flash interface when a protection level change from level 1 to
sahilmgandhi 18:6a4db94011d3 105 level 0 is requested.
sahilmgandhi 18:6a4db94011d3 106 -@- Refer to the description of Read protection (RDP) in the Flash
sahilmgandhi 18:6a4db94011d3 107 programming manual.
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 (+) The main internal regulator can be configured to have a tradeoff between
sahilmgandhi 18:6a4db94011d3 110 performance and power consumption when the device does not operate at
sahilmgandhi 18:6a4db94011d3 111 the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
sahilmgandhi 18:6a4db94011d3 112 macro which configure VOS bit in PWR_CR register
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 Refer to the product datasheets for more details.
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 *** FLASH Power Down configuration ****
sahilmgandhi 18:6a4db94011d3 117 =======================================
sahilmgandhi 18:6a4db94011d3 118 [..]
sahilmgandhi 18:6a4db94011d3 119 (+) By setting the FPDS bit in the PWR_CR register by using the
sahilmgandhi 18:6a4db94011d3 120 HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
sahilmgandhi 18:6a4db94011d3 121 down mode when the device enters Stop mode. When the Flash memory
sahilmgandhi 18:6a4db94011d3 122 is in power down mode, an additional startup delay is incurred when
sahilmgandhi 18:6a4db94011d3 123 waking up from Stop mode.
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when the PLL
sahilmgandhi 18:6a4db94011d3 126 is OFF and the HSI or HSE clock source is selected as system clock.
sahilmgandhi 18:6a4db94011d3 127 The new value programmed is active only when the PLL is ON.
sahilmgandhi 18:6a4db94011d3 128 When the PLL is OFF, the voltage scale 3 is automatically selected.
sahilmgandhi 18:6a4db94011d3 129 Refer to the datasheets for more details.
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 *** Over-Drive and Under-Drive configuration ****
sahilmgandhi 18:6a4db94011d3 132 =================================================
sahilmgandhi 18:6a4db94011d3 133 [..]
sahilmgandhi 18:6a4db94011d3 134 (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
sahilmgandhi 18:6a4db94011d3 135 2 operating modes available:
sahilmgandhi 18:6a4db94011d3 136 (++) Normal mode: The CPU and core logic operate at maximum frequency at a given
sahilmgandhi 18:6a4db94011d3 137 voltage scaling (scale 1, scale 2 or scale 3)
sahilmgandhi 18:6a4db94011d3 138 (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
sahilmgandhi 18:6a4db94011d3 139 higher frequency than the normal mode for a given voltage scaling (scale 1,
sahilmgandhi 18:6a4db94011d3 140 scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and
sahilmgandhi 18:6a4db94011d3 141 disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow
sahilmgandhi 18:6a4db94011d3 142 the sequence described in Reference manual.
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low power regulator
sahilmgandhi 18:6a4db94011d3 145 supplies a low power voltage to the 1.2V domain, thus preserving the content of registers
sahilmgandhi 18:6a4db94011d3 146 and internal SRAM. 2 operating modes are available:
sahilmgandhi 18:6a4db94011d3 147 (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
sahilmgandhi 18:6a4db94011d3 148 available when the main regulator or the low power regulator is used in Scale 3 or
sahilmgandhi 18:6a4db94011d3 149 low voltage mode.
sahilmgandhi 18:6a4db94011d3 150 (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only
sahilmgandhi 18:6a4db94011d3 151 available when the main regulator or the low power regulator is in low voltage mode.
sahilmgandhi 18:6a4db94011d3 152
sahilmgandhi 18:6a4db94011d3 153 @endverbatim
sahilmgandhi 18:6a4db94011d3 154 * @{
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 /**
sahilmgandhi 18:6a4db94011d3 158 * @brief Enables the Backup Regulator.
sahilmgandhi 18:6a4db94011d3 159 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 160 */
sahilmgandhi 18:6a4db94011d3 161 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
sahilmgandhi 18:6a4db94011d3 162 {
sahilmgandhi 18:6a4db94011d3 163 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
sahilmgandhi 18:6a4db94011d3 166
sahilmgandhi 18:6a4db94011d3 167 /* Get tick */
sahilmgandhi 18:6a4db94011d3 168 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 169
sahilmgandhi 18:6a4db94011d3 170 /* Wait till Backup regulator ready flag is set */
sahilmgandhi 18:6a4db94011d3 171 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
sahilmgandhi 18:6a4db94011d3 172 {
sahilmgandhi 18:6a4db94011d3 173 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 174 {
sahilmgandhi 18:6a4db94011d3 175 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 176 }
sahilmgandhi 18:6a4db94011d3 177 }
sahilmgandhi 18:6a4db94011d3 178 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 179 }
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181 /**
sahilmgandhi 18:6a4db94011d3 182 * @brief Disables the Backup Regulator.
sahilmgandhi 18:6a4db94011d3 183 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 184 */
sahilmgandhi 18:6a4db94011d3 185 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
sahilmgandhi 18:6a4db94011d3 186 {
sahilmgandhi 18:6a4db94011d3 187 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
sahilmgandhi 18:6a4db94011d3 190
sahilmgandhi 18:6a4db94011d3 191 /* Get tick */
sahilmgandhi 18:6a4db94011d3 192 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /* Wait till Backup regulator ready flag is set */
sahilmgandhi 18:6a4db94011d3 195 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
sahilmgandhi 18:6a4db94011d3 196 {
sahilmgandhi 18:6a4db94011d3 197 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 198 {
sahilmgandhi 18:6a4db94011d3 199 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 200 }
sahilmgandhi 18:6a4db94011d3 201 }
sahilmgandhi 18:6a4db94011d3 202 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 203 }
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 /**
sahilmgandhi 18:6a4db94011d3 206 * @brief Enables the Flash Power Down in Stop mode.
sahilmgandhi 18:6a4db94011d3 207 * @retval None
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209 void HAL_PWREx_EnableFlashPowerDown(void)
sahilmgandhi 18:6a4db94011d3 210 {
sahilmgandhi 18:6a4db94011d3 211 *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
sahilmgandhi 18:6a4db94011d3 212 }
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 /**
sahilmgandhi 18:6a4db94011d3 215 * @brief Disables the Flash Power Down in Stop mode.
sahilmgandhi 18:6a4db94011d3 216 * @retval None
sahilmgandhi 18:6a4db94011d3 217 */
sahilmgandhi 18:6a4db94011d3 218 void HAL_PWREx_DisableFlashPowerDown(void)
sahilmgandhi 18:6a4db94011d3 219 {
sahilmgandhi 18:6a4db94011d3 220 *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
sahilmgandhi 18:6a4db94011d3 221 }
sahilmgandhi 18:6a4db94011d3 222
sahilmgandhi 18:6a4db94011d3 223 /**
sahilmgandhi 18:6a4db94011d3 224 * @brief Return Voltage Scaling Range.
sahilmgandhi 18:6a4db94011d3 225 * @retval The configured scale for the regulator voltage(VOS bit field).
sahilmgandhi 18:6a4db94011d3 226 * The returned value can be one of the following:
sahilmgandhi 18:6a4db94011d3 227 * - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
sahilmgandhi 18:6a4db94011d3 228 * - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
sahilmgandhi 18:6a4db94011d3 229 * - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
sahilmgandhi 18:6a4db94011d3 230 */
sahilmgandhi 18:6a4db94011d3 231 uint32_t HAL_PWREx_GetVoltageRange(void)
sahilmgandhi 18:6a4db94011d3 232 {
sahilmgandhi 18:6a4db94011d3 233 return (PWR->CR & PWR_CR_VOS);
sahilmgandhi 18:6a4db94011d3 234 }
sahilmgandhi 18:6a4db94011d3 235
sahilmgandhi 18:6a4db94011d3 236 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
sahilmgandhi 18:6a4db94011d3 237 /**
sahilmgandhi 18:6a4db94011d3 238 * @brief Configures the main internal regulator output voltage.
sahilmgandhi 18:6a4db94011d3 239 * @param VoltageScaling: specifies the regulator output voltage to achieve
sahilmgandhi 18:6a4db94011d3 240 * a tradeoff between performance and power consumption.
sahilmgandhi 18:6a4db94011d3 241 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 242 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
sahilmgandhi 18:6a4db94011d3 243 * the maximum value of fHCLK = 168 MHz.
sahilmgandhi 18:6a4db94011d3 244 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
sahilmgandhi 18:6a4db94011d3 245 * the maximum value of fHCLK = 144 MHz.
sahilmgandhi 18:6a4db94011d3 246 * @note When moving from Range 1 to Range 2, the system frequency must be decreased to
sahilmgandhi 18:6a4db94011d3 247 * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API.
sahilmgandhi 18:6a4db94011d3 248 * When moving from Range 2 to Range 1, the system frequency can be increased to
sahilmgandhi 18:6a4db94011d3 249 * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API.
sahilmgandhi 18:6a4db94011d3 250 * @retval HAL Status
sahilmgandhi 18:6a4db94011d3 251 */
sahilmgandhi 18:6a4db94011d3 252 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
sahilmgandhi 18:6a4db94011d3 253 {
sahilmgandhi 18:6a4db94011d3 254 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 /* Enable PWR RCC Clock Peripheral */
sahilmgandhi 18:6a4db94011d3 259 __HAL_RCC_PWR_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 260
sahilmgandhi 18:6a4db94011d3 261 /* Set Range */
sahilmgandhi 18:6a4db94011d3 262 __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 /* Get Start Tick*/
sahilmgandhi 18:6a4db94011d3 265 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 266 while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
sahilmgandhi 18:6a4db94011d3 267 {
sahilmgandhi 18:6a4db94011d3 268 if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 269 {
sahilmgandhi 18:6a4db94011d3 270 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 271 }
sahilmgandhi 18:6a4db94011d3 272 }
sahilmgandhi 18:6a4db94011d3 273
sahilmgandhi 18:6a4db94011d3 274 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 275 }
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 #elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
sahilmgandhi 18:6a4db94011d3 278 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
sahilmgandhi 18:6a4db94011d3 279 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || \
sahilmgandhi 18:6a4db94011d3 280 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
sahilmgandhi 18:6a4db94011d3 281 defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 282 /**
sahilmgandhi 18:6a4db94011d3 283 * @brief Configures the main internal regulator output voltage.
sahilmgandhi 18:6a4db94011d3 284 * @param VoltageScaling: specifies the regulator output voltage to achieve
sahilmgandhi 18:6a4db94011d3 285 * a tradeoff between performance and power consumption.
sahilmgandhi 18:6a4db94011d3 286 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 287 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
sahilmgandhi 18:6a4db94011d3 288 * the maximum value of fHCLK is 168 MHz. It can be extended to
sahilmgandhi 18:6a4db94011d3 289 * 180 MHz by activating the over-drive mode.
sahilmgandhi 18:6a4db94011d3 290 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
sahilmgandhi 18:6a4db94011d3 291 * the maximum value of fHCLK is 144 MHz. It can be extended to,
sahilmgandhi 18:6a4db94011d3 292 * 168 MHz by activating the over-drive mode.
sahilmgandhi 18:6a4db94011d3 293 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode,
sahilmgandhi 18:6a4db94011d3 294 * the maximum value of fHCLK is 120 MHz.
sahilmgandhi 18:6a4db94011d3 295 * @note To update the system clock frequency(SYSCLK):
sahilmgandhi 18:6a4db94011d3 296 * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig().
sahilmgandhi 18:6a4db94011d3 297 * - Call the HAL_RCC_OscConfig() to configure the PLL.
sahilmgandhi 18:6a4db94011d3 298 * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale.
sahilmgandhi 18:6a4db94011d3 299 * - Set the new system clock frequency using the HAL_RCC_ClockConfig().
sahilmgandhi 18:6a4db94011d3 300 * @note The scale can be modified only when the HSI or HSE clock source is selected
sahilmgandhi 18:6a4db94011d3 301 * as system clock source, otherwise the API returns HAL_ERROR.
sahilmgandhi 18:6a4db94011d3 302 * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits
sahilmgandhi 18:6a4db94011d3 303 * value in the PWR_CR1 register are not taken in account.
sahilmgandhi 18:6a4db94011d3 304 * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2.
sahilmgandhi 18:6a4db94011d3 305 * @note The new voltage scale is active only when the PLL is ON.
sahilmgandhi 18:6a4db94011d3 306 * @retval HAL Status
sahilmgandhi 18:6a4db94011d3 307 */
sahilmgandhi 18:6a4db94011d3 308 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
sahilmgandhi 18:6a4db94011d3 309 {
sahilmgandhi 18:6a4db94011d3 310 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 /* Enable PWR RCC Clock Peripheral */
sahilmgandhi 18:6a4db94011d3 315 __HAL_RCC_PWR_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317 /* Check if the PLL is used as system clock or not */
sahilmgandhi 18:6a4db94011d3 318 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
sahilmgandhi 18:6a4db94011d3 319 {
sahilmgandhi 18:6a4db94011d3 320 /* Disable the main PLL */
sahilmgandhi 18:6a4db94011d3 321 __HAL_RCC_PLL_DISABLE();
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 /* Get Start Tick */
sahilmgandhi 18:6a4db94011d3 324 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 325 /* Wait till PLL is disabled */
sahilmgandhi 18:6a4db94011d3 326 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
sahilmgandhi 18:6a4db94011d3 327 {
sahilmgandhi 18:6a4db94011d3 328 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 329 {
sahilmgandhi 18:6a4db94011d3 330 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 331 }
sahilmgandhi 18:6a4db94011d3 332 }
sahilmgandhi 18:6a4db94011d3 333
sahilmgandhi 18:6a4db94011d3 334 /* Set Range */
sahilmgandhi 18:6a4db94011d3 335 __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
sahilmgandhi 18:6a4db94011d3 336
sahilmgandhi 18:6a4db94011d3 337 /* Enable the main PLL */
sahilmgandhi 18:6a4db94011d3 338 __HAL_RCC_PLL_ENABLE();
sahilmgandhi 18:6a4db94011d3 339
sahilmgandhi 18:6a4db94011d3 340 /* Get Start Tick */
sahilmgandhi 18:6a4db94011d3 341 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 342 /* Wait till PLL is ready */
sahilmgandhi 18:6a4db94011d3 343 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
sahilmgandhi 18:6a4db94011d3 344 {
sahilmgandhi 18:6a4db94011d3 345 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 346 {
sahilmgandhi 18:6a4db94011d3 347 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 348 }
sahilmgandhi 18:6a4db94011d3 349 }
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 /* Get Start Tick */
sahilmgandhi 18:6a4db94011d3 352 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 353 while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
sahilmgandhi 18:6a4db94011d3 354 {
sahilmgandhi 18:6a4db94011d3 355 if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 356 {
sahilmgandhi 18:6a4db94011d3 357 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 358 }
sahilmgandhi 18:6a4db94011d3 359 }
sahilmgandhi 18:6a4db94011d3 360 }
sahilmgandhi 18:6a4db94011d3 361 else
sahilmgandhi 18:6a4db94011d3 362 {
sahilmgandhi 18:6a4db94011d3 363 return HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 364 }
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 367 }
sahilmgandhi 18:6a4db94011d3 368 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
sahilmgandhi 18:6a4db94011d3 369
sahilmgandhi 18:6a4db94011d3 370 #if defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 371 /**
sahilmgandhi 18:6a4db94011d3 372 * @brief Enables Wakeup Pin Detection on high level (rising edge).
sahilmgandhi 18:6a4db94011d3 373 * @retval None
sahilmgandhi 18:6a4db94011d3 374 */
sahilmgandhi 18:6a4db94011d3 375 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void)
sahilmgandhi 18:6a4db94011d3 376 {
sahilmgandhi 18:6a4db94011d3 377 *(__IO uint32_t *) CSR_WUPP_BB = (uint32_t)DISABLE;
sahilmgandhi 18:6a4db94011d3 378 }
sahilmgandhi 18:6a4db94011d3 379
sahilmgandhi 18:6a4db94011d3 380 /**
sahilmgandhi 18:6a4db94011d3 381 * @brief Enables Wakeup Pin Detection on low level (falling edge).
sahilmgandhi 18:6a4db94011d3 382 * @retval None
sahilmgandhi 18:6a4db94011d3 383 */
sahilmgandhi 18:6a4db94011d3 384 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void)
sahilmgandhi 18:6a4db94011d3 385 {
sahilmgandhi 18:6a4db94011d3 386 *(__IO uint32_t *) CSR_WUPP_BB = (uint32_t)ENABLE;
sahilmgandhi 18:6a4db94011d3 387 }
sahilmgandhi 18:6a4db94011d3 388 #endif /* STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 389
sahilmgandhi 18:6a4db94011d3 390 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
sahilmgandhi 18:6a4db94011d3 391 defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 392 /**
sahilmgandhi 18:6a4db94011d3 393 * @brief Enables Main Regulator low voltage mode.
sahilmgandhi 18:6a4db94011d3 394 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices.
sahilmgandhi 18:6a4db94011d3 395 * @retval None
sahilmgandhi 18:6a4db94011d3 396 */
sahilmgandhi 18:6a4db94011d3 397 void HAL_PWREx_EnableMainRegulatorLowVoltage(void)
sahilmgandhi 18:6a4db94011d3 398 {
sahilmgandhi 18:6a4db94011d3 399 *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)ENABLE;
sahilmgandhi 18:6a4db94011d3 400 }
sahilmgandhi 18:6a4db94011d3 401
sahilmgandhi 18:6a4db94011d3 402 /**
sahilmgandhi 18:6a4db94011d3 403 * @brief Disables Main Regulator low voltage mode.
sahilmgandhi 18:6a4db94011d3 404 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices.
sahilmgandhi 18:6a4db94011d3 405 * @retval None
sahilmgandhi 18:6a4db94011d3 406 */
sahilmgandhi 18:6a4db94011d3 407 void HAL_PWREx_DisableMainRegulatorLowVoltage(void)
sahilmgandhi 18:6a4db94011d3 408 {
sahilmgandhi 18:6a4db94011d3 409 *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE;
sahilmgandhi 18:6a4db94011d3 410 }
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 /**
sahilmgandhi 18:6a4db94011d3 413 * @brief Enables Low Power Regulator low voltage mode.
sahilmgandhi 18:6a4db94011d3 414 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices.
sahilmgandhi 18:6a4db94011d3 415 * @retval None
sahilmgandhi 18:6a4db94011d3 416 */
sahilmgandhi 18:6a4db94011d3 417 void HAL_PWREx_EnableLowRegulatorLowVoltage(void)
sahilmgandhi 18:6a4db94011d3 418 {
sahilmgandhi 18:6a4db94011d3 419 *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)ENABLE;
sahilmgandhi 18:6a4db94011d3 420 }
sahilmgandhi 18:6a4db94011d3 421
sahilmgandhi 18:6a4db94011d3 422 /**
sahilmgandhi 18:6a4db94011d3 423 * @brief Disables Low Power Regulator low voltage mode.
sahilmgandhi 18:6a4db94011d3 424 * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices.
sahilmgandhi 18:6a4db94011d3 425 * @retval None
sahilmgandhi 18:6a4db94011d3 426 */
sahilmgandhi 18:6a4db94011d3 427 void HAL_PWREx_DisableLowRegulatorLowVoltage(void)
sahilmgandhi 18:6a4db94011d3 428 {
sahilmgandhi 18:6a4db94011d3 429 *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE;
sahilmgandhi 18:6a4db94011d3 430 }
sahilmgandhi 18:6a4db94011d3 431
sahilmgandhi 18:6a4db94011d3 432 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 433
sahilmgandhi 18:6a4db94011d3 434 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 435 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 436 /**
sahilmgandhi 18:6a4db94011d3 437 * @brief Activates the Over-Drive mode.
sahilmgandhi 18:6a4db94011d3 438 * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
sahilmgandhi 18:6a4db94011d3 439 * This mode allows the CPU and the core logic to operate at a higher frequency
sahilmgandhi 18:6a4db94011d3 440 * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
sahilmgandhi 18:6a4db94011d3 441 * @note It is recommended to enter or exit Over-drive mode when the application is not running
sahilmgandhi 18:6a4db94011d3 442 * critical tasks and when the system clock source is either HSI or HSE.
sahilmgandhi 18:6a4db94011d3 443 * During the Over-drive switch activation, no peripheral clocks should be enabled.
sahilmgandhi 18:6a4db94011d3 444 * The peripheral clocks must be enabled once the Over-drive mode is activated.
sahilmgandhi 18:6a4db94011d3 445 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 446 */
sahilmgandhi 18:6a4db94011d3 447 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
sahilmgandhi 18:6a4db94011d3 448 {
sahilmgandhi 18:6a4db94011d3 449 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 450
sahilmgandhi 18:6a4db94011d3 451 __HAL_RCC_PWR_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 452
sahilmgandhi 18:6a4db94011d3 453 /* Enable the Over-drive to extend the clock frequency to 180 Mhz */
sahilmgandhi 18:6a4db94011d3 454 __HAL_PWR_OVERDRIVE_ENABLE();
sahilmgandhi 18:6a4db94011d3 455
sahilmgandhi 18:6a4db94011d3 456 /* Get tick */
sahilmgandhi 18:6a4db94011d3 457 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 458
sahilmgandhi 18:6a4db94011d3 459 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
sahilmgandhi 18:6a4db94011d3 460 {
sahilmgandhi 18:6a4db94011d3 461 if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 462 {
sahilmgandhi 18:6a4db94011d3 463 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 464 }
sahilmgandhi 18:6a4db94011d3 465 }
sahilmgandhi 18:6a4db94011d3 466
sahilmgandhi 18:6a4db94011d3 467 /* Enable the Over-drive switch */
sahilmgandhi 18:6a4db94011d3 468 __HAL_PWR_OVERDRIVESWITCHING_ENABLE();
sahilmgandhi 18:6a4db94011d3 469
sahilmgandhi 18:6a4db94011d3 470 /* Get tick */
sahilmgandhi 18:6a4db94011d3 471 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 472
sahilmgandhi 18:6a4db94011d3 473 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
sahilmgandhi 18:6a4db94011d3 474 {
sahilmgandhi 18:6a4db94011d3 475 if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 476 {
sahilmgandhi 18:6a4db94011d3 477 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 478 }
sahilmgandhi 18:6a4db94011d3 479 }
sahilmgandhi 18:6a4db94011d3 480 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 481 }
sahilmgandhi 18:6a4db94011d3 482
sahilmgandhi 18:6a4db94011d3 483 /**
sahilmgandhi 18:6a4db94011d3 484 * @brief Deactivates the Over-Drive mode.
sahilmgandhi 18:6a4db94011d3 485 * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
sahilmgandhi 18:6a4db94011d3 486 * This mode allows the CPU and the core logic to operate at a higher frequency
sahilmgandhi 18:6a4db94011d3 487 * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
sahilmgandhi 18:6a4db94011d3 488 * @note It is recommended to enter or exit Over-drive mode when the application is not running
sahilmgandhi 18:6a4db94011d3 489 * critical tasks and when the system clock source is either HSI or HSE.
sahilmgandhi 18:6a4db94011d3 490 * During the Over-drive switch activation, no peripheral clocks should be enabled.
sahilmgandhi 18:6a4db94011d3 491 * The peripheral clocks must be enabled once the Over-drive mode is activated.
sahilmgandhi 18:6a4db94011d3 492 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 493 */
sahilmgandhi 18:6a4db94011d3 494 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void)
sahilmgandhi 18:6a4db94011d3 495 {
sahilmgandhi 18:6a4db94011d3 496 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 497
sahilmgandhi 18:6a4db94011d3 498 __HAL_RCC_PWR_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 499
sahilmgandhi 18:6a4db94011d3 500 /* Disable the Over-drive switch */
sahilmgandhi 18:6a4db94011d3 501 __HAL_PWR_OVERDRIVESWITCHING_DISABLE();
sahilmgandhi 18:6a4db94011d3 502
sahilmgandhi 18:6a4db94011d3 503 /* Get tick */
sahilmgandhi 18:6a4db94011d3 504 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 505
sahilmgandhi 18:6a4db94011d3 506 while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
sahilmgandhi 18:6a4db94011d3 507 {
sahilmgandhi 18:6a4db94011d3 508 if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 509 {
sahilmgandhi 18:6a4db94011d3 510 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 511 }
sahilmgandhi 18:6a4db94011d3 512 }
sahilmgandhi 18:6a4db94011d3 513
sahilmgandhi 18:6a4db94011d3 514 /* Disable the Over-drive */
sahilmgandhi 18:6a4db94011d3 515 __HAL_PWR_OVERDRIVE_DISABLE();
sahilmgandhi 18:6a4db94011d3 516
sahilmgandhi 18:6a4db94011d3 517 /* Get tick */
sahilmgandhi 18:6a4db94011d3 518 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 519
sahilmgandhi 18:6a4db94011d3 520 while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
sahilmgandhi 18:6a4db94011d3 521 {
sahilmgandhi 18:6a4db94011d3 522 if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 523 {
sahilmgandhi 18:6a4db94011d3 524 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 525 }
sahilmgandhi 18:6a4db94011d3 526 }
sahilmgandhi 18:6a4db94011d3 527
sahilmgandhi 18:6a4db94011d3 528 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 529 }
sahilmgandhi 18:6a4db94011d3 530
sahilmgandhi 18:6a4db94011d3 531 /**
sahilmgandhi 18:6a4db94011d3 532 * @brief Enters in Under-Drive STOP mode.
sahilmgandhi 18:6a4db94011d3 533 *
sahilmgandhi 18:6a4db94011d3 534 * @note This mode is only available for STM32F42xxx/STM324F3xxx/STM32F446xx/STM32F469xx/STM32F479xx devices.
sahilmgandhi 18:6a4db94011d3 535 *
sahilmgandhi 18:6a4db94011d3 536 * @note This mode can be selected only when the Under-Drive is already active
sahilmgandhi 18:6a4db94011d3 537 *
sahilmgandhi 18:6a4db94011d3 538 * @note This mode is enabled only with STOP low power mode.
sahilmgandhi 18:6a4db94011d3 539 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
sahilmgandhi 18:6a4db94011d3 540 * mode is only available when the main regulator or the low power regulator
sahilmgandhi 18:6a4db94011d3 541 * is in low voltage mode
sahilmgandhi 18:6a4db94011d3 542 *
sahilmgandhi 18:6a4db94011d3 543 * @note If the Under-drive mode was enabled, it is automatically disabled after
sahilmgandhi 18:6a4db94011d3 544 * exiting Stop mode.
sahilmgandhi 18:6a4db94011d3 545 * When the voltage regulator operates in Under-drive mode, an additional
sahilmgandhi 18:6a4db94011d3 546 * startup delay is induced when waking up from Stop mode.
sahilmgandhi 18:6a4db94011d3 547 *
sahilmgandhi 18:6a4db94011d3 548 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
sahilmgandhi 18:6a4db94011d3 549 *
sahilmgandhi 18:6a4db94011d3 550 * @note When exiting Stop mode by issuing an interrupt or a wake-up event,
sahilmgandhi 18:6a4db94011d3 551 * the HSI RC oscillator is selected as system clock.
sahilmgandhi 18:6a4db94011d3 552 *
sahilmgandhi 18:6a4db94011d3 553 * @note When the voltage regulator operates in low power mode, an additional
sahilmgandhi 18:6a4db94011d3 554 * startup delay is incurred when waking up from Stop mode.
sahilmgandhi 18:6a4db94011d3 555 * By keeping the internal regulator ON during Stop mode, the consumption
sahilmgandhi 18:6a4db94011d3 556 * is higher although the startup time is reduced.
sahilmgandhi 18:6a4db94011d3 557 *
sahilmgandhi 18:6a4db94011d3 558 * @param Regulator: specifies the regulator state in STOP mode.
sahilmgandhi 18:6a4db94011d3 559 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 560 * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode
sahilmgandhi 18:6a4db94011d3 561 * and Flash memory in power-down when the device is in Stop under-drive mode
sahilmgandhi 18:6a4db94011d3 562 * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode
sahilmgandhi 18:6a4db94011d3 563 * and Flash memory in power-down when the device is in Stop under-drive mode
sahilmgandhi 18:6a4db94011d3 564 * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
sahilmgandhi 18:6a4db94011d3 565 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 566 * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction
sahilmgandhi 18:6a4db94011d3 567 * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction
sahilmgandhi 18:6a4db94011d3 568 * @retval None
sahilmgandhi 18:6a4db94011d3 569 */
sahilmgandhi 18:6a4db94011d3 570 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
sahilmgandhi 18:6a4db94011d3 571 {
sahilmgandhi 18:6a4db94011d3 572 uint32_t tmpreg1 = 0U;
sahilmgandhi 18:6a4db94011d3 573 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 574
sahilmgandhi 18:6a4db94011d3 575 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 576 assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator));
sahilmgandhi 18:6a4db94011d3 577 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
sahilmgandhi 18:6a4db94011d3 578
sahilmgandhi 18:6a4db94011d3 579 /* Enable Power ctrl clock */
sahilmgandhi 18:6a4db94011d3 580 __HAL_RCC_PWR_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 581 /* Enable the Under-drive Mode ---------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 582 /* Clear Under-drive flag */
sahilmgandhi 18:6a4db94011d3 583 __HAL_PWR_CLEAR_ODRUDR_FLAG();
sahilmgandhi 18:6a4db94011d3 584
sahilmgandhi 18:6a4db94011d3 585 /* Enable the Under-drive */
sahilmgandhi 18:6a4db94011d3 586 __HAL_PWR_UNDERDRIVE_ENABLE();
sahilmgandhi 18:6a4db94011d3 587
sahilmgandhi 18:6a4db94011d3 588 /* Get tick */
sahilmgandhi 18:6a4db94011d3 589 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 590
sahilmgandhi 18:6a4db94011d3 591 /* Wait for UnderDrive mode is ready */
sahilmgandhi 18:6a4db94011d3 592 while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY))
sahilmgandhi 18:6a4db94011d3 593 {
sahilmgandhi 18:6a4db94011d3 594 if((HAL_GetTick() - tickstart) > PWR_UDERDRIVE_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 595 {
sahilmgandhi 18:6a4db94011d3 596 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 597 }
sahilmgandhi 18:6a4db94011d3 598 }
sahilmgandhi 18:6a4db94011d3 599
sahilmgandhi 18:6a4db94011d3 600 /* Select the regulator state in STOP mode ---------------------------------*/
sahilmgandhi 18:6a4db94011d3 601 tmpreg1 = PWR->CR;
sahilmgandhi 18:6a4db94011d3 602 /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */
sahilmgandhi 18:6a4db94011d3 603 tmpreg1 &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_MRUDS);
sahilmgandhi 18:6a4db94011d3 604
sahilmgandhi 18:6a4db94011d3 605 /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */
sahilmgandhi 18:6a4db94011d3 606 tmpreg1 |= Regulator;
sahilmgandhi 18:6a4db94011d3 607
sahilmgandhi 18:6a4db94011d3 608 /* Store the new value */
sahilmgandhi 18:6a4db94011d3 609 PWR->CR = tmpreg1;
sahilmgandhi 18:6a4db94011d3 610
sahilmgandhi 18:6a4db94011d3 611 /* Set SLEEPDEEP bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 612 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
sahilmgandhi 18:6a4db94011d3 613
sahilmgandhi 18:6a4db94011d3 614 /* Select STOP mode entry --------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 615 if(STOPEntry == PWR_SLEEPENTRY_WFI)
sahilmgandhi 18:6a4db94011d3 616 {
sahilmgandhi 18:6a4db94011d3 617 /* Request Wait For Interrupt */
sahilmgandhi 18:6a4db94011d3 618 __WFI();
sahilmgandhi 18:6a4db94011d3 619 }
sahilmgandhi 18:6a4db94011d3 620 else
sahilmgandhi 18:6a4db94011d3 621 {
sahilmgandhi 18:6a4db94011d3 622 /* Request Wait For Event */
sahilmgandhi 18:6a4db94011d3 623 __WFE();
sahilmgandhi 18:6a4db94011d3 624 }
sahilmgandhi 18:6a4db94011d3 625 /* Reset SLEEPDEEP bit of Cortex System Control Register */
sahilmgandhi 18:6a4db94011d3 626 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
sahilmgandhi 18:6a4db94011d3 627
sahilmgandhi 18:6a4db94011d3 628 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 629 }
sahilmgandhi 18:6a4db94011d3 630
sahilmgandhi 18:6a4db94011d3 631 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 632 /**
sahilmgandhi 18:6a4db94011d3 633 * @}
sahilmgandhi 18:6a4db94011d3 634 */
sahilmgandhi 18:6a4db94011d3 635
sahilmgandhi 18:6a4db94011d3 636 /**
sahilmgandhi 18:6a4db94011d3 637 * @}
sahilmgandhi 18:6a4db94011d3 638 */
sahilmgandhi 18:6a4db94011d3 639
sahilmgandhi 18:6a4db94011d3 640 #endif /* HAL_PWR_MODULE_ENABLED */
sahilmgandhi 18:6a4db94011d3 641 /**
sahilmgandhi 18:6a4db94011d3 642 * @}
sahilmgandhi 18:6a4db94011d3 643 */
sahilmgandhi 18:6a4db94011d3 644
sahilmgandhi 18:6a4db94011d3 645 /**
sahilmgandhi 18:6a4db94011d3 646 * @}
sahilmgandhi 18:6a4db94011d3 647 */
sahilmgandhi 18:6a4db94011d3 648
sahilmgandhi 18:6a4db94011d3 649 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/