MouseCode - Mouse code for the MacroRat

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Mouse code for the MacroRat

Dependencies: ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_fmpi2c.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:: sahilmgandhi
Date:: Sun May 14 23:18:57 2017 +0000
Revision:: 18:6a4db94011d3

Publishing again

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User	Revision	Line number	New contents of line
sahilmgandhi	18:6a4db94011d3	1	/**
sahilmgandhi	18:6a4db94011d3	2	******************************************************************************
sahilmgandhi	18:6a4db94011d3	3	* @file stm32f4xx_hal_fmpi2c.c
sahilmgandhi	18:6a4db94011d3	4	* @author MCD Application Team
sahilmgandhi	18:6a4db94011d3	5	* @version V1.5.0
sahilmgandhi	18:6a4db94011d3	6	* @date 06-May-2016
sahilmgandhi	18:6a4db94011d3	7	* @brief FMPI2C HAL module driver.
sahilmgandhi	18:6a4db94011d3	8	* This file provides firmware functions to manage the following
sahilmgandhi	18:6a4db94011d3	9	* functionalities of the Inter Integrated Circuit (FMPI2C) peripheral:
sahilmgandhi	18:6a4db94011d3	10	* + Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	11	* + IO operation functions
sahilmgandhi	18:6a4db94011d3	12	* + Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	13	*
sahilmgandhi	18:6a4db94011d3	14	@verbatim
sahilmgandhi	18:6a4db94011d3	15	==============================================================================
sahilmgandhi	18:6a4db94011d3	16	##### How to use this driver #####
sahilmgandhi	18:6a4db94011d3	17	==============================================================================
sahilmgandhi	18:6a4db94011d3	18	[..]
sahilmgandhi	18:6a4db94011d3	19	The FMPI2C HAL driver can be used as follows:
sahilmgandhi	18:6a4db94011d3	20
sahilmgandhi	18:6a4db94011d3	21	(#) Declare a FMPI2C_HandleTypeDef handle structure, for example:
sahilmgandhi	18:6a4db94011d3	22	FMPI2C_HandleTypeDef hfmpi2c;
sahilmgandhi	18:6a4db94011d3	23
sahilmgandhi	18:6a4db94011d3	24	(#)Initialize the FMPI2C low level resources by implementing the HAL_FMPI2C_MspInit() API:
sahilmgandhi	18:6a4db94011d3	25	(##) Enable the FMPI2Cx interface clock
sahilmgandhi	18:6a4db94011d3	26	(##) FMPI2C pins configuration
sahilmgandhi	18:6a4db94011d3	27	(+++) Enable the clock for the FMPI2C GPIOs
sahilmgandhi	18:6a4db94011d3	28	(+++) Configure FMPI2C pins as alternate function open-drain
sahilmgandhi	18:6a4db94011d3	29	(##) NVIC configuration if you need to use interrupt process
sahilmgandhi	18:6a4db94011d3	30	(+++) Configure the FMPI2Cx interrupt priority
sahilmgandhi	18:6a4db94011d3	31	(+++) Enable the NVIC FMPI2C IRQ Channel
sahilmgandhi	18:6a4db94011d3	32	(##) DMA Configuration if you need to use DMA process
sahilmgandhi	18:6a4db94011d3	33	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
sahilmgandhi	18:6a4db94011d3	34	(+++) Enable the DMAx interface clock using
sahilmgandhi	18:6a4db94011d3	35	(+++) Configure the DMA handle parameters
sahilmgandhi	18:6a4db94011d3	36	(+++) Configure the DMA Tx or Rx channel
sahilmgandhi	18:6a4db94011d3	37	(+++) Associate the initialized DMA handle to the hfmpi2c DMA Tx or Rx handle
sahilmgandhi	18:6a4db94011d3	38	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
sahilmgandhi	18:6a4db94011d3	39	the DMA Tx or Rx channel
sahilmgandhi	18:6a4db94011d3	40
sahilmgandhi	18:6a4db94011d3	41	(#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
sahilmgandhi	18:6a4db94011d3	42	Own Address2, Own Address2 Mask, General call and Nostretch mode in the hfmpi2c Init structure.
sahilmgandhi	18:6a4db94011d3	43
sahilmgandhi	18:6a4db94011d3	44	(#) Initialize the FMPI2C registers by calling the HAL_FMPI2C_Init(), configures also the low level Hardware
sahilmgandhi	18:6a4db94011d3	45	(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_FMPI2C_MspInit(&hfmpi2c) API.
sahilmgandhi	18:6a4db94011d3	46
sahilmgandhi	18:6a4db94011d3	47	(#) To check if target device is ready for communication, use the function HAL_FMPI2C_IsDeviceReady()
sahilmgandhi	18:6a4db94011d3	48
sahilmgandhi	18:6a4db94011d3	49	(#) For FMPI2C IO and IO MEM operations, three operation modes are available within this driver :
sahilmgandhi	18:6a4db94011d3	50
sahilmgandhi	18:6a4db94011d3	51	* Polling mode IO operation *
sahilmgandhi	18:6a4db94011d3	52	=================================
sahilmgandhi	18:6a4db94011d3	53	[..]
sahilmgandhi	18:6a4db94011d3	54	(+) Transmit in master mode an amount of data in blocking mode using HAL_FMPI2C_Master_Transmit()
sahilmgandhi	18:6a4db94011d3	55	(+) Receive in master mode an amount of data in blocking mode using HAL_FMPI2C_Master_Receive()
sahilmgandhi	18:6a4db94011d3	56	(+) Transmit in slave mode an amount of data in blocking mode using HAL_FMPI2C_Slave_Transmit()
sahilmgandhi	18:6a4db94011d3	57	(+) Receive in slave mode an amount of data in blocking mode using HAL_FMPI2C_Slave_Receive()
sahilmgandhi	18:6a4db94011d3	58
sahilmgandhi	18:6a4db94011d3	59	* Polling mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	60	=====================================
sahilmgandhi	18:6a4db94011d3	61	[..]
sahilmgandhi	18:6a4db94011d3	62	(+) Write an amount of data in blocking mode to a specific memory address using HAL_FMPI2C_Mem_Write()
sahilmgandhi	18:6a4db94011d3	63	(+) Read an amount of data in blocking mode from a specific memory address using HAL_FMPI2C_Mem_Read()
sahilmgandhi	18:6a4db94011d3	64
sahilmgandhi	18:6a4db94011d3	65
sahilmgandhi	18:6a4db94011d3	66	* Interrupt mode IO operation *
sahilmgandhi	18:6a4db94011d3	67	===================================
sahilmgandhi	18:6a4db94011d3	68	[..]
sahilmgandhi	18:6a4db94011d3	69	(+) Transmit in master mode an amount of data in non-blocking mode using HAL_FMPI2C_Master_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	70	(+) At transmission end of transfer, HAL_FMPI2C_MasterTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	71	add his own code by customization of function pointer HAL_FMPI2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	72	(+) Receive in master mode an amount of data in non-blocking mode using HAL_FMPI2C_Master_Receive_IT()
sahilmgandhi	18:6a4db94011d3	73	(+) At reception end of transfer, HAL_FMPI2C_MasterRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	74	add his own code by customization of function pointer HAL_FMPI2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	75	(+) Transmit in slave mode an amount of data in non-blocking mode using HAL_FMPI2C_Slave_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	76	(+) At transmission end of transfer, HAL_FMPI2C_SlaveTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	77	add his own code by customization of function pointer HAL_FMPI2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	78	(+) Receive in slave mode an amount of data in non-blocking mode using HAL_FMPI2C_Slave_Receive_IT()
sahilmgandhi	18:6a4db94011d3	79	(+) At reception end of transfer, HAL_FMPI2C_SlaveRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	80	add his own code by customization of function pointer HAL_FMPI2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	81	(+) In case of transfer Error, HAL_FMPI2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	82	add his own code by customization of function pointer HAL_FMPI2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	83	(+) Abort a master FMPI2C process communication with Interrupt using HAL_FMPI2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	84	(+) End of abort process, HAL_FMPI2C_MasterRxCpltCallback() or HAL_FMPI2C_MasterTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	85	add his own code by customization of function pointer HAL_FMPI2C_MasterRxCpltCallback() or HAL_FMPI2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	86	(+) Discard a slave FMPI2C process communication using __HAL_FMPI2C_GENERATE_NACK() macro.
sahilmgandhi	18:6a4db94011d3	87	This action will inform Master to generate a Stop condition to discard the communication.
sahilmgandhi	18:6a4db94011d3	88
sahilmgandhi	18:6a4db94011d3	89
sahilmgandhi	18:6a4db94011d3	90	* Interrupt mode IO sequential operation *
sahilmgandhi	18:6a4db94011d3	91	===================================
sahilmgandhi	18:6a4db94011d3	92	[..]
sahilmgandhi	18:6a4db94011d3	93	(@) These interfaces allow to manage a sequential transfer with a repeated start condition
sahilmgandhi	18:6a4db94011d3	94	when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	95	[..]
sahilmgandhi	18:6a4db94011d3	96	(+) A specific option field manage the different steps of a sequential transfer
sahilmgandhi	18:6a4db94011d3	97	(+) Option field values are defined through FMPI2C_XFEROPTIONS and are listed below:
sahilmgandhi	18:6a4db94011d3	98	(++) FMPI2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
sahilmgandhi	18:6a4db94011d3	99	(++) FMPI2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
sahilmgandhi	18:6a4db94011d3	100	and data to transfer without a final stop condition
sahilmgandhi	18:6a4db94011d3	101	(++) FMPI2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
sahilmgandhi	18:6a4db94011d3	102	and with new data to transfer if the direction change or manage only the new data to transfer
sahilmgandhi	18:6a4db94011d3	103	if no direction change and without a final stop condition in both cases
sahilmgandhi	18:6a4db94011d3	104	(++) FMPI2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
sahilmgandhi	18:6a4db94011d3	105	and with new data to transfer if the direction change or manage only the new data to transfer
sahilmgandhi	18:6a4db94011d3	106	if no direction change and with a final stop condition in both cases
sahilmgandhi	18:6a4db94011d3	107
sahilmgandhi	18:6a4db94011d3	108	(+) Differents sequential FMPI2C interfaces are listed below:
sahilmgandhi	18:6a4db94011d3	109	(++) Sequential transmit in master FMPI2C mode an amount of data in non-blocking mode using HAL_FMPI2C_Master_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	110	(+++) At transmission end of current frame transfer, HAL_FMPI2C_MasterTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	111	add his own code by customization of function pointer HAL_FMPI2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	112	(++) Sequential receive in master FMPI2C mode an amount of data in non-blocking mode using HAL_FMPI2C_Master_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	113	(+++) At reception end of current frame transfer, HAL_FMPI2C_MasterRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	114	add his own code by customization of function pointer HAL_FMPI2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	115	(++) Abort a master FMPI2C process communication with Interrupt using HAL_FMPI2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	116	(+++) End of abort process, HAL_FMPI2C_AbortCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	117	add his own code by customization of function pointer HAL_FMPI2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	118	(+++) mean HAL_FMPI2C_MasterTxCpltCallback() in case of previous state was master transmit
sahilmgandhi	18:6a4db94011d3	119	(+++) mean HAL_FMPI2C_MasterRxCpltCallback() in case of previous state was master receive
sahilmgandhi	18:6a4db94011d3	120	(++) Enable/disable the Address listen mode in slave FMPI2C mode using HAL_FMPI2C_EnableListen_IT() HAL_FMPI2C_DisableListen_IT()
sahilmgandhi	18:6a4db94011d3	121	(+++) When address slave FMPI2C match, HAL_FMPI2C_AddrCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	122	add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
sahilmgandhi	18:6a4db94011d3	123	(+++) At Listen mode end HAL_FMPI2C_ListenCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	124	add his own code by customization of function pointer HAL_FMPI2C_ListenCpltCallback()
sahilmgandhi	18:6a4db94011d3	125	(++) Sequential transmit in slave FMPI2C mode an amount of data in non-blocking mode using HAL_FMPI2C_Slave_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	126	(+++) At transmission end of current frame transfer, HAL_FMPI2C_SlaveTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	127	add his own code by customization of function pointer HAL_FMPI2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	128	(++) Sequential receive in slave FMPI2C mode an amount of data in non-blocking mode using HAL_FMPI2C_Slave_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	129	(+++) At reception end of current frame transfer, HAL_FMPI2C_SlaveRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	130	add his own code by customization of function pointer HAL_FMPI2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	131	(++) In case of transfer Error, HAL_FMPI2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	132	add his own code by customization of function pointer HAL_FMPI2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	133	(++) Abort a master FMPI2C process communication with Interrupt using HAL_FMPI2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	134	(++) End of abort process, HAL_FMPI2C_AbortCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	135	add his own code by customization of function pointer HAL_FMPI2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	136	(++) Discard a slave FMPI2C process communication using __HAL_FMPI2C_GENERATE_NACK() macro.
sahilmgandhi	18:6a4db94011d3	137	This action will inform Master to generate a Stop condition to discard the communication.
sahilmgandhi	18:6a4db94011d3	138
sahilmgandhi	18:6a4db94011d3	139	* Interrupt mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	140	=======================================
sahilmgandhi	18:6a4db94011d3	141	[..]
sahilmgandhi	18:6a4db94011d3	142	(+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
sahilmgandhi	18:6a4db94011d3	143	HAL_FMPI2C_Mem_Write_IT()
sahilmgandhi	18:6a4db94011d3	144	(+) At Memory end of write transfer, HAL_FMPI2C_MemTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	145	add his own code by customization of function pointer HAL_FMPI2C_MemTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	146	(+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
sahilmgandhi	18:6a4db94011d3	147	HAL_FMPI2C_Mem_Read_IT()
sahilmgandhi	18:6a4db94011d3	148	(+) At Memory end of read transfer, HAL_FMPI2C_MemRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	149	add his own code by customization of function pointer HAL_FMPI2C_MemRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	150	(+) In case of transfer Error, HAL_FMPI2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	151	add his own code by customization of function pointer HAL_FMPI2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	152
sahilmgandhi	18:6a4db94011d3	153	* DMA mode IO operation *
sahilmgandhi	18:6a4db94011d3	154	==============================
sahilmgandhi	18:6a4db94011d3	155	[..]
sahilmgandhi	18:6a4db94011d3	156	(+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	157	HAL_FMPI2C_Master_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	158	(+) At transmission end of transfer, HAL_FMPI2C_MasterTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	159	add his own code by customization of function pointer HAL_FMPI2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	160	(+) Receive in master mode an amount of data in non-blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	161	HAL_FMPI2C_Master_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	162	(+) At reception end of transfer, HAL_FMPI2C_MasterRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	163	add his own code by customization of function pointer HAL_FMPI2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	164	(+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	165	HAL_FMPI2C_Slave_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	166	(+) At transmission end of transfer, HAL_FMPI2C_SlaveTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	167	add his own code by customization of function pointer HAL_FMPI2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	168	(+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	169	HAL_FMPI2C_Slave_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	170	(+) At reception end of transfer, HAL_FMPI2C_SlaveRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	171	add his own code by customization of function pointer HAL_FMPI2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	172	(+) In case of transfer Error, HAL_FMPI2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	173	add his own code by customization of function pointer HAL_FMPI2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	174	(+) Abort a master FMPI2C process communication with Interrupt using HAL_FMPI2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	175	(+) End of abort process, HAL_FMPI2C_MasterRxCpltCallback() or HAL_FMPI2C_MasterTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	176	add his own code by customization of function pointer HAL_FMPI2C_MasterRxCpltCallback() or HAL_FMPI2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	177	(+) Discard a slave FMPI2C process communication using __HAL_FMPI2C_GENERATE_NACK() macro.
sahilmgandhi	18:6a4db94011d3	178	This action will inform Master to generate a Stop condition to discard the communication.
sahilmgandhi	18:6a4db94011d3	179
sahilmgandhi	18:6a4db94011d3	180	* DMA mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	181	=================================
sahilmgandhi	18:6a4db94011d3	182	[..]
sahilmgandhi	18:6a4db94011d3	183	(+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
sahilmgandhi	18:6a4db94011d3	184	HAL_FMPI2C_Mem_Write_DMA()
sahilmgandhi	18:6a4db94011d3	185	(+) At Memory end of write transfer, HAL_FMPI2C_MemTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	186	add his own code by customization of function pointer HAL_FMPI2C_MemTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	187	(+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
sahilmgandhi	18:6a4db94011d3	188	HAL_FMPI2C_Mem_Read_DMA()
sahilmgandhi	18:6a4db94011d3	189	(+) At Memory end of read transfer, HAL_FMPI2C_MemRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	190	add his own code by customization of function pointer HAL_FMPI2C_MemRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	191	(+) In case of transfer Error, HAL_FMPI2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	192	add his own code by customization of function pointer HAL_FMPI2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	193
sahilmgandhi	18:6a4db94011d3	194
sahilmgandhi	18:6a4db94011d3	195	* FMPI2C HAL driver macros list *
sahilmgandhi	18:6a4db94011d3	196	==================================
sahilmgandhi	18:6a4db94011d3	197	[..]
sahilmgandhi	18:6a4db94011d3	198	Below the list of most used macros in FMPI2C HAL driver.
sahilmgandhi	18:6a4db94011d3	199
sahilmgandhi	18:6a4db94011d3	200	(+) __HAL_FMPI2C_ENABLE: Enable the FMPI2C peripheral
sahilmgandhi	18:6a4db94011d3	201	(+) __HAL_FMPI2C_DISABLE: Disable the FMPI2C peripheral
sahilmgandhi	18:6a4db94011d3	202	(+) __HAL_FMPI2C_GENERATE_NACK: Generate a Non-Acknowledge FMPI2C peripheral in Slave mode
sahilmgandhi	18:6a4db94011d3	203	(+) __HAL_FMPI2C_GET_FLAG: Check whether the specified FMPI2C flag is set or not
sahilmgandhi	18:6a4db94011d3	204	(+) __HAL_FMPI2C_CLEAR_FLAG: Clear the specified FMPI2C pending flag
sahilmgandhi	18:6a4db94011d3	205	(+) __HAL_FMPI2C_ENABLE_IT: Enable the specified FMPI2C interrupt
sahilmgandhi	18:6a4db94011d3	206	(+) __HAL_FMPI2C_DISABLE_IT: Disable the specified FMPI2C interrupt
sahilmgandhi	18:6a4db94011d3	207
sahilmgandhi	18:6a4db94011d3	208	[..]
sahilmgandhi	18:6a4db94011d3	209	(@) You can refer to the FMPI2C HAL driver header file for more useful macros
sahilmgandhi	18:6a4db94011d3	210
sahilmgandhi	18:6a4db94011d3	211	@endverbatim
sahilmgandhi	18:6a4db94011d3	212	******************************************************************************
sahilmgandhi	18:6a4db94011d3	213	* @attention
sahilmgandhi	18:6a4db94011d3	214	*
sahilmgandhi	18:6a4db94011d3	215	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi	18:6a4db94011d3	216	*
sahilmgandhi	18:6a4db94011d3	217	* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi	18:6a4db94011d3	218	* are permitted provided that the following conditions are met:
sahilmgandhi	18:6a4db94011d3	219	* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi	18:6a4db94011d3	220	* this list of conditions and the following disclaimer.
sahilmgandhi	18:6a4db94011d3	221	* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi	18:6a4db94011d3	222	* this list of conditions and the following disclaimer in the documentation
sahilmgandhi	18:6a4db94011d3	223	* and/or other materials provided with the distribution.
sahilmgandhi	18:6a4db94011d3	224	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi	18:6a4db94011d3	225	* may be used to endorse or promote products derived from this software
sahilmgandhi	18:6a4db94011d3	226	* without specific prior written permission.
sahilmgandhi	18:6a4db94011d3	227	*
sahilmgandhi	18:6a4db94011d3	228	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi	18:6a4db94011d3	229	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi	18:6a4db94011d3	230	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi	18:6a4db94011d3	231	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi	18:6a4db94011d3	232	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi	18:6a4db94011d3	233	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi	18:6a4db94011d3	234	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi	18:6a4db94011d3	235	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi	18:6a4db94011d3	236	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi	18:6a4db94011d3	237	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi	18:6a4db94011d3	238	*
sahilmgandhi	18:6a4db94011d3	239	******************************************************************************
sahilmgandhi	18:6a4db94011d3	240	*/
sahilmgandhi	18:6a4db94011d3	241
sahilmgandhi	18:6a4db94011d3	242	/* Includes ------------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	243	#include "stm32f4xx_hal.h"
sahilmgandhi	18:6a4db94011d3	244
sahilmgandhi	18:6a4db94011d3	245	/** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi	18:6a4db94011d3	246	* @{
sahilmgandhi	18:6a4db94011d3	247	*/
sahilmgandhi	18:6a4db94011d3	248
sahilmgandhi	18:6a4db94011d3	249	/** @defgroup FMPI2C FMPI2C
sahilmgandhi	18:6a4db94011d3	250	* @brief FMPI2C HAL module driver
sahilmgandhi	18:6a4db94011d3	251	* @{
sahilmgandhi	18:6a4db94011d3	252	*/
sahilmgandhi	18:6a4db94011d3	253
sahilmgandhi	18:6a4db94011d3	254	#ifdef HAL_FMPI2C_MODULE_ENABLED
sahilmgandhi	18:6a4db94011d3	255
sahilmgandhi	18:6a4db94011d3	256	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\| defined(STM32F446xx) \|\| defined(STM32F412Zx) \|\|\
sahilmgandhi	18:6a4db94011d3	257	defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx)
sahilmgandhi	18:6a4db94011d3	258
sahilmgandhi	18:6a4db94011d3	259	/* Private typedef -----------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	260	/* Private define ------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	261
sahilmgandhi	18:6a4db94011d3	262	/** @defgroup FMPI2C_Private_Define FMPI2C Private Define
sahilmgandhi	18:6a4db94011d3	263	* @{
sahilmgandhi	18:6a4db94011d3	264	*/
sahilmgandhi	18:6a4db94011d3	265	#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFFU) /!< FMPI2C TIMING clear register Mask /
sahilmgandhi	18:6a4db94011d3	266	#define FMPI2C_TIMEOUT_ADDR ((uint32_t)10000U) /!< 10 s /
sahilmgandhi	18:6a4db94011d3	267	#define FMPI2C_TIMEOUT_BUSY ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	268	#define FMPI2C_TIMEOUT_DIR ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	269	#define FMPI2C_TIMEOUT_RXNE ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	270	#define FMPI2C_TIMEOUT_STOPF ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	271	#define FMPI2C_TIMEOUT_TC ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	272	#define FMPI2C_TIMEOUT_TCR ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	273	#define FMPI2C_TIMEOUT_TXIS ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	274	#define FMPI2C_TIMEOUT_FLAG ((uint32_t)25U) /!< 25 ms /
sahilmgandhi	18:6a4db94011d3	275
sahilmgandhi	18:6a4db94011d3	276	#define MAX_NBYTE_SIZE 255U
sahilmgandhi	18:6a4db94011d3	277	#define SlaveAddr_SHIFT 7U
sahilmgandhi	18:6a4db94011d3	278	#define SlaveAddr_MSK 0x06U
sahilmgandhi	18:6a4db94011d3	279
sahilmgandhi	18:6a4db94011d3	280	/* Private define for @ref PreviousState usage */
sahilmgandhi	18:6a4db94011d3	281	#define FMPI2C_STATE_MSK ((uint32_t)((HAL_FMPI2C_STATE_BUSY_TX \| HAL_FMPI2C_STATE_BUSY_RX) & (~HAL_FMPI2C_STATE_READY))) /!< Mask State define, keep only RX and TX bits /
sahilmgandhi	18:6a4db94011d3	282	#define FMPI2C_STATE_NONE ((uint32_t)(HAL_FMPI2C_MODE_NONE)) /!< Default Value /
sahilmgandhi	18:6a4db94011d3	283	#define FMPI2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_FMPI2C_STATE_BUSY_TX & FMPI2C_STATE_MSK) \| HAL_FMPI2C_MODE_MASTER)) /!< Master Busy TX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	284	#define FMPI2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_FMPI2C_STATE_BUSY_RX & FMPI2C_STATE_MSK) \| HAL_FMPI2C_MODE_MASTER)) /!< Master Busy RX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	285	#define FMPI2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_FMPI2C_STATE_BUSY_TX & FMPI2C_STATE_MSK) \| HAL_FMPI2C_MODE_SLAVE)) /!< Slave Busy TX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	286	#define FMPI2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_FMPI2C_STATE_BUSY_RX & FMPI2C_STATE_MSK) \| HAL_FMPI2C_MODE_SLAVE)) /!< Slave Busy RX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	287	#define FMPI2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_FMPI2C_STATE_BUSY_TX & FMPI2C_STATE_MSK) \| HAL_FMPI2C_MODE_MEM)) /!< Memory Busy TX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	288	#define FMPI2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_FMPI2C_STATE_BUSY_RX & FMPI2C_STATE_MSK) \| HAL_FMPI2C_MODE_MEM)) /!< Memory Busy RX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	289
sahilmgandhi	18:6a4db94011d3	290
sahilmgandhi	18:6a4db94011d3	291	/* Private define to centralize the enable/disable of Interrupts */
sahilmgandhi	18:6a4db94011d3	292	#define FMPI2C_XFER_TX_IT ((uint32_t)0x00000001U)
sahilmgandhi	18:6a4db94011d3	293	#define FMPI2C_XFER_RX_IT ((uint32_t)0x00000002U)
sahilmgandhi	18:6a4db94011d3	294	#define FMPI2C_XFER_LISTEN_IT ((uint32_t)0x00000004U)
sahilmgandhi	18:6a4db94011d3	295
sahilmgandhi	18:6a4db94011d3	296	#define FMPI2C_XFER_ERROR_IT ((uint32_t)0x00000011U)
sahilmgandhi	18:6a4db94011d3	297	#define FMPI2C_XFER_CPLT_IT ((uint32_t)0x00000012U)
sahilmgandhi	18:6a4db94011d3	298	#define FMPI2C_XFER_RELOAD_IT ((uint32_t)0x00000012U)
sahilmgandhi	18:6a4db94011d3	299	/**
sahilmgandhi	18:6a4db94011d3	300	* @}
sahilmgandhi	18:6a4db94011d3	301	*/
sahilmgandhi	18:6a4db94011d3	302
sahilmgandhi	18:6a4db94011d3	303	/* Private macro -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	304	#define FMPI2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_FMPI2C_STATE_BUSY_TX) ? \
sahilmgandhi	18:6a4db94011d3	305	((uint32_t)((__HANDLE__)->hdmatx->Instance->NDTR)) : \
sahilmgandhi	18:6a4db94011d3	306	((uint32_t)((__HANDLE__)->hdmarx->Instance->NDTR)))
sahilmgandhi	18:6a4db94011d3	307
sahilmgandhi	18:6a4db94011d3	308	/* Private variables ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	309	/* Private function prototypes -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	310
sahilmgandhi	18:6a4db94011d3	311	/** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions
sahilmgandhi	18:6a4db94011d3	312	* @{
sahilmgandhi	18:6a4db94011d3	313	*/
sahilmgandhi	18:6a4db94011d3	314	/* Private functions to handle DMA transfer */
sahilmgandhi	18:6a4db94011d3	315	static void FMPI2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	316	static void FMPI2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	317	static void FMPI2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	318	static void FMPI2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	319	static void FMPI2C_DMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	320	static void FMPI2C_DMAAbort(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	321
sahilmgandhi	18:6a4db94011d3	322	/* Private functions to handle IT transfer */
sahilmgandhi	18:6a4db94011d3	323	static void FMPI2C_ITAddrCplt (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags);
sahilmgandhi	18:6a4db94011d3	324	static void FMPI2C_ITMasterSequentialCplt (FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi	18:6a4db94011d3	325	static void FMPI2C_ITSlaveSequentialCplt (FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi	18:6a4db94011d3	326	static void FMPI2C_ITMasterCplt (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags);
sahilmgandhi	18:6a4db94011d3	327	static void FMPI2C_ITSlaveCplt (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags);
sahilmgandhi	18:6a4db94011d3	328	static void FMPI2C_ITListenCplt (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags);
sahilmgandhi	18:6a4db94011d3	329	static void FMPI2C_ITError (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags);
sahilmgandhi	18:6a4db94011d3	330
sahilmgandhi	18:6a4db94011d3	331	/* Private functions to handle IT transfer */
sahilmgandhi	18:6a4db94011d3	332	static HAL_StatusTypeDef FMPI2C_RequestMemoryWrite (FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	333	static HAL_StatusTypeDef FMPI2C_RequestMemoryRead (FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	334
sahilmgandhi	18:6a4db94011d3	335	/* Private functions for FMPI2C transfer IRQ handler */
sahilmgandhi	18:6a4db94011d3	336	static HAL_StatusTypeDef FMPI2C_Master_ISR_IT(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);
sahilmgandhi	18:6a4db94011d3	337	static HAL_StatusTypeDef FMPI2C_Slave_ISR_IT(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);
sahilmgandhi	18:6a4db94011d3	338	static HAL_StatusTypeDef FMPI2C_Master_ISR_DMA(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);
sahilmgandhi	18:6a4db94011d3	339	static HAL_StatusTypeDef FMPI2C_Slave_ISR_DMA(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);
sahilmgandhi	18:6a4db94011d3	340
sahilmgandhi	18:6a4db94011d3	341	/* Private functions to handle flags during polling transfer */
sahilmgandhi	18:6a4db94011d3	342	static HAL_StatusTypeDef FMPI2C_WaitOnFlagUntilTimeout (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	343	static HAL_StatusTypeDef FMPI2C_WaitOnTXISFlagUntilTimeout (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	344	static HAL_StatusTypeDef FMPI2C_WaitOnRXNEFlagUntilTimeout (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	345	static HAL_StatusTypeDef FMPI2C_WaitOnSTOPFlagUntilTimeout (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	346	static HAL_StatusTypeDef FMPI2C_IsAcknowledgeFailed (FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	347
sahilmgandhi	18:6a4db94011d3	348	/* Private functions to centralize the enable/disable of Interrupts */
sahilmgandhi	18:6a4db94011d3	349	static HAL_StatusTypeDef FMPI2C_Enable_IRQ (FMPI2C_HandleTypeDef *hfmpi2c, uint16_t InterruptRequest);
sahilmgandhi	18:6a4db94011d3	350	static HAL_StatusTypeDef FMPI2C_Disable_IRQ (FMPI2C_HandleTypeDef *hfmpi2c, uint16_t InterruptRequest);
sahilmgandhi	18:6a4db94011d3	351
sahilmgandhi	18:6a4db94011d3	352	/* Private functions to flush TXDR register */
sahilmgandhi	18:6a4db94011d3	353	static void FMPI2C_Flush_TXDR (FMPI2C_HandleTypeDef *hfmpi2c);
sahilmgandhi	18:6a4db94011d3	354
sahilmgandhi	18:6a4db94011d3	355	/* Private functions to handle start, restart or stop a transfer */
sahilmgandhi	18:6a4db94011d3	356	static void FMPI2C_TransferConfig (FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
sahilmgandhi	18:6a4db94011d3	357	/**
sahilmgandhi	18:6a4db94011d3	358	* @}
sahilmgandhi	18:6a4db94011d3	359	*/
sahilmgandhi	18:6a4db94011d3	360
sahilmgandhi	18:6a4db94011d3	361	/* Exported functions --------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	362
sahilmgandhi	18:6a4db94011d3	363	/** @defgroup FMPI2C_Exported_Functions FMPI2C Exported Functions
sahilmgandhi	18:6a4db94011d3	364	* @{
sahilmgandhi	18:6a4db94011d3	365	*/
sahilmgandhi	18:6a4db94011d3	366
sahilmgandhi	18:6a4db94011d3	367	/** @defgroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	368	* @brief Initialization and Configuration functions
sahilmgandhi	18:6a4db94011d3	369	*
sahilmgandhi	18:6a4db94011d3	370	@verbatim
sahilmgandhi	18:6a4db94011d3	371	===============================================================================
sahilmgandhi	18:6a4db94011d3	372	##### Initialization and de-initialization functions #####
sahilmgandhi	18:6a4db94011d3	373	===============================================================================
sahilmgandhi	18:6a4db94011d3	374	[..] This subsection provides a set of functions allowing to initialize and
sahilmgandhi	18:6a4db94011d3	375	deinitialize the FMPI2Cx peripheral:
sahilmgandhi	18:6a4db94011d3	376
sahilmgandhi	18:6a4db94011d3	377	(+) User must Implement HAL_FMPI2C_MspInit() function in which he configures
sahilmgandhi	18:6a4db94011d3	378	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
sahilmgandhi	18:6a4db94011d3	379
sahilmgandhi	18:6a4db94011d3	380	(+) Call the function HAL_FMPI2C_Init() to configure the selected device with
sahilmgandhi	18:6a4db94011d3	381	the selected configuration:
sahilmgandhi	18:6a4db94011d3	382	(++) Clock Timing
sahilmgandhi	18:6a4db94011d3	383	(++) Own Address 1
sahilmgandhi	18:6a4db94011d3	384	(++) Addressing mode (Master, Slave)
sahilmgandhi	18:6a4db94011d3	385	(++) Dual Addressing mode
sahilmgandhi	18:6a4db94011d3	386	(++) Own Address 2
sahilmgandhi	18:6a4db94011d3	387	(++) Own Address 2 Mask
sahilmgandhi	18:6a4db94011d3	388	(++) General call mode
sahilmgandhi	18:6a4db94011d3	389	(++) Nostretch mode
sahilmgandhi	18:6a4db94011d3	390
sahilmgandhi	18:6a4db94011d3	391	(+) Call the function HAL_FMPI2C_DeInit() to restore the default configuration
sahilmgandhi	18:6a4db94011d3	392	of the selected FMPI2Cx peripheral.
sahilmgandhi	18:6a4db94011d3	393
sahilmgandhi	18:6a4db94011d3	394	@endverbatim
sahilmgandhi	18:6a4db94011d3	395	* @{
sahilmgandhi	18:6a4db94011d3	396	*/
sahilmgandhi	18:6a4db94011d3	397
sahilmgandhi	18:6a4db94011d3	398	/**
sahilmgandhi	18:6a4db94011d3	399	* @brief Initializes the FMPI2C according to the specified parameters
sahilmgandhi	18:6a4db94011d3	400	* in the FMPI2C_InitTypeDef and initialize the associated handle.
sahilmgandhi	18:6a4db94011d3	401	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	402	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	403	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	404	*/
sahilmgandhi	18:6a4db94011d3	405	HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	406	{
sahilmgandhi	18:6a4db94011d3	407	/* Check the FMPI2C handle allocation */
sahilmgandhi	18:6a4db94011d3	408	if(hfmpi2c == NULL)
sahilmgandhi	18:6a4db94011d3	409	{
sahilmgandhi	18:6a4db94011d3	410	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	411	}
sahilmgandhi	18:6a4db94011d3	412
sahilmgandhi	18:6a4db94011d3	413	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	414	assert_param(IS_FMPI2C_ALL_INSTANCE(hfmpi2c->Instance));
sahilmgandhi	18:6a4db94011d3	415	assert_param(IS_FMPI2C_OWN_ADDRESS1(hfmpi2c->Init.OwnAddress1));
sahilmgandhi	18:6a4db94011d3	416	assert_param(IS_FMPI2C_ADDRESSING_MODE(hfmpi2c->Init.AddressingMode));
sahilmgandhi	18:6a4db94011d3	417	assert_param(IS_FMPI2C_DUAL_ADDRESS(hfmpi2c->Init.DualAddressMode));
sahilmgandhi	18:6a4db94011d3	418	assert_param(IS_FMPI2C_OWN_ADDRESS2(hfmpi2c->Init.OwnAddress2));
sahilmgandhi	18:6a4db94011d3	419	assert_param(IS_FMPI2C_OWN_ADDRESS2_MASK(hfmpi2c->Init.OwnAddress2Masks));
sahilmgandhi	18:6a4db94011d3	420	assert_param(IS_FMPI2C_GENERAL_CALL(hfmpi2c->Init.GeneralCallMode));
sahilmgandhi	18:6a4db94011d3	421	assert_param(IS_FMPI2C_NO_STRETCH(hfmpi2c->Init.NoStretchMode));
sahilmgandhi	18:6a4db94011d3	422
sahilmgandhi	18:6a4db94011d3	423	if(hfmpi2c->State == HAL_FMPI2C_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	424	{
sahilmgandhi	18:6a4db94011d3	425	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	426	hfmpi2c->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	427
sahilmgandhi	18:6a4db94011d3	428	/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
sahilmgandhi	18:6a4db94011d3	429	HAL_FMPI2C_MspInit(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	430	}
sahilmgandhi	18:6a4db94011d3	431
sahilmgandhi	18:6a4db94011d3	432	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	433
sahilmgandhi	18:6a4db94011d3	434	/* Disable the selected FMPI2C peripheral */
sahilmgandhi	18:6a4db94011d3	435	__HAL_FMPI2C_DISABLE(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	436
sahilmgandhi	18:6a4db94011d3	437	/---------------------------- FMPI2Cx TIMINGR Configuration ------------------/
sahilmgandhi	18:6a4db94011d3	438	/* Configure FMPI2Cx: Frequency range */
sahilmgandhi	18:6a4db94011d3	439	hfmpi2c->Instance->TIMINGR = hfmpi2c->Init.Timing & TIMING_CLEAR_MASK;
sahilmgandhi	18:6a4db94011d3	440
sahilmgandhi	18:6a4db94011d3	441	/---------------------------- FMPI2Cx OAR1 Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	442	/* Configure FMPI2Cx: Own Address1 and ack own address1 mode */
sahilmgandhi	18:6a4db94011d3	443	hfmpi2c->Instance->OAR1 &= ~FMPI2C_OAR1_OA1EN;
sahilmgandhi	18:6a4db94011d3	444	if(hfmpi2c->Init.OwnAddress1 != 0U)
sahilmgandhi	18:6a4db94011d3	445	{
sahilmgandhi	18:6a4db94011d3	446	if(hfmpi2c->Init.AddressingMode == FMPI2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	447	{
sahilmgandhi	18:6a4db94011d3	448	hfmpi2c->Instance->OAR1 = (FMPI2C_OAR1_OA1EN \| hfmpi2c->Init.OwnAddress1);
sahilmgandhi	18:6a4db94011d3	449	}
sahilmgandhi	18:6a4db94011d3	450	else /* FMPI2C_ADDRESSINGMODE_10BIT */
sahilmgandhi	18:6a4db94011d3	451	{
sahilmgandhi	18:6a4db94011d3	452	hfmpi2c->Instance->OAR1 = (FMPI2C_OAR1_OA1EN \| FMPI2C_OAR1_OA1MODE \| hfmpi2c->Init.OwnAddress1);
sahilmgandhi	18:6a4db94011d3	453	}
sahilmgandhi	18:6a4db94011d3	454	}
sahilmgandhi	18:6a4db94011d3	455
sahilmgandhi	18:6a4db94011d3	456	/---------------------------- FMPI2Cx CR2 Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	457	/* Configure FMPI2Cx: Addressing Master mode */
sahilmgandhi	18:6a4db94011d3	458	if(hfmpi2c->Init.AddressingMode == FMPI2C_ADDRESSINGMODE_10BIT)
sahilmgandhi	18:6a4db94011d3	459	{
sahilmgandhi	18:6a4db94011d3	460	hfmpi2c->Instance->CR2 = (FMPI2C_CR2_ADD10);
sahilmgandhi	18:6a4db94011d3	461	}
sahilmgandhi	18:6a4db94011d3	462	/* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
sahilmgandhi	18:6a4db94011d3	463	hfmpi2c->Instance->CR2 \|= (FMPI2C_CR2_AUTOEND \| FMPI2C_CR2_NACK);
sahilmgandhi	18:6a4db94011d3	464
sahilmgandhi	18:6a4db94011d3	465	/---------------------------- FMPI2Cx OAR2 Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	466	/* Configure FMPI2Cx: Dual mode and Own Address2 */
sahilmgandhi	18:6a4db94011d3	467	hfmpi2c->Instance->OAR2 = (hfmpi2c->Init.DualAddressMode \| hfmpi2c->Init.OwnAddress2 \| (hfmpi2c->Init.OwnAddress2Masks << 8));
sahilmgandhi	18:6a4db94011d3	468
sahilmgandhi	18:6a4db94011d3	469	/---------------------------- FMPI2Cx CR1 Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	470	/* Configure FMPI2Cx: Generalcall and NoStretch mode */
sahilmgandhi	18:6a4db94011d3	471	hfmpi2c->Instance->CR1 = (hfmpi2c->Init.GeneralCallMode \| hfmpi2c->Init.NoStretchMode);
sahilmgandhi	18:6a4db94011d3	472
sahilmgandhi	18:6a4db94011d3	473	/* Enable the selected FMPI2C peripheral */
sahilmgandhi	18:6a4db94011d3	474	__HAL_FMPI2C_ENABLE(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	475
sahilmgandhi	18:6a4db94011d3	476	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	477	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	478	hfmpi2c->PreviousState = FMPI2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	479	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	480
sahilmgandhi	18:6a4db94011d3	481	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	482	}
sahilmgandhi	18:6a4db94011d3	483
sahilmgandhi	18:6a4db94011d3	484	/**
sahilmgandhi	18:6a4db94011d3	485	* @brief DeInitialize the FMPI2C peripheral.
sahilmgandhi	18:6a4db94011d3	486	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	487	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	488	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	489	*/
sahilmgandhi	18:6a4db94011d3	490	HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	491	{
sahilmgandhi	18:6a4db94011d3	492	/* Check the FMPI2C handle allocation */
sahilmgandhi	18:6a4db94011d3	493	if(hfmpi2c == NULL)
sahilmgandhi	18:6a4db94011d3	494	{
sahilmgandhi	18:6a4db94011d3	495	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	496	}
sahilmgandhi	18:6a4db94011d3	497
sahilmgandhi	18:6a4db94011d3	498	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	499	assert_param(IS_FMPI2C_ALL_INSTANCE(hfmpi2c->Instance));
sahilmgandhi	18:6a4db94011d3	500
sahilmgandhi	18:6a4db94011d3	501	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	502
sahilmgandhi	18:6a4db94011d3	503	/* Disable the FMPI2C Peripheral Clock */
sahilmgandhi	18:6a4db94011d3	504	__HAL_FMPI2C_DISABLE(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	505
sahilmgandhi	18:6a4db94011d3	506	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
sahilmgandhi	18:6a4db94011d3	507	HAL_FMPI2C_MspDeInit(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	508
sahilmgandhi	18:6a4db94011d3	509	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	510	hfmpi2c->State = HAL_FMPI2C_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	511	hfmpi2c->PreviousState = FMPI2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	512	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	513
sahilmgandhi	18:6a4db94011d3	514	/* Release Lock */
sahilmgandhi	18:6a4db94011d3	515	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	516
sahilmgandhi	18:6a4db94011d3	517	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	518	}
sahilmgandhi	18:6a4db94011d3	519
sahilmgandhi	18:6a4db94011d3	520	/**
sahilmgandhi	18:6a4db94011d3	521	* @brief Initialize the FMPI2C MSP.
sahilmgandhi	18:6a4db94011d3	522	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	523	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	524	* @retval None
sahilmgandhi	18:6a4db94011d3	525	*/
sahilmgandhi	18:6a4db94011d3	526	__weak void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	527	{
sahilmgandhi	18:6a4db94011d3	528	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	529	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	530
sahilmgandhi	18:6a4db94011d3	531	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	532	the HAL_FMPI2C_MspInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	533	*/
sahilmgandhi	18:6a4db94011d3	534	}
sahilmgandhi	18:6a4db94011d3	535
sahilmgandhi	18:6a4db94011d3	536	/**
sahilmgandhi	18:6a4db94011d3	537	* @brief DeInitialize the FMPI2C MSP.
sahilmgandhi	18:6a4db94011d3	538	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	539	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	540	* @retval None
sahilmgandhi	18:6a4db94011d3	541	*/
sahilmgandhi	18:6a4db94011d3	542	__weak void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	543	{
sahilmgandhi	18:6a4db94011d3	544	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	545	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	546
sahilmgandhi	18:6a4db94011d3	547	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	548	the HAL_FMPI2C_MspDeInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	549	*/
sahilmgandhi	18:6a4db94011d3	550	}
sahilmgandhi	18:6a4db94011d3	551
sahilmgandhi	18:6a4db94011d3	552	/**
sahilmgandhi	18:6a4db94011d3	553	* @}
sahilmgandhi	18:6a4db94011d3	554	*/
sahilmgandhi	18:6a4db94011d3	555
sahilmgandhi	18:6a4db94011d3	556	/** @defgroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions
sahilmgandhi	18:6a4db94011d3	557	* @brief Data transfers functions
sahilmgandhi	18:6a4db94011d3	558	*
sahilmgandhi	18:6a4db94011d3	559	@verbatim
sahilmgandhi	18:6a4db94011d3	560	===============================================================================
sahilmgandhi	18:6a4db94011d3	561	##### IO operation functions #####
sahilmgandhi	18:6a4db94011d3	562	===============================================================================
sahilmgandhi	18:6a4db94011d3	563	[..]
sahilmgandhi	18:6a4db94011d3	564	This subsection provides a set of functions allowing to manage the FMPI2C data
sahilmgandhi	18:6a4db94011d3	565	transfers.
sahilmgandhi	18:6a4db94011d3	566
sahilmgandhi	18:6a4db94011d3	567	(#) There are two modes of transfer:
sahilmgandhi	18:6a4db94011d3	568	(++) Blocking mode : The communication is performed in the polling mode.
sahilmgandhi	18:6a4db94011d3	569	The status of all data processing is returned by the same function
sahilmgandhi	18:6a4db94011d3	570	after finishing transfer.
sahilmgandhi	18:6a4db94011d3	571	(++) No-Blocking mode : The communication is performed using Interrupts
sahilmgandhi	18:6a4db94011d3	572	or DMA. These functions return the status of the transfer startup.
sahilmgandhi	18:6a4db94011d3	573	The end of the data processing will be indicated through the
sahilmgandhi	18:6a4db94011d3	574	dedicated FMPI2C IRQ when using Interrupt mode or the DMA IRQ when
sahilmgandhi	18:6a4db94011d3	575	using DMA mode.
sahilmgandhi	18:6a4db94011d3	576
sahilmgandhi	18:6a4db94011d3	577	(#) Blocking mode functions are :
sahilmgandhi	18:6a4db94011d3	578	(++) HAL_FMPI2C_Master_Transmit()
sahilmgandhi	18:6a4db94011d3	579	(++) HAL_FMPI2C_Master_Receive()
sahilmgandhi	18:6a4db94011d3	580	(++) HAL_FMPI2C_Slave_Transmit()
sahilmgandhi	18:6a4db94011d3	581	(++) HAL_FMPI2C_Slave_Receive()
sahilmgandhi	18:6a4db94011d3	582	(++) HAL_FMPI2C_Mem_Write()
sahilmgandhi	18:6a4db94011d3	583	(++) HAL_FMPI2C_Mem_Read()
sahilmgandhi	18:6a4db94011d3	584	(++) HAL_FMPI2C_IsDeviceReady()
sahilmgandhi	18:6a4db94011d3	585
sahilmgandhi	18:6a4db94011d3	586	(#) No-Blocking mode functions with Interrupt are :
sahilmgandhi	18:6a4db94011d3	587	(++) HAL_FMPI2C_Master_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	588	(++) HAL_FMPI2C_Master_Receive_IT()
sahilmgandhi	18:6a4db94011d3	589	(++) HAL_FMPI2C_Slave_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	590	(++) HAL_FMPI2C_Slave_Receive_IT()
sahilmgandhi	18:6a4db94011d3	591	(++) HAL_FMPI2C_Master_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	592	(++) HAL_FMPI2C_Master_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	593	(++) HAL_FMPI2C_Slave_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	594	(++) HAL_FMPI2C_Slave_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	595	(++) HAL_FMPI2C_Mem_Write_IT()
sahilmgandhi	18:6a4db94011d3	596	(++) HAL_FMPI2C_Mem_Read_IT()
sahilmgandhi	18:6a4db94011d3	597
sahilmgandhi	18:6a4db94011d3	598	(#) No-Blocking mode functions with DMA are :
sahilmgandhi	18:6a4db94011d3	599	(++) HAL_FMPI2C_Master_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	600	(++) HAL_FMPI2C_Master_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	601	(++) HAL_FMPI2C_Slave_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	602	(++) HAL_FMPI2C_Slave_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	603	(++) HAL_FMPI2C_Mem_Write_DMA()
sahilmgandhi	18:6a4db94011d3	604	(++) HAL_FMPI2C_Mem_Read_DMA()
sahilmgandhi	18:6a4db94011d3	605
sahilmgandhi	18:6a4db94011d3	606	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
sahilmgandhi	18:6a4db94011d3	607	(++) HAL_FMPI2C_MemTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	608	(++) HAL_FMPI2C_MemRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	609	(++) HAL_FMPI2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	610	(++) HAL_FMPI2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	611	(++) HAL_FMPI2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	612	(++) HAL_FMPI2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	613	(++) HAL_FMPI2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	614	(++) HAL_FMPI2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	615
sahilmgandhi	18:6a4db94011d3	616	@endverbatim
sahilmgandhi	18:6a4db94011d3	617	* @{
sahilmgandhi	18:6a4db94011d3	618	*/
sahilmgandhi	18:6a4db94011d3	619
sahilmgandhi	18:6a4db94011d3	620	/**
sahilmgandhi	18:6a4db94011d3	621	* @brief Transmits in master mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	622	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	623	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	624	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	625	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	626	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	627	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	628	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	629	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	630	*/
sahilmgandhi	18:6a4db94011d3	631	HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	632	{
sahilmgandhi	18:6a4db94011d3	633	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	634
sahilmgandhi	18:6a4db94011d3	635	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	636	{
sahilmgandhi	18:6a4db94011d3	637	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	638	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	639
sahilmgandhi	18:6a4db94011d3	640	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	641	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	642
sahilmgandhi	18:6a4db94011d3	643	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_BUSY, SET, FMPI2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	644	{
sahilmgandhi	18:6a4db94011d3	645	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	646	}
sahilmgandhi	18:6a4db94011d3	647
sahilmgandhi	18:6a4db94011d3	648	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	649	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	650	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	651
sahilmgandhi	18:6a4db94011d3	652	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	653	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	654	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	655	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	656
sahilmgandhi	18:6a4db94011d3	657	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	658	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	659	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	660	{
sahilmgandhi	18:6a4db94011d3	661	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	662	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_GENERATE_START_WRITE);
sahilmgandhi	18:6a4db94011d3	663	}
sahilmgandhi	18:6a4db94011d3	664	else
sahilmgandhi	18:6a4db94011d3	665	{
sahilmgandhi	18:6a4db94011d3	666	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	667	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_GENERATE_START_WRITE);
sahilmgandhi	18:6a4db94011d3	668	}
sahilmgandhi	18:6a4db94011d3	669
sahilmgandhi	18:6a4db94011d3	670	while(hfmpi2c->XferSize > 0)
sahilmgandhi	18:6a4db94011d3	671	{
sahilmgandhi	18:6a4db94011d3	672	/* Wait until TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	673	if(FMPI2C_WaitOnTXISFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	674	{
sahilmgandhi	18:6a4db94011d3	675	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	676	{
sahilmgandhi	18:6a4db94011d3	677	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	678	}
sahilmgandhi	18:6a4db94011d3	679	else
sahilmgandhi	18:6a4db94011d3	680	{
sahilmgandhi	18:6a4db94011d3	681	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	682	}
sahilmgandhi	18:6a4db94011d3	683	}
sahilmgandhi	18:6a4db94011d3	684	/* Write data to TXDR */
sahilmgandhi	18:6a4db94011d3	685	hfmpi2c->Instance->TXDR = (*hfmpi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	686	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	687	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	688
sahilmgandhi	18:6a4db94011d3	689	if((hfmpi2c->XferSize == 0) && (hfmpi2c->XferCount!=0))
sahilmgandhi	18:6a4db94011d3	690	{
sahilmgandhi	18:6a4db94011d3	691	/* Wait until TCR flag is set */
sahilmgandhi	18:6a4db94011d3	692	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	693	{
sahilmgandhi	18:6a4db94011d3	694	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	695	}
sahilmgandhi	18:6a4db94011d3	696
sahilmgandhi	18:6a4db94011d3	697	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	698	{
sahilmgandhi	18:6a4db94011d3	699	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	700	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	701	}
sahilmgandhi	18:6a4db94011d3	702	else
sahilmgandhi	18:6a4db94011d3	703	{
sahilmgandhi	18:6a4db94011d3	704	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	705	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	706	}
sahilmgandhi	18:6a4db94011d3	707	}
sahilmgandhi	18:6a4db94011d3	708	}
sahilmgandhi	18:6a4db94011d3	709
sahilmgandhi	18:6a4db94011d3	710	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
sahilmgandhi	18:6a4db94011d3	711	/* Wait until STOPF flag is set */
sahilmgandhi	18:6a4db94011d3	712	if(FMPI2C_WaitOnSTOPFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	713	{
sahilmgandhi	18:6a4db94011d3	714	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	715	{
sahilmgandhi	18:6a4db94011d3	716	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	717	}
sahilmgandhi	18:6a4db94011d3	718	else
sahilmgandhi	18:6a4db94011d3	719	{
sahilmgandhi	18:6a4db94011d3	720	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	721	}
sahilmgandhi	18:6a4db94011d3	722	}
sahilmgandhi	18:6a4db94011d3	723
sahilmgandhi	18:6a4db94011d3	724	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	725	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	726
sahilmgandhi	18:6a4db94011d3	727	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	728	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	729
sahilmgandhi	18:6a4db94011d3	730	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	731	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	732
sahilmgandhi	18:6a4db94011d3	733	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	734	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	735
sahilmgandhi	18:6a4db94011d3	736	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	737	}
sahilmgandhi	18:6a4db94011d3	738	else
sahilmgandhi	18:6a4db94011d3	739	{
sahilmgandhi	18:6a4db94011d3	740	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	741	}
sahilmgandhi	18:6a4db94011d3	742	}
sahilmgandhi	18:6a4db94011d3	743
sahilmgandhi	18:6a4db94011d3	744	/**
sahilmgandhi	18:6a4db94011d3	745	* @brief Receives in master mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	746	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	747	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	748	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	749	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	750	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	751	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	752	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	753	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	754	*/
sahilmgandhi	18:6a4db94011d3	755	HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	756	{
sahilmgandhi	18:6a4db94011d3	757	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	758
sahilmgandhi	18:6a4db94011d3	759	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	760	{
sahilmgandhi	18:6a4db94011d3	761	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	762	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	763
sahilmgandhi	18:6a4db94011d3	764	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	765	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	766
sahilmgandhi	18:6a4db94011d3	767	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_BUSY, SET, FMPI2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	768	{
sahilmgandhi	18:6a4db94011d3	769	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	770	}
sahilmgandhi	18:6a4db94011d3	771
sahilmgandhi	18:6a4db94011d3	772	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	773	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	774	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	775
sahilmgandhi	18:6a4db94011d3	776	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	777	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	778	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	779	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	780
sahilmgandhi	18:6a4db94011d3	781	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	782	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	783	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	784	{
sahilmgandhi	18:6a4db94011d3	785	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	786	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	787	}
sahilmgandhi	18:6a4db94011d3	788	else
sahilmgandhi	18:6a4db94011d3	789	{
sahilmgandhi	18:6a4db94011d3	790	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	791	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	792	}
sahilmgandhi	18:6a4db94011d3	793
sahilmgandhi	18:6a4db94011d3	794	while(hfmpi2c->XferSize > 0)
sahilmgandhi	18:6a4db94011d3	795	{
sahilmgandhi	18:6a4db94011d3	796	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	797	if(FMPI2C_WaitOnRXNEFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	798	{
sahilmgandhi	18:6a4db94011d3	799	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	800	{
sahilmgandhi	18:6a4db94011d3	801	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	802	}
sahilmgandhi	18:6a4db94011d3	803	else
sahilmgandhi	18:6a4db94011d3	804	{
sahilmgandhi	18:6a4db94011d3	805	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	806	}
sahilmgandhi	18:6a4db94011d3	807	}
sahilmgandhi	18:6a4db94011d3	808
sahilmgandhi	18:6a4db94011d3	809	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	810	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	811	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	812	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	813
sahilmgandhi	18:6a4db94011d3	814	if((hfmpi2c->XferSize == 0) && (hfmpi2c->XferCount != 0))
sahilmgandhi	18:6a4db94011d3	815	{
sahilmgandhi	18:6a4db94011d3	816	/* Wait until TCR flag is set */
sahilmgandhi	18:6a4db94011d3	817	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	818	{
sahilmgandhi	18:6a4db94011d3	819	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	820	}
sahilmgandhi	18:6a4db94011d3	821
sahilmgandhi	18:6a4db94011d3	822	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	823	{
sahilmgandhi	18:6a4db94011d3	824	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	825	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	826	}
sahilmgandhi	18:6a4db94011d3	827	else
sahilmgandhi	18:6a4db94011d3	828	{
sahilmgandhi	18:6a4db94011d3	829	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	830	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	831	}
sahilmgandhi	18:6a4db94011d3	832	}
sahilmgandhi	18:6a4db94011d3	833	}
sahilmgandhi	18:6a4db94011d3	834
sahilmgandhi	18:6a4db94011d3	835	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
sahilmgandhi	18:6a4db94011d3	836	/* Wait until STOPF flag is set */
sahilmgandhi	18:6a4db94011d3	837	if(FMPI2C_WaitOnSTOPFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	838	{
sahilmgandhi	18:6a4db94011d3	839	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	840	{
sahilmgandhi	18:6a4db94011d3	841	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	842	}
sahilmgandhi	18:6a4db94011d3	843	else
sahilmgandhi	18:6a4db94011d3	844	{
sahilmgandhi	18:6a4db94011d3	845	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	846	}
sahilmgandhi	18:6a4db94011d3	847	}
sahilmgandhi	18:6a4db94011d3	848
sahilmgandhi	18:6a4db94011d3	849	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	850	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	851
sahilmgandhi	18:6a4db94011d3	852	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	853	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	854
sahilmgandhi	18:6a4db94011d3	855	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	856	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	857
sahilmgandhi	18:6a4db94011d3	858	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	859	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	860
sahilmgandhi	18:6a4db94011d3	861	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	862	}
sahilmgandhi	18:6a4db94011d3	863	else
sahilmgandhi	18:6a4db94011d3	864	{
sahilmgandhi	18:6a4db94011d3	865	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	866	}
sahilmgandhi	18:6a4db94011d3	867	}
sahilmgandhi	18:6a4db94011d3	868
sahilmgandhi	18:6a4db94011d3	869	/**
sahilmgandhi	18:6a4db94011d3	870	* @brief Transmits in slave mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	871	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	872	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	873	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	874	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	875	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	876	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	877	*/
sahilmgandhi	18:6a4db94011d3	878	HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	879	{
sahilmgandhi	18:6a4db94011d3	880	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	881
sahilmgandhi	18:6a4db94011d3	882	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	883	{
sahilmgandhi	18:6a4db94011d3	884	if((pData == NULL ) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	885	{
sahilmgandhi	18:6a4db94011d3	886	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	887	}
sahilmgandhi	18:6a4db94011d3	888	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	889	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	890
sahilmgandhi	18:6a4db94011d3	891	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	892	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	893
sahilmgandhi	18:6a4db94011d3	894	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	895	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	896	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	897
sahilmgandhi	18:6a4db94011d3	898	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	899	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	900	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	901	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	902
sahilmgandhi	18:6a4db94011d3	903	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	904	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	905
sahilmgandhi	18:6a4db94011d3	906	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	907	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	908	{
sahilmgandhi	18:6a4db94011d3	909	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	910	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	911	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	912	}
sahilmgandhi	18:6a4db94011d3	913
sahilmgandhi	18:6a4db94011d3	914	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	915	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	916
sahilmgandhi	18:6a4db94011d3	917	/* If 10bit addressing mode is selected */
sahilmgandhi	18:6a4db94011d3	918	if(hfmpi2c->Init.AddressingMode == FMPI2C_ADDRESSINGMODE_10BIT)
sahilmgandhi	18:6a4db94011d3	919	{
sahilmgandhi	18:6a4db94011d3	920	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	921	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	922	{
sahilmgandhi	18:6a4db94011d3	923	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	924	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	925	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	926	}
sahilmgandhi	18:6a4db94011d3	927
sahilmgandhi	18:6a4db94011d3	928	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	929	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	930	}
sahilmgandhi	18:6a4db94011d3	931
sahilmgandhi	18:6a4db94011d3	932	/* Wait until DIR flag is set Transmitter mode */
sahilmgandhi	18:6a4db94011d3	933	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	934	{
sahilmgandhi	18:6a4db94011d3	935	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	936	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	937	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	938	}
sahilmgandhi	18:6a4db94011d3	939
sahilmgandhi	18:6a4db94011d3	940	while(hfmpi2c->XferCount > 0)
sahilmgandhi	18:6a4db94011d3	941	{
sahilmgandhi	18:6a4db94011d3	942	/* Wait until TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	943	if(FMPI2C_WaitOnTXISFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	944	{
sahilmgandhi	18:6a4db94011d3	945	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	946	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	947
sahilmgandhi	18:6a4db94011d3	948	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	949	{
sahilmgandhi	18:6a4db94011d3	950	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	951	}
sahilmgandhi	18:6a4db94011d3	952	else
sahilmgandhi	18:6a4db94011d3	953	{
sahilmgandhi	18:6a4db94011d3	954	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	955	}
sahilmgandhi	18:6a4db94011d3	956	}
sahilmgandhi	18:6a4db94011d3	957
sahilmgandhi	18:6a4db94011d3	958	/* Write data to TXDR */
sahilmgandhi	18:6a4db94011d3	959	hfmpi2c->Instance->TXDR = (*hfmpi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	960	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	961	}
sahilmgandhi	18:6a4db94011d3	962
sahilmgandhi	18:6a4db94011d3	963	/* Wait until STOP flag is set */
sahilmgandhi	18:6a4db94011d3	964	if(FMPI2C_WaitOnSTOPFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	965	{
sahilmgandhi	18:6a4db94011d3	966	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	967	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	968
sahilmgandhi	18:6a4db94011d3	969	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	970	{
sahilmgandhi	18:6a4db94011d3	971	/* Normal use case for Transmitter mode */
sahilmgandhi	18:6a4db94011d3	972	/* A NACK is generated to confirm the end of transfer */
sahilmgandhi	18:6a4db94011d3	973	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	974	}
sahilmgandhi	18:6a4db94011d3	975	else
sahilmgandhi	18:6a4db94011d3	976	{
sahilmgandhi	18:6a4db94011d3	977	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	978	}
sahilmgandhi	18:6a4db94011d3	979	}
sahilmgandhi	18:6a4db94011d3	980
sahilmgandhi	18:6a4db94011d3	981	/* Clear STOP flag */
sahilmgandhi	18:6a4db94011d3	982	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	983
sahilmgandhi	18:6a4db94011d3	984	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	985	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	986	{
sahilmgandhi	18:6a4db94011d3	987	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	988	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	989	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	990	}
sahilmgandhi	18:6a4db94011d3	991
sahilmgandhi	18:6a4db94011d3	992	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	993	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	994
sahilmgandhi	18:6a4db94011d3	995	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	996	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	997
sahilmgandhi	18:6a4db94011d3	998	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	999	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1000
sahilmgandhi	18:6a4db94011d3	1001	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1002	}
sahilmgandhi	18:6a4db94011d3	1003	else
sahilmgandhi	18:6a4db94011d3	1004	{
sahilmgandhi	18:6a4db94011d3	1005	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1006	}
sahilmgandhi	18:6a4db94011d3	1007	}
sahilmgandhi	18:6a4db94011d3	1008
sahilmgandhi	18:6a4db94011d3	1009	/**
sahilmgandhi	18:6a4db94011d3	1010	* @brief Receive in slave mode an amount of data in blocking mode
sahilmgandhi	18:6a4db94011d3	1011	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1012	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1013	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1014	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1015	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	1016	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1017	*/
sahilmgandhi	18:6a4db94011d3	1018	HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1019	{
sahilmgandhi	18:6a4db94011d3	1020	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	1021
sahilmgandhi	18:6a4db94011d3	1022	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1023	{
sahilmgandhi	18:6a4db94011d3	1024	if((pData == NULL ) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	1025	{
sahilmgandhi	18:6a4db94011d3	1026	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1027	}
sahilmgandhi	18:6a4db94011d3	1028	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1029	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1030
sahilmgandhi	18:6a4db94011d3	1031	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	1032	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1033
sahilmgandhi	18:6a4db94011d3	1034	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1035	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1036	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1037
sahilmgandhi	18:6a4db94011d3	1038	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1039	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1040	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1041	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	1042
sahilmgandhi	18:6a4db94011d3	1043	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1044	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1045
sahilmgandhi	18:6a4db94011d3	1046	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	1047	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1048	{
sahilmgandhi	18:6a4db94011d3	1049	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1050	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1051	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1052	}
sahilmgandhi	18:6a4db94011d3	1053
sahilmgandhi	18:6a4db94011d3	1054	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1055	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	1056
sahilmgandhi	18:6a4db94011d3	1057	/* Wait until DIR flag is reset Receiver mode */
sahilmgandhi	18:6a4db94011d3	1058	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1059	{
sahilmgandhi	18:6a4db94011d3	1060	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1061	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1062	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1063	}
sahilmgandhi	18:6a4db94011d3	1064
sahilmgandhi	18:6a4db94011d3	1065	while(hfmpi2c->XferCount > 0)
sahilmgandhi	18:6a4db94011d3	1066	{
sahilmgandhi	18:6a4db94011d3	1067	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	1068	if(FMPI2C_WaitOnRXNEFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1069	{
sahilmgandhi	18:6a4db94011d3	1070	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1071	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1072
sahilmgandhi	18:6a4db94011d3	1073	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	1074	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_RXNE) == SET)
sahilmgandhi	18:6a4db94011d3	1075	{
sahilmgandhi	18:6a4db94011d3	1076	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	1077	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	1078	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1079	}
sahilmgandhi	18:6a4db94011d3	1080
sahilmgandhi	18:6a4db94011d3	1081	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	1082	{
sahilmgandhi	18:6a4db94011d3	1083	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1084	}
sahilmgandhi	18:6a4db94011d3	1085	else
sahilmgandhi	18:6a4db94011d3	1086	{
sahilmgandhi	18:6a4db94011d3	1087	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1088	}
sahilmgandhi	18:6a4db94011d3	1089	}
sahilmgandhi	18:6a4db94011d3	1090
sahilmgandhi	18:6a4db94011d3	1091	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	1092	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	1093	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1094	}
sahilmgandhi	18:6a4db94011d3	1095
sahilmgandhi	18:6a4db94011d3	1096	/* Wait until STOP flag is set */
sahilmgandhi	18:6a4db94011d3	1097	if(FMPI2C_WaitOnSTOPFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1098	{
sahilmgandhi	18:6a4db94011d3	1099	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1100	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1101
sahilmgandhi	18:6a4db94011d3	1102	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1103	{
sahilmgandhi	18:6a4db94011d3	1104	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1105	}
sahilmgandhi	18:6a4db94011d3	1106	else
sahilmgandhi	18:6a4db94011d3	1107	{
sahilmgandhi	18:6a4db94011d3	1108	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1109	}
sahilmgandhi	18:6a4db94011d3	1110	}
sahilmgandhi	18:6a4db94011d3	1111
sahilmgandhi	18:6a4db94011d3	1112	/* Clear STOP flag */
sahilmgandhi	18:6a4db94011d3	1113	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	1114
sahilmgandhi	18:6a4db94011d3	1115	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1116	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1117	{
sahilmgandhi	18:6a4db94011d3	1118	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1119	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1120	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1121	}
sahilmgandhi	18:6a4db94011d3	1122
sahilmgandhi	18:6a4db94011d3	1123	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1124	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1125
sahilmgandhi	18:6a4db94011d3	1126	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1127	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1128
sahilmgandhi	18:6a4db94011d3	1129	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1130	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1131
sahilmgandhi	18:6a4db94011d3	1132	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1133	}
sahilmgandhi	18:6a4db94011d3	1134	else
sahilmgandhi	18:6a4db94011d3	1135	{
sahilmgandhi	18:6a4db94011d3	1136	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1137	}
sahilmgandhi	18:6a4db94011d3	1138	}
sahilmgandhi	18:6a4db94011d3	1139
sahilmgandhi	18:6a4db94011d3	1140	/**
sahilmgandhi	18:6a4db94011d3	1141	* @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1142	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1143	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1144	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1145	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1146	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1147	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1148	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1149	*/
sahilmgandhi	18:6a4db94011d3	1150	HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1151	{
sahilmgandhi	18:6a4db94011d3	1152	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	1153
sahilmgandhi	18:6a4db94011d3	1154	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1155	{
sahilmgandhi	18:6a4db94011d3	1156	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	1157	{
sahilmgandhi	18:6a4db94011d3	1158	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1159	}
sahilmgandhi	18:6a4db94011d3	1160
sahilmgandhi	18:6a4db94011d3	1161	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1162	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1163
sahilmgandhi	18:6a4db94011d3	1164	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1165	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1166	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1167
sahilmgandhi	18:6a4db94011d3	1168	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1169	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1170	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1171	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1172	hfmpi2c->XferISR = FMPI2C_Master_ISR_IT;
sahilmgandhi	18:6a4db94011d3	1173
sahilmgandhi	18:6a4db94011d3	1174	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1175	{
sahilmgandhi	18:6a4db94011d3	1176	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1177	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	1178	}
sahilmgandhi	18:6a4db94011d3	1179	else
sahilmgandhi	18:6a4db94011d3	1180	{
sahilmgandhi	18:6a4db94011d3	1181	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1182	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	1183	}
sahilmgandhi	18:6a4db94011d3	1184
sahilmgandhi	18:6a4db94011d3	1185	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1186	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE */
sahilmgandhi	18:6a4db94011d3	1187	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, xfermode, FMPI2C_GENERATE_START_WRITE);
sahilmgandhi	18:6a4db94011d3	1188
sahilmgandhi	18:6a4db94011d3	1189	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1190	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1191
sahilmgandhi	18:6a4db94011d3	1192	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1193	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1194	process unlock */
sahilmgandhi	18:6a4db94011d3	1195
sahilmgandhi	18:6a4db94011d3	1196	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
sahilmgandhi	18:6a4db94011d3	1197	/* possible to enable all of these */
sahilmgandhi	18:6a4db94011d3	1198	/* FMPI2C_IT_ERRI \| FMPI2C_IT_TCI\| FMPI2C_IT_STOPI\| FMPI2C_IT_NACKI \| FMPI2C_IT_ADDRI \| FMPI2C_IT_RXI \| FMPI2C_IT_TXI */
sahilmgandhi	18:6a4db94011d3	1199	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	1200
sahilmgandhi	18:6a4db94011d3	1201	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1202	}
sahilmgandhi	18:6a4db94011d3	1203	else
sahilmgandhi	18:6a4db94011d3	1204	{
sahilmgandhi	18:6a4db94011d3	1205	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1206	}
sahilmgandhi	18:6a4db94011d3	1207	}
sahilmgandhi	18:6a4db94011d3	1208
sahilmgandhi	18:6a4db94011d3	1209	/**
sahilmgandhi	18:6a4db94011d3	1210	* @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1211	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1212	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1213	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1214	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1215	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1216	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1217	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1218	*/
sahilmgandhi	18:6a4db94011d3	1219	HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1220	{
sahilmgandhi	18:6a4db94011d3	1221	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	1222
sahilmgandhi	18:6a4db94011d3	1223	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1224	{
sahilmgandhi	18:6a4db94011d3	1225	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	1226	{
sahilmgandhi	18:6a4db94011d3	1227	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1228	}
sahilmgandhi	18:6a4db94011d3	1229
sahilmgandhi	18:6a4db94011d3	1230	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1231	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1232
sahilmgandhi	18:6a4db94011d3	1233	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1234	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1235	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1236
sahilmgandhi	18:6a4db94011d3	1237	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1238	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1239	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1240	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1241	hfmpi2c->XferISR = FMPI2C_Master_ISR_IT;
sahilmgandhi	18:6a4db94011d3	1242
sahilmgandhi	18:6a4db94011d3	1243	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1244	{
sahilmgandhi	18:6a4db94011d3	1245	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1246	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	1247	}
sahilmgandhi	18:6a4db94011d3	1248	else
sahilmgandhi	18:6a4db94011d3	1249	{
sahilmgandhi	18:6a4db94011d3	1250	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1251	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	1252	}
sahilmgandhi	18:6a4db94011d3	1253
sahilmgandhi	18:6a4db94011d3	1254	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1255	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE */
sahilmgandhi	18:6a4db94011d3	1256	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, xfermode, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	1257
sahilmgandhi	18:6a4db94011d3	1258	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1259	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1260
sahilmgandhi	18:6a4db94011d3	1261	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1262	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1263	process unlock */
sahilmgandhi	18:6a4db94011d3	1264
sahilmgandhi	18:6a4db94011d3	1265	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
sahilmgandhi	18:6a4db94011d3	1266	/* possible to enable all of these */
sahilmgandhi	18:6a4db94011d3	1267	/* FMPI2C_IT_ERRI \| FMPI2C_IT_TCI\| FMPI2C_IT_STOPI\| FMPI2C_IT_NACKI \| FMPI2C_IT_ADDRI \| FMPI2C_IT_RXI \| FMPI2C_IT_TXI */
sahilmgandhi	18:6a4db94011d3	1268	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	1269
sahilmgandhi	18:6a4db94011d3	1270	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1271	}
sahilmgandhi	18:6a4db94011d3	1272	else
sahilmgandhi	18:6a4db94011d3	1273	{
sahilmgandhi	18:6a4db94011d3	1274	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1275	}
sahilmgandhi	18:6a4db94011d3	1276	}
sahilmgandhi	18:6a4db94011d3	1277
sahilmgandhi	18:6a4db94011d3	1278	/**
sahilmgandhi	18:6a4db94011d3	1279	* @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1280	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1281	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1282	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1283	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1284	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1285	*/
sahilmgandhi	18:6a4db94011d3	1286	HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1287	{
sahilmgandhi	18:6a4db94011d3	1288	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1289	{
sahilmgandhi	18:6a4db94011d3	1290	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1291	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1292
sahilmgandhi	18:6a4db94011d3	1293	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1294	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1295	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1296
sahilmgandhi	18:6a4db94011d3	1297	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1298	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1299
sahilmgandhi	18:6a4db94011d3	1300	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1301	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1302	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1303	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1304	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1305	hfmpi2c->XferISR = FMPI2C_Slave_ISR_IT;
sahilmgandhi	18:6a4db94011d3	1306
sahilmgandhi	18:6a4db94011d3	1307	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1308	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1309
sahilmgandhi	18:6a4db94011d3	1310	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1311	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1312	process unlock */
sahilmgandhi	18:6a4db94011d3	1313
sahilmgandhi	18:6a4db94011d3	1314	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
sahilmgandhi	18:6a4db94011d3	1315	/* possible to enable all of these */
sahilmgandhi	18:6a4db94011d3	1316	/* FMPI2C_IT_ERRI \| FMPI2C_IT_TCI\| FMPI2C_IT_STOPI\| FMPI2C_IT_NACKI \| FMPI2C_IT_ADDRI \| FMPI2C_IT_RXI \| FMPI2C_IT_TXI */
sahilmgandhi	18:6a4db94011d3	1317	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT \| FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	1318
sahilmgandhi	18:6a4db94011d3	1319	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1320	}
sahilmgandhi	18:6a4db94011d3	1321	else
sahilmgandhi	18:6a4db94011d3	1322	{
sahilmgandhi	18:6a4db94011d3	1323	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1324	}
sahilmgandhi	18:6a4db94011d3	1325	}
sahilmgandhi	18:6a4db94011d3	1326
sahilmgandhi	18:6a4db94011d3	1327	/**
sahilmgandhi	18:6a4db94011d3	1328	* @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1329	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1330	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1331	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1332	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1333	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1334	*/
sahilmgandhi	18:6a4db94011d3	1335	HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1336	{
sahilmgandhi	18:6a4db94011d3	1337	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1338	{
sahilmgandhi	18:6a4db94011d3	1339	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1340	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1341
sahilmgandhi	18:6a4db94011d3	1342	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1343	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1344	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1345
sahilmgandhi	18:6a4db94011d3	1346	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1347	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1348
sahilmgandhi	18:6a4db94011d3	1349	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1350	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1351	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1352	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1353	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1354	hfmpi2c->XferISR = FMPI2C_Slave_ISR_IT;
sahilmgandhi	18:6a4db94011d3	1355
sahilmgandhi	18:6a4db94011d3	1356	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1357	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1358
sahilmgandhi	18:6a4db94011d3	1359	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1360	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1361	process unlock */
sahilmgandhi	18:6a4db94011d3	1362
sahilmgandhi	18:6a4db94011d3	1363	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
sahilmgandhi	18:6a4db94011d3	1364	/* possible to enable all of these */
sahilmgandhi	18:6a4db94011d3	1365	/* FMPI2C_IT_ERRI \| FMPI2C_IT_TCI\| FMPI2C_IT_STOPI\| FMPI2C_IT_NACKI \| FMPI2C_IT_ADDRI \| FMPI2C_IT_RXI \| FMPI2C_IT_TXI */
sahilmgandhi	18:6a4db94011d3	1366	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT \| FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	1367
sahilmgandhi	18:6a4db94011d3	1368	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1369	}
sahilmgandhi	18:6a4db94011d3	1370	else
sahilmgandhi	18:6a4db94011d3	1371	{
sahilmgandhi	18:6a4db94011d3	1372	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1373	}
sahilmgandhi	18:6a4db94011d3	1374	}
sahilmgandhi	18:6a4db94011d3	1375
sahilmgandhi	18:6a4db94011d3	1376	/**
sahilmgandhi	18:6a4db94011d3	1377	* @brief Transmit in master mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	1378	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1379	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1380	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1381	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1382	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1383	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1384	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1385	*/
sahilmgandhi	18:6a4db94011d3	1386	HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1387	{
sahilmgandhi	18:6a4db94011d3	1388	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	1389
sahilmgandhi	18:6a4db94011d3	1390	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1391	{
sahilmgandhi	18:6a4db94011d3	1392	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	1393	{
sahilmgandhi	18:6a4db94011d3	1394	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1395	}
sahilmgandhi	18:6a4db94011d3	1396
sahilmgandhi	18:6a4db94011d3	1397	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1398	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1399
sahilmgandhi	18:6a4db94011d3	1400	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1401	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1402	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1403
sahilmgandhi	18:6a4db94011d3	1404	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1405	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1406	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1407	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1408	hfmpi2c->XferISR = FMPI2C_Master_ISR_DMA;
sahilmgandhi	18:6a4db94011d3	1409
sahilmgandhi	18:6a4db94011d3	1410	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1411	{
sahilmgandhi	18:6a4db94011d3	1412	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1413	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	1414	}
sahilmgandhi	18:6a4db94011d3	1415	else
sahilmgandhi	18:6a4db94011d3	1416	{
sahilmgandhi	18:6a4db94011d3	1417	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1418	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	1419	}
sahilmgandhi	18:6a4db94011d3	1420
sahilmgandhi	18:6a4db94011d3	1421	/* Set the FMPI2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1422	hfmpi2c->hdmatx->XferCpltCallback = FMPI2C_DMAMasterTransmitCplt;
sahilmgandhi	18:6a4db94011d3	1423
sahilmgandhi	18:6a4db94011d3	1424	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	1425	hfmpi2c->hdmatx->XferErrorCallback = FMPI2C_DMAError;
sahilmgandhi	18:6a4db94011d3	1426
sahilmgandhi	18:6a4db94011d3	1427	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	1428	hfmpi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1429	hfmpi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1430
sahilmgandhi	18:6a4db94011d3	1431	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	1432	HAL_DMA_Start_IT(hfmpi2c->hdmatx, (uint32_t)pData, (uint32_t)&hfmpi2c->Instance->TXDR, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	1433
sahilmgandhi	18:6a4db94011d3	1434	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1435	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	1436	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, xfermode, FMPI2C_GENERATE_START_WRITE);
sahilmgandhi	18:6a4db94011d3	1437
sahilmgandhi	18:6a4db94011d3	1438	/* Update XferCount value */
sahilmgandhi	18:6a4db94011d3	1439	hfmpi2c->XferCount -= hfmpi2c->XferSize;
sahilmgandhi	18:6a4db94011d3	1440
sahilmgandhi	18:6a4db94011d3	1441	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1442	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1443
sahilmgandhi	18:6a4db94011d3	1444	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1445	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1446	process unlock */
sahilmgandhi	18:6a4db94011d3	1447	/* Enable ERR and NACK interrupts */
sahilmgandhi	18:6a4db94011d3	1448	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_ERROR_IT);
sahilmgandhi	18:6a4db94011d3	1449
sahilmgandhi	18:6a4db94011d3	1450	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	1451	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_TXDMAEN;
sahilmgandhi	18:6a4db94011d3	1452
sahilmgandhi	18:6a4db94011d3	1453	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1454	}
sahilmgandhi	18:6a4db94011d3	1455	else
sahilmgandhi	18:6a4db94011d3	1456	{
sahilmgandhi	18:6a4db94011d3	1457	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1458	}
sahilmgandhi	18:6a4db94011d3	1459	}
sahilmgandhi	18:6a4db94011d3	1460
sahilmgandhi	18:6a4db94011d3	1461	/**
sahilmgandhi	18:6a4db94011d3	1462	* @brief Receive in master mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	1463	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1464	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1465	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1466	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1467	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1468	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1469	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1470	*/
sahilmgandhi	18:6a4db94011d3	1471	HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1472	{
sahilmgandhi	18:6a4db94011d3	1473	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	1474
sahilmgandhi	18:6a4db94011d3	1475	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1476	{
sahilmgandhi	18:6a4db94011d3	1477	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	1478	{
sahilmgandhi	18:6a4db94011d3	1479	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1480	}
sahilmgandhi	18:6a4db94011d3	1481
sahilmgandhi	18:6a4db94011d3	1482	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1483	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1484
sahilmgandhi	18:6a4db94011d3	1485	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1486	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1487	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1488
sahilmgandhi	18:6a4db94011d3	1489	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1490	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1491	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1492	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1493	hfmpi2c->XferISR = FMPI2C_Master_ISR_DMA;
sahilmgandhi	18:6a4db94011d3	1494
sahilmgandhi	18:6a4db94011d3	1495	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1496	{
sahilmgandhi	18:6a4db94011d3	1497	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1498	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	1499	}
sahilmgandhi	18:6a4db94011d3	1500	else
sahilmgandhi	18:6a4db94011d3	1501	{
sahilmgandhi	18:6a4db94011d3	1502	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1503	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	1504	}
sahilmgandhi	18:6a4db94011d3	1505
sahilmgandhi	18:6a4db94011d3	1506	if(hfmpi2c->XferSize > 0)
sahilmgandhi	18:6a4db94011d3	1507	{
sahilmgandhi	18:6a4db94011d3	1508	/* Set the FMPI2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1509	hfmpi2c->hdmarx->XferCpltCallback = FMPI2C_DMAMasterReceiveCplt;
sahilmgandhi	18:6a4db94011d3	1510
sahilmgandhi	18:6a4db94011d3	1511	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	1512	hfmpi2c->hdmarx->XferErrorCallback = FMPI2C_DMAError;
sahilmgandhi	18:6a4db94011d3	1513
sahilmgandhi	18:6a4db94011d3	1514	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	1515	hfmpi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1516	hfmpi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1517
sahilmgandhi	18:6a4db94011d3	1518	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	1519	HAL_DMA_Start_IT(hfmpi2c->hdmarx, (uint32_t)&hfmpi2c->Instance->RXDR, (uint32_t)pData, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	1520
sahilmgandhi	18:6a4db94011d3	1521	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1522	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	1523	FMPI2C_TransferConfig(hfmpi2c,DevAddress,hfmpi2c->XferSize, xfermode, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	1524
sahilmgandhi	18:6a4db94011d3	1525	/* Update XferCount value */
sahilmgandhi	18:6a4db94011d3	1526	hfmpi2c->XferCount -= hfmpi2c->XferSize;
sahilmgandhi	18:6a4db94011d3	1527
sahilmgandhi	18:6a4db94011d3	1528	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1529	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1530
sahilmgandhi	18:6a4db94011d3	1531	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1532	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1533	process unlock */
sahilmgandhi	18:6a4db94011d3	1534	/* Enable ERR and NACK interrupts */
sahilmgandhi	18:6a4db94011d3	1535	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_ERROR_IT);
sahilmgandhi	18:6a4db94011d3	1536
sahilmgandhi	18:6a4db94011d3	1537	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	1538	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_RXDMAEN;
sahilmgandhi	18:6a4db94011d3	1539	}
sahilmgandhi	18:6a4db94011d3	1540	else
sahilmgandhi	18:6a4db94011d3	1541	{
sahilmgandhi	18:6a4db94011d3	1542	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1543	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1544
sahilmgandhi	18:6a4db94011d3	1545	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1546	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1547	}
sahilmgandhi	18:6a4db94011d3	1548	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1549	}
sahilmgandhi	18:6a4db94011d3	1550	else
sahilmgandhi	18:6a4db94011d3	1551	{
sahilmgandhi	18:6a4db94011d3	1552	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1553	}
sahilmgandhi	18:6a4db94011d3	1554	}
sahilmgandhi	18:6a4db94011d3	1555
sahilmgandhi	18:6a4db94011d3	1556	/**
sahilmgandhi	18:6a4db94011d3	1557	* @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	1558	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1559	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1560	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1561	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1562	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1563	*/
sahilmgandhi	18:6a4db94011d3	1564	HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1565	{
sahilmgandhi	18:6a4db94011d3	1566	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1567	{
sahilmgandhi	18:6a4db94011d3	1568	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	1569	{
sahilmgandhi	18:6a4db94011d3	1570	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1571	}
sahilmgandhi	18:6a4db94011d3	1572	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1573	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1574
sahilmgandhi	18:6a4db94011d3	1575	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1576	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1577	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1578
sahilmgandhi	18:6a4db94011d3	1579	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1580	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1581	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1582	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1583	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1584	hfmpi2c->XferISR = FMPI2C_Slave_ISR_DMA;
sahilmgandhi	18:6a4db94011d3	1585
sahilmgandhi	18:6a4db94011d3	1586	/* Set the FMPI2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1587	hfmpi2c->hdmatx->XferCpltCallback = FMPI2C_DMASlaveTransmitCplt;
sahilmgandhi	18:6a4db94011d3	1588
sahilmgandhi	18:6a4db94011d3	1589	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	1590	hfmpi2c->hdmatx->XferErrorCallback = FMPI2C_DMAError;
sahilmgandhi	18:6a4db94011d3	1591
sahilmgandhi	18:6a4db94011d3	1592	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	1593	hfmpi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1594	hfmpi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1595
sahilmgandhi	18:6a4db94011d3	1596	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	1597	HAL_DMA_Start_IT(hfmpi2c->hdmatx, (uint32_t)pData, (uint32_t)&hfmpi2c->Instance->TXDR, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	1598
sahilmgandhi	18:6a4db94011d3	1599	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1600	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1601
sahilmgandhi	18:6a4db94011d3	1602	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1603	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1604
sahilmgandhi	18:6a4db94011d3	1605	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1606	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1607	process unlock */
sahilmgandhi	18:6a4db94011d3	1608	/* Enable ERR, STOP, NACK, ADDR interrupts */
sahilmgandhi	18:6a4db94011d3	1609	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	1610
sahilmgandhi	18:6a4db94011d3	1611	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	1612	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_TXDMAEN;
sahilmgandhi	18:6a4db94011d3	1613
sahilmgandhi	18:6a4db94011d3	1614	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1615	}
sahilmgandhi	18:6a4db94011d3	1616	else
sahilmgandhi	18:6a4db94011d3	1617	{
sahilmgandhi	18:6a4db94011d3	1618	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1619	}
sahilmgandhi	18:6a4db94011d3	1620	}
sahilmgandhi	18:6a4db94011d3	1621
sahilmgandhi	18:6a4db94011d3	1622	/**
sahilmgandhi	18:6a4db94011d3	1623	* @brief Receive in slave mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	1624	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1625	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1626	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1627	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1628	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1629	*/
sahilmgandhi	18:6a4db94011d3	1630	HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1631	{
sahilmgandhi	18:6a4db94011d3	1632	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1633	{
sahilmgandhi	18:6a4db94011d3	1634	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	1635	{
sahilmgandhi	18:6a4db94011d3	1636	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1637	}
sahilmgandhi	18:6a4db94011d3	1638	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1639	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1640
sahilmgandhi	18:6a4db94011d3	1641	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1642	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1643	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1644
sahilmgandhi	18:6a4db94011d3	1645	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1646	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1647	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1648	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1649	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1650	hfmpi2c->XferISR = FMPI2C_Slave_ISR_DMA;
sahilmgandhi	18:6a4db94011d3	1651
sahilmgandhi	18:6a4db94011d3	1652	/* Set the FMPI2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1653	hfmpi2c->hdmarx->XferCpltCallback = FMPI2C_DMASlaveReceiveCplt;
sahilmgandhi	18:6a4db94011d3	1654
sahilmgandhi	18:6a4db94011d3	1655	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	1656	hfmpi2c->hdmarx->XferErrorCallback = FMPI2C_DMAError;
sahilmgandhi	18:6a4db94011d3	1657
sahilmgandhi	18:6a4db94011d3	1658	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	1659	hfmpi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1660	hfmpi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1661
sahilmgandhi	18:6a4db94011d3	1662	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	1663	HAL_DMA_Start_IT(hfmpi2c->hdmarx, (uint32_t)&hfmpi2c->Instance->RXDR, (uint32_t)pData, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	1664
sahilmgandhi	18:6a4db94011d3	1665	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1666	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	1667
sahilmgandhi	18:6a4db94011d3	1668	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1669	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1670
sahilmgandhi	18:6a4db94011d3	1671	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1672	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1673	process unlock */
sahilmgandhi	18:6a4db94011d3	1674	/* Enable ERR, STOP, NACK, ADDR interrupts */
sahilmgandhi	18:6a4db94011d3	1675	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	1676
sahilmgandhi	18:6a4db94011d3	1677	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	1678	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_RXDMAEN;
sahilmgandhi	18:6a4db94011d3	1679
sahilmgandhi	18:6a4db94011d3	1680	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1681	}
sahilmgandhi	18:6a4db94011d3	1682	else
sahilmgandhi	18:6a4db94011d3	1683	{
sahilmgandhi	18:6a4db94011d3	1684	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1685	}
sahilmgandhi	18:6a4db94011d3	1686	}
sahilmgandhi	18:6a4db94011d3	1687	/**
sahilmgandhi	18:6a4db94011d3	1688	* @brief Write an amount of data in blocking mode to a specific memory address
sahilmgandhi	18:6a4db94011d3	1689	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1690	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1691	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	1692	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	1693	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	1694	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1695	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1696	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	1697	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1698	*/
sahilmgandhi	18:6a4db94011d3	1699	HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1700	{
sahilmgandhi	18:6a4db94011d3	1701	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	1702
sahilmgandhi	18:6a4db94011d3	1703	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1704	assert_param(IS_FMPI2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	1705
sahilmgandhi	18:6a4db94011d3	1706	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1707	{
sahilmgandhi	18:6a4db94011d3	1708	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	1709	{
sahilmgandhi	18:6a4db94011d3	1710	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1711	}
sahilmgandhi	18:6a4db94011d3	1712
sahilmgandhi	18:6a4db94011d3	1713	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1714	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1715
sahilmgandhi	18:6a4db94011d3	1716	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	1717	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1718
sahilmgandhi	18:6a4db94011d3	1719	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_BUSY, SET, FMPI2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1720	{
sahilmgandhi	18:6a4db94011d3	1721	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1722	}
sahilmgandhi	18:6a4db94011d3	1723
sahilmgandhi	18:6a4db94011d3	1724	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1725	hfmpi2c->Mode = HAL_FMPI2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	1726	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1727
sahilmgandhi	18:6a4db94011d3	1728	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1729	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1730	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1731	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	1732
sahilmgandhi	18:6a4db94011d3	1733	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	1734	if(FMPI2C_RequestMemoryWrite(hfmpi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1735	{
sahilmgandhi	18:6a4db94011d3	1736	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1737	{
sahilmgandhi	18:6a4db94011d3	1738	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1739	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1740	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1741	}
sahilmgandhi	18:6a4db94011d3	1742	else
sahilmgandhi	18:6a4db94011d3	1743	{
sahilmgandhi	18:6a4db94011d3	1744	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1745	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1746	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1747	}
sahilmgandhi	18:6a4db94011d3	1748	}
sahilmgandhi	18:6a4db94011d3	1749
sahilmgandhi	18:6a4db94011d3	1750	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE */
sahilmgandhi	18:6a4db94011d3	1751	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1752	{
sahilmgandhi	18:6a4db94011d3	1753	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1754	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	1755	}
sahilmgandhi	18:6a4db94011d3	1756	else
sahilmgandhi	18:6a4db94011d3	1757	{
sahilmgandhi	18:6a4db94011d3	1758	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1759	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	1760	}
sahilmgandhi	18:6a4db94011d3	1761
sahilmgandhi	18:6a4db94011d3	1762	do
sahilmgandhi	18:6a4db94011d3	1763	{
sahilmgandhi	18:6a4db94011d3	1764	/* Wait until TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	1765	if(FMPI2C_WaitOnTXISFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1766	{
sahilmgandhi	18:6a4db94011d3	1767	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1768	{
sahilmgandhi	18:6a4db94011d3	1769	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1770	}
sahilmgandhi	18:6a4db94011d3	1771	else
sahilmgandhi	18:6a4db94011d3	1772	{
sahilmgandhi	18:6a4db94011d3	1773	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1774	}
sahilmgandhi	18:6a4db94011d3	1775	}
sahilmgandhi	18:6a4db94011d3	1776
sahilmgandhi	18:6a4db94011d3	1777	/* Write data to TXDR */
sahilmgandhi	18:6a4db94011d3	1778	hfmpi2c->Instance->TXDR = (*hfmpi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	1779	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1780	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	1781
sahilmgandhi	18:6a4db94011d3	1782	if((hfmpi2c->XferSize == 0) && (hfmpi2c->XferCount!=0))
sahilmgandhi	18:6a4db94011d3	1783	{
sahilmgandhi	18:6a4db94011d3	1784	/* Wait until TCR flag is set */
sahilmgandhi	18:6a4db94011d3	1785	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1786	{
sahilmgandhi	18:6a4db94011d3	1787	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1788	}
sahilmgandhi	18:6a4db94011d3	1789
sahilmgandhi	18:6a4db94011d3	1790	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1791	{
sahilmgandhi	18:6a4db94011d3	1792	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1793	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	1794	}
sahilmgandhi	18:6a4db94011d3	1795	else
sahilmgandhi	18:6a4db94011d3	1796	{
sahilmgandhi	18:6a4db94011d3	1797	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1798	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	1799	}
sahilmgandhi	18:6a4db94011d3	1800	}
sahilmgandhi	18:6a4db94011d3	1801
sahilmgandhi	18:6a4db94011d3	1802	}while(hfmpi2c->XferCount > 0);
sahilmgandhi	18:6a4db94011d3	1803
sahilmgandhi	18:6a4db94011d3	1804	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
sahilmgandhi	18:6a4db94011d3	1805	/* Wait until STOPF flag is reset */
sahilmgandhi	18:6a4db94011d3	1806	if(FMPI2C_WaitOnSTOPFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1807	{
sahilmgandhi	18:6a4db94011d3	1808	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1809	{
sahilmgandhi	18:6a4db94011d3	1810	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1811	}
sahilmgandhi	18:6a4db94011d3	1812	else
sahilmgandhi	18:6a4db94011d3	1813	{
sahilmgandhi	18:6a4db94011d3	1814	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1815	}
sahilmgandhi	18:6a4db94011d3	1816	}
sahilmgandhi	18:6a4db94011d3	1817
sahilmgandhi	18:6a4db94011d3	1818	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	1819	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	1820
sahilmgandhi	18:6a4db94011d3	1821	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	1822	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1823
sahilmgandhi	18:6a4db94011d3	1824	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1825	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1826
sahilmgandhi	18:6a4db94011d3	1827	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1828	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1829
sahilmgandhi	18:6a4db94011d3	1830	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1831	}
sahilmgandhi	18:6a4db94011d3	1832	else
sahilmgandhi	18:6a4db94011d3	1833	{
sahilmgandhi	18:6a4db94011d3	1834	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1835	}
sahilmgandhi	18:6a4db94011d3	1836	}
sahilmgandhi	18:6a4db94011d3	1837
sahilmgandhi	18:6a4db94011d3	1838	/**
sahilmgandhi	18:6a4db94011d3	1839	* @brief Read an amount of data in blocking mode from a specific memory address
sahilmgandhi	18:6a4db94011d3	1840	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1841	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1842	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	1843	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	1844	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	1845	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1846	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1847	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	1848	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1849	*/
sahilmgandhi	18:6a4db94011d3	1850	HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1851	{
sahilmgandhi	18:6a4db94011d3	1852	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	1853
sahilmgandhi	18:6a4db94011d3	1854	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1855	assert_param(IS_FMPI2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	1856
sahilmgandhi	18:6a4db94011d3	1857	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1858	{
sahilmgandhi	18:6a4db94011d3	1859	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	1860	{
sahilmgandhi	18:6a4db94011d3	1861	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1862	}
sahilmgandhi	18:6a4db94011d3	1863
sahilmgandhi	18:6a4db94011d3	1864	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1865	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1866
sahilmgandhi	18:6a4db94011d3	1867	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	1868	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1869
sahilmgandhi	18:6a4db94011d3	1870	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_BUSY, SET, FMPI2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1871	{
sahilmgandhi	18:6a4db94011d3	1872	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1873	}
sahilmgandhi	18:6a4db94011d3	1874
sahilmgandhi	18:6a4db94011d3	1875	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1876	hfmpi2c->Mode = HAL_FMPI2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	1877	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1878
sahilmgandhi	18:6a4db94011d3	1879	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1880	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1881	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1882	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	1883
sahilmgandhi	18:6a4db94011d3	1884	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	1885	if(FMPI2C_RequestMemoryRead(hfmpi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1886	{
sahilmgandhi	18:6a4db94011d3	1887	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1888	{
sahilmgandhi	18:6a4db94011d3	1889	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1890	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1891	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1892	}
sahilmgandhi	18:6a4db94011d3	1893	else
sahilmgandhi	18:6a4db94011d3	1894	{
sahilmgandhi	18:6a4db94011d3	1895	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1896	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1897	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1898	}
sahilmgandhi	18:6a4db94011d3	1899	}
sahilmgandhi	18:6a4db94011d3	1900
sahilmgandhi	18:6a4db94011d3	1901	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	1902	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	1903	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1904	{
sahilmgandhi	18:6a4db94011d3	1905	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1906	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	1907	}
sahilmgandhi	18:6a4db94011d3	1908	else
sahilmgandhi	18:6a4db94011d3	1909	{
sahilmgandhi	18:6a4db94011d3	1910	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1911	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	1912	}
sahilmgandhi	18:6a4db94011d3	1913
sahilmgandhi	18:6a4db94011d3	1914	do
sahilmgandhi	18:6a4db94011d3	1915	{
sahilmgandhi	18:6a4db94011d3	1916	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	1917	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1918	{
sahilmgandhi	18:6a4db94011d3	1919	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1920	}
sahilmgandhi	18:6a4db94011d3	1921
sahilmgandhi	18:6a4db94011d3	1922	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	1923	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	1924	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	1925	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1926
sahilmgandhi	18:6a4db94011d3	1927	if((hfmpi2c->XferSize == 0) && (hfmpi2c->XferCount != 0))
sahilmgandhi	18:6a4db94011d3	1928	{
sahilmgandhi	18:6a4db94011d3	1929	/* Wait until TCR flag is set */
sahilmgandhi	18:6a4db94011d3	1930	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1931	{
sahilmgandhi	18:6a4db94011d3	1932	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1933	}
sahilmgandhi	18:6a4db94011d3	1934
sahilmgandhi	18:6a4db94011d3	1935	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	1936	{
sahilmgandhi	18:6a4db94011d3	1937	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	1938	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	1939	}
sahilmgandhi	18:6a4db94011d3	1940	else
sahilmgandhi	18:6a4db94011d3	1941	{
sahilmgandhi	18:6a4db94011d3	1942	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1943	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	1944	}
sahilmgandhi	18:6a4db94011d3	1945	}
sahilmgandhi	18:6a4db94011d3	1946	}while(hfmpi2c->XferCount > 0);
sahilmgandhi	18:6a4db94011d3	1947
sahilmgandhi	18:6a4db94011d3	1948	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
sahilmgandhi	18:6a4db94011d3	1949	/* Wait until STOPF flag is reset */
sahilmgandhi	18:6a4db94011d3	1950	if(FMPI2C_WaitOnSTOPFlagUntilTimeout(hfmpi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1951	{
sahilmgandhi	18:6a4db94011d3	1952	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1953	{
sahilmgandhi	18:6a4db94011d3	1954	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1955	}
sahilmgandhi	18:6a4db94011d3	1956	else
sahilmgandhi	18:6a4db94011d3	1957	{
sahilmgandhi	18:6a4db94011d3	1958	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1959	}
sahilmgandhi	18:6a4db94011d3	1960	}
sahilmgandhi	18:6a4db94011d3	1961
sahilmgandhi	18:6a4db94011d3	1962	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	1963	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	1964
sahilmgandhi	18:6a4db94011d3	1965	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	1966	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1967
sahilmgandhi	18:6a4db94011d3	1968	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1969	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1970
sahilmgandhi	18:6a4db94011d3	1971	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1972	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	1973
sahilmgandhi	18:6a4db94011d3	1974	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1975	}
sahilmgandhi	18:6a4db94011d3	1976	else
sahilmgandhi	18:6a4db94011d3	1977	{
sahilmgandhi	18:6a4db94011d3	1978	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1979	}
sahilmgandhi	18:6a4db94011d3	1980	}
sahilmgandhi	18:6a4db94011d3	1981	/**
sahilmgandhi	18:6a4db94011d3	1982	* @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
sahilmgandhi	18:6a4db94011d3	1983	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1984	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	1985	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	1986	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	1987	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	1988	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1989	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1990	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1991	*/
sahilmgandhi	18:6a4db94011d3	1992	HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1993	{
sahilmgandhi	18:6a4db94011d3	1994	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	1995	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	1996
sahilmgandhi	18:6a4db94011d3	1997	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1998	assert_param(IS_FMPI2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	1999
sahilmgandhi	18:6a4db94011d3	2000	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2001	{
sahilmgandhi	18:6a4db94011d3	2002	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	2003	{
sahilmgandhi	18:6a4db94011d3	2004	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2005	}
sahilmgandhi	18:6a4db94011d3	2006
sahilmgandhi	18:6a4db94011d3	2007	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	2008	{
sahilmgandhi	18:6a4db94011d3	2009	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2010	}
sahilmgandhi	18:6a4db94011d3	2011
sahilmgandhi	18:6a4db94011d3	2012	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2013	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2014
sahilmgandhi	18:6a4db94011d3	2015	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2016	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2017
sahilmgandhi	18:6a4db94011d3	2018	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2019	hfmpi2c->Mode = HAL_FMPI2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2020	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2021
sahilmgandhi	18:6a4db94011d3	2022	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2023	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2024	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2025	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2026	hfmpi2c->XferISR = FMPI2C_Master_ISR_IT;
sahilmgandhi	18:6a4db94011d3	2027
sahilmgandhi	18:6a4db94011d3	2028	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	2029	{
sahilmgandhi	18:6a4db94011d3	2030	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	2031	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	2032	}
sahilmgandhi	18:6a4db94011d3	2033	else
sahilmgandhi	18:6a4db94011d3	2034	{
sahilmgandhi	18:6a4db94011d3	2035	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2036	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	2037	}
sahilmgandhi	18:6a4db94011d3	2038
sahilmgandhi	18:6a4db94011d3	2039	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2040	if(FMPI2C_RequestMemoryWrite(hfmpi2c, DevAddress, MemAddress, MemAddSize, FMPI2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2041	{
sahilmgandhi	18:6a4db94011d3	2042	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2043	{
sahilmgandhi	18:6a4db94011d3	2044	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2045	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2046	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2047	}
sahilmgandhi	18:6a4db94011d3	2048	else
sahilmgandhi	18:6a4db94011d3	2049	{
sahilmgandhi	18:6a4db94011d3	2050	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2051	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2052	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2053	}
sahilmgandhi	18:6a4db94011d3	2054	}
sahilmgandhi	18:6a4db94011d3	2055
sahilmgandhi	18:6a4db94011d3	2056	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	2057	FMPI2C_TransferConfig(hfmpi2c,DevAddress, hfmpi2c->XferSize, xfermode, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	2058
sahilmgandhi	18:6a4db94011d3	2059	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2060	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2061
sahilmgandhi	18:6a4db94011d3	2062	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2063	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2064	process unlock */
sahilmgandhi	18:6a4db94011d3	2065
sahilmgandhi	18:6a4db94011d3	2066	/* Enable ERR, TC, STOP, NACK, TXI interrupt */
sahilmgandhi	18:6a4db94011d3	2067	/* possible to enable all of these */
sahilmgandhi	18:6a4db94011d3	2068	/* FMPI2C_IT_ERRI \| FMPI2C_IT_TCI\| FMPI2C_IT_STOPI\| FMPI2C_IT_NACKI \| FMPI2C_IT_ADDRI \| FMPI2C_IT_RXI \| FMPI2C_IT_TXI */
sahilmgandhi	18:6a4db94011d3	2069	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	2070
sahilmgandhi	18:6a4db94011d3	2071	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2072	}
sahilmgandhi	18:6a4db94011d3	2073	else
sahilmgandhi	18:6a4db94011d3	2074	{
sahilmgandhi	18:6a4db94011d3	2075	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2076	}
sahilmgandhi	18:6a4db94011d3	2077	}
sahilmgandhi	18:6a4db94011d3	2078
sahilmgandhi	18:6a4db94011d3	2079	/**
sahilmgandhi	18:6a4db94011d3	2080	* @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
sahilmgandhi	18:6a4db94011d3	2081	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2082	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2083	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2084	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2085	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2086	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2087	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2088	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2089	*/
sahilmgandhi	18:6a4db94011d3	2090	HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2091	{
sahilmgandhi	18:6a4db94011d3	2092	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	2093	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	2094
sahilmgandhi	18:6a4db94011d3	2095	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2096	assert_param(IS_FMPI2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2097
sahilmgandhi	18:6a4db94011d3	2098	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2099	{
sahilmgandhi	18:6a4db94011d3	2100	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	2101	{
sahilmgandhi	18:6a4db94011d3	2102	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2103	}
sahilmgandhi	18:6a4db94011d3	2104
sahilmgandhi	18:6a4db94011d3	2105	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	2106	{
sahilmgandhi	18:6a4db94011d3	2107	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2108	}
sahilmgandhi	18:6a4db94011d3	2109
sahilmgandhi	18:6a4db94011d3	2110	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2111	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2112
sahilmgandhi	18:6a4db94011d3	2113	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2114	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2115
sahilmgandhi	18:6a4db94011d3	2116	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2117	hfmpi2c->Mode = HAL_FMPI2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2118	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2119
sahilmgandhi	18:6a4db94011d3	2120	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2121	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2122	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2123	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2124	hfmpi2c->XferISR = FMPI2C_Master_ISR_IT;
sahilmgandhi	18:6a4db94011d3	2125
sahilmgandhi	18:6a4db94011d3	2126	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	2127	{
sahilmgandhi	18:6a4db94011d3	2128	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	2129	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	2130	}
sahilmgandhi	18:6a4db94011d3	2131	else
sahilmgandhi	18:6a4db94011d3	2132	{
sahilmgandhi	18:6a4db94011d3	2133	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2134	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	2135	}
sahilmgandhi	18:6a4db94011d3	2136
sahilmgandhi	18:6a4db94011d3	2137	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2138	if(FMPI2C_RequestMemoryRead(hfmpi2c, DevAddress, MemAddress, MemAddSize, FMPI2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2139	{
sahilmgandhi	18:6a4db94011d3	2140	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2141	{
sahilmgandhi	18:6a4db94011d3	2142	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2143	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2144	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2145	}
sahilmgandhi	18:6a4db94011d3	2146	else
sahilmgandhi	18:6a4db94011d3	2147	{
sahilmgandhi	18:6a4db94011d3	2148	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2149	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2150	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2151	}
sahilmgandhi	18:6a4db94011d3	2152	}
sahilmgandhi	18:6a4db94011d3	2153
sahilmgandhi	18:6a4db94011d3	2154	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	2155	FMPI2C_TransferConfig(hfmpi2c,DevAddress,hfmpi2c->XferSize, xfermode, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	2156
sahilmgandhi	18:6a4db94011d3	2157	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2158	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2159
sahilmgandhi	18:6a4db94011d3	2160	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2161	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2162	process unlock */
sahilmgandhi	18:6a4db94011d3	2163
sahilmgandhi	18:6a4db94011d3	2164	/* Enable ERR, TC, STOP, NACK, RXI interrupt */
sahilmgandhi	18:6a4db94011d3	2165	/* possible to enable all of these */
sahilmgandhi	18:6a4db94011d3	2166	/* FMPI2C_IT_ERRI \| FMPI2C_IT_TCI\| FMPI2C_IT_STOPI\| FMPI2C_IT_NACKI \| FMPI2C_IT_ADDRI \| FMPI2C_IT_RXI \| FMPI2C_IT_TXI */
sahilmgandhi	18:6a4db94011d3	2167	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	2168
sahilmgandhi	18:6a4db94011d3	2169	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2170	}
sahilmgandhi	18:6a4db94011d3	2171	else
sahilmgandhi	18:6a4db94011d3	2172	{
sahilmgandhi	18:6a4db94011d3	2173	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2174	}
sahilmgandhi	18:6a4db94011d3	2175	}
sahilmgandhi	18:6a4db94011d3	2176	/**
sahilmgandhi	18:6a4db94011d3	2177	* @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
sahilmgandhi	18:6a4db94011d3	2178	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2179	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2180	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2181	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2182	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2183	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2184	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2185	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2186	*/
sahilmgandhi	18:6a4db94011d3	2187	HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2188	{
sahilmgandhi	18:6a4db94011d3	2189	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	2190	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	2191
sahilmgandhi	18:6a4db94011d3	2192	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2193	assert_param(IS_FMPI2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2194
sahilmgandhi	18:6a4db94011d3	2195	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2196	{
sahilmgandhi	18:6a4db94011d3	2197	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	2198	{
sahilmgandhi	18:6a4db94011d3	2199	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2200	}
sahilmgandhi	18:6a4db94011d3	2201
sahilmgandhi	18:6a4db94011d3	2202	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	2203	{
sahilmgandhi	18:6a4db94011d3	2204	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2205	}
sahilmgandhi	18:6a4db94011d3	2206
sahilmgandhi	18:6a4db94011d3	2207	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2208	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2209
sahilmgandhi	18:6a4db94011d3	2210	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2211	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2212
sahilmgandhi	18:6a4db94011d3	2213	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2214	hfmpi2c->Mode = HAL_FMPI2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2215	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2216
sahilmgandhi	18:6a4db94011d3	2217	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2218	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2219	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2220	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2221	hfmpi2c->XferISR = FMPI2C_Master_ISR_DMA;
sahilmgandhi	18:6a4db94011d3	2222
sahilmgandhi	18:6a4db94011d3	2223	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	2224	{
sahilmgandhi	18:6a4db94011d3	2225	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	2226	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	2227	}
sahilmgandhi	18:6a4db94011d3	2228	else
sahilmgandhi	18:6a4db94011d3	2229	{
sahilmgandhi	18:6a4db94011d3	2230	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2231	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	2232	}
sahilmgandhi	18:6a4db94011d3	2233
sahilmgandhi	18:6a4db94011d3	2234	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2235	if(FMPI2C_RequestMemoryWrite(hfmpi2c, DevAddress, MemAddress, MemAddSize, FMPI2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2236	{
sahilmgandhi	18:6a4db94011d3	2237	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2238	{
sahilmgandhi	18:6a4db94011d3	2239	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2240	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2241	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2242	}
sahilmgandhi	18:6a4db94011d3	2243	else
sahilmgandhi	18:6a4db94011d3	2244	{
sahilmgandhi	18:6a4db94011d3	2245	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2246	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2247	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2248	}
sahilmgandhi	18:6a4db94011d3	2249	}
sahilmgandhi	18:6a4db94011d3	2250
sahilmgandhi	18:6a4db94011d3	2251	/* Set the FMPI2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2252	hfmpi2c->hdmatx->XferCpltCallback = FMPI2C_DMAMasterTransmitCplt;
sahilmgandhi	18:6a4db94011d3	2253
sahilmgandhi	18:6a4db94011d3	2254	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2255	hfmpi2c->hdmatx->XferErrorCallback = FMPI2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2256
sahilmgandhi	18:6a4db94011d3	2257	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2258	hfmpi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2259	hfmpi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2260
sahilmgandhi	18:6a4db94011d3	2261	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	2262	HAL_DMA_Start_IT(hfmpi2c->hdmatx, (uint32_t)pData, (uint32_t)&hfmpi2c->Instance->TXDR, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	2263
sahilmgandhi	18:6a4db94011d3	2264	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	2265	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	2266	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, xfermode, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	2267
sahilmgandhi	18:6a4db94011d3	2268	/* Update XferCount value */
sahilmgandhi	18:6a4db94011d3	2269	hfmpi2c->XferCount -= hfmpi2c->XferSize;
sahilmgandhi	18:6a4db94011d3	2270
sahilmgandhi	18:6a4db94011d3	2271	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2272	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2273
sahilmgandhi	18:6a4db94011d3	2274	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2275	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2276	process unlock */
sahilmgandhi	18:6a4db94011d3	2277	/* Enable ERR and NACK interrupts */
sahilmgandhi	18:6a4db94011d3	2278	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_ERROR_IT);
sahilmgandhi	18:6a4db94011d3	2279
sahilmgandhi	18:6a4db94011d3	2280	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2281	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_TXDMAEN;
sahilmgandhi	18:6a4db94011d3	2282
sahilmgandhi	18:6a4db94011d3	2283	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2284	}
sahilmgandhi	18:6a4db94011d3	2285	else
sahilmgandhi	18:6a4db94011d3	2286	{
sahilmgandhi	18:6a4db94011d3	2287	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2288	}
sahilmgandhi	18:6a4db94011d3	2289	}
sahilmgandhi	18:6a4db94011d3	2290
sahilmgandhi	18:6a4db94011d3	2291	/**
sahilmgandhi	18:6a4db94011d3	2292	* @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
sahilmgandhi	18:6a4db94011d3	2293	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2294	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2295	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2296	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2297	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2298	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2299	* @param Size Amount of data to be read
sahilmgandhi	18:6a4db94011d3	2300	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2301	*/
sahilmgandhi	18:6a4db94011d3	2302	HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2303	{
sahilmgandhi	18:6a4db94011d3	2304	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	2305	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	2306
sahilmgandhi	18:6a4db94011d3	2307	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2308	assert_param(IS_FMPI2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2309
sahilmgandhi	18:6a4db94011d3	2310	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2311	{
sahilmgandhi	18:6a4db94011d3	2312	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	2313	{
sahilmgandhi	18:6a4db94011d3	2314	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2315	}
sahilmgandhi	18:6a4db94011d3	2316
sahilmgandhi	18:6a4db94011d3	2317	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	2318	{
sahilmgandhi	18:6a4db94011d3	2319	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2320	}
sahilmgandhi	18:6a4db94011d3	2321
sahilmgandhi	18:6a4db94011d3	2322	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2323	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2324
sahilmgandhi	18:6a4db94011d3	2325	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2326	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2327
sahilmgandhi	18:6a4db94011d3	2328	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2329	hfmpi2c->Mode = HAL_FMPI2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2330	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2331
sahilmgandhi	18:6a4db94011d3	2332	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2333	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2334	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2335	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2336	hfmpi2c->XferISR = FMPI2C_Master_ISR_DMA;
sahilmgandhi	18:6a4db94011d3	2337
sahilmgandhi	18:6a4db94011d3	2338	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	2339	{
sahilmgandhi	18:6a4db94011d3	2340	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	2341	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	2342	}
sahilmgandhi	18:6a4db94011d3	2343	else
sahilmgandhi	18:6a4db94011d3	2344	{
sahilmgandhi	18:6a4db94011d3	2345	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2346	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	2347	}
sahilmgandhi	18:6a4db94011d3	2348
sahilmgandhi	18:6a4db94011d3	2349	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2350	if(FMPI2C_RequestMemoryRead(hfmpi2c, DevAddress, MemAddress, MemAddSize, FMPI2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2351	{
sahilmgandhi	18:6a4db94011d3	2352	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2353	{
sahilmgandhi	18:6a4db94011d3	2354	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2355	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2356	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2357	}
sahilmgandhi	18:6a4db94011d3	2358	else
sahilmgandhi	18:6a4db94011d3	2359	{
sahilmgandhi	18:6a4db94011d3	2360	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2361	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2362	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2363	}
sahilmgandhi	18:6a4db94011d3	2364	}
sahilmgandhi	18:6a4db94011d3	2365
sahilmgandhi	18:6a4db94011d3	2366	/* Set the FMPI2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2367	hfmpi2c->hdmarx->XferCpltCallback = FMPI2C_DMAMasterReceiveCplt;
sahilmgandhi	18:6a4db94011d3	2368
sahilmgandhi	18:6a4db94011d3	2369	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2370	hfmpi2c->hdmarx->XferErrorCallback = FMPI2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2371
sahilmgandhi	18:6a4db94011d3	2372	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2373	hfmpi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2374	hfmpi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2375
sahilmgandhi	18:6a4db94011d3	2376	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	2377	HAL_DMA_Start_IT(hfmpi2c->hdmarx, (uint32_t)&hfmpi2c->Instance->RXDR, (uint32_t)pData, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	2378
sahilmgandhi	18:6a4db94011d3	2379	/* Set NBYTES to write and reload if hfmpi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
sahilmgandhi	18:6a4db94011d3	2380	FMPI2C_TransferConfig(hfmpi2c,DevAddress, hfmpi2c->XferSize, xfermode, FMPI2C_GENERATE_START_READ);
sahilmgandhi	18:6a4db94011d3	2381
sahilmgandhi	18:6a4db94011d3	2382	/* Update XferCount value */
sahilmgandhi	18:6a4db94011d3	2383	hfmpi2c->XferCount -= hfmpi2c->XferSize;
sahilmgandhi	18:6a4db94011d3	2384
sahilmgandhi	18:6a4db94011d3	2385	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2386	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2387
sahilmgandhi	18:6a4db94011d3	2388	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2389	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_RXDMAEN;
sahilmgandhi	18:6a4db94011d3	2390
sahilmgandhi	18:6a4db94011d3	2391	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2392	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2393	process unlock */
sahilmgandhi	18:6a4db94011d3	2394	/* Enable ERR and NACK interrupts */
sahilmgandhi	18:6a4db94011d3	2395	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_ERROR_IT);
sahilmgandhi	18:6a4db94011d3	2396
sahilmgandhi	18:6a4db94011d3	2397	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2398	}
sahilmgandhi	18:6a4db94011d3	2399	else
sahilmgandhi	18:6a4db94011d3	2400	{
sahilmgandhi	18:6a4db94011d3	2401	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2402	}
sahilmgandhi	18:6a4db94011d3	2403	}
sahilmgandhi	18:6a4db94011d3	2404
sahilmgandhi	18:6a4db94011d3	2405	/**
sahilmgandhi	18:6a4db94011d3	2406	* @brief Checks if target device is ready for communication.
sahilmgandhi	18:6a4db94011d3	2407	* @note This function is used with Memory devices
sahilmgandhi	18:6a4db94011d3	2408	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2409	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2410	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2411	* @param Trials Number of trials
sahilmgandhi	18:6a4db94011d3	2412	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	2413	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2414	*/
sahilmgandhi	18:6a4db94011d3	2415	HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	2416	{
sahilmgandhi	18:6a4db94011d3	2417	uint32_t tickstart = 0;
sahilmgandhi	18:6a4db94011d3	2418
sahilmgandhi	18:6a4db94011d3	2419	__IO uint32_t FMPI2C_Trials = 0;
sahilmgandhi	18:6a4db94011d3	2420
sahilmgandhi	18:6a4db94011d3	2421	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2422	{
sahilmgandhi	18:6a4db94011d3	2423	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_BUSY) == SET)
sahilmgandhi	18:6a4db94011d3	2424	{
sahilmgandhi	18:6a4db94011d3	2425	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2426	}
sahilmgandhi	18:6a4db94011d3	2427
sahilmgandhi	18:6a4db94011d3	2428	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2429	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2430
sahilmgandhi	18:6a4db94011d3	2431	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	2432	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2433
sahilmgandhi	18:6a4db94011d3	2434	do
sahilmgandhi	18:6a4db94011d3	2435	{
sahilmgandhi	18:6a4db94011d3	2436	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2437	hfmpi2c->Instance->CR2 = FMPI2C_GENERATE_START(hfmpi2c->Init.AddressingMode,DevAddress);
sahilmgandhi	18:6a4db94011d3	2438
sahilmgandhi	18:6a4db94011d3	2439	/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
sahilmgandhi	18:6a4db94011d3	2440	/* Wait until STOPF flag is set or a NACK flag is set*/
sahilmgandhi	18:6a4db94011d3	2441	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2442	while((__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF) == RESET) && (__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_AF) == RESET) && (hfmpi2c->State != HAL_FMPI2C_STATE_TIMEOUT))
sahilmgandhi	18:6a4db94011d3	2443	{
sahilmgandhi	18:6a4db94011d3	2444	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	2445	{
sahilmgandhi	18:6a4db94011d3	2446	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	2447	{
sahilmgandhi	18:6a4db94011d3	2448	/* Device is ready */
sahilmgandhi	18:6a4db94011d3	2449	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2450	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2451	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2452	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2453	}
sahilmgandhi	18:6a4db94011d3	2454	}
sahilmgandhi	18:6a4db94011d3	2455	}
sahilmgandhi	18:6a4db94011d3	2456
sahilmgandhi	18:6a4db94011d3	2457	/* Check if the NACKF flag has not been set */
sahilmgandhi	18:6a4db94011d3	2458	if (__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_AF) == RESET)
sahilmgandhi	18:6a4db94011d3	2459	{
sahilmgandhi	18:6a4db94011d3	2460	/* Wait until STOPF flag is reset */
sahilmgandhi	18:6a4db94011d3	2461	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2462	{
sahilmgandhi	18:6a4db94011d3	2463	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2464	}
sahilmgandhi	18:6a4db94011d3	2465
sahilmgandhi	18:6a4db94011d3	2466	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	2467	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	2468
sahilmgandhi	18:6a4db94011d3	2469	/* Device is ready */
sahilmgandhi	18:6a4db94011d3	2470	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2471
sahilmgandhi	18:6a4db94011d3	2472	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2473	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2474
sahilmgandhi	18:6a4db94011d3	2475	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2476	}
sahilmgandhi	18:6a4db94011d3	2477	else
sahilmgandhi	18:6a4db94011d3	2478	{
sahilmgandhi	18:6a4db94011d3	2479	/* Wait until STOPF flag is reset */
sahilmgandhi	18:6a4db94011d3	2480	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2481	{
sahilmgandhi	18:6a4db94011d3	2482	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2483	}
sahilmgandhi	18:6a4db94011d3	2484
sahilmgandhi	18:6a4db94011d3	2485	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	2486	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	2487
sahilmgandhi	18:6a4db94011d3	2488	/* Clear STOP Flag, auto generated with autoend*/
sahilmgandhi	18:6a4db94011d3	2489	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	2490	}
sahilmgandhi	18:6a4db94011d3	2491
sahilmgandhi	18:6a4db94011d3	2492	/* Check if the maximum allowed number of trials has been reached */
sahilmgandhi	18:6a4db94011d3	2493	if (FMPI2C_Trials++ == Trials)
sahilmgandhi	18:6a4db94011d3	2494	{
sahilmgandhi	18:6a4db94011d3	2495	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2496	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_STOP;
sahilmgandhi	18:6a4db94011d3	2497
sahilmgandhi	18:6a4db94011d3	2498	/* Wait until STOPF flag is reset */
sahilmgandhi	18:6a4db94011d3	2499	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2500	{
sahilmgandhi	18:6a4db94011d3	2501	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2502	}
sahilmgandhi	18:6a4db94011d3	2503
sahilmgandhi	18:6a4db94011d3	2504	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	2505	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	2506	}
sahilmgandhi	18:6a4db94011d3	2507	}while(FMPI2C_Trials < Trials);
sahilmgandhi	18:6a4db94011d3	2508
sahilmgandhi	18:6a4db94011d3	2509	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2510
sahilmgandhi	18:6a4db94011d3	2511	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2512	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2513
sahilmgandhi	18:6a4db94011d3	2514	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2515	}
sahilmgandhi	18:6a4db94011d3	2516	else
sahilmgandhi	18:6a4db94011d3	2517	{
sahilmgandhi	18:6a4db94011d3	2518	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2519	}
sahilmgandhi	18:6a4db94011d3	2520	}
sahilmgandhi	18:6a4db94011d3	2521
sahilmgandhi	18:6a4db94011d3	2522	/**
sahilmgandhi	18:6a4db94011d3	2523	* @brief Sequential transmit in master FMPI2C mode an amount of data in non-blocking mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	2524	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	2525	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2526	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2527	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	2528	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	2529	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2530	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2531	* @param XferOptions Options of Transfer, value of @ref FMPI2C_XFEROPTIONS
sahilmgandhi	18:6a4db94011d3	2532	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2533	*/
sahilmgandhi	18:6a4db94011d3	2534	HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Transmit_IT(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	2535	{
sahilmgandhi	18:6a4db94011d3	2536	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	2537	uint32_t xferrequest = FMPI2C_GENERATE_START_WRITE;
sahilmgandhi	18:6a4db94011d3	2538
sahilmgandhi	18:6a4db94011d3	2539	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2540	assert_param(IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	2541
sahilmgandhi	18:6a4db94011d3	2542	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2543	{
sahilmgandhi	18:6a4db94011d3	2544	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2545	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2546
sahilmgandhi	18:6a4db94011d3	2547	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2548	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	2549	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2550
sahilmgandhi	18:6a4db94011d3	2551	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2552	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2553	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2554	hfmpi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	2555	hfmpi2c->XferISR = FMPI2C_Master_ISR_IT;
sahilmgandhi	18:6a4db94011d3	2556
sahilmgandhi	18:6a4db94011d3	2557	/* If size > MAX_NBYTE_SIZE, use reload mode */
sahilmgandhi	18:6a4db94011d3	2558	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	2559	{
sahilmgandhi	18:6a4db94011d3	2560	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	2561	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	2562	}
sahilmgandhi	18:6a4db94011d3	2563	else
sahilmgandhi	18:6a4db94011d3	2564	{
sahilmgandhi	18:6a4db94011d3	2565	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2566	xfermode = hfmpi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	2567
sahilmgandhi	18:6a4db94011d3	2568	/* If transfer direction not change, do not generate Restart Condition */
sahilmgandhi	18:6a4db94011d3	2569	/* Mean Previous state is same as current state */
sahilmgandhi	18:6a4db94011d3	2570	if(hfmpi2c->PreviousState == FMPI2C_STATE_SLAVE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	2571	{
sahilmgandhi	18:6a4db94011d3	2572	xferrequest = FMPI2C_NO_STARTSTOP;
sahilmgandhi	18:6a4db94011d3	2573	}
sahilmgandhi	18:6a4db94011d3	2574	}
sahilmgandhi	18:6a4db94011d3	2575
sahilmgandhi	18:6a4db94011d3	2576
sahilmgandhi	18:6a4db94011d3	2577	/* Send Slave Address and set NBYTES to write */
sahilmgandhi	18:6a4db94011d3	2578	FMPI2C_TransferConfig(hfmpi2c, DevAddress, hfmpi2c->XferSize, xfermode, xferrequest);
sahilmgandhi	18:6a4db94011d3	2579
sahilmgandhi	18:6a4db94011d3	2580	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2581	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2582
sahilmgandhi	18:6a4db94011d3	2583	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2584	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2585	process unlock */
sahilmgandhi	18:6a4db94011d3	2586	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	2587
sahilmgandhi	18:6a4db94011d3	2588	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2589	}
sahilmgandhi	18:6a4db94011d3	2590	else
sahilmgandhi	18:6a4db94011d3	2591	{
sahilmgandhi	18:6a4db94011d3	2592	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2593	}
sahilmgandhi	18:6a4db94011d3	2594	}
sahilmgandhi	18:6a4db94011d3	2595
sahilmgandhi	18:6a4db94011d3	2596	/**
sahilmgandhi	18:6a4db94011d3	2597	* @brief Sequential receive in master FMPI2C mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	2598	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	2599	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2600	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2601	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	2602	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	2603	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2604	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2605	* @param XferOptions Options of Transfer, value of @ref FMPI2C_XFEROPTIONS
sahilmgandhi	18:6a4db94011d3	2606	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2607	*/
sahilmgandhi	18:6a4db94011d3	2608	HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Receive_IT(FMPI2C_HandleTypeDef hfmpi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	2609	{
sahilmgandhi	18:6a4db94011d3	2610	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	2611	uint32_t xferrequest = FMPI2C_GENERATE_START_READ;
sahilmgandhi	18:6a4db94011d3	2612
sahilmgandhi	18:6a4db94011d3	2613	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2614	assert_param(IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	2615
sahilmgandhi	18:6a4db94011d3	2616	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2617	{
sahilmgandhi	18:6a4db94011d3	2618	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2619	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2620
sahilmgandhi	18:6a4db94011d3	2621	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2622	hfmpi2c->Mode = HAL_FMPI2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	2623	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2624
sahilmgandhi	18:6a4db94011d3	2625	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2626	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2627	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2628	hfmpi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	2629	hfmpi2c->XferISR = FMPI2C_Master_ISR_IT;
sahilmgandhi	18:6a4db94011d3	2630
sahilmgandhi	18:6a4db94011d3	2631	/* If hfmpi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */
sahilmgandhi	18:6a4db94011d3	2632	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	2633	{
sahilmgandhi	18:6a4db94011d3	2634	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	2635	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	2636	}
sahilmgandhi	18:6a4db94011d3	2637	else
sahilmgandhi	18:6a4db94011d3	2638	{
sahilmgandhi	18:6a4db94011d3	2639	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2640	xfermode = hfmpi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	2641
sahilmgandhi	18:6a4db94011d3	2642	/* If transfer direction not change, do not generate Restart Condition */
sahilmgandhi	18:6a4db94011d3	2643	/* Mean Previous state is same as current state */
sahilmgandhi	18:6a4db94011d3	2644	if(hfmpi2c->PreviousState == FMPI2C_STATE_MASTER_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	2645	{
sahilmgandhi	18:6a4db94011d3	2646	xferrequest = FMPI2C_NO_STARTSTOP;
sahilmgandhi	18:6a4db94011d3	2647	}
sahilmgandhi	18:6a4db94011d3	2648	}
sahilmgandhi	18:6a4db94011d3	2649
sahilmgandhi	18:6a4db94011d3	2650	/* Send Slave Address and set NBYTES to read */
sahilmgandhi	18:6a4db94011d3	2651	FMPI2C_TransferConfig(hfmpi2c,DevAddress, hfmpi2c->XferSize, xfermode, xferrequest);
sahilmgandhi	18:6a4db94011d3	2652
sahilmgandhi	18:6a4db94011d3	2653	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2654	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2655
sahilmgandhi	18:6a4db94011d3	2656	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2657	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2658	process unlock */
sahilmgandhi	18:6a4db94011d3	2659	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	2660
sahilmgandhi	18:6a4db94011d3	2661	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2662	}
sahilmgandhi	18:6a4db94011d3	2663	else
sahilmgandhi	18:6a4db94011d3	2664	{
sahilmgandhi	18:6a4db94011d3	2665	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2666	}
sahilmgandhi	18:6a4db94011d3	2667	}
sahilmgandhi	18:6a4db94011d3	2668
sahilmgandhi	18:6a4db94011d3	2669	/**
sahilmgandhi	18:6a4db94011d3	2670	* @brief Sequential transmit in slave/device FMPI2C mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	2671	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	2672	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2673	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2674	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2675	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2676	* @param XferOptions Options of Transfer, value of @ref FMPI2C_XFEROPTIONS
sahilmgandhi	18:6a4db94011d3	2677	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2678	*/
sahilmgandhi	18:6a4db94011d3	2679	HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Transmit_IT(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	2680	{
sahilmgandhi	18:6a4db94011d3	2681	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2682	assert_param(IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	2683
sahilmgandhi	18:6a4db94011d3	2684	if(hfmpi2c->State == HAL_FMPI2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	2685	{
sahilmgandhi	18:6a4db94011d3	2686	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	2687	{
sahilmgandhi	18:6a4db94011d3	2688	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2689	}
sahilmgandhi	18:6a4db94011d3	2690
sahilmgandhi	18:6a4db94011d3	2691	/* Disable Interrupts, to prevent preemption during treatment in case of multicall */
sahilmgandhi	18:6a4db94011d3	2692	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT \| FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	2693
sahilmgandhi	18:6a4db94011d3	2694	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2695	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2696
sahilmgandhi	18:6a4db94011d3	2697	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_TX_LISTEN;
sahilmgandhi	18:6a4db94011d3	2698	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	2699	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2700
sahilmgandhi	18:6a4db94011d3	2701	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	2702	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	2703
sahilmgandhi	18:6a4db94011d3	2704	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2705	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2706	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2707	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2708	hfmpi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	2709	hfmpi2c->XferISR = FMPI2C_Slave_ISR_IT;
sahilmgandhi	18:6a4db94011d3	2710
sahilmgandhi	18:6a4db94011d3	2711	if(FMPI2C_GET_DIR(hfmpi2c) == FMPI2C_DIRECTION_RECEIVE)
sahilmgandhi	18:6a4db94011d3	2712	{
sahilmgandhi	18:6a4db94011d3	2713	/* Clear ADDR flag after prepare the transfer parameters */
sahilmgandhi	18:6a4db94011d3	2714	/* This action will generate an acknowledge to the Master */
sahilmgandhi	18:6a4db94011d3	2715	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	2716	}
sahilmgandhi	18:6a4db94011d3	2717
sahilmgandhi	18:6a4db94011d3	2718	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2719	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2720
sahilmgandhi	18:6a4db94011d3	2721	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2722	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2723	process unlock */
sahilmgandhi	18:6a4db94011d3	2724	/* REnable ADDR interrupt */
sahilmgandhi	18:6a4db94011d3	2725	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT \| FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	2726
sahilmgandhi	18:6a4db94011d3	2727	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2728	}
sahilmgandhi	18:6a4db94011d3	2729	else
sahilmgandhi	18:6a4db94011d3	2730	{
sahilmgandhi	18:6a4db94011d3	2731	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2732	}
sahilmgandhi	18:6a4db94011d3	2733	}
sahilmgandhi	18:6a4db94011d3	2734
sahilmgandhi	18:6a4db94011d3	2735	/**
sahilmgandhi	18:6a4db94011d3	2736	* @brief Sequential receive in slave/device FMPI2C mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	2737	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	2738	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2739	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2740	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2741	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2742	* @param XferOptions Options of Transfer, value of @ref FMPI2C_XFEROPTIONS
sahilmgandhi	18:6a4db94011d3	2743	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2744	*/
sahilmgandhi	18:6a4db94011d3	2745	HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Receive_IT(FMPI2C_HandleTypeDef hfmpi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	2746	{
sahilmgandhi	18:6a4db94011d3	2747	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2748	assert_param(IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	2749
sahilmgandhi	18:6a4db94011d3	2750	if(hfmpi2c->State == HAL_FMPI2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	2751	{
sahilmgandhi	18:6a4db94011d3	2752	if((pData == NULL) \|\| (Size == 0))
sahilmgandhi	18:6a4db94011d3	2753	{
sahilmgandhi	18:6a4db94011d3	2754	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2755	}
sahilmgandhi	18:6a4db94011d3	2756
sahilmgandhi	18:6a4db94011d3	2757	/* Disable Interrupts, to prevent preemption during treatment in case of multicall */
sahilmgandhi	18:6a4db94011d3	2758	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT \| FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	2759
sahilmgandhi	18:6a4db94011d3	2760	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2761	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2762
sahilmgandhi	18:6a4db94011d3	2763	hfmpi2c->State = HAL_FMPI2C_STATE_BUSY_RX_LISTEN;
sahilmgandhi	18:6a4db94011d3	2764	hfmpi2c->Mode = HAL_FMPI2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	2765	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2766
sahilmgandhi	18:6a4db94011d3	2767	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	2768	hfmpi2c->Instance->CR2 &= ~FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	2769
sahilmgandhi	18:6a4db94011d3	2770	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2771	hfmpi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2772	hfmpi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2773	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2774	hfmpi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	2775	hfmpi2c->XferISR = FMPI2C_Slave_ISR_IT;
sahilmgandhi	18:6a4db94011d3	2776
sahilmgandhi	18:6a4db94011d3	2777	if(FMPI2C_GET_DIR(hfmpi2c) == FMPI2C_DIRECTION_TRANSMIT)
sahilmgandhi	18:6a4db94011d3	2778	{
sahilmgandhi	18:6a4db94011d3	2779	/* Clear ADDR flag after prepare the transfer parameters */
sahilmgandhi	18:6a4db94011d3	2780	/* This action will generate an acknowledge to the Master */
sahilmgandhi	18:6a4db94011d3	2781	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	2782	}
sahilmgandhi	18:6a4db94011d3	2783
sahilmgandhi	18:6a4db94011d3	2784	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2785	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2786
sahilmgandhi	18:6a4db94011d3	2787	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2788	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2789	process unlock */
sahilmgandhi	18:6a4db94011d3	2790	/* REnable ADDR interrupt */
sahilmgandhi	18:6a4db94011d3	2791	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT \| FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	2792
sahilmgandhi	18:6a4db94011d3	2793	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2794	}
sahilmgandhi	18:6a4db94011d3	2795	else
sahilmgandhi	18:6a4db94011d3	2796	{
sahilmgandhi	18:6a4db94011d3	2797	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2798	}
sahilmgandhi	18:6a4db94011d3	2799	}
sahilmgandhi	18:6a4db94011d3	2800
sahilmgandhi	18:6a4db94011d3	2801	/**
sahilmgandhi	18:6a4db94011d3	2802	* @brief Enable the Address listen mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	2803	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2804	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2805	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2806	*/
sahilmgandhi	18:6a4db94011d3	2807	HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	2808	{
sahilmgandhi	18:6a4db94011d3	2809	if(hfmpi2c->State == HAL_FMPI2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2810	{
sahilmgandhi	18:6a4db94011d3	2811	hfmpi2c->State = HAL_FMPI2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	2812	hfmpi2c->XferISR = FMPI2C_Slave_ISR_IT;
sahilmgandhi	18:6a4db94011d3	2813
sahilmgandhi	18:6a4db94011d3	2814	/* Enable the Address Match interrupt */
sahilmgandhi	18:6a4db94011d3	2815	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	2816
sahilmgandhi	18:6a4db94011d3	2817	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2818	}
sahilmgandhi	18:6a4db94011d3	2819	else
sahilmgandhi	18:6a4db94011d3	2820	{
sahilmgandhi	18:6a4db94011d3	2821	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2822	}
sahilmgandhi	18:6a4db94011d3	2823	}
sahilmgandhi	18:6a4db94011d3	2824
sahilmgandhi	18:6a4db94011d3	2825	/**
sahilmgandhi	18:6a4db94011d3	2826	* @brief Disable the Address listen mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	2827	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2828	* the configuration information for the specified FMPI2C
sahilmgandhi	18:6a4db94011d3	2829	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2830	*/
sahilmgandhi	18:6a4db94011d3	2831	HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	2832	{
sahilmgandhi	18:6a4db94011d3	2833	/* Declaration of tmp to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	2834	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	2835
sahilmgandhi	18:6a4db94011d3	2836	/* Disable Address listen mode only if a transfer is not ongoing */
sahilmgandhi	18:6a4db94011d3	2837	if(hfmpi2c->State == HAL_FMPI2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	2838	{
sahilmgandhi	18:6a4db94011d3	2839	tmp = (uint32_t)(hfmpi2c->State) & FMPI2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	2840	hfmpi2c->PreviousState = tmp \| (uint32_t)(hfmpi2c->Mode);
sahilmgandhi	18:6a4db94011d3	2841	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2842	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	2843	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	2844
sahilmgandhi	18:6a4db94011d3	2845	/* Disable the Address Match interrupt */
sahilmgandhi	18:6a4db94011d3	2846	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	2847
sahilmgandhi	18:6a4db94011d3	2848	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2849	}
sahilmgandhi	18:6a4db94011d3	2850	else
sahilmgandhi	18:6a4db94011d3	2851	{
sahilmgandhi	18:6a4db94011d3	2852	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2853	}
sahilmgandhi	18:6a4db94011d3	2854	}
sahilmgandhi	18:6a4db94011d3	2855
sahilmgandhi	18:6a4db94011d3	2856	/**
sahilmgandhi	18:6a4db94011d3	2857	* @brief Abort a master FMPI2C IT or DMA process communication with Interrupt.
sahilmgandhi	18:6a4db94011d3	2858	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2859	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2860	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	2861	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	2862	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2863	*/
sahilmgandhi	18:6a4db94011d3	2864	HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress)
sahilmgandhi	18:6a4db94011d3	2865	{
sahilmgandhi	18:6a4db94011d3	2866	if(hfmpi2c->Mode == HAL_FMPI2C_MODE_MASTER)
sahilmgandhi	18:6a4db94011d3	2867	{
sahilmgandhi	18:6a4db94011d3	2868	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2869	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2870
sahilmgandhi	18:6a4db94011d3	2871	/* Disable Interrupts */
sahilmgandhi	18:6a4db94011d3	2872	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	2873	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	2874
sahilmgandhi	18:6a4db94011d3	2875	/* Set State at HAL_FMPI2C_STATE_ABORT */
sahilmgandhi	18:6a4db94011d3	2876	hfmpi2c->State = HAL_FMPI2C_STATE_ABORT;
sahilmgandhi	18:6a4db94011d3	2877
sahilmgandhi	18:6a4db94011d3	2878	/* Set NBYTES to 1 to generate a dummy read on FMPI2C peripheral */
sahilmgandhi	18:6a4db94011d3	2879	/* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
sahilmgandhi	18:6a4db94011d3	2880	FMPI2C_TransferConfig(hfmpi2c, DevAddress, 1, FMPI2C_AUTOEND_MODE, FMPI2C_GENERATE_STOP);
sahilmgandhi	18:6a4db94011d3	2881
sahilmgandhi	18:6a4db94011d3	2882	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2883	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2884
sahilmgandhi	18:6a4db94011d3	2885	/* Note : The FMPI2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2886	to avoid the risk of FMPI2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2887	process unlock */
sahilmgandhi	18:6a4db94011d3	2888	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_CPLT_IT);
sahilmgandhi	18:6a4db94011d3	2889
sahilmgandhi	18:6a4db94011d3	2890	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2891	}
sahilmgandhi	18:6a4db94011d3	2892	else
sahilmgandhi	18:6a4db94011d3	2893	{
sahilmgandhi	18:6a4db94011d3	2894	/* Wrong usage of abort function */
sahilmgandhi	18:6a4db94011d3	2895	/* This function should be used only in case of abort monitored by master device */
sahilmgandhi	18:6a4db94011d3	2896	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2897	}
sahilmgandhi	18:6a4db94011d3	2898	}
sahilmgandhi	18:6a4db94011d3	2899
sahilmgandhi	18:6a4db94011d3	2900	/**
sahilmgandhi	18:6a4db94011d3	2901	* @}
sahilmgandhi	18:6a4db94011d3	2902	*/
sahilmgandhi	18:6a4db94011d3	2903
sahilmgandhi	18:6a4db94011d3	2904	/** @defgroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
sahilmgandhi	18:6a4db94011d3	2905	* @{
sahilmgandhi	18:6a4db94011d3	2906	*/
sahilmgandhi	18:6a4db94011d3	2907
sahilmgandhi	18:6a4db94011d3	2908	/**
sahilmgandhi	18:6a4db94011d3	2909	* @brief This function handles FMPI2C event interrupt request.
sahilmgandhi	18:6a4db94011d3	2910	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2911	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2912	* @retval None
sahilmgandhi	18:6a4db94011d3	2913	*/
sahilmgandhi	18:6a4db94011d3	2914	void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	2915	{
sahilmgandhi	18:6a4db94011d3	2916	/* Get current IT Flags and IT sources value */
sahilmgandhi	18:6a4db94011d3	2917	uint32_t itflags = READ_REG(hfmpi2c->Instance->ISR);
sahilmgandhi	18:6a4db94011d3	2918	uint32_t itsources = READ_REG(hfmpi2c->Instance->CR1);
sahilmgandhi	18:6a4db94011d3	2919
sahilmgandhi	18:6a4db94011d3	2920	/* FMPI2C events treatment -------------------------------------*/
sahilmgandhi	18:6a4db94011d3	2921	if(hfmpi2c->XferISR != NULL)
sahilmgandhi	18:6a4db94011d3	2922	{
sahilmgandhi	18:6a4db94011d3	2923	hfmpi2c->XferISR(hfmpi2c, itflags, itsources);
sahilmgandhi	18:6a4db94011d3	2924	}
sahilmgandhi	18:6a4db94011d3	2925	}
sahilmgandhi	18:6a4db94011d3	2926
sahilmgandhi	18:6a4db94011d3	2927	/**
sahilmgandhi	18:6a4db94011d3	2928	* @brief This function handles FMPI2C error interrupt request.
sahilmgandhi	18:6a4db94011d3	2929	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2930	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2931	* @retval None
sahilmgandhi	18:6a4db94011d3	2932	*/
sahilmgandhi	18:6a4db94011d3	2933	void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	2934	{
sahilmgandhi	18:6a4db94011d3	2935	uint32_t itflags = READ_REG(hfmpi2c->Instance->ISR);
sahilmgandhi	18:6a4db94011d3	2936	uint32_t itsources = READ_REG(hfmpi2c->Instance->CR1);
sahilmgandhi	18:6a4db94011d3	2937
sahilmgandhi	18:6a4db94011d3	2938	/* FMPI2C Bus error interrupt occurred ------------------------------------*/
sahilmgandhi	18:6a4db94011d3	2939	if(((itflags & FMPI2C_FLAG_BERR) != RESET) && ((itsources & FMPI2C_IT_ERRI) != RESET))
sahilmgandhi	18:6a4db94011d3	2940	{
sahilmgandhi	18:6a4db94011d3	2941	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_BERR;
sahilmgandhi	18:6a4db94011d3	2942
sahilmgandhi	18:6a4db94011d3	2943	/* Clear BERR flag */
sahilmgandhi	18:6a4db94011d3	2944	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_BERR);
sahilmgandhi	18:6a4db94011d3	2945	}
sahilmgandhi	18:6a4db94011d3	2946
sahilmgandhi	18:6a4db94011d3	2947	/* FMPI2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
sahilmgandhi	18:6a4db94011d3	2948	if(((itflags & FMPI2C_FLAG_OVR) != RESET) && ((itsources & FMPI2C_IT_ERRI) != RESET))
sahilmgandhi	18:6a4db94011d3	2949	{
sahilmgandhi	18:6a4db94011d3	2950	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_OVR;
sahilmgandhi	18:6a4db94011d3	2951
sahilmgandhi	18:6a4db94011d3	2952	/* Clear OVR flag */
sahilmgandhi	18:6a4db94011d3	2953	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_OVR);
sahilmgandhi	18:6a4db94011d3	2954	}
sahilmgandhi	18:6a4db94011d3	2955
sahilmgandhi	18:6a4db94011d3	2956	/* FMPI2C Arbitration Loss error interrupt occurred -------------------------------------*/
sahilmgandhi	18:6a4db94011d3	2957	if(((itflags & FMPI2C_FLAG_ARLO) != RESET) && ((itsources & FMPI2C_IT_ERRI) != RESET))
sahilmgandhi	18:6a4db94011d3	2958	{
sahilmgandhi	18:6a4db94011d3	2959	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_ARLO;
sahilmgandhi	18:6a4db94011d3	2960
sahilmgandhi	18:6a4db94011d3	2961	/* Clear ARLO flag */
sahilmgandhi	18:6a4db94011d3	2962	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_ARLO);
sahilmgandhi	18:6a4db94011d3	2963	}
sahilmgandhi	18:6a4db94011d3	2964
sahilmgandhi	18:6a4db94011d3	2965	/* Call the Error Callback in case of Error detected */
sahilmgandhi	18:6a4db94011d3	2966	if((hfmpi2c->ErrorCode & (HAL_FMPI2C_ERROR_BERR \| HAL_FMPI2C_ERROR_OVR \| HAL_FMPI2C_ERROR_ARLO)) != HAL_FMPI2C_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	2967	{
sahilmgandhi	18:6a4db94011d3	2968	FMPI2C_ITError(hfmpi2c, hfmpi2c->ErrorCode);
sahilmgandhi	18:6a4db94011d3	2969	}
sahilmgandhi	18:6a4db94011d3	2970	}
sahilmgandhi	18:6a4db94011d3	2971
sahilmgandhi	18:6a4db94011d3	2972	/**
sahilmgandhi	18:6a4db94011d3	2973	* @brief Master Tx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	2974	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2975	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2976	* @retval None
sahilmgandhi	18:6a4db94011d3	2977	*/
sahilmgandhi	18:6a4db94011d3	2978	__weak void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	2979	{
sahilmgandhi	18:6a4db94011d3	2980	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2981	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2982
sahilmgandhi	18:6a4db94011d3	2983	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	2984	the HAL_FMPI2C_MasterTxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	2985	*/
sahilmgandhi	18:6a4db94011d3	2986	}
sahilmgandhi	18:6a4db94011d3	2987
sahilmgandhi	18:6a4db94011d3	2988	/**
sahilmgandhi	18:6a4db94011d3	2989	* @brief Master Rx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	2990	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2991	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	2992	* @retval None
sahilmgandhi	18:6a4db94011d3	2993	*/
sahilmgandhi	18:6a4db94011d3	2994	__weak void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	2995	{
sahilmgandhi	18:6a4db94011d3	2996	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2997	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	2998
sahilmgandhi	18:6a4db94011d3	2999	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3000	the HAL_FMPI2C_MasterRxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3001	*/
sahilmgandhi	18:6a4db94011d3	3002	}
sahilmgandhi	18:6a4db94011d3	3003
sahilmgandhi	18:6a4db94011d3	3004	/** @brief Slave Tx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3005	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3006	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3007	* @retval None
sahilmgandhi	18:6a4db94011d3	3008	*/
sahilmgandhi	18:6a4db94011d3	3009	__weak void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3010	{
sahilmgandhi	18:6a4db94011d3	3011	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3012	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3013
sahilmgandhi	18:6a4db94011d3	3014	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3015	the HAL_FMPI2C_SlaveTxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3016	*/
sahilmgandhi	18:6a4db94011d3	3017	}
sahilmgandhi	18:6a4db94011d3	3018
sahilmgandhi	18:6a4db94011d3	3019	/**
sahilmgandhi	18:6a4db94011d3	3020	* @brief Slave Rx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3021	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3022	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3023	* @retval None
sahilmgandhi	18:6a4db94011d3	3024	*/
sahilmgandhi	18:6a4db94011d3	3025	__weak void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3026	{
sahilmgandhi	18:6a4db94011d3	3027	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3028	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3029
sahilmgandhi	18:6a4db94011d3	3030	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3031	the HAL_FMPI2C_SlaveRxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3032	*/
sahilmgandhi	18:6a4db94011d3	3033	}
sahilmgandhi	18:6a4db94011d3	3034
sahilmgandhi	18:6a4db94011d3	3035	/**
sahilmgandhi	18:6a4db94011d3	3036	* @brief Slave Address Match callback.
sahilmgandhi	18:6a4db94011d3	3037	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3038	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3039	* @param TransferDirection: Master request Transfer Direction (Write/Read), value of @ref FMPI2C_XFEROPTIONS
sahilmgandhi	18:6a4db94011d3	3040	* @param AddrMatchCode: Address Match Code
sahilmgandhi	18:6a4db94011d3	3041	* @retval None
sahilmgandhi	18:6a4db94011d3	3042	*/
sahilmgandhi	18:6a4db94011d3	3043	__weak void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
sahilmgandhi	18:6a4db94011d3	3044	{
sahilmgandhi	18:6a4db94011d3	3045	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3046	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3047	UNUSED(TransferDirection);
sahilmgandhi	18:6a4db94011d3	3048	UNUSED(AddrMatchCode);
sahilmgandhi	18:6a4db94011d3	3049
sahilmgandhi	18:6a4db94011d3	3050	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3051	the HAL_FMPI2C_AddrCallback() could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3052	*/
sahilmgandhi	18:6a4db94011d3	3053	}
sahilmgandhi	18:6a4db94011d3	3054
sahilmgandhi	18:6a4db94011d3	3055	/**
sahilmgandhi	18:6a4db94011d3	3056	* @brief Listen Complete callback.
sahilmgandhi	18:6a4db94011d3	3057	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3058	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3059	* @retval None
sahilmgandhi	18:6a4db94011d3	3060	*/
sahilmgandhi	18:6a4db94011d3	3061	__weak void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3062	{
sahilmgandhi	18:6a4db94011d3	3063	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3064	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3065
sahilmgandhi	18:6a4db94011d3	3066	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3067	the HAL_FMPI2C_ListenCpltCallback() could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3068	*/
sahilmgandhi	18:6a4db94011d3	3069	}
sahilmgandhi	18:6a4db94011d3	3070
sahilmgandhi	18:6a4db94011d3	3071	/**
sahilmgandhi	18:6a4db94011d3	3072	* @brief Memory Tx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3073	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3074	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3075	* @retval None
sahilmgandhi	18:6a4db94011d3	3076	*/
sahilmgandhi	18:6a4db94011d3	3077	__weak void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3078	{
sahilmgandhi	18:6a4db94011d3	3079	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3080	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3081
sahilmgandhi	18:6a4db94011d3	3082	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3083	the HAL_FMPI2C_MemTxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3084	*/
sahilmgandhi	18:6a4db94011d3	3085	}
sahilmgandhi	18:6a4db94011d3	3086
sahilmgandhi	18:6a4db94011d3	3087	/**
sahilmgandhi	18:6a4db94011d3	3088	* @brief Memory Rx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3089	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3090	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3091	* @retval None
sahilmgandhi	18:6a4db94011d3	3092	*/
sahilmgandhi	18:6a4db94011d3	3093	__weak void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3094	{
sahilmgandhi	18:6a4db94011d3	3095	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3096	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3097
sahilmgandhi	18:6a4db94011d3	3098	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3099	the HAL_FMPI2C_MemRxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3100	*/
sahilmgandhi	18:6a4db94011d3	3101	}
sahilmgandhi	18:6a4db94011d3	3102
sahilmgandhi	18:6a4db94011d3	3103	/**
sahilmgandhi	18:6a4db94011d3	3104	* @brief FMPI2C error callback.
sahilmgandhi	18:6a4db94011d3	3105	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3106	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3107	* @retval None
sahilmgandhi	18:6a4db94011d3	3108	*/
sahilmgandhi	18:6a4db94011d3	3109	__weak void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3110	{
sahilmgandhi	18:6a4db94011d3	3111	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3112	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3113
sahilmgandhi	18:6a4db94011d3	3114	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3115	the HAL_FMPI2C_ErrorCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3116	*/
sahilmgandhi	18:6a4db94011d3	3117	}
sahilmgandhi	18:6a4db94011d3	3118
sahilmgandhi	18:6a4db94011d3	3119	/**
sahilmgandhi	18:6a4db94011d3	3120	* @brief FMPI2C abort callback.
sahilmgandhi	18:6a4db94011d3	3121	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3122	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3123	* @retval None
sahilmgandhi	18:6a4db94011d3	3124	*/
sahilmgandhi	18:6a4db94011d3	3125	__weak void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3126	{
sahilmgandhi	18:6a4db94011d3	3127	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3128	UNUSED(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3129
sahilmgandhi	18:6a4db94011d3	3130	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3131	the HAL_FMPI2C_AbortCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3132	*/
sahilmgandhi	18:6a4db94011d3	3133	}
sahilmgandhi	18:6a4db94011d3	3134
sahilmgandhi	18:6a4db94011d3	3135	/**
sahilmgandhi	18:6a4db94011d3	3136	* @}
sahilmgandhi	18:6a4db94011d3	3137	*/
sahilmgandhi	18:6a4db94011d3	3138
sahilmgandhi	18:6a4db94011d3	3139	/** @defgroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
sahilmgandhi	18:6a4db94011d3	3140	* @brief Peripheral State, Mode and Error functions
sahilmgandhi	18:6a4db94011d3	3141	*
sahilmgandhi	18:6a4db94011d3	3142	@verbatim
sahilmgandhi	18:6a4db94011d3	3143	===============================================================================
sahilmgandhi	18:6a4db94011d3	3144	##### Peripheral State, Mode and Error functions #####
sahilmgandhi	18:6a4db94011d3	3145	===============================================================================
sahilmgandhi	18:6a4db94011d3	3146	[..]
sahilmgandhi	18:6a4db94011d3	3147	This subsection permit to get in run-time the status of the peripheral
sahilmgandhi	18:6a4db94011d3	3148	and the data flow.
sahilmgandhi	18:6a4db94011d3	3149
sahilmgandhi	18:6a4db94011d3	3150	@endverbatim
sahilmgandhi	18:6a4db94011d3	3151	* @{
sahilmgandhi	18:6a4db94011d3	3152	*/
sahilmgandhi	18:6a4db94011d3	3153
sahilmgandhi	18:6a4db94011d3	3154	/**
sahilmgandhi	18:6a4db94011d3	3155	* @brief Return the FMPI2C handle state.
sahilmgandhi	18:6a4db94011d3	3156	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3157	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3158	* @retval HAL state
sahilmgandhi	18:6a4db94011d3	3159	*/
sahilmgandhi	18:6a4db94011d3	3160	HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3161	{
sahilmgandhi	18:6a4db94011d3	3162	/* Return FMPI2C handle state */
sahilmgandhi	18:6a4db94011d3	3163	return hfmpi2c->State;
sahilmgandhi	18:6a4db94011d3	3164	}
sahilmgandhi	18:6a4db94011d3	3165
sahilmgandhi	18:6a4db94011d3	3166	/**
sahilmgandhi	18:6a4db94011d3	3167	* @brief Returns the FMPI2C Master, Slave, Memory or no mode.
sahilmgandhi	18:6a4db94011d3	3168	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3169	* the configuration information for FMPI2C module
sahilmgandhi	18:6a4db94011d3	3170	* @retval HAL mode
sahilmgandhi	18:6a4db94011d3	3171	*/
sahilmgandhi	18:6a4db94011d3	3172	HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3173	{
sahilmgandhi	18:6a4db94011d3	3174	return hfmpi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3175	}
sahilmgandhi	18:6a4db94011d3	3176
sahilmgandhi	18:6a4db94011d3	3177	/**
sahilmgandhi	18:6a4db94011d3	3178	* @brief Return the FMPI2C error code.
sahilmgandhi	18:6a4db94011d3	3179	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3180	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3181	* @retval FMPI2C Error Code
sahilmgandhi	18:6a4db94011d3	3182	*/
sahilmgandhi	18:6a4db94011d3	3183	uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3184	{
sahilmgandhi	18:6a4db94011d3	3185	return hfmpi2c->ErrorCode;
sahilmgandhi	18:6a4db94011d3	3186	}
sahilmgandhi	18:6a4db94011d3	3187
sahilmgandhi	18:6a4db94011d3	3188	/**
sahilmgandhi	18:6a4db94011d3	3189	* @}
sahilmgandhi	18:6a4db94011d3	3190	*/
sahilmgandhi	18:6a4db94011d3	3191
sahilmgandhi	18:6a4db94011d3	3192	/**
sahilmgandhi	18:6a4db94011d3	3193	* @}
sahilmgandhi	18:6a4db94011d3	3194	*/
sahilmgandhi	18:6a4db94011d3	3195
sahilmgandhi	18:6a4db94011d3	3196	/** @addtogroup FMPI2C_Private_Functions
sahilmgandhi	18:6a4db94011d3	3197	* @{
sahilmgandhi	18:6a4db94011d3	3198	*/
sahilmgandhi	18:6a4db94011d3	3199
sahilmgandhi	18:6a4db94011d3	3200	/**
sahilmgandhi	18:6a4db94011d3	3201	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	3202	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3203	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3204	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	3205	* @param ITSources Interrupt sources enabled.
sahilmgandhi	18:6a4db94011d3	3206	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3207	*/
sahilmgandhi	18:6a4db94011d3	3208	static HAL_StatusTypeDef FMPI2C_Master_ISR_IT(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources)
sahilmgandhi	18:6a4db94011d3	3209	{
sahilmgandhi	18:6a4db94011d3	3210	uint16_t devaddress = 0;
sahilmgandhi	18:6a4db94011d3	3211
sahilmgandhi	18:6a4db94011d3	3212	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	3213	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3214
sahilmgandhi	18:6a4db94011d3	3215	if(((ITFlags & FMPI2C_FLAG_AF) != RESET) && ((ITSources & FMPI2C_IT_NACKI) != RESET))
sahilmgandhi	18:6a4db94011d3	3216	{
sahilmgandhi	18:6a4db94011d3	3217	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3218	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3219
sahilmgandhi	18:6a4db94011d3	3220	/* Set corresponding Error Code */
sahilmgandhi	18:6a4db94011d3	3221	/* No need to generate STOP, it is automatically done */
sahilmgandhi	18:6a4db94011d3	3222	/* Error callback will be send during stop flag treatment */
sahilmgandhi	18:6a4db94011d3	3223	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3224
sahilmgandhi	18:6a4db94011d3	3225	/* Flush TX register */
sahilmgandhi	18:6a4db94011d3	3226	FMPI2C_Flush_TXDR(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3227	}
sahilmgandhi	18:6a4db94011d3	3228	else if(((ITFlags & FMPI2C_FLAG_RXNE) != RESET) && ((ITSources & FMPI2C_IT_RXI) != RESET))
sahilmgandhi	18:6a4db94011d3	3229	{
sahilmgandhi	18:6a4db94011d3	3230	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	3231	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	3232	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	3233	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3234	}
sahilmgandhi	18:6a4db94011d3	3235	else if(((ITFlags & FMPI2C_FLAG_TXIS) != RESET) && ((ITSources & FMPI2C_IT_TXI) != RESET))
sahilmgandhi	18:6a4db94011d3	3236	{
sahilmgandhi	18:6a4db94011d3	3237	/* Write data to TXDR */
sahilmgandhi	18:6a4db94011d3	3238	hfmpi2c->Instance->TXDR = (*hfmpi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3239	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	3240	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3241	}
sahilmgandhi	18:6a4db94011d3	3242	else if(((ITFlags & FMPI2C_FLAG_TCR) != RESET) && ((ITSources & FMPI2C_IT_TCI) != RESET))
sahilmgandhi	18:6a4db94011d3	3243	{
sahilmgandhi	18:6a4db94011d3	3244	if((hfmpi2c->XferSize == 0) && (hfmpi2c->XferCount != 0))
sahilmgandhi	18:6a4db94011d3	3245	{
sahilmgandhi	18:6a4db94011d3	3246	devaddress = (hfmpi2c->Instance->CR2 & FMPI2C_CR2_SADD);
sahilmgandhi	18:6a4db94011d3	3247
sahilmgandhi	18:6a4db94011d3	3248	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	3249	{
sahilmgandhi	18:6a4db94011d3	3250	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	3251	FMPI2C_TransferConfig(hfmpi2c, devaddress, hfmpi2c->XferSize, FMPI2C_RELOAD_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	3252	}
sahilmgandhi	18:6a4db94011d3	3253	else
sahilmgandhi	18:6a4db94011d3	3254	{
sahilmgandhi	18:6a4db94011d3	3255	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	3256	if(hfmpi2c->XferOptions != FMPI2C_NO_OPTION_FRAME)
sahilmgandhi	18:6a4db94011d3	3257	{
sahilmgandhi	18:6a4db94011d3	3258	FMPI2C_TransferConfig(hfmpi2c, devaddress, hfmpi2c->XferSize, hfmpi2c->XferOptions, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	3259	}
sahilmgandhi	18:6a4db94011d3	3260	else
sahilmgandhi	18:6a4db94011d3	3261	{
sahilmgandhi	18:6a4db94011d3	3262	FMPI2C_TransferConfig(hfmpi2c, devaddress, hfmpi2c->XferSize, FMPI2C_AUTOEND_MODE, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	3263	}
sahilmgandhi	18:6a4db94011d3	3264	}
sahilmgandhi	18:6a4db94011d3	3265	}
sahilmgandhi	18:6a4db94011d3	3266	else
sahilmgandhi	18:6a4db94011d3	3267	{
sahilmgandhi	18:6a4db94011d3	3268	/* Call TxCpltCallback() if no stop mode is set */
sahilmgandhi	18:6a4db94011d3	3269	if((FMPI2C_GET_STOP_MODE(hfmpi2c) != FMPI2C_AUTOEND_MODE)&&(hfmpi2c->Mode == HAL_FMPI2C_MODE_MASTER))
sahilmgandhi	18:6a4db94011d3	3270	{
sahilmgandhi	18:6a4db94011d3	3271	/* Call FMPI2C Master Sequential complete process */
sahilmgandhi	18:6a4db94011d3	3272	FMPI2C_ITMasterSequentialCplt(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3273	}
sahilmgandhi	18:6a4db94011d3	3274	else
sahilmgandhi	18:6a4db94011d3	3275	{
sahilmgandhi	18:6a4db94011d3	3276	/* Wrong size Status regarding TCR flag event */
sahilmgandhi	18:6a4db94011d3	3277	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3278	FMPI2C_ITError(hfmpi2c, HAL_FMPI2C_ERROR_SIZE);
sahilmgandhi	18:6a4db94011d3	3279	}
sahilmgandhi	18:6a4db94011d3	3280	}
sahilmgandhi	18:6a4db94011d3	3281	}
sahilmgandhi	18:6a4db94011d3	3282	else if(((ITFlags & FMPI2C_FLAG_TC) != RESET) && ((ITSources & FMPI2C_IT_TCI) != RESET))
sahilmgandhi	18:6a4db94011d3	3283	{
sahilmgandhi	18:6a4db94011d3	3284	if(hfmpi2c->XferCount == 0)
sahilmgandhi	18:6a4db94011d3	3285	{
sahilmgandhi	18:6a4db94011d3	3286	if((FMPI2C_GET_STOP_MODE(hfmpi2c) != FMPI2C_AUTOEND_MODE)&&(hfmpi2c->Mode == HAL_FMPI2C_MODE_MASTER))
sahilmgandhi	18:6a4db94011d3	3287	{
sahilmgandhi	18:6a4db94011d3	3288	/* Call FMPI2C Master Sequential complete process */
sahilmgandhi	18:6a4db94011d3	3289	FMPI2C_ITMasterSequentialCplt(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3290	}
sahilmgandhi	18:6a4db94011d3	3291	}
sahilmgandhi	18:6a4db94011d3	3292	else
sahilmgandhi	18:6a4db94011d3	3293	{
sahilmgandhi	18:6a4db94011d3	3294	/* Wrong size Status regarding TC flag event */
sahilmgandhi	18:6a4db94011d3	3295	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3296	FMPI2C_ITError(hfmpi2c, HAL_FMPI2C_ERROR_SIZE);
sahilmgandhi	18:6a4db94011d3	3297	}
sahilmgandhi	18:6a4db94011d3	3298	}
sahilmgandhi	18:6a4db94011d3	3299
sahilmgandhi	18:6a4db94011d3	3300	if(((ITFlags & FMPI2C_FLAG_STOPF) != RESET) && ((ITSources & FMPI2C_IT_STOPI) != RESET))
sahilmgandhi	18:6a4db94011d3	3301	{
sahilmgandhi	18:6a4db94011d3	3302	/* Call FMPI2C Master complete process */
sahilmgandhi	18:6a4db94011d3	3303	FMPI2C_ITMasterCplt(hfmpi2c, ITFlags);
sahilmgandhi	18:6a4db94011d3	3304	}
sahilmgandhi	18:6a4db94011d3	3305
sahilmgandhi	18:6a4db94011d3	3306	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3307	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3308
sahilmgandhi	18:6a4db94011d3	3309	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3310	}
sahilmgandhi	18:6a4db94011d3	3311
sahilmgandhi	18:6a4db94011d3	3312	/**
sahilmgandhi	18:6a4db94011d3	3313	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	3314	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3315	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3316	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	3317	* @param ITSources Interrupt sources enabled.
sahilmgandhi	18:6a4db94011d3	3318	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3319	*/
sahilmgandhi	18:6a4db94011d3	3320	static HAL_StatusTypeDef FMPI2C_Slave_ISR_IT(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources)
sahilmgandhi	18:6a4db94011d3	3321	{
sahilmgandhi	18:6a4db94011d3	3322	/* Process locked */
sahilmgandhi	18:6a4db94011d3	3323	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3324
sahilmgandhi	18:6a4db94011d3	3325	if(((ITFlags & FMPI2C_FLAG_AF) != RESET) && ((ITSources & FMPI2C_IT_NACKI) != RESET))
sahilmgandhi	18:6a4db94011d3	3326	{
sahilmgandhi	18:6a4db94011d3	3327	/* Check that FMPI2C transfer finished */
sahilmgandhi	18:6a4db94011d3	3328	/* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
sahilmgandhi	18:6a4db94011d3	3329	/* Mean XferCount == 0*/
sahilmgandhi	18:6a4db94011d3	3330	/* So clear Flag NACKF only */
sahilmgandhi	18:6a4db94011d3	3331	if(hfmpi2c->XferCount == 0)
sahilmgandhi	18:6a4db94011d3	3332	{
sahilmgandhi	18:6a4db94011d3	3333	if(((hfmpi2c->XferOptions == FMPI2C_FIRST_AND_LAST_FRAME) \|\| (hfmpi2c->XferOptions == FMPI2C_LAST_FRAME)) && \
sahilmgandhi	18:6a4db94011d3	3334	(hfmpi2c->State == HAL_FMPI2C_STATE_LISTEN))
sahilmgandhi	18:6a4db94011d3	3335	{
sahilmgandhi	18:6a4db94011d3	3336	/* Call FMPI2C Listen complete process */
sahilmgandhi	18:6a4db94011d3	3337	FMPI2C_ITListenCplt(hfmpi2c, ITFlags);
sahilmgandhi	18:6a4db94011d3	3338	}
sahilmgandhi	18:6a4db94011d3	3339	else if((hfmpi2c->XferOptions != FMPI2C_NO_OPTION_FRAME) && (hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_TX_LISTEN))
sahilmgandhi	18:6a4db94011d3	3340	{
sahilmgandhi	18:6a4db94011d3	3341	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3342	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3343
sahilmgandhi	18:6a4db94011d3	3344	/* Flush TX register */
sahilmgandhi	18:6a4db94011d3	3345	FMPI2C_Flush_TXDR(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3346
sahilmgandhi	18:6a4db94011d3	3347	/* Last Byte is Transmitted */
sahilmgandhi	18:6a4db94011d3	3348	/* Call FMPI2C Slave Sequential complete process */
sahilmgandhi	18:6a4db94011d3	3349	FMPI2C_ITSlaveSequentialCplt(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3350	}
sahilmgandhi	18:6a4db94011d3	3351	else
sahilmgandhi	18:6a4db94011d3	3352	{
sahilmgandhi	18:6a4db94011d3	3353	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3354	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3355	}
sahilmgandhi	18:6a4db94011d3	3356	}
sahilmgandhi	18:6a4db94011d3	3357	else
sahilmgandhi	18:6a4db94011d3	3358	{
sahilmgandhi	18:6a4db94011d3	3359	/* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
sahilmgandhi	18:6a4db94011d3	3360	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3361	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3362
sahilmgandhi	18:6a4db94011d3	3363	/* Set ErrorCode corresponding to a Non-Acknowledge */
sahilmgandhi	18:6a4db94011d3	3364	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3365	}
sahilmgandhi	18:6a4db94011d3	3366	}
sahilmgandhi	18:6a4db94011d3	3367	else if(((ITFlags & FMPI2C_FLAG_RXNE) != RESET) && ((ITSources & FMPI2C_IT_RXI) != RESET))
sahilmgandhi	18:6a4db94011d3	3368	{
sahilmgandhi	18:6a4db94011d3	3369	if(hfmpi2c->XferCount > 0)
sahilmgandhi	18:6a4db94011d3	3370	{
sahilmgandhi	18:6a4db94011d3	3371	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	3372	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	3373	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	3374	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3375	}
sahilmgandhi	18:6a4db94011d3	3376
sahilmgandhi	18:6a4db94011d3	3377	if((hfmpi2c->XferCount == 0) && \
sahilmgandhi	18:6a4db94011d3	3378	(hfmpi2c->XferOptions != FMPI2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	3379	{
sahilmgandhi	18:6a4db94011d3	3380	/* Call FMPI2C Slave Sequential complete process */
sahilmgandhi	18:6a4db94011d3	3381	FMPI2C_ITSlaveSequentialCplt(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3382	}
sahilmgandhi	18:6a4db94011d3	3383	}
sahilmgandhi	18:6a4db94011d3	3384	else if(((ITFlags & FMPI2C_FLAG_ADDR) != RESET) && ((ITSources & FMPI2C_IT_ADDRI) != RESET))
sahilmgandhi	18:6a4db94011d3	3385	{
sahilmgandhi	18:6a4db94011d3	3386	FMPI2C_ITAddrCplt(hfmpi2c, ITFlags);
sahilmgandhi	18:6a4db94011d3	3387	}
sahilmgandhi	18:6a4db94011d3	3388	else if(((ITFlags & FMPI2C_FLAG_TXIS) != RESET) && ((ITSources & FMPI2C_IT_TXI) != RESET))
sahilmgandhi	18:6a4db94011d3	3389	{
sahilmgandhi	18:6a4db94011d3	3390	/* Write data to TXDR only if XferCount not reach "0" */
sahilmgandhi	18:6a4db94011d3	3391	/* A TXIS flag can be set, during STOP treatment */
sahilmgandhi	18:6a4db94011d3	3392	/* Check if all Datas have already been sent */
sahilmgandhi	18:6a4db94011d3	3393	/* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
sahilmgandhi	18:6a4db94011d3	3394	if(hfmpi2c->XferCount > 0)
sahilmgandhi	18:6a4db94011d3	3395	{
sahilmgandhi	18:6a4db94011d3	3396	/* Write data to TXDR */
sahilmgandhi	18:6a4db94011d3	3397	hfmpi2c->Instance->TXDR = (*hfmpi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3398	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3399	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	3400	}
sahilmgandhi	18:6a4db94011d3	3401	else
sahilmgandhi	18:6a4db94011d3	3402	{
sahilmgandhi	18:6a4db94011d3	3403	if((hfmpi2c->XferOptions == FMPI2C_NEXT_FRAME) \|\| (hfmpi2c->XferOptions == FMPI2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	3404	{
sahilmgandhi	18:6a4db94011d3	3405	/* Last Byte is Transmitted */
sahilmgandhi	18:6a4db94011d3	3406	/* Call FMPI2C Slave Sequential complete process */
sahilmgandhi	18:6a4db94011d3	3407	FMPI2C_ITSlaveSequentialCplt(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3408	}
sahilmgandhi	18:6a4db94011d3	3409	}
sahilmgandhi	18:6a4db94011d3	3410	}
sahilmgandhi	18:6a4db94011d3	3411
sahilmgandhi	18:6a4db94011d3	3412	/* Check if STOPF is set */
sahilmgandhi	18:6a4db94011d3	3413	if(((ITFlags & FMPI2C_FLAG_STOPF) != RESET) && ((ITSources & FMPI2C_IT_STOPI) != RESET))
sahilmgandhi	18:6a4db94011d3	3414	{
sahilmgandhi	18:6a4db94011d3	3415	/* Call FMPI2C Slave complete process */
sahilmgandhi	18:6a4db94011d3	3416	FMPI2C_ITSlaveCplt(hfmpi2c, ITFlags);
sahilmgandhi	18:6a4db94011d3	3417	}
sahilmgandhi	18:6a4db94011d3	3418
sahilmgandhi	18:6a4db94011d3	3419	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3420	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3421
sahilmgandhi	18:6a4db94011d3	3422	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3423	}
sahilmgandhi	18:6a4db94011d3	3424
sahilmgandhi	18:6a4db94011d3	3425	/**
sahilmgandhi	18:6a4db94011d3	3426	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA.
sahilmgandhi	18:6a4db94011d3	3427	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3428	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3429	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	3430	* @param ITSources Interrupt sources enabled.
sahilmgandhi	18:6a4db94011d3	3431	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3432	*/
sahilmgandhi	18:6a4db94011d3	3433	static HAL_StatusTypeDef FMPI2C_Master_ISR_DMA(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources)
sahilmgandhi	18:6a4db94011d3	3434	{
sahilmgandhi	18:6a4db94011d3	3435	uint16_t devaddress = 0;
sahilmgandhi	18:6a4db94011d3	3436	uint32_t xfermode = 0;
sahilmgandhi	18:6a4db94011d3	3437
sahilmgandhi	18:6a4db94011d3	3438	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	3439	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3440
sahilmgandhi	18:6a4db94011d3	3441	if(((ITFlags & FMPI2C_FLAG_AF) != RESET) && ((ITSources & FMPI2C_IT_NACKI) != RESET))
sahilmgandhi	18:6a4db94011d3	3442	{
sahilmgandhi	18:6a4db94011d3	3443	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3444	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3445
sahilmgandhi	18:6a4db94011d3	3446	/* Set corresponding Error Code */
sahilmgandhi	18:6a4db94011d3	3447	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3448
sahilmgandhi	18:6a4db94011d3	3449	/* No need to generate STOP, it is automatically done */
sahilmgandhi	18:6a4db94011d3	3450	/* But enable STOP interrupt, to treat it */
sahilmgandhi	18:6a4db94011d3	3451	/* Error callback will be send during stop flag treatment */
sahilmgandhi	18:6a4db94011d3	3452	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_CPLT_IT);
sahilmgandhi	18:6a4db94011d3	3453
sahilmgandhi	18:6a4db94011d3	3454	/* Flush TX register */
sahilmgandhi	18:6a4db94011d3	3455	FMPI2C_Flush_TXDR(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3456	}
sahilmgandhi	18:6a4db94011d3	3457	else if(((ITFlags & FMPI2C_FLAG_TCR) != RESET) && ((ITSources & FMPI2C_IT_TCI) != RESET))
sahilmgandhi	18:6a4db94011d3	3458	{
sahilmgandhi	18:6a4db94011d3	3459	/* Disable TC interrupt */
sahilmgandhi	18:6a4db94011d3	3460	__HAL_FMPI2C_DISABLE_IT(hfmpi2c, FMPI2C_IT_TCI);
sahilmgandhi	18:6a4db94011d3	3461
sahilmgandhi	18:6a4db94011d3	3462	if(hfmpi2c->XferCount != 0)
sahilmgandhi	18:6a4db94011d3	3463	{
sahilmgandhi	18:6a4db94011d3	3464	/* Recover Slave address */
sahilmgandhi	18:6a4db94011d3	3465	devaddress = (hfmpi2c->Instance->CR2 & FMPI2C_CR2_SADD);
sahilmgandhi	18:6a4db94011d3	3466
sahilmgandhi	18:6a4db94011d3	3467	/* Prepare the new XferSize to transfer */
sahilmgandhi	18:6a4db94011d3	3468	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	3469	{
sahilmgandhi	18:6a4db94011d3	3470	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	3471	xfermode = FMPI2C_RELOAD_MODE;
sahilmgandhi	18:6a4db94011d3	3472	}
sahilmgandhi	18:6a4db94011d3	3473	else
sahilmgandhi	18:6a4db94011d3	3474	{
sahilmgandhi	18:6a4db94011d3	3475	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	3476	xfermode = FMPI2C_AUTOEND_MODE;
sahilmgandhi	18:6a4db94011d3	3477	}
sahilmgandhi	18:6a4db94011d3	3478
sahilmgandhi	18:6a4db94011d3	3479	/* Set the new XferSize in Nbytes register */
sahilmgandhi	18:6a4db94011d3	3480	FMPI2C_TransferConfig(hfmpi2c, devaddress, hfmpi2c->XferSize, xfermode, FMPI2C_NO_STARTSTOP);
sahilmgandhi	18:6a4db94011d3	3481
sahilmgandhi	18:6a4db94011d3	3482	/* Update XferCount value */
sahilmgandhi	18:6a4db94011d3	3483	hfmpi2c->XferCount -= hfmpi2c->XferSize;
sahilmgandhi	18:6a4db94011d3	3484
sahilmgandhi	18:6a4db94011d3	3485	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	3486	if(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	3487	{
sahilmgandhi	18:6a4db94011d3	3488	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_RXDMAEN;
sahilmgandhi	18:6a4db94011d3	3489	}
sahilmgandhi	18:6a4db94011d3	3490	else
sahilmgandhi	18:6a4db94011d3	3491	{
sahilmgandhi	18:6a4db94011d3	3492	hfmpi2c->Instance->CR1 \|= FMPI2C_CR1_TXDMAEN;
sahilmgandhi	18:6a4db94011d3	3493	}
sahilmgandhi	18:6a4db94011d3	3494	}
sahilmgandhi	18:6a4db94011d3	3495	else
sahilmgandhi	18:6a4db94011d3	3496	{
sahilmgandhi	18:6a4db94011d3	3497	/* Wrong size Status regarding TCR flag event */
sahilmgandhi	18:6a4db94011d3	3498	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3499	FMPI2C_ITError(hfmpi2c, HAL_FMPI2C_ERROR_SIZE);
sahilmgandhi	18:6a4db94011d3	3500	}
sahilmgandhi	18:6a4db94011d3	3501	}
sahilmgandhi	18:6a4db94011d3	3502	else if(((ITFlags & FMPI2C_FLAG_STOPF) != RESET) && ((ITSources & FMPI2C_IT_STOPI) != RESET))
sahilmgandhi	18:6a4db94011d3	3503	{
sahilmgandhi	18:6a4db94011d3	3504	/* Call FMPI2C Master complete process */
sahilmgandhi	18:6a4db94011d3	3505	FMPI2C_ITMasterCplt(hfmpi2c, ITFlags);
sahilmgandhi	18:6a4db94011d3	3506	}
sahilmgandhi	18:6a4db94011d3	3507
sahilmgandhi	18:6a4db94011d3	3508	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3509	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3510
sahilmgandhi	18:6a4db94011d3	3511	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3512	}
sahilmgandhi	18:6a4db94011d3	3513
sahilmgandhi	18:6a4db94011d3	3514	/**
sahilmgandhi	18:6a4db94011d3	3515	* @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA.
sahilmgandhi	18:6a4db94011d3	3516	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3517	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3518	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	3519	* @param ITSources Interrupt sources enabled.
sahilmgandhi	18:6a4db94011d3	3520	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3521	*/
sahilmgandhi	18:6a4db94011d3	3522	static HAL_StatusTypeDef FMPI2C_Slave_ISR_DMA(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources)
sahilmgandhi	18:6a4db94011d3	3523	{
sahilmgandhi	18:6a4db94011d3	3524	/* Process locked */
sahilmgandhi	18:6a4db94011d3	3525	__HAL_LOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3526
sahilmgandhi	18:6a4db94011d3	3527	if(((ITFlags & FMPI2C_FLAG_AF) != RESET) && ((ITSources & FMPI2C_IT_NACKI) != RESET))
sahilmgandhi	18:6a4db94011d3	3528	{
sahilmgandhi	18:6a4db94011d3	3529	/* Check that FMPI2C transfer finished */
sahilmgandhi	18:6a4db94011d3	3530	/* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
sahilmgandhi	18:6a4db94011d3	3531	/* Mean XferCount == 0 */
sahilmgandhi	18:6a4db94011d3	3532	/* So clear Flag NACKF only */
sahilmgandhi	18:6a4db94011d3	3533	if(FMPI2C_GET_DMA_REMAIN_DATA(hfmpi2c) == 0)
sahilmgandhi	18:6a4db94011d3	3534	{
sahilmgandhi	18:6a4db94011d3	3535	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3536	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3537	}
sahilmgandhi	18:6a4db94011d3	3538	else
sahilmgandhi	18:6a4db94011d3	3539	{
sahilmgandhi	18:6a4db94011d3	3540	/* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
sahilmgandhi	18:6a4db94011d3	3541	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3542	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3543
sahilmgandhi	18:6a4db94011d3	3544	/* Set ErrorCode corresponding to a Non-Acknowledge */
sahilmgandhi	18:6a4db94011d3	3545	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3546	}
sahilmgandhi	18:6a4db94011d3	3547	}
sahilmgandhi	18:6a4db94011d3	3548	else if(((ITFlags & FMPI2C_FLAG_ADDR) != RESET) && ((ITSources & FMPI2C_IT_ADDRI) != RESET))
sahilmgandhi	18:6a4db94011d3	3549	{
sahilmgandhi	18:6a4db94011d3	3550	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3551	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3552	}
sahilmgandhi	18:6a4db94011d3	3553	else if(((ITFlags & FMPI2C_FLAG_STOPF) != RESET) && ((ITSources & FMPI2C_IT_STOPI) != RESET))
sahilmgandhi	18:6a4db94011d3	3554	{
sahilmgandhi	18:6a4db94011d3	3555	/* Call FMPI2C Slave complete process */
sahilmgandhi	18:6a4db94011d3	3556	FMPI2C_ITSlaveCplt(hfmpi2c, ITFlags);
sahilmgandhi	18:6a4db94011d3	3557	}
sahilmgandhi	18:6a4db94011d3	3558
sahilmgandhi	18:6a4db94011d3	3559	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3560	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3561
sahilmgandhi	18:6a4db94011d3	3562	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3563	}
sahilmgandhi	18:6a4db94011d3	3564
sahilmgandhi	18:6a4db94011d3	3565	/**
sahilmgandhi	18:6a4db94011d3	3566	* @brief Master sends target device address followed by internal memory address for write request.
sahilmgandhi	18:6a4db94011d3	3567	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3568	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3569	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	3570	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	3571	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	3572	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	3573	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	3574	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3575	*/
sahilmgandhi	18:6a4db94011d3	3576	static HAL_StatusTypeDef FMPI2C_RequestMemoryWrite(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	3577	{
sahilmgandhi	18:6a4db94011d3	3578	FMPI2C_TransferConfig(hfmpi2c,DevAddress,MemAddSize, FMPI2C_RELOAD_MODE, FMPI2C_GENERATE_START_WRITE);
sahilmgandhi	18:6a4db94011d3	3579
sahilmgandhi	18:6a4db94011d3	3580	/* Wait until TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	3581	if(FMPI2C_WaitOnTXISFlagUntilTimeout(hfmpi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3582	{
sahilmgandhi	18:6a4db94011d3	3583	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3584	{
sahilmgandhi	18:6a4db94011d3	3585	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3586	}
sahilmgandhi	18:6a4db94011d3	3587	else
sahilmgandhi	18:6a4db94011d3	3588	{
sahilmgandhi	18:6a4db94011d3	3589	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3590	}
sahilmgandhi	18:6a4db94011d3	3591	}
sahilmgandhi	18:6a4db94011d3	3592
sahilmgandhi	18:6a4db94011d3	3593	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	3594	if(MemAddSize == FMPI2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	3595	{
sahilmgandhi	18:6a4db94011d3	3596	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	3597	hfmpi2c->Instance->TXDR = FMPI2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	3598	}
sahilmgandhi	18:6a4db94011d3	3599	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	3600	else
sahilmgandhi	18:6a4db94011d3	3601	{
sahilmgandhi	18:6a4db94011d3	3602	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3603	hfmpi2c->Instance->TXDR = FMPI2C_MEM_ADD_MSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	3604
sahilmgandhi	18:6a4db94011d3	3605	/* Wait until TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	3606	if(FMPI2C_WaitOnTXISFlagUntilTimeout(hfmpi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3607	{
sahilmgandhi	18:6a4db94011d3	3608	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3609	{
sahilmgandhi	18:6a4db94011d3	3610	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3611	}
sahilmgandhi	18:6a4db94011d3	3612	else
sahilmgandhi	18:6a4db94011d3	3613	{
sahilmgandhi	18:6a4db94011d3	3614	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3615	}
sahilmgandhi	18:6a4db94011d3	3616	}
sahilmgandhi	18:6a4db94011d3	3617
sahilmgandhi	18:6a4db94011d3	3618	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3619	hfmpi2c->Instance->TXDR = FMPI2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	3620	}
sahilmgandhi	18:6a4db94011d3	3621
sahilmgandhi	18:6a4db94011d3	3622	/* Wait until TCR flag is set */
sahilmgandhi	18:6a4db94011d3	3623	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3624	{
sahilmgandhi	18:6a4db94011d3	3625	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3626	}
sahilmgandhi	18:6a4db94011d3	3627
sahilmgandhi	18:6a4db94011d3	3628	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3629	}
sahilmgandhi	18:6a4db94011d3	3630
sahilmgandhi	18:6a4db94011d3	3631	/**
sahilmgandhi	18:6a4db94011d3	3632	* @brief Master sends target device address followed by internal memory address for read request.
sahilmgandhi	18:6a4db94011d3	3633	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3634	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	3635	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	3636	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	3637	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	3638	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	3639	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	3640	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3641	*/
sahilmgandhi	18:6a4db94011d3	3642	static HAL_StatusTypeDef FMPI2C_RequestMemoryRead(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	3643	{
sahilmgandhi	18:6a4db94011d3	3644	FMPI2C_TransferConfig(hfmpi2c,DevAddress,MemAddSize, FMPI2C_SOFTEND_MODE, FMPI2C_GENERATE_START_WRITE);
sahilmgandhi	18:6a4db94011d3	3645
sahilmgandhi	18:6a4db94011d3	3646	/* Wait until TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	3647	if(FMPI2C_WaitOnTXISFlagUntilTimeout(hfmpi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3648	{
sahilmgandhi	18:6a4db94011d3	3649	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3650	{
sahilmgandhi	18:6a4db94011d3	3651	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3652	}
sahilmgandhi	18:6a4db94011d3	3653	else
sahilmgandhi	18:6a4db94011d3	3654	{
sahilmgandhi	18:6a4db94011d3	3655	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3656	}
sahilmgandhi	18:6a4db94011d3	3657	}
sahilmgandhi	18:6a4db94011d3	3658
sahilmgandhi	18:6a4db94011d3	3659	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	3660	if(MemAddSize == FMPI2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	3661	{
sahilmgandhi	18:6a4db94011d3	3662	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	3663	hfmpi2c->Instance->TXDR = FMPI2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	3664	}
sahilmgandhi	18:6a4db94011d3	3665	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	3666	else
sahilmgandhi	18:6a4db94011d3	3667	{
sahilmgandhi	18:6a4db94011d3	3668	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3669	hfmpi2c->Instance->TXDR = FMPI2C_MEM_ADD_MSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	3670
sahilmgandhi	18:6a4db94011d3	3671	/* Wait until TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	3672	if(FMPI2C_WaitOnTXISFlagUntilTimeout(hfmpi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3673	{
sahilmgandhi	18:6a4db94011d3	3674	if(hfmpi2c->ErrorCode == HAL_FMPI2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3675	{
sahilmgandhi	18:6a4db94011d3	3676	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3677	}
sahilmgandhi	18:6a4db94011d3	3678	else
sahilmgandhi	18:6a4db94011d3	3679	{
sahilmgandhi	18:6a4db94011d3	3680	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3681	}
sahilmgandhi	18:6a4db94011d3	3682	}
sahilmgandhi	18:6a4db94011d3	3683
sahilmgandhi	18:6a4db94011d3	3684	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3685	hfmpi2c->Instance->TXDR = FMPI2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	3686	}
sahilmgandhi	18:6a4db94011d3	3687
sahilmgandhi	18:6a4db94011d3	3688	/* Wait until TC flag is set */
sahilmgandhi	18:6a4db94011d3	3689	if(FMPI2C_WaitOnFlagUntilTimeout(hfmpi2c, FMPI2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3690	{
sahilmgandhi	18:6a4db94011d3	3691	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3692	}
sahilmgandhi	18:6a4db94011d3	3693
sahilmgandhi	18:6a4db94011d3	3694	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3695	}
sahilmgandhi	18:6a4db94011d3	3696
sahilmgandhi	18:6a4db94011d3	3697	/**
sahilmgandhi	18:6a4db94011d3	3698	* @brief FMPI2C Address complete process callback.
sahilmgandhi	18:6a4db94011d3	3699	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	3700	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	3701	* @retval None
sahilmgandhi	18:6a4db94011d3	3702	*/
sahilmgandhi	18:6a4db94011d3	3703	static void FMPI2C_ITAddrCplt(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags)
sahilmgandhi	18:6a4db94011d3	3704	{
sahilmgandhi	18:6a4db94011d3	3705	uint8_t transferdirection = 0;
sahilmgandhi	18:6a4db94011d3	3706	uint16_t slaveaddrcode = 0;
sahilmgandhi	18:6a4db94011d3	3707	uint16_t ownadd1code = 0;
sahilmgandhi	18:6a4db94011d3	3708	uint16_t ownadd2code = 0;
sahilmgandhi	18:6a4db94011d3	3709
sahilmgandhi	18:6a4db94011d3	3710	/* In case of Listen state, need to inform upper layer of address match code event */
sahilmgandhi	18:6a4db94011d3	3711	if((hfmpi2c->State & HAL_FMPI2C_STATE_LISTEN) == HAL_FMPI2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	3712	{
sahilmgandhi	18:6a4db94011d3	3713	transferdirection = FMPI2C_GET_DIR(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3714	slaveaddrcode = FMPI2C_GET_ADDR_MATCH(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3715	ownadd1code = FMPI2C_GET_OWN_ADDRESS1(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3716	ownadd2code = FMPI2C_GET_OWN_ADDRESS2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3717
sahilmgandhi	18:6a4db94011d3	3718	/* If 10bits addressing mode is selected */
sahilmgandhi	18:6a4db94011d3	3719	if(hfmpi2c->Init.AddressingMode == FMPI2C_ADDRESSINGMODE_10BIT)
sahilmgandhi	18:6a4db94011d3	3720	{
sahilmgandhi	18:6a4db94011d3	3721	if((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK))
sahilmgandhi	18:6a4db94011d3	3722	{
sahilmgandhi	18:6a4db94011d3	3723	slaveaddrcode = ownadd1code;
sahilmgandhi	18:6a4db94011d3	3724	hfmpi2c->AddrEventCount++;
sahilmgandhi	18:6a4db94011d3	3725	if(hfmpi2c->AddrEventCount == 2)
sahilmgandhi	18:6a4db94011d3	3726	{
sahilmgandhi	18:6a4db94011d3	3727	/* Reset Address Event counter */
sahilmgandhi	18:6a4db94011d3	3728	hfmpi2c->AddrEventCount = 0;
sahilmgandhi	18:6a4db94011d3	3729
sahilmgandhi	18:6a4db94011d3	3730	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3731	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3732
sahilmgandhi	18:6a4db94011d3	3733	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3734	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3735
sahilmgandhi	18:6a4db94011d3	3736	/* Call Slave Addr callback */
sahilmgandhi	18:6a4db94011d3	3737	HAL_FMPI2C_AddrCallback(hfmpi2c, transferdirection, slaveaddrcode);
sahilmgandhi	18:6a4db94011d3	3738	}
sahilmgandhi	18:6a4db94011d3	3739	}
sahilmgandhi	18:6a4db94011d3	3740	else
sahilmgandhi	18:6a4db94011d3	3741	{
sahilmgandhi	18:6a4db94011d3	3742	slaveaddrcode = ownadd2code;
sahilmgandhi	18:6a4db94011d3	3743
sahilmgandhi	18:6a4db94011d3	3744	/* Disable ADDR Interrupts */
sahilmgandhi	18:6a4db94011d3	3745	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	3746
sahilmgandhi	18:6a4db94011d3	3747	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3748	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3749
sahilmgandhi	18:6a4db94011d3	3750	/* Call Slave Addr callback */
sahilmgandhi	18:6a4db94011d3	3751	HAL_FMPI2C_AddrCallback(hfmpi2c, transferdirection, slaveaddrcode);
sahilmgandhi	18:6a4db94011d3	3752	}
sahilmgandhi	18:6a4db94011d3	3753	}
sahilmgandhi	18:6a4db94011d3	3754	/* else 7 bits addressing mode is selected */
sahilmgandhi	18:6a4db94011d3	3755	else
sahilmgandhi	18:6a4db94011d3	3756	{
sahilmgandhi	18:6a4db94011d3	3757	/* Disable ADDR Interrupts */
sahilmgandhi	18:6a4db94011d3	3758	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT);
sahilmgandhi	18:6a4db94011d3	3759
sahilmgandhi	18:6a4db94011d3	3760	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3761	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3762
sahilmgandhi	18:6a4db94011d3	3763	/* Call Slave Addr callback */
sahilmgandhi	18:6a4db94011d3	3764	HAL_FMPI2C_AddrCallback(hfmpi2c, transferdirection, slaveaddrcode);
sahilmgandhi	18:6a4db94011d3	3765	}
sahilmgandhi	18:6a4db94011d3	3766	}
sahilmgandhi	18:6a4db94011d3	3767	/* Else clear address flag only */
sahilmgandhi	18:6a4db94011d3	3768	else
sahilmgandhi	18:6a4db94011d3	3769	{
sahilmgandhi	18:6a4db94011d3	3770	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3771	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3772
sahilmgandhi	18:6a4db94011d3	3773	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3774	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3775	}
sahilmgandhi	18:6a4db94011d3	3776	}
sahilmgandhi	18:6a4db94011d3	3777
sahilmgandhi	18:6a4db94011d3	3778	/**
sahilmgandhi	18:6a4db94011d3	3779	* @brief FMPI2C Master sequential complete process.
sahilmgandhi	18:6a4db94011d3	3780	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	3781	* @retval None
sahilmgandhi	18:6a4db94011d3	3782	*/
sahilmgandhi	18:6a4db94011d3	3783	static void FMPI2C_ITMasterSequentialCplt(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3784	{
sahilmgandhi	18:6a4db94011d3	3785	/* Reset FMPI2C handle mode */
sahilmgandhi	18:6a4db94011d3	3786	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3787
sahilmgandhi	18:6a4db94011d3	3788	/* No Generate Stop, to permit restart mode */
sahilmgandhi	18:6a4db94011d3	3789	/* The stop will be done at the end of transfer, when FMPI2C_AUTOEND_MODE enable */
sahilmgandhi	18:6a4db94011d3	3790	if (hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	3791	{
sahilmgandhi	18:6a4db94011d3	3792	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3793	hfmpi2c->PreviousState = FMPI2C_STATE_MASTER_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	3794	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	3795
sahilmgandhi	18:6a4db94011d3	3796	/* Disable Interrupts */
sahilmgandhi	18:6a4db94011d3	3797	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	3798
sahilmgandhi	18:6a4db94011d3	3799	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3800	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3801
sahilmgandhi	18:6a4db94011d3	3802	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3803	HAL_FMPI2C_MasterTxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3804	}
sahilmgandhi	18:6a4db94011d3	3805	/* hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX */
sahilmgandhi	18:6a4db94011d3	3806	else
sahilmgandhi	18:6a4db94011d3	3807	{
sahilmgandhi	18:6a4db94011d3	3808	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3809	hfmpi2c->PreviousState = FMPI2C_STATE_MASTER_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	3810	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	3811
sahilmgandhi	18:6a4db94011d3	3812	/* Disable Interrupts */
sahilmgandhi	18:6a4db94011d3	3813	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	3814
sahilmgandhi	18:6a4db94011d3	3815	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3816	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3817
sahilmgandhi	18:6a4db94011d3	3818	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3819	HAL_FMPI2C_MasterRxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3820	}
sahilmgandhi	18:6a4db94011d3	3821	}
sahilmgandhi	18:6a4db94011d3	3822
sahilmgandhi	18:6a4db94011d3	3823	/**
sahilmgandhi	18:6a4db94011d3	3824	* @brief FMPI2C Slave sequential complete process.
sahilmgandhi	18:6a4db94011d3	3825	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	3826	* @retval None
sahilmgandhi	18:6a4db94011d3	3827	*/
sahilmgandhi	18:6a4db94011d3	3828	static void FMPI2C_ITSlaveSequentialCplt(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	3829	{
sahilmgandhi	18:6a4db94011d3	3830	/* Reset FMPI2C handle mode */
sahilmgandhi	18:6a4db94011d3	3831	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3832
sahilmgandhi	18:6a4db94011d3	3833	if(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_TX_LISTEN)
sahilmgandhi	18:6a4db94011d3	3834	{
sahilmgandhi	18:6a4db94011d3	3835	/* Remove HAL_FMPI2C_STATE_SLAVE_BUSY_TX, keep only HAL_FMPI2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	3836	hfmpi2c->State = HAL_FMPI2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	3837	hfmpi2c->PreviousState = FMPI2C_STATE_SLAVE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	3838
sahilmgandhi	18:6a4db94011d3	3839	/* Disable Interrupts */
sahilmgandhi	18:6a4db94011d3	3840	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	3841
sahilmgandhi	18:6a4db94011d3	3842	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3843	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3844
sahilmgandhi	18:6a4db94011d3	3845	/* Call the Tx complete callback to inform upper layer of the end of transmit process */
sahilmgandhi	18:6a4db94011d3	3846	HAL_FMPI2C_SlaveTxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3847	}
sahilmgandhi	18:6a4db94011d3	3848
sahilmgandhi	18:6a4db94011d3	3849	else if(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX_LISTEN)
sahilmgandhi	18:6a4db94011d3	3850	{
sahilmgandhi	18:6a4db94011d3	3851	/* Remove HAL_FMPI2C_STATE_SLAVE_BUSY_RX, keep only HAL_FMPI2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	3852	hfmpi2c->State = HAL_FMPI2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	3853	hfmpi2c->PreviousState = FMPI2C_STATE_SLAVE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	3854
sahilmgandhi	18:6a4db94011d3	3855	/* Disable Interrupts */
sahilmgandhi	18:6a4db94011d3	3856	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	3857
sahilmgandhi	18:6a4db94011d3	3858	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3859	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3860
sahilmgandhi	18:6a4db94011d3	3861	/* Call the Rx complete callback to inform upper layer of the end of receive process */
sahilmgandhi	18:6a4db94011d3	3862	HAL_FMPI2C_SlaveRxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3863	}
sahilmgandhi	18:6a4db94011d3	3864	}
sahilmgandhi	18:6a4db94011d3	3865
sahilmgandhi	18:6a4db94011d3	3866	/**
sahilmgandhi	18:6a4db94011d3	3867	* @brief FMPI2C Master complete process.
sahilmgandhi	18:6a4db94011d3	3868	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	3869	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	3870	* @retval None
sahilmgandhi	18:6a4db94011d3	3871	*/
sahilmgandhi	18:6a4db94011d3	3872	static void FMPI2C_ITMasterCplt(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags)
sahilmgandhi	18:6a4db94011d3	3873	{
sahilmgandhi	18:6a4db94011d3	3874	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	3875	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	3876
sahilmgandhi	18:6a4db94011d3	3877	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	3878	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3879
sahilmgandhi	18:6a4db94011d3	3880	/* Reset handle parameters */
sahilmgandhi	18:6a4db94011d3	3881	hfmpi2c->PreviousState = FMPI2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3882	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	3883	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	3884
sahilmgandhi	18:6a4db94011d3	3885	if((ITFlags & FMPI2C_FLAG_AF) != RESET)
sahilmgandhi	18:6a4db94011d3	3886	{
sahilmgandhi	18:6a4db94011d3	3887	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	3888	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3889
sahilmgandhi	18:6a4db94011d3	3890	/* Set acknowledge error code */
sahilmgandhi	18:6a4db94011d3	3891	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3892	}
sahilmgandhi	18:6a4db94011d3	3893
sahilmgandhi	18:6a4db94011d3	3894	/* Flush TX register */
sahilmgandhi	18:6a4db94011d3	3895	FMPI2C_Flush_TXDR(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3896
sahilmgandhi	18:6a4db94011d3	3897	/* Disable Interrupts */
sahilmgandhi	18:6a4db94011d3	3898	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_TX_IT\| FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	3899
sahilmgandhi	18:6a4db94011d3	3900	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3901	if((hfmpi2c->ErrorCode != HAL_FMPI2C_ERROR_NONE) \|\| (hfmpi2c->State == HAL_FMPI2C_STATE_ABORT))
sahilmgandhi	18:6a4db94011d3	3902	{
sahilmgandhi	18:6a4db94011d3	3903	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3904	FMPI2C_ITError(hfmpi2c, hfmpi2c->ErrorCode);
sahilmgandhi	18:6a4db94011d3	3905	}
sahilmgandhi	18:6a4db94011d3	3906	/* hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_TX */
sahilmgandhi	18:6a4db94011d3	3907	else if(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	3908	{
sahilmgandhi	18:6a4db94011d3	3909	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3910
sahilmgandhi	18:6a4db94011d3	3911	if (hfmpi2c->Mode == HAL_FMPI2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3912	{
sahilmgandhi	18:6a4db94011d3	3913	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3914
sahilmgandhi	18:6a4db94011d3	3915	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3916	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3917
sahilmgandhi	18:6a4db94011d3	3918	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3919	HAL_FMPI2C_MemTxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3920	}
sahilmgandhi	18:6a4db94011d3	3921	else
sahilmgandhi	18:6a4db94011d3	3922	{
sahilmgandhi	18:6a4db94011d3	3923	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3924
sahilmgandhi	18:6a4db94011d3	3925	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3926	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3927
sahilmgandhi	18:6a4db94011d3	3928	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	3929	HAL_FMPI2C_MasterTxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3930	}
sahilmgandhi	18:6a4db94011d3	3931	}
sahilmgandhi	18:6a4db94011d3	3932	/* hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX */
sahilmgandhi	18:6a4db94011d3	3933	else if(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	3934	{
sahilmgandhi	18:6a4db94011d3	3935	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3936
sahilmgandhi	18:6a4db94011d3	3937	if (hfmpi2c->Mode == HAL_FMPI2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3938	{
sahilmgandhi	18:6a4db94011d3	3939	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3940
sahilmgandhi	18:6a4db94011d3	3941	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3942	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3943
sahilmgandhi	18:6a4db94011d3	3944	HAL_FMPI2C_MemRxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3945	}
sahilmgandhi	18:6a4db94011d3	3946	else
sahilmgandhi	18:6a4db94011d3	3947	{
sahilmgandhi	18:6a4db94011d3	3948	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3949
sahilmgandhi	18:6a4db94011d3	3950	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3951	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3952
sahilmgandhi	18:6a4db94011d3	3953	HAL_FMPI2C_MasterRxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3954	}
sahilmgandhi	18:6a4db94011d3	3955	}
sahilmgandhi	18:6a4db94011d3	3956	}
sahilmgandhi	18:6a4db94011d3	3957
sahilmgandhi	18:6a4db94011d3	3958	/**
sahilmgandhi	18:6a4db94011d3	3959	* @brief FMPI2C Slave complete process.
sahilmgandhi	18:6a4db94011d3	3960	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	3961	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	3962	* @retval None
sahilmgandhi	18:6a4db94011d3	3963	*/
sahilmgandhi	18:6a4db94011d3	3964	static void FMPI2C_ITSlaveCplt(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags)
sahilmgandhi	18:6a4db94011d3	3965	{
sahilmgandhi	18:6a4db94011d3	3966	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	3967	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	3968
sahilmgandhi	18:6a4db94011d3	3969	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3970	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c,FMPI2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3971
sahilmgandhi	18:6a4db94011d3	3972	/* Disable all interrupts */
sahilmgandhi	18:6a4db94011d3	3973	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT \| FMPI2C_XFER_TX_IT \| FMPI2C_XFER_RX_IT);
sahilmgandhi	18:6a4db94011d3	3974
sahilmgandhi	18:6a4db94011d3	3975	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	3976	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	3977
sahilmgandhi	18:6a4db94011d3	3978	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	3979	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3980
sahilmgandhi	18:6a4db94011d3	3981	/* Flush TX register */
sahilmgandhi	18:6a4db94011d3	3982	FMPI2C_Flush_TXDR(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3983
sahilmgandhi	18:6a4db94011d3	3984	/* If a DMA is ongoing, Update handle size context */
sahilmgandhi	18:6a4db94011d3	3985	if(((hfmpi2c->Instance->CR1 & FMPI2C_CR1_TXDMAEN) == FMPI2C_CR1_TXDMAEN) \|\|
sahilmgandhi	18:6a4db94011d3	3986	((hfmpi2c->Instance->CR1 & FMPI2C_CR1_RXDMAEN) == FMPI2C_CR1_RXDMAEN))
sahilmgandhi	18:6a4db94011d3	3987	{
sahilmgandhi	18:6a4db94011d3	3988	hfmpi2c->XferCount = FMPI2C_GET_DMA_REMAIN_DATA(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	3989	}
sahilmgandhi	18:6a4db94011d3	3990
sahilmgandhi	18:6a4db94011d3	3991	/* All data are not transferred, so set error code accordingly */
sahilmgandhi	18:6a4db94011d3	3992	if(hfmpi2c->XferCount != 0)
sahilmgandhi	18:6a4db94011d3	3993	{
sahilmgandhi	18:6a4db94011d3	3994	/* Set ErrorCode corresponding to a Non-Acknowledge */
sahilmgandhi	18:6a4db94011d3	3995	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3996	}
sahilmgandhi	18:6a4db94011d3	3997
sahilmgandhi	18:6a4db94011d3	3998	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	3999	if(((ITFlags & FMPI2C_FLAG_RXNE) != RESET))
sahilmgandhi	18:6a4db94011d3	4000	{
sahilmgandhi	18:6a4db94011d3	4001	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	4002	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	4003
sahilmgandhi	18:6a4db94011d3	4004	if((hfmpi2c->XferSize > 0))
sahilmgandhi	18:6a4db94011d3	4005	{
sahilmgandhi	18:6a4db94011d3	4006	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	4007	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4008
sahilmgandhi	18:6a4db94011d3	4009	/* Set ErrorCode corresponding to a Non-Acknowledge */
sahilmgandhi	18:6a4db94011d3	4010	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	4011	}
sahilmgandhi	18:6a4db94011d3	4012	}
sahilmgandhi	18:6a4db94011d3	4013
sahilmgandhi	18:6a4db94011d3	4014	hfmpi2c->PreviousState = FMPI2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4015	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4016	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	4017
sahilmgandhi	18:6a4db94011d3	4018	if(hfmpi2c->ErrorCode != HAL_FMPI2C_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	4019	{
sahilmgandhi	18:6a4db94011d3	4020	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4021	FMPI2C_ITError(hfmpi2c, hfmpi2c->ErrorCode);
sahilmgandhi	18:6a4db94011d3	4022
sahilmgandhi	18:6a4db94011d3	4023	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4024	if(hfmpi2c->State == HAL_FMPI2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	4025	{
sahilmgandhi	18:6a4db94011d3	4026	/* Call FMPI2C Listen complete process */
sahilmgandhi	18:6a4db94011d3	4027	FMPI2C_ITListenCplt(hfmpi2c, ITFlags);
sahilmgandhi	18:6a4db94011d3	4028	}
sahilmgandhi	18:6a4db94011d3	4029	}
sahilmgandhi	18:6a4db94011d3	4030	else if(hfmpi2c->XferOptions != FMPI2C_NO_OPTION_FRAME)
sahilmgandhi	18:6a4db94011d3	4031	{
sahilmgandhi	18:6a4db94011d3	4032	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4033	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4034
sahilmgandhi	18:6a4db94011d3	4035	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4036	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4037
sahilmgandhi	18:6a4db94011d3	4038	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4039	HAL_FMPI2C_ListenCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4040	}
sahilmgandhi	18:6a4db94011d3	4041	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4042	else if(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	4043	{
sahilmgandhi	18:6a4db94011d3	4044	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4045
sahilmgandhi	18:6a4db94011d3	4046	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4047	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4048
sahilmgandhi	18:6a4db94011d3	4049	/* Call the Slave Rx Complete callback */
sahilmgandhi	18:6a4db94011d3	4050	HAL_FMPI2C_SlaveRxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4051	}
sahilmgandhi	18:6a4db94011d3	4052	else
sahilmgandhi	18:6a4db94011d3	4053	{
sahilmgandhi	18:6a4db94011d3	4054	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4055
sahilmgandhi	18:6a4db94011d3	4056	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4057	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4058
sahilmgandhi	18:6a4db94011d3	4059	/* Call the Slave Tx Complete callback */
sahilmgandhi	18:6a4db94011d3	4060	HAL_FMPI2C_SlaveTxCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4061	}
sahilmgandhi	18:6a4db94011d3	4062	}
sahilmgandhi	18:6a4db94011d3	4063
sahilmgandhi	18:6a4db94011d3	4064	/**
sahilmgandhi	18:6a4db94011d3	4065	* @brief FMPI2C Listen complete process.
sahilmgandhi	18:6a4db94011d3	4066	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	4067	* @param ITFlags Interrupt flags to handle.
sahilmgandhi	18:6a4db94011d3	4068	* @retval None
sahilmgandhi	18:6a4db94011d3	4069	*/
sahilmgandhi	18:6a4db94011d3	4070	static void FMPI2C_ITListenCplt(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags)
sahilmgandhi	18:6a4db94011d3	4071	{
sahilmgandhi	18:6a4db94011d3	4072	/* Reset handle parameters */
sahilmgandhi	18:6a4db94011d3	4073	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4074	hfmpi2c->PreviousState = FMPI2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4075	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4076	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4077	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	4078
sahilmgandhi	18:6a4db94011d3	4079	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	4080	if(((ITFlags & FMPI2C_FLAG_RXNE) != RESET))
sahilmgandhi	18:6a4db94011d3	4081	{
sahilmgandhi	18:6a4db94011d3	4082	/* Read data from RXDR */
sahilmgandhi	18:6a4db94011d3	4083	(*hfmpi2c->pBuffPtr++) = hfmpi2c->Instance->RXDR;
sahilmgandhi	18:6a4db94011d3	4084
sahilmgandhi	18:6a4db94011d3	4085	if((hfmpi2c->XferSize > 0))
sahilmgandhi	18:6a4db94011d3	4086	{
sahilmgandhi	18:6a4db94011d3	4087	hfmpi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	4088	hfmpi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4089
sahilmgandhi	18:6a4db94011d3	4090	/* Set ErrorCode corresponding to a Non-Acknowledge */
sahilmgandhi	18:6a4db94011d3	4091	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	4092	}
sahilmgandhi	18:6a4db94011d3	4093	}
sahilmgandhi	18:6a4db94011d3	4094
sahilmgandhi	18:6a4db94011d3	4095	/* Disable all Interrupts*/
sahilmgandhi	18:6a4db94011d3	4096	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT \| FMPI2C_XFER_RX_IT \| FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	4097
sahilmgandhi	18:6a4db94011d3	4098	/* Clear NACK Flag */
sahilmgandhi	18:6a4db94011d3	4099	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4100
sahilmgandhi	18:6a4db94011d3	4101	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4102	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4103
sahilmgandhi	18:6a4db94011d3	4104	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4105	HAL_FMPI2C_ListenCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4106	}
sahilmgandhi	18:6a4db94011d3	4107
sahilmgandhi	18:6a4db94011d3	4108	/**
sahilmgandhi	18:6a4db94011d3	4109	* @brief FMPI2C interrupts error process.
sahilmgandhi	18:6a4db94011d3	4110	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	4111	* @param ErrorCode Error code to handle.
sahilmgandhi	18:6a4db94011d3	4112	* @retval None
sahilmgandhi	18:6a4db94011d3	4113	*/
sahilmgandhi	18:6a4db94011d3	4114	static void FMPI2C_ITError(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ErrorCode)
sahilmgandhi	18:6a4db94011d3	4115	{
sahilmgandhi	18:6a4db94011d3	4116	/* Reset handle parameters */
sahilmgandhi	18:6a4db94011d3	4117	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4118	hfmpi2c->XferOptions = FMPI2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4119	hfmpi2c->XferCount = 0;
sahilmgandhi	18:6a4db94011d3	4120
sahilmgandhi	18:6a4db94011d3	4121	/* Set new error code */
sahilmgandhi	18:6a4db94011d3	4122	hfmpi2c->ErrorCode \|= ErrorCode;
sahilmgandhi	18:6a4db94011d3	4123
sahilmgandhi	18:6a4db94011d3	4124	/* Disable Interrupts */
sahilmgandhi	18:6a4db94011d3	4125	if((hfmpi2c->State == HAL_FMPI2C_STATE_LISTEN) \|\|
sahilmgandhi	18:6a4db94011d3	4126	(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_TX_LISTEN) \|\|
sahilmgandhi	18:6a4db94011d3	4127	(hfmpi2c->State == HAL_FMPI2C_STATE_BUSY_RX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4128	{
sahilmgandhi	18:6a4db94011d3	4129	/* Disable all interrupts, except interrupts related to LISTEN state */
sahilmgandhi	18:6a4db94011d3	4130	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_RX_IT \| FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	4131
sahilmgandhi	18:6a4db94011d3	4132	/* keep HAL_FMPI2C_STATE_LISTEN if set */
sahilmgandhi	18:6a4db94011d3	4133	hfmpi2c->State = HAL_FMPI2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	4134	hfmpi2c->PreviousState = FMPI2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4135	hfmpi2c->XferISR = FMPI2C_Slave_ISR_IT;
sahilmgandhi	18:6a4db94011d3	4136	}
sahilmgandhi	18:6a4db94011d3	4137	else
sahilmgandhi	18:6a4db94011d3	4138	{
sahilmgandhi	18:6a4db94011d3	4139	/* Disable all interrupts */
sahilmgandhi	18:6a4db94011d3	4140	FMPI2C_Disable_IRQ(hfmpi2c, FMPI2C_XFER_LISTEN_IT \| FMPI2C_XFER_RX_IT \| FMPI2C_XFER_TX_IT);
sahilmgandhi	18:6a4db94011d3	4141
sahilmgandhi	18:6a4db94011d3	4142	/* If state is an abort treatment on goind, don't change state */
sahilmgandhi	18:6a4db94011d3	4143	/* This change will be do later */
sahilmgandhi	18:6a4db94011d3	4144	if(hfmpi2c->State != HAL_FMPI2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	4145	{
sahilmgandhi	18:6a4db94011d3	4146	/* Set HAL_FMPI2C_STATE_READY */
sahilmgandhi	18:6a4db94011d3	4147	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4148	}
sahilmgandhi	18:6a4db94011d3	4149	hfmpi2c->PreviousState = FMPI2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4150	hfmpi2c->XferISR = NULL;
sahilmgandhi	18:6a4db94011d3	4151	}
sahilmgandhi	18:6a4db94011d3	4152
sahilmgandhi	18:6a4db94011d3	4153	/* Abort DMA TX transfer if any */
sahilmgandhi	18:6a4db94011d3	4154	if((hfmpi2c->Instance->CR1 & FMPI2C_CR1_TXDMAEN) == FMPI2C_CR1_TXDMAEN)
sahilmgandhi	18:6a4db94011d3	4155	{
sahilmgandhi	18:6a4db94011d3	4156	hfmpi2c->Instance->CR1 &= ~FMPI2C_CR1_TXDMAEN;
sahilmgandhi	18:6a4db94011d3	4157
sahilmgandhi	18:6a4db94011d3	4158	/* Set the FMPI2C DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	4159	will lead to call HAL_FMPI2C_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	4160	hfmpi2c->hdmatx->XferAbortCallback = FMPI2C_DMAAbort;
sahilmgandhi	18:6a4db94011d3	4161
sahilmgandhi	18:6a4db94011d3	4162	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4163	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4164
sahilmgandhi	18:6a4db94011d3	4165	if(HAL_DMA_Abort_IT(hfmpi2c->hdmatx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4166	{
sahilmgandhi	18:6a4db94011d3	4167	/* Call Directly XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	4168	hfmpi2c->hdmatx->XferAbortCallback(hfmpi2c->hdmatx);
sahilmgandhi	18:6a4db94011d3	4169	}
sahilmgandhi	18:6a4db94011d3	4170	}
sahilmgandhi	18:6a4db94011d3	4171	/* Abort DMA RX transfer if any */
sahilmgandhi	18:6a4db94011d3	4172	else if((hfmpi2c->Instance->CR1 & FMPI2C_CR1_RXDMAEN) == FMPI2C_CR1_RXDMAEN)
sahilmgandhi	18:6a4db94011d3	4173	{
sahilmgandhi	18:6a4db94011d3	4174	hfmpi2c->Instance->CR1 &= ~FMPI2C_CR1_RXDMAEN;
sahilmgandhi	18:6a4db94011d3	4175
sahilmgandhi	18:6a4db94011d3	4176	/* Set the FMPI2C DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	4177	will lead to call HAL_FMPI2C_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	4178	hfmpi2c->hdmarx->XferAbortCallback = FMPI2C_DMAAbort;
sahilmgandhi	18:6a4db94011d3	4179
sahilmgandhi	18:6a4db94011d3	4180	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4181	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4182
sahilmgandhi	18:6a4db94011d3	4183	if(HAL_DMA_Abort_IT(hfmpi2c->hdmarx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4184	{
sahilmgandhi	18:6a4db94011d3	4185	/* Call Directly XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	4186	hfmpi2c->hdmarx->XferAbortCallback(hfmpi2c->hdmarx);
sahilmgandhi	18:6a4db94011d3	4187	}
sahilmgandhi	18:6a4db94011d3	4188	}
sahilmgandhi	18:6a4db94011d3	4189	else if(hfmpi2c->State == HAL_FMPI2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	4190	{
sahilmgandhi	18:6a4db94011d3	4191	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4192
sahilmgandhi	18:6a4db94011d3	4193	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4194	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4195
sahilmgandhi	18:6a4db94011d3	4196	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4197	HAL_FMPI2C_AbortCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4198	}
sahilmgandhi	18:6a4db94011d3	4199	else
sahilmgandhi	18:6a4db94011d3	4200	{
sahilmgandhi	18:6a4db94011d3	4201	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4202	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4203
sahilmgandhi	18:6a4db94011d3	4204	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4205	HAL_FMPI2C_ErrorCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4206	}
sahilmgandhi	18:6a4db94011d3	4207	}
sahilmgandhi	18:6a4db94011d3	4208
sahilmgandhi	18:6a4db94011d3	4209	/**
sahilmgandhi	18:6a4db94011d3	4210	* @brief FMPI2C Tx data register flush process.
sahilmgandhi	18:6a4db94011d3	4211	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	4212	* @retval None
sahilmgandhi	18:6a4db94011d3	4213	*/
sahilmgandhi	18:6a4db94011d3	4214	static void FMPI2C_Flush_TXDR(FMPI2C_HandleTypeDef *hfmpi2c)
sahilmgandhi	18:6a4db94011d3	4215	{
sahilmgandhi	18:6a4db94011d3	4216	/* If a pending TXIS flag is set */
sahilmgandhi	18:6a4db94011d3	4217	/* Write a dummy data in TXDR to clear it */
sahilmgandhi	18:6a4db94011d3	4218	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_TXIS) != RESET)
sahilmgandhi	18:6a4db94011d3	4219	{
sahilmgandhi	18:6a4db94011d3	4220	hfmpi2c->Instance->TXDR = 0x00;
sahilmgandhi	18:6a4db94011d3	4221	}
sahilmgandhi	18:6a4db94011d3	4222
sahilmgandhi	18:6a4db94011d3	4223	/* Flush TX register if not empty */
sahilmgandhi	18:6a4db94011d3	4224	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_TXE) == RESET)
sahilmgandhi	18:6a4db94011d3	4225	{
sahilmgandhi	18:6a4db94011d3	4226	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_TXE);
sahilmgandhi	18:6a4db94011d3	4227	}
sahilmgandhi	18:6a4db94011d3	4228	}
sahilmgandhi	18:6a4db94011d3	4229
sahilmgandhi	18:6a4db94011d3	4230	/**
sahilmgandhi	18:6a4db94011d3	4231	* @brief DMA FMPI2C master transmit process complete callback.
sahilmgandhi	18:6a4db94011d3	4232	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	4233	* @retval None
sahilmgandhi	18:6a4db94011d3	4234	*/
sahilmgandhi	18:6a4db94011d3	4235	static void FMPI2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4236	{
sahilmgandhi	18:6a4db94011d3	4237	FMPI2C_HandleTypeDef* hfmpi2c = (FMPI2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	4238
sahilmgandhi	18:6a4db94011d3	4239	/* Disable DMA Request */
sahilmgandhi	18:6a4db94011d3	4240	hfmpi2c->Instance->CR1 &= ~FMPI2C_CR1_TXDMAEN;
sahilmgandhi	18:6a4db94011d3	4241
sahilmgandhi	18:6a4db94011d3	4242	/* If last transfer, enable STOP interrupt */
sahilmgandhi	18:6a4db94011d3	4243	if(hfmpi2c->XferCount == 0)
sahilmgandhi	18:6a4db94011d3	4244	{
sahilmgandhi	18:6a4db94011d3	4245	/* Enable STOP interrupt */
sahilmgandhi	18:6a4db94011d3	4246	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_CPLT_IT);
sahilmgandhi	18:6a4db94011d3	4247	}
sahilmgandhi	18:6a4db94011d3	4248	/* else prepare a new DMA transfer and enable TCReload interrupt */
sahilmgandhi	18:6a4db94011d3	4249	else
sahilmgandhi	18:6a4db94011d3	4250	{
sahilmgandhi	18:6a4db94011d3	4251	/* Update Buffer pointer */
sahilmgandhi	18:6a4db94011d3	4252	hfmpi2c->pBuffPtr += hfmpi2c->XferSize;
sahilmgandhi	18:6a4db94011d3	4253
sahilmgandhi	18:6a4db94011d3	4254	/* Set the XferSize to transfer */
sahilmgandhi	18:6a4db94011d3	4255	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	4256	{
sahilmgandhi	18:6a4db94011d3	4257	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	4258	}
sahilmgandhi	18:6a4db94011d3	4259	else
sahilmgandhi	18:6a4db94011d3	4260	{
sahilmgandhi	18:6a4db94011d3	4261	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	4262	}
sahilmgandhi	18:6a4db94011d3	4263
sahilmgandhi	18:6a4db94011d3	4264	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	4265	HAL_DMA_Start_IT(hfmpi2c->hdmatx, (uint32_t)hfmpi2c->pBuffPtr, (uint32_t)&hfmpi2c->Instance->TXDR, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	4266
sahilmgandhi	18:6a4db94011d3	4267	/* Enable TC interrupts */
sahilmgandhi	18:6a4db94011d3	4268	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RELOAD_IT);
sahilmgandhi	18:6a4db94011d3	4269	}
sahilmgandhi	18:6a4db94011d3	4270	}
sahilmgandhi	18:6a4db94011d3	4271
sahilmgandhi	18:6a4db94011d3	4272	/**
sahilmgandhi	18:6a4db94011d3	4273	* @brief DMA FMPI2C slave transmit process complete callback.
sahilmgandhi	18:6a4db94011d3	4274	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	4275	* @retval None
sahilmgandhi	18:6a4db94011d3	4276	*/
sahilmgandhi	18:6a4db94011d3	4277	static void FMPI2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4278	{
sahilmgandhi	18:6a4db94011d3	4279	/* No specific action, Master fully manage the generation of STOP condition */
sahilmgandhi	18:6a4db94011d3	4280	/* Mean that this generation can arrive at any time, at the end or during DMA process */
sahilmgandhi	18:6a4db94011d3	4281	/* So STOP condition should be manage through Interrupt treatment */
sahilmgandhi	18:6a4db94011d3	4282	}
sahilmgandhi	18:6a4db94011d3	4283
sahilmgandhi	18:6a4db94011d3	4284	/**
sahilmgandhi	18:6a4db94011d3	4285	* @brief DMA FMPI2C master receive process complete callback.
sahilmgandhi	18:6a4db94011d3	4286	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	4287	* @retval None
sahilmgandhi	18:6a4db94011d3	4288	*/
sahilmgandhi	18:6a4db94011d3	4289	static void FMPI2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4290	{
sahilmgandhi	18:6a4db94011d3	4291	FMPI2C_HandleTypeDef* hfmpi2c = (FMPI2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	4292
sahilmgandhi	18:6a4db94011d3	4293	/* Disable DMA Request */
sahilmgandhi	18:6a4db94011d3	4294	hfmpi2c->Instance->CR1 &= ~FMPI2C_CR1_RXDMAEN;
sahilmgandhi	18:6a4db94011d3	4295
sahilmgandhi	18:6a4db94011d3	4296	/* If last transfer, enable STOP interrupt */
sahilmgandhi	18:6a4db94011d3	4297	if(hfmpi2c->XferCount == 0)
sahilmgandhi	18:6a4db94011d3	4298	{
sahilmgandhi	18:6a4db94011d3	4299	/* Enable STOP interrupt */
sahilmgandhi	18:6a4db94011d3	4300	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_CPLT_IT);
sahilmgandhi	18:6a4db94011d3	4301	}
sahilmgandhi	18:6a4db94011d3	4302	/* else prepare a new DMA transfer and enable TCReload interrupt */
sahilmgandhi	18:6a4db94011d3	4303	else
sahilmgandhi	18:6a4db94011d3	4304	{
sahilmgandhi	18:6a4db94011d3	4305	/* Update Buffer pointer */
sahilmgandhi	18:6a4db94011d3	4306	hfmpi2c->pBuffPtr += hfmpi2c->XferSize;
sahilmgandhi	18:6a4db94011d3	4307
sahilmgandhi	18:6a4db94011d3	4308	/* Set the XferSize to transfer */
sahilmgandhi	18:6a4db94011d3	4309	if(hfmpi2c->XferCount > MAX_NBYTE_SIZE)
sahilmgandhi	18:6a4db94011d3	4310	{
sahilmgandhi	18:6a4db94011d3	4311	hfmpi2c->XferSize = MAX_NBYTE_SIZE;
sahilmgandhi	18:6a4db94011d3	4312	}
sahilmgandhi	18:6a4db94011d3	4313	else
sahilmgandhi	18:6a4db94011d3	4314	{
sahilmgandhi	18:6a4db94011d3	4315	hfmpi2c->XferSize = hfmpi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	4316	}
sahilmgandhi	18:6a4db94011d3	4317
sahilmgandhi	18:6a4db94011d3	4318	/* Enable the DMA channel */
sahilmgandhi	18:6a4db94011d3	4319	HAL_DMA_Start_IT(hfmpi2c->hdmarx, (uint32_t)&hfmpi2c->Instance->RXDR, (uint32_t)hfmpi2c->pBuffPtr, hfmpi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	4320
sahilmgandhi	18:6a4db94011d3	4321	/* Enable TC interrupts */
sahilmgandhi	18:6a4db94011d3	4322	FMPI2C_Enable_IRQ(hfmpi2c, FMPI2C_XFER_RELOAD_IT);
sahilmgandhi	18:6a4db94011d3	4323	}
sahilmgandhi	18:6a4db94011d3	4324	}
sahilmgandhi	18:6a4db94011d3	4325
sahilmgandhi	18:6a4db94011d3	4326	/**
sahilmgandhi	18:6a4db94011d3	4327	* @brief DMA FMPI2C slave receive process complete callback.
sahilmgandhi	18:6a4db94011d3	4328	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	4329	* @retval None
sahilmgandhi	18:6a4db94011d3	4330	*/
sahilmgandhi	18:6a4db94011d3	4331	static void FMPI2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4332	{
sahilmgandhi	18:6a4db94011d3	4333	/* No specific action, Master fully manage the generation of STOP condition */
sahilmgandhi	18:6a4db94011d3	4334	/* Mean that this generation can arrive at any time, at the end or during DMA process */
sahilmgandhi	18:6a4db94011d3	4335	/* So STOP condition should be manage through Interrupt treatment */
sahilmgandhi	18:6a4db94011d3	4336	}
sahilmgandhi	18:6a4db94011d3	4337
sahilmgandhi	18:6a4db94011d3	4338	/**
sahilmgandhi	18:6a4db94011d3	4339	* @brief DMA FMPI2C communication error callback.
sahilmgandhi	18:6a4db94011d3	4340	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	4341	* @retval None
sahilmgandhi	18:6a4db94011d3	4342	*/
sahilmgandhi	18:6a4db94011d3	4343	static void FMPI2C_DMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4344	{
sahilmgandhi	18:6a4db94011d3	4345	FMPI2C_HandleTypeDef* hfmpi2c = ( FMPI2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	4346
sahilmgandhi	18:6a4db94011d3	4347	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4348	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	4349
sahilmgandhi	18:6a4db94011d3	4350	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4351	FMPI2C_ITError(hfmpi2c, HAL_FMPI2C_ERROR_DMA);
sahilmgandhi	18:6a4db94011d3	4352	}
sahilmgandhi	18:6a4db94011d3	4353
sahilmgandhi	18:6a4db94011d3	4354	/**
sahilmgandhi	18:6a4db94011d3	4355	* @brief DMA FMPI2C communication abort callback
sahilmgandhi	18:6a4db94011d3	4356	* (To be called at end of DMA Abort procedure).
sahilmgandhi	18:6a4db94011d3	4357	* @param hdma: DMA handle.
sahilmgandhi	18:6a4db94011d3	4358	* @retval None
sahilmgandhi	18:6a4db94011d3	4359	*/
sahilmgandhi	18:6a4db94011d3	4360	static void FMPI2C_DMAAbort(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	4361	{
sahilmgandhi	18:6a4db94011d3	4362	FMPI2C_HandleTypeDef* hfmpi2c = ( FMPI2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	4363
sahilmgandhi	18:6a4db94011d3	4364	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4365	hfmpi2c->Instance->CR2 \|= FMPI2C_CR2_NACK;
sahilmgandhi	18:6a4db94011d3	4366
sahilmgandhi	18:6a4db94011d3	4367	/* Reset AbortCpltCallback */
sahilmgandhi	18:6a4db94011d3	4368	hfmpi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	4369	hfmpi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	4370
sahilmgandhi	18:6a4db94011d3	4371	/* Check if come from abort from user */
sahilmgandhi	18:6a4db94011d3	4372	if(hfmpi2c->State == HAL_FMPI2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	4373	{
sahilmgandhi	18:6a4db94011d3	4374	hfmpi2c->State = HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4375
sahilmgandhi	18:6a4db94011d3	4376	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4377	HAL_FMPI2C_AbortCpltCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4378	}
sahilmgandhi	18:6a4db94011d3	4379	else
sahilmgandhi	18:6a4db94011d3	4380	{
sahilmgandhi	18:6a4db94011d3	4381	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4382	HAL_FMPI2C_ErrorCallback(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4383	}
sahilmgandhi	18:6a4db94011d3	4384	}
sahilmgandhi	18:6a4db94011d3	4385
sahilmgandhi	18:6a4db94011d3	4386	/**
sahilmgandhi	18:6a4db94011d3	4387	* @brief This function handles FMPI2C Communication Timeout.
sahilmgandhi	18:6a4db94011d3	4388	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4389	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	4390	* @param Flag Specifies the FMPI2C flag to check.
sahilmgandhi	18:6a4db94011d3	4391	* @param Status The new Flag status (SET or RESET).
sahilmgandhi	18:6a4db94011d3	4392	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4393	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4394	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4395	*/
sahilmgandhi	18:6a4db94011d3	4396	static HAL_StatusTypeDef FMPI2C_WaitOnFlagUntilTimeout(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4397	{
sahilmgandhi	18:6a4db94011d3	4398	while(__HAL_FMPI2C_GET_FLAG(hfmpi2c, Flag) == Status)
sahilmgandhi	18:6a4db94011d3	4399	{
sahilmgandhi	18:6a4db94011d3	4400	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	4401	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	4402	{
sahilmgandhi	18:6a4db94011d3	4403	if((Timeout == 0)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	4404	{
sahilmgandhi	18:6a4db94011d3	4405	hfmpi2c->State= HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4406	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4407
sahilmgandhi	18:6a4db94011d3	4408	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4409	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4410	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4411	}
sahilmgandhi	18:6a4db94011d3	4412	}
sahilmgandhi	18:6a4db94011d3	4413	}
sahilmgandhi	18:6a4db94011d3	4414	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4415	}
sahilmgandhi	18:6a4db94011d3	4416
sahilmgandhi	18:6a4db94011d3	4417	/**
sahilmgandhi	18:6a4db94011d3	4418	* @brief This function handles FMPI2C Communication Timeout for specific usage of TXIS flag.
sahilmgandhi	18:6a4db94011d3	4419	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4420	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	4421	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4422	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4423	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4424	*/
sahilmgandhi	18:6a4db94011d3	4425	static HAL_StatusTypeDef FMPI2C_WaitOnTXISFlagUntilTimeout(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4426	{
sahilmgandhi	18:6a4db94011d3	4427	while(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_TXIS) == RESET)
sahilmgandhi	18:6a4db94011d3	4428	{
sahilmgandhi	18:6a4db94011d3	4429	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	4430	if(FMPI2C_IsAcknowledgeFailed(hfmpi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4431	{
sahilmgandhi	18:6a4db94011d3	4432	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4433	}
sahilmgandhi	18:6a4db94011d3	4434
sahilmgandhi	18:6a4db94011d3	4435	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	4436	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	4437	{
sahilmgandhi	18:6a4db94011d3	4438	if((Timeout == 0)\|\|((HAL_GetTick() - Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	4439	{
sahilmgandhi	18:6a4db94011d3	4440	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4441	hfmpi2c->State= HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4442	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4443
sahilmgandhi	18:6a4db94011d3	4444	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4445	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4446
sahilmgandhi	18:6a4db94011d3	4447	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4448	}
sahilmgandhi	18:6a4db94011d3	4449	}
sahilmgandhi	18:6a4db94011d3	4450	}
sahilmgandhi	18:6a4db94011d3	4451	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4452	}
sahilmgandhi	18:6a4db94011d3	4453
sahilmgandhi	18:6a4db94011d3	4454	/**
sahilmgandhi	18:6a4db94011d3	4455	* @brief This function handles FMPI2C Communication Timeout for specific usage of STOP flag.
sahilmgandhi	18:6a4db94011d3	4456	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4457	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	4458	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4459	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4460	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4461	*/
sahilmgandhi	18:6a4db94011d3	4462	static HAL_StatusTypeDef FMPI2C_WaitOnSTOPFlagUntilTimeout(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4463	{
sahilmgandhi	18:6a4db94011d3	4464	while(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF) == RESET)
sahilmgandhi	18:6a4db94011d3	4465	{
sahilmgandhi	18:6a4db94011d3	4466	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	4467	if(FMPI2C_IsAcknowledgeFailed(hfmpi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4468	{
sahilmgandhi	18:6a4db94011d3	4469	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4470	}
sahilmgandhi	18:6a4db94011d3	4471
sahilmgandhi	18:6a4db94011d3	4472	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	4473	if((Timeout == 0)\|\|((HAL_GetTick() - Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	4474	{
sahilmgandhi	18:6a4db94011d3	4475	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4476	hfmpi2c->State= HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4477	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4478
sahilmgandhi	18:6a4db94011d3	4479	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4480	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4481
sahilmgandhi	18:6a4db94011d3	4482	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4483	}
sahilmgandhi	18:6a4db94011d3	4484	}
sahilmgandhi	18:6a4db94011d3	4485	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4486	}
sahilmgandhi	18:6a4db94011d3	4487
sahilmgandhi	18:6a4db94011d3	4488	/**
sahilmgandhi	18:6a4db94011d3	4489	* @brief This function handles FMPI2C Communication Timeout for specific usage of RXNE flag.
sahilmgandhi	18:6a4db94011d3	4490	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4491	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	4492	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4493	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4494	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4495	*/
sahilmgandhi	18:6a4db94011d3	4496	static HAL_StatusTypeDef FMPI2C_WaitOnRXNEFlagUntilTimeout(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4497	{
sahilmgandhi	18:6a4db94011d3	4498	while(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_RXNE) == RESET)
sahilmgandhi	18:6a4db94011d3	4499	{
sahilmgandhi	18:6a4db94011d3	4500	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	4501	if(FMPI2C_IsAcknowledgeFailed(hfmpi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4502	{
sahilmgandhi	18:6a4db94011d3	4503	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4504	}
sahilmgandhi	18:6a4db94011d3	4505
sahilmgandhi	18:6a4db94011d3	4506	/* Check if a STOPF is detected */
sahilmgandhi	18:6a4db94011d3	4507	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF) == SET)
sahilmgandhi	18:6a4db94011d3	4508	{
sahilmgandhi	18:6a4db94011d3	4509	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	4510	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	4511
sahilmgandhi	18:6a4db94011d3	4512	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	4513	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4514
sahilmgandhi	18:6a4db94011d3	4515	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	4516	hfmpi2c->State= HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4517	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4518
sahilmgandhi	18:6a4db94011d3	4519	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4520	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4521
sahilmgandhi	18:6a4db94011d3	4522	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4523	}
sahilmgandhi	18:6a4db94011d3	4524
sahilmgandhi	18:6a4db94011d3	4525	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	4526	if((Timeout == 0)\|\|((HAL_GetTick() - Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	4527	{
sahilmgandhi	18:6a4db94011d3	4528	hfmpi2c->ErrorCode \|= HAL_FMPI2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4529	hfmpi2c->State= HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4530
sahilmgandhi	18:6a4db94011d3	4531	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4532	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4533
sahilmgandhi	18:6a4db94011d3	4534	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4535	}
sahilmgandhi	18:6a4db94011d3	4536	}
sahilmgandhi	18:6a4db94011d3	4537	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4538	}
sahilmgandhi	18:6a4db94011d3	4539
sahilmgandhi	18:6a4db94011d3	4540	/**
sahilmgandhi	18:6a4db94011d3	4541	* @brief This function handles Acknowledge failed detection during an FMPI2C Communication.
sahilmgandhi	18:6a4db94011d3	4542	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4543	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	4544	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4545	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4546	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4547	*/
sahilmgandhi	18:6a4db94011d3	4548	static HAL_StatusTypeDef FMPI2C_IsAcknowledgeFailed(FMPI2C_HandleTypeDef *hfmpi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4549	{
sahilmgandhi	18:6a4db94011d3	4550	if(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_AF) == SET)
sahilmgandhi	18:6a4db94011d3	4551	{
sahilmgandhi	18:6a4db94011d3	4552	/* Wait until STOP Flag is reset */
sahilmgandhi	18:6a4db94011d3	4553	/* AutoEnd should be initiate after AF */
sahilmgandhi	18:6a4db94011d3	4554	while(__HAL_FMPI2C_GET_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF) == RESET)
sahilmgandhi	18:6a4db94011d3	4555	{
sahilmgandhi	18:6a4db94011d3	4556	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	4557	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	4558	{
sahilmgandhi	18:6a4db94011d3	4559	if((Timeout == 0)\|\|((HAL_GetTick() - Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	4560	{
sahilmgandhi	18:6a4db94011d3	4561	hfmpi2c->State= HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4562	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4563
sahilmgandhi	18:6a4db94011d3	4564	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4565	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4566	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4567	}
sahilmgandhi	18:6a4db94011d3	4568	}
sahilmgandhi	18:6a4db94011d3	4569	}
sahilmgandhi	18:6a4db94011d3	4570
sahilmgandhi	18:6a4db94011d3	4571	/* Clear NACKF Flag */
sahilmgandhi	18:6a4db94011d3	4572	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4573
sahilmgandhi	18:6a4db94011d3	4574	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	4575	__HAL_FMPI2C_CLEAR_FLAG(hfmpi2c, FMPI2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	4576
sahilmgandhi	18:6a4db94011d3	4577	/* Flush TX register */
sahilmgandhi	18:6a4db94011d3	4578	FMPI2C_Flush_TXDR(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4579
sahilmgandhi	18:6a4db94011d3	4580	/* Clear Configuration Register 2 */
sahilmgandhi	18:6a4db94011d3	4581	FMPI2C_RESET_CR2(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4582
sahilmgandhi	18:6a4db94011d3	4583	hfmpi2c->ErrorCode = HAL_FMPI2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	4584	hfmpi2c->State= HAL_FMPI2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4585	hfmpi2c->Mode = HAL_FMPI2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4586
sahilmgandhi	18:6a4db94011d3	4587	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	4588	__HAL_UNLOCK(hfmpi2c);
sahilmgandhi	18:6a4db94011d3	4589
sahilmgandhi	18:6a4db94011d3	4590	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4591	}
sahilmgandhi	18:6a4db94011d3	4592	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4593	}
sahilmgandhi	18:6a4db94011d3	4594
sahilmgandhi	18:6a4db94011d3	4595	/**
sahilmgandhi	18:6a4db94011d3	4596	* @brief Handles FMPI2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
sahilmgandhi	18:6a4db94011d3	4597	* @param hfmpi2c FMPI2C handle.
sahilmgandhi	18:6a4db94011d3	4598	* @param DevAddress Specifies the slave address to be programmed.
sahilmgandhi	18:6a4db94011d3	4599	* @param Size Specifies the number of bytes to be programmed.
sahilmgandhi	18:6a4db94011d3	4600	* This parameter must be a value between 0 and 255.
sahilmgandhi	18:6a4db94011d3	4601	* @param Mode New state of the FMPI2C START condition generation.
sahilmgandhi	18:6a4db94011d3	4602	* This parameter can be one of the following values:
sahilmgandhi	18:6a4db94011d3	4603	* @arg @ref FMPI2C_RELOAD_MODE Enable Reload mode .
sahilmgandhi	18:6a4db94011d3	4604	* @arg @ref FMPI2C_AUTOEND_MODE Enable Automatic end mode.
sahilmgandhi	18:6a4db94011d3	4605	* @arg @ref FMPI2C_SOFTEND_MODE Enable Software end mode.
sahilmgandhi	18:6a4db94011d3	4606	* @param Request New state of the FMPI2C START condition generation.
sahilmgandhi	18:6a4db94011d3	4607	* This parameter can be one of the following values:
sahilmgandhi	18:6a4db94011d3	4608	* @arg @ref FMPI2C_NO_STARTSTOP Don't Generate stop and start condition.
sahilmgandhi	18:6a4db94011d3	4609	* @arg @ref FMPI2C_GENERATE_STOP Generate stop condition (Size should be set to 0).
sahilmgandhi	18:6a4db94011d3	4610	* @arg @ref FMPI2C_GENERATE_START_READ Generate Restart for read request.
sahilmgandhi	18:6a4db94011d3	4611	* @arg @ref FMPI2C_GENERATE_START_WRITE Generate Restart for write request.
sahilmgandhi	18:6a4db94011d3	4612	* @retval None
sahilmgandhi	18:6a4db94011d3	4613	*/
sahilmgandhi	18:6a4db94011d3	4614	static void FMPI2C_TransferConfig(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
sahilmgandhi	18:6a4db94011d3	4615	{
sahilmgandhi	18:6a4db94011d3	4616	uint32_t tmpreg = 0;
sahilmgandhi	18:6a4db94011d3	4617
sahilmgandhi	18:6a4db94011d3	4618	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	4619	assert_param(IS_FMPI2C_ALL_INSTANCE(hfmpi2c->Instance));
sahilmgandhi	18:6a4db94011d3	4620	assert_param(IS_TRANSFER_MODE(Mode));
sahilmgandhi	18:6a4db94011d3	4621	assert_param(IS_TRANSFER_REQUEST(Request));
sahilmgandhi	18:6a4db94011d3	4622
sahilmgandhi	18:6a4db94011d3	4623	/* Get the CR2 register value */
sahilmgandhi	18:6a4db94011d3	4624	tmpreg = hfmpi2c->Instance->CR2;
sahilmgandhi	18:6a4db94011d3	4625
sahilmgandhi	18:6a4db94011d3	4626	/* clear tmpreg specific bits */
sahilmgandhi	18:6a4db94011d3	4627	tmpreg &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD \| FMPI2C_CR2_NBYTES \| FMPI2C_CR2_RELOAD \| FMPI2C_CR2_AUTOEND \| FMPI2C_CR2_RD_WRN \| FMPI2C_CR2_START \| FMPI2C_CR2_STOP));
sahilmgandhi	18:6a4db94011d3	4628
sahilmgandhi	18:6a4db94011d3	4629	/* update tmpreg */
sahilmgandhi	18:6a4db94011d3	4630	tmpreg \|= (uint32_t)(((uint32_t)DevAddress & FMPI2C_CR2_SADD) \| (((uint32_t)Size << 16 ) & FMPI2C_CR2_NBYTES) \| \
sahilmgandhi	18:6a4db94011d3	4631	(uint32_t)Mode \| (uint32_t)Request);
sahilmgandhi	18:6a4db94011d3	4632
sahilmgandhi	18:6a4db94011d3	4633	/* update CR2 register */
sahilmgandhi	18:6a4db94011d3	4634	hfmpi2c->Instance->CR2 = tmpreg;
sahilmgandhi	18:6a4db94011d3	4635	}
sahilmgandhi	18:6a4db94011d3	4636
sahilmgandhi	18:6a4db94011d3	4637	/**
sahilmgandhi	18:6a4db94011d3	4638	* @brief Manage the enabling of Interrupts.
sahilmgandhi	18:6a4db94011d3	4639	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4640	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	4641	* @param InterruptRequest Value of @ref FMPI2C_Interrupt_configuration_definition.
sahilmgandhi	18:6a4db94011d3	4642	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4643	*/
sahilmgandhi	18:6a4db94011d3	4644	static HAL_StatusTypeDef FMPI2C_Enable_IRQ(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t InterruptRequest)
sahilmgandhi	18:6a4db94011d3	4645	{
sahilmgandhi	18:6a4db94011d3	4646	uint32_t tmpisr = 0;
sahilmgandhi	18:6a4db94011d3	4647
sahilmgandhi	18:6a4db94011d3	4648	if((hfmpi2c->XferISR == FMPI2C_Master_ISR_DMA) \|\| \
sahilmgandhi	18:6a4db94011d3	4649	(hfmpi2c->XferISR == FMPI2C_Slave_ISR_DMA))
sahilmgandhi	18:6a4db94011d3	4650	{
sahilmgandhi	18:6a4db94011d3	4651	if((InterruptRequest & FMPI2C_XFER_LISTEN_IT) == FMPI2C_XFER_LISTEN_IT)
sahilmgandhi	18:6a4db94011d3	4652	{
sahilmgandhi	18:6a4db94011d3	4653	/* Enable ERR, STOP, NACK and ADDR interrupts */
sahilmgandhi	18:6a4db94011d3	4654	tmpisr \|= FMPI2C_IT_ADDRI \| FMPI2C_IT_STOPI \| FMPI2C_IT_NACKI \| FMPI2C_IT_ERRI;
sahilmgandhi	18:6a4db94011d3	4655	}
sahilmgandhi	18:6a4db94011d3	4656
sahilmgandhi	18:6a4db94011d3	4657	if((InterruptRequest & FMPI2C_XFER_ERROR_IT) == FMPI2C_XFER_ERROR_IT)
sahilmgandhi	18:6a4db94011d3	4658	{
sahilmgandhi	18:6a4db94011d3	4659	/* Enable ERR and NACK interrupts */
sahilmgandhi	18:6a4db94011d3	4660	tmpisr \|= FMPI2C_IT_ERRI \| FMPI2C_IT_NACKI;
sahilmgandhi	18:6a4db94011d3	4661	}
sahilmgandhi	18:6a4db94011d3	4662
sahilmgandhi	18:6a4db94011d3	4663	if((InterruptRequest & FMPI2C_XFER_CPLT_IT) == FMPI2C_XFER_CPLT_IT)
sahilmgandhi	18:6a4db94011d3	4664	{
sahilmgandhi	18:6a4db94011d3	4665	/* Enable STOP interrupts */
sahilmgandhi	18:6a4db94011d3	4666	tmpisr \|= FMPI2C_IT_STOPI;
sahilmgandhi	18:6a4db94011d3	4667	}
sahilmgandhi	18:6a4db94011d3	4668
sahilmgandhi	18:6a4db94011d3	4669	if((InterruptRequest & FMPI2C_XFER_RELOAD_IT) == FMPI2C_XFER_RELOAD_IT)
sahilmgandhi	18:6a4db94011d3	4670	{
sahilmgandhi	18:6a4db94011d3	4671	/* Enable TC interrupts */
sahilmgandhi	18:6a4db94011d3	4672	tmpisr \|= FMPI2C_IT_TCI;
sahilmgandhi	18:6a4db94011d3	4673	}
sahilmgandhi	18:6a4db94011d3	4674	}
sahilmgandhi	18:6a4db94011d3	4675	else
sahilmgandhi	18:6a4db94011d3	4676	{
sahilmgandhi	18:6a4db94011d3	4677	if((InterruptRequest & FMPI2C_XFER_LISTEN_IT) == FMPI2C_XFER_LISTEN_IT)
sahilmgandhi	18:6a4db94011d3	4678	{
sahilmgandhi	18:6a4db94011d3	4679	/* Enable ERR, STOP, NACK, and ADDR interrupts */
sahilmgandhi	18:6a4db94011d3	4680	tmpisr \|= FMPI2C_IT_ADDRI \| FMPI2C_IT_STOPI \| FMPI2C_IT_NACKI \| FMPI2C_IT_ERRI;
sahilmgandhi	18:6a4db94011d3	4681	}
sahilmgandhi	18:6a4db94011d3	4682
sahilmgandhi	18:6a4db94011d3	4683	if((InterruptRequest & FMPI2C_XFER_TX_IT) == FMPI2C_XFER_TX_IT)
sahilmgandhi	18:6a4db94011d3	4684	{
sahilmgandhi	18:6a4db94011d3	4685	/* Enable ERR, TC, STOP, NACK and RXI interrupts */
sahilmgandhi	18:6a4db94011d3	4686	tmpisr \|= FMPI2C_IT_ERRI \| FMPI2C_IT_TCI \| FMPI2C_IT_STOPI \| FMPI2C_IT_NACKI \| FMPI2C_IT_TXI;
sahilmgandhi	18:6a4db94011d3	4687	}
sahilmgandhi	18:6a4db94011d3	4688
sahilmgandhi	18:6a4db94011d3	4689	if((InterruptRequest & FMPI2C_XFER_RX_IT) == FMPI2C_XFER_RX_IT)
sahilmgandhi	18:6a4db94011d3	4690	{
sahilmgandhi	18:6a4db94011d3	4691	/* Enable ERR, TC, STOP, NACK and TXI interrupts */
sahilmgandhi	18:6a4db94011d3	4692	tmpisr \|= FMPI2C_IT_ERRI \| FMPI2C_IT_TCI \| FMPI2C_IT_STOPI \| FMPI2C_IT_NACKI \| FMPI2C_IT_RXI;
sahilmgandhi	18:6a4db94011d3	4693	}
sahilmgandhi	18:6a4db94011d3	4694
sahilmgandhi	18:6a4db94011d3	4695	if((InterruptRequest & FMPI2C_XFER_CPLT_IT) == FMPI2C_XFER_CPLT_IT)
sahilmgandhi	18:6a4db94011d3	4696	{
sahilmgandhi	18:6a4db94011d3	4697	/* Enable STOP interrupts */
sahilmgandhi	18:6a4db94011d3	4698	tmpisr \|= FMPI2C_IT_STOPI;
sahilmgandhi	18:6a4db94011d3	4699	}
sahilmgandhi	18:6a4db94011d3	4700	}
sahilmgandhi	18:6a4db94011d3	4701
sahilmgandhi	18:6a4db94011d3	4702	/* Enable interrupts only at the end */
sahilmgandhi	18:6a4db94011d3	4703	/* to avoid the risk of FMPI2C interrupt handle execution before */
sahilmgandhi	18:6a4db94011d3	4704	/* all interrupts requested done */
sahilmgandhi	18:6a4db94011d3	4705	__HAL_FMPI2C_ENABLE_IT(hfmpi2c, tmpisr);
sahilmgandhi	18:6a4db94011d3	4706
sahilmgandhi	18:6a4db94011d3	4707	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4708	}
sahilmgandhi	18:6a4db94011d3	4709
sahilmgandhi	18:6a4db94011d3	4710	/**
sahilmgandhi	18:6a4db94011d3	4711	* @brief Manage the disabling of Interrupts.
sahilmgandhi	18:6a4db94011d3	4712	* @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4713	* the configuration information for the specified FMPI2C.
sahilmgandhi	18:6a4db94011d3	4714	* @param InterruptRequest Value of @ref FMPI2C_Interrupt_configuration_definition.
sahilmgandhi	18:6a4db94011d3	4715	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4716	*/
sahilmgandhi	18:6a4db94011d3	4717	static HAL_StatusTypeDef FMPI2C_Disable_IRQ(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t InterruptRequest)
sahilmgandhi	18:6a4db94011d3	4718	{
sahilmgandhi	18:6a4db94011d3	4719	uint32_t tmpisr = 0;
sahilmgandhi	18:6a4db94011d3	4720
sahilmgandhi	18:6a4db94011d3	4721	if((InterruptRequest & FMPI2C_XFER_TX_IT) == FMPI2C_XFER_TX_IT)
sahilmgandhi	18:6a4db94011d3	4722	{
sahilmgandhi	18:6a4db94011d3	4723	/* Disable TC and TXI interrupts */
sahilmgandhi	18:6a4db94011d3	4724	tmpisr \|= FMPI2C_IT_TCI \| FMPI2C_IT_TXI;
sahilmgandhi	18:6a4db94011d3	4725
sahilmgandhi	18:6a4db94011d3	4726	if((hfmpi2c->State & HAL_FMPI2C_STATE_LISTEN) != HAL_FMPI2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	4727	{
sahilmgandhi	18:6a4db94011d3	4728	/* Disable NACK and STOP interrupts */
sahilmgandhi	18:6a4db94011d3	4729	tmpisr \|= FMPI2C_IT_STOPI \| FMPI2C_IT_NACKI \| FMPI2C_IT_ERRI;
sahilmgandhi	18:6a4db94011d3	4730	}
sahilmgandhi	18:6a4db94011d3	4731	}
sahilmgandhi	18:6a4db94011d3	4732
sahilmgandhi	18:6a4db94011d3	4733	if((InterruptRequest & FMPI2C_XFER_RX_IT) == FMPI2C_XFER_RX_IT)
sahilmgandhi	18:6a4db94011d3	4734	{
sahilmgandhi	18:6a4db94011d3	4735	/* Disable TC and RXI interrupts */
sahilmgandhi	18:6a4db94011d3	4736	tmpisr \|= FMPI2C_IT_TCI \| FMPI2C_IT_RXI;
sahilmgandhi	18:6a4db94011d3	4737
sahilmgandhi	18:6a4db94011d3	4738	if((hfmpi2c->State & HAL_FMPI2C_STATE_LISTEN) != HAL_FMPI2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	4739	{
sahilmgandhi	18:6a4db94011d3	4740	/* Disable NACK and STOP interrupts */
sahilmgandhi	18:6a4db94011d3	4741	tmpisr \|= FMPI2C_IT_STOPI \| FMPI2C_IT_NACKI \| FMPI2C_IT_ERRI;
sahilmgandhi	18:6a4db94011d3	4742	}
sahilmgandhi	18:6a4db94011d3	4743	}
sahilmgandhi	18:6a4db94011d3	4744
sahilmgandhi	18:6a4db94011d3	4745	if((InterruptRequest & FMPI2C_XFER_LISTEN_IT) == FMPI2C_XFER_LISTEN_IT)
sahilmgandhi	18:6a4db94011d3	4746	{
sahilmgandhi	18:6a4db94011d3	4747	/* Disable ADDR, NACK and STOP interrupts */
sahilmgandhi	18:6a4db94011d3	4748	tmpisr \|= FMPI2C_IT_ADDRI \| FMPI2C_IT_STOPI \| FMPI2C_IT_NACKI \| FMPI2C_IT_ERRI;
sahilmgandhi	18:6a4db94011d3	4749	}
sahilmgandhi	18:6a4db94011d3	4750
sahilmgandhi	18:6a4db94011d3	4751	if((InterruptRequest & FMPI2C_XFER_ERROR_IT) == FMPI2C_XFER_ERROR_IT)
sahilmgandhi	18:6a4db94011d3	4752	{
sahilmgandhi	18:6a4db94011d3	4753	/* Enable ERR and NACK interrupts */
sahilmgandhi	18:6a4db94011d3	4754	tmpisr \|= FMPI2C_IT_ERRI \| FMPI2C_IT_NACKI;
sahilmgandhi	18:6a4db94011d3	4755	}
sahilmgandhi	18:6a4db94011d3	4756
sahilmgandhi	18:6a4db94011d3	4757	if((InterruptRequest & FMPI2C_XFER_CPLT_IT) == FMPI2C_XFER_CPLT_IT)
sahilmgandhi	18:6a4db94011d3	4758	{
sahilmgandhi	18:6a4db94011d3	4759	/* Enable STOP interrupts */
sahilmgandhi	18:6a4db94011d3	4760	tmpisr \|= FMPI2C_IT_STOPI;
sahilmgandhi	18:6a4db94011d3	4761	}
sahilmgandhi	18:6a4db94011d3	4762
sahilmgandhi	18:6a4db94011d3	4763	if((InterruptRequest & FMPI2C_XFER_RELOAD_IT) == FMPI2C_XFER_RELOAD_IT)
sahilmgandhi	18:6a4db94011d3	4764	{
sahilmgandhi	18:6a4db94011d3	4765	/* Enable TC interrupts */
sahilmgandhi	18:6a4db94011d3	4766	tmpisr \|= FMPI2C_IT_TCI;
sahilmgandhi	18:6a4db94011d3	4767	}
sahilmgandhi	18:6a4db94011d3	4768
sahilmgandhi	18:6a4db94011d3	4769	/* Disable interrupts only at the end */
sahilmgandhi	18:6a4db94011d3	4770	/* to avoid a breaking situation like at "t" time */
sahilmgandhi	18:6a4db94011d3	4771	/* all disable interrupts request are not done */
sahilmgandhi	18:6a4db94011d3	4772	__HAL_FMPI2C_DISABLE_IT(hfmpi2c, tmpisr);
sahilmgandhi	18:6a4db94011d3	4773
sahilmgandhi	18:6a4db94011d3	4774	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4775	}
sahilmgandhi	18:6a4db94011d3	4776
sahilmgandhi	18:6a4db94011d3	4777	/**
sahilmgandhi	18:6a4db94011d3	4778	* @}
sahilmgandhi	18:6a4db94011d3	4779	*/
sahilmgandhi	18:6a4db94011d3	4780	#endif /* STM32F410xx \|\| STM32F446xx \|\| STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
sahilmgandhi	18:6a4db94011d3	4781	#endif /* HAL_FMPI2C_MODULE_ENABLED */
sahilmgandhi	18:6a4db94011d3	4782	/**
sahilmgandhi	18:6a4db94011d3	4783	* @}
sahilmgandhi	18:6a4db94011d3	4784	*/
sahilmgandhi	18:6a4db94011d3	4785
sahilmgandhi	18:6a4db94011d3	4786	/**
sahilmgandhi	18:6a4db94011d3	4787	* @}
sahilmgandhi	18:6a4db94011d3	4788	*/
sahilmgandhi	18:6a4db94011d3	4789
sahilmgandhi	18:6a4db94011d3	4790	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	25 Apr 2017
Imports:	29
Forks:	0
Commits:	47
Dependents:	0
Dependencies:	2
Followers:	5

The code in this repository is Apache licensed.

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_fmpi2c.c@18:6a4db94011d3, 2017-05-14 (annotated)

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