MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dcmi.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_dcmi.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of DCMI HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_DCMI_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_DCMI_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) ||\
sahilmgandhi 18:6a4db94011d3 47 defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) ||\
sahilmgandhi 18:6a4db94011d3 48 defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 49 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 50 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 /* Include DCMI HAL Extended module */
sahilmgandhi 18:6a4db94011d3 53 /* (include on top of file since DCMI structures are defined in extended file) */
sahilmgandhi 18:6a4db94011d3 54 #include "stm32f4xx_hal_dcmi_ex.h"
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 57 * @{
sahilmgandhi 18:6a4db94011d3 58 */
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /** @addtogroup DCMI DCMI
sahilmgandhi 18:6a4db94011d3 61 * @brief DCMI HAL module driver
sahilmgandhi 18:6a4db94011d3 62 * @{
sahilmgandhi 18:6a4db94011d3 63 */
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 66 /** @defgroup DCMI_Exported_Types DCMI Exported Types
sahilmgandhi 18:6a4db94011d3 67 * @{
sahilmgandhi 18:6a4db94011d3 68 */
sahilmgandhi 18:6a4db94011d3 69 /**
sahilmgandhi 18:6a4db94011d3 70 * @brief HAL DCMI State structures definition
sahilmgandhi 18:6a4db94011d3 71 */
sahilmgandhi 18:6a4db94011d3 72 typedef enum
sahilmgandhi 18:6a4db94011d3 73 {
sahilmgandhi 18:6a4db94011d3 74 HAL_DCMI_STATE_RESET = 0x00U, /*!< DCMI not yet initialized or disabled */
sahilmgandhi 18:6a4db94011d3 75 HAL_DCMI_STATE_READY = 0x01U, /*!< DCMI initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 76 HAL_DCMI_STATE_BUSY = 0x02U, /*!< DCMI internal processing is ongoing */
sahilmgandhi 18:6a4db94011d3 77 HAL_DCMI_STATE_TIMEOUT = 0x03U, /*!< DCMI timeout state */
sahilmgandhi 18:6a4db94011d3 78 HAL_DCMI_STATE_ERROR = 0x04U, /*!< DCMI error state */
sahilmgandhi 18:6a4db94011d3 79 HAL_DCMI_STATE_SUSPENDED = 0x05U /*!< DCMI suspend state */
sahilmgandhi 18:6a4db94011d3 80 }HAL_DCMI_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 /**
sahilmgandhi 18:6a4db94011d3 83 * @brief DCMI handle Structure definition
sahilmgandhi 18:6a4db94011d3 84 */
sahilmgandhi 18:6a4db94011d3 85 typedef struct
sahilmgandhi 18:6a4db94011d3 86 {
sahilmgandhi 18:6a4db94011d3 87 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 DCMI_InitTypeDef Init; /*!< DCMI parameters */
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 HAL_LockTypeDef Lock; /*!< DCMI locking object */
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 __IO uint32_t XferCount; /*!< DMA transfer counter */
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 __IO uint32_t XferSize; /*!< DMA transfer size */
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 uint32_t XferTransferNumber; /*!< DMA transfer number */
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 __IO uint32_t ErrorCode; /*!< DCMI Error code */
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 }DCMI_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 108 /**
sahilmgandhi 18:6a4db94011d3 109 * @}
sahilmgandhi 18:6a4db94011d3 110 */
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 113 /** @defgroup DCMI_Exported_Constants DCMI Exported Constants
sahilmgandhi 18:6a4db94011d3 114 * @{
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 /** @defgroup DCMI_Error_Code DCMI Error Code
sahilmgandhi 18:6a4db94011d3 118 * @{
sahilmgandhi 18:6a4db94011d3 119 */
sahilmgandhi 18:6a4db94011d3 120 #define HAL_DCMI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 121 #define HAL_DCMI_ERROR_OVR ((uint32_t)0x00000001U) /*!< Overrun error */
sahilmgandhi 18:6a4db94011d3 122 #define HAL_DCMI_ERROR_SYNC ((uint32_t)0x00000002U) /*!< Synchronization error */
sahilmgandhi 18:6a4db94011d3 123 #define HAL_DCMI_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
sahilmgandhi 18:6a4db94011d3 124 #define HAL_DCMI_ERROR_DMA ((uint32_t)0x00000040U) /*!< DMA error */
sahilmgandhi 18:6a4db94011d3 125 /**
sahilmgandhi 18:6a4db94011d3 126 * @}
sahilmgandhi 18:6a4db94011d3 127 */
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 /** @defgroup DCMI_Capture_Mode DCMI Capture Mode
sahilmgandhi 18:6a4db94011d3 130 * @{
sahilmgandhi 18:6a4db94011d3 131 */
sahilmgandhi 18:6a4db94011d3 132 #define DCMI_MODE_CONTINUOUS ((uint32_t)0x00000000U) /*!< The received data are transferred continuously
sahilmgandhi 18:6a4db94011d3 133 into the destination memory through the DMA */
sahilmgandhi 18:6a4db94011d3 134 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
sahilmgandhi 18:6a4db94011d3 135 frame and then transfers a single frame through the DMA */
sahilmgandhi 18:6a4db94011d3 136 /**
sahilmgandhi 18:6a4db94011d3 137 * @}
sahilmgandhi 18:6a4db94011d3 138 */
sahilmgandhi 18:6a4db94011d3 139
sahilmgandhi 18:6a4db94011d3 140 /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode
sahilmgandhi 18:6a4db94011d3 141 * @{
sahilmgandhi 18:6a4db94011d3 142 */
sahilmgandhi 18:6a4db94011d3 143 #define DCMI_SYNCHRO_HARDWARE ((uint32_t)0x00000000U) /*!< Hardware synchronization data capture (frame/line start/stop)
sahilmgandhi 18:6a4db94011d3 144 is synchronized with the HSYNC/VSYNC signals */
sahilmgandhi 18:6a4db94011d3 145 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
sahilmgandhi 18:6a4db94011d3 146 synchronization codes embedded in the data flow */
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 /**
sahilmgandhi 18:6a4db94011d3 149 * @}
sahilmgandhi 18:6a4db94011d3 150 */
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity
sahilmgandhi 18:6a4db94011d3 153 * @{
sahilmgandhi 18:6a4db94011d3 154 */
sahilmgandhi 18:6a4db94011d3 155 #define DCMI_PCKPOLARITY_FALLING ((uint32_t)0x00000000U) /*!< Pixel clock active on Falling edge */
sahilmgandhi 18:6a4db94011d3 156 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158 /**
sahilmgandhi 18:6a4db94011d3 159 * @}
sahilmgandhi 18:6a4db94011d3 160 */
sahilmgandhi 18:6a4db94011d3 161
sahilmgandhi 18:6a4db94011d3 162 /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity
sahilmgandhi 18:6a4db94011d3 163 * @{
sahilmgandhi 18:6a4db94011d3 164 */
sahilmgandhi 18:6a4db94011d3 165 #define DCMI_VSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Vertical synchronization active Low */
sahilmgandhi 18:6a4db94011d3 166 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 /**
sahilmgandhi 18:6a4db94011d3 169 * @}
sahilmgandhi 18:6a4db94011d3 170 */
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity
sahilmgandhi 18:6a4db94011d3 173 * @{
sahilmgandhi 18:6a4db94011d3 174 */
sahilmgandhi 18:6a4db94011d3 175 #define DCMI_HSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Horizontal synchronization active Low */
sahilmgandhi 18:6a4db94011d3 176 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 /**
sahilmgandhi 18:6a4db94011d3 179 * @}
sahilmgandhi 18:6a4db94011d3 180 */
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG
sahilmgandhi 18:6a4db94011d3 183 * @{
sahilmgandhi 18:6a4db94011d3 184 */
sahilmgandhi 18:6a4db94011d3 185 #define DCMI_JPEG_DISABLE ((uint32_t)0x00000000U) /*!< Mode JPEG Disabled */
sahilmgandhi 18:6a4db94011d3 186 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 /**
sahilmgandhi 18:6a4db94011d3 189 * @}
sahilmgandhi 18:6a4db94011d3 190 */
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 /** @defgroup DCMI_Capture_Rate DCMI Capture Rate
sahilmgandhi 18:6a4db94011d3 193 * @{
sahilmgandhi 18:6a4db94011d3 194 */
sahilmgandhi 18:6a4db94011d3 195 #define DCMI_CR_ALL_FRAME ((uint32_t)0x00000000U) /*!< All frames are captured */
sahilmgandhi 18:6a4db94011d3 196 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
sahilmgandhi 18:6a4db94011d3 197 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
sahilmgandhi 18:6a4db94011d3 198
sahilmgandhi 18:6a4db94011d3 199 /**
sahilmgandhi 18:6a4db94011d3 200 * @}
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode
sahilmgandhi 18:6a4db94011d3 204 * @{
sahilmgandhi 18:6a4db94011d3 205 */
sahilmgandhi 18:6a4db94011d3 206 #define DCMI_EXTEND_DATA_8B ((uint32_t)0x00000000U) /*!< Interface captures 8-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 207 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 208 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 209 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 /**
sahilmgandhi 18:6a4db94011d3 212 * @}
sahilmgandhi 18:6a4db94011d3 213 */
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate
sahilmgandhi 18:6a4db94011d3 216 * @{
sahilmgandhi 18:6a4db94011d3 217 */
sahilmgandhi 18:6a4db94011d3 218 #define DCMI_WINDOW_COORDINATE ((uint32_t)0x3FFFU) /*!< Window coordinate */
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 /**
sahilmgandhi 18:6a4db94011d3 221 * @}
sahilmgandhi 18:6a4db94011d3 222 */
sahilmgandhi 18:6a4db94011d3 223
sahilmgandhi 18:6a4db94011d3 224 /** @defgroup DCMI_Window_Height DCMI Window Height
sahilmgandhi 18:6a4db94011d3 225 * @{
sahilmgandhi 18:6a4db94011d3 226 */
sahilmgandhi 18:6a4db94011d3 227 #define DCMI_WINDOW_HEIGHT ((uint32_t)0x1FFFU) /*!< Window Height */
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 /**
sahilmgandhi 18:6a4db94011d3 230 * @}
sahilmgandhi 18:6a4db94011d3 231 */
sahilmgandhi 18:6a4db94011d3 232
sahilmgandhi 18:6a4db94011d3 233 /** @defgroup DCMI_Window_Vertical_Line DCMI Window Vertical Line
sahilmgandhi 18:6a4db94011d3 234 * @{
sahilmgandhi 18:6a4db94011d3 235 */
sahilmgandhi 18:6a4db94011d3 236 #define DCMI_POSITION_CWSIZE_VLINE (uint32_t)POSITION_VAL(DCMI_CWSIZE_VLINE) /*!< Required left shift to set crop window vertical line count */
sahilmgandhi 18:6a4db94011d3 237 #define DCMI_POSITION_CWSTRT_VST (uint32_t)POSITION_VAL(DCMI_CWSTRT_VST) /*!< Required left shift to set crop window vertical start line count */
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /**
sahilmgandhi 18:6a4db94011d3 240 * @}
sahilmgandhi 18:6a4db94011d3 241 */
sahilmgandhi 18:6a4db94011d3 242
sahilmgandhi 18:6a4db94011d3 243 /** @defgroup DCMI_interrupt_sources DCMI interrupt sources
sahilmgandhi 18:6a4db94011d3 244 * @{
sahilmgandhi 18:6a4db94011d3 245 */
sahilmgandhi 18:6a4db94011d3 246 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE) /*!< Capture complete interrupt */
sahilmgandhi 18:6a4db94011d3 247 #define DCMI_IT_OVR ((uint32_t)DCMI_IER_OVR_IE) /*!< Overrun interrupt */
sahilmgandhi 18:6a4db94011d3 248 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE) /*!< Synchronization error interrupt */
sahilmgandhi 18:6a4db94011d3 249 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE) /*!< VSYNC interrupt */
sahilmgandhi 18:6a4db94011d3 250 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE) /*!< Line interrupt */
sahilmgandhi 18:6a4db94011d3 251 /**
sahilmgandhi 18:6a4db94011d3 252 * @}
sahilmgandhi 18:6a4db94011d3 253 */
sahilmgandhi 18:6a4db94011d3 254
sahilmgandhi 18:6a4db94011d3 255 /** @defgroup DCMI_Flags DCMI Flags
sahilmgandhi 18:6a4db94011d3 256 * @{
sahilmgandhi 18:6a4db94011d3 257 */
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 /**
sahilmgandhi 18:6a4db94011d3 260 * @brief DCMI SR register
sahilmgandhi 18:6a4db94011d3 261 */
sahilmgandhi 18:6a4db94011d3 262 #define DCMI_FLAG_HSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_HSYNC) /*!< HSYNC pin state (active line / synchronization between lines) */
sahilmgandhi 18:6a4db94011d3 263 #define DCMI_FLAG_VSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_VSYNC) /*!< VSYNC pin state (active frame / synchronization between frames) */
sahilmgandhi 18:6a4db94011d3 264 #define DCMI_FLAG_FNE ((uint32_t)DCMI_SR_INDEX|DCMI_SR_FNE) /*!< FIFO not empty flag */
sahilmgandhi 18:6a4db94011d3 265 /**
sahilmgandhi 18:6a4db94011d3 266 * @brief DCMI RIS register
sahilmgandhi 18:6a4db94011d3 267 */
sahilmgandhi 18:6a4db94011d3 268 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RISR_FRAME_RIS) /*!< Frame capture complete interrupt flag */
sahilmgandhi 18:6a4db94011d3 269 #define DCMI_FLAG_OVRRI ((uint32_t)DCMI_RISR_OVR_RIS) /*!< Overrun interrupt flag */
sahilmgandhi 18:6a4db94011d3 270 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RISR_ERR_RIS) /*!< Synchronization error interrupt flag */
sahilmgandhi 18:6a4db94011d3 271 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RISR_VSYNC_RIS) /*!< VSYNC interrupt flag */
sahilmgandhi 18:6a4db94011d3 272 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RISR_LINE_RIS) /*!< Line interrupt flag */
sahilmgandhi 18:6a4db94011d3 273 /**
sahilmgandhi 18:6a4db94011d3 274 * @brief DCMI MIS register
sahilmgandhi 18:6a4db94011d3 275 */
sahilmgandhi 18:6a4db94011d3 276 #define DCMI_FLAG_FRAMEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_FRAME_MIS) /*!< DCMI Frame capture complete masked interrupt status */
sahilmgandhi 18:6a4db94011d3 277 #define DCMI_FLAG_OVRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_OVR_MIS ) /*!< DCMI Overrun masked interrupt status */
sahilmgandhi 18:6a4db94011d3 278 #define DCMI_FLAG_ERRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_ERR_MIS ) /*!< DCMI Synchronization error masked interrupt status */
sahilmgandhi 18:6a4db94011d3 279 #define DCMI_FLAG_VSYNCMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_VSYNC_MIS) /*!< DCMI VSYNC masked interrupt status */
sahilmgandhi 18:6a4db94011d3 280 #define DCMI_FLAG_LINEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_LINE_MIS ) /*!< DCMI Line masked interrupt status */
sahilmgandhi 18:6a4db94011d3 281 /**
sahilmgandhi 18:6a4db94011d3 282 * @}
sahilmgandhi 18:6a4db94011d3 283 */
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 /**
sahilmgandhi 18:6a4db94011d3 286 * @}
sahilmgandhi 18:6a4db94011d3 287 */
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 290 /** @defgroup DCMI_Exported_Macros DCMI Exported Macros
sahilmgandhi 18:6a4db94011d3 291 * @{
sahilmgandhi 18:6a4db94011d3 292 */
sahilmgandhi 18:6a4db94011d3 293
sahilmgandhi 18:6a4db94011d3 294 /** @brief Reset DCMI handle state
sahilmgandhi 18:6a4db94011d3 295 * @param __HANDLE__: specifies the DCMI handle.
sahilmgandhi 18:6a4db94011d3 296 * @retval None
sahilmgandhi 18:6a4db94011d3 297 */
sahilmgandhi 18:6a4db94011d3 298 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 /**
sahilmgandhi 18:6a4db94011d3 301 * @brief Enable the DCMI.
sahilmgandhi 18:6a4db94011d3 302 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 303 * @retval None
sahilmgandhi 18:6a4db94011d3 304 */
sahilmgandhi 18:6a4db94011d3 305 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 /**
sahilmgandhi 18:6a4db94011d3 308 * @brief Disable the DCMI.
sahilmgandhi 18:6a4db94011d3 309 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 310 * @retval None
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 /* Interrupt & Flag management */
sahilmgandhi 18:6a4db94011d3 315 /**
sahilmgandhi 18:6a4db94011d3 316 * @brief Get the DCMI pending flag.
sahilmgandhi 18:6a4db94011d3 317 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 318 * @param __FLAG__: Get the specified flag.
sahilmgandhi 18:6a4db94011d3 319 * This parameter can be one of the following values (no combination allowed)
sahilmgandhi 18:6a4db94011d3 320 * @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines)
sahilmgandhi 18:6a4db94011d3 321 * @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames)
sahilmgandhi 18:6a4db94011d3 322 * @arg DCMI_FLAG_FNE: FIFO empty flag
sahilmgandhi 18:6a4db94011d3 323 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
sahilmgandhi 18:6a4db94011d3 324 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
sahilmgandhi 18:6a4db94011d3 325 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
sahilmgandhi 18:6a4db94011d3 326 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
sahilmgandhi 18:6a4db94011d3 327 * @arg DCMI_FLAG_LINERI: Line flag mask
sahilmgandhi 18:6a4db94011d3 328 * @arg DCMI_FLAG_FRAMEMI: DCMI Capture complete masked interrupt status
sahilmgandhi 18:6a4db94011d3 329 * @arg DCMI_FLAG_OVRMI: DCMI Overrun masked interrupt status
sahilmgandhi 18:6a4db94011d3 330 * @arg DCMI_FLAG_ERRMI: DCMI Synchronization error masked interrupt status
sahilmgandhi 18:6a4db94011d3 331 * @arg DCMI_FLAG_VSYNCMI: DCMI VSYNC masked interrupt status
sahilmgandhi 18:6a4db94011d3 332 * @arg DCMI_FLAG_LINEMI: DCMI Line masked interrupt status
sahilmgandhi 18:6a4db94011d3 333 * @retval The state of FLAG.
sahilmgandhi 18:6a4db94011d3 334 */
sahilmgandhi 18:6a4db94011d3 335 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
sahilmgandhi 18:6a4db94011d3 336 ((((__FLAG__) & (DCMI_SR_INDEX|DCMI_MIS_INDEX)) == 0x0U)? ((__HANDLE__)->Instance->RIS & (__FLAG__)) :\
sahilmgandhi 18:6a4db94011d3 337 (((__FLAG__) & DCMI_SR_INDEX) == 0x0U)? ((__HANDLE__)->Instance->MIS & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 /**
sahilmgandhi 18:6a4db94011d3 340 * @brief Clear the DCMI pending flags.
sahilmgandhi 18:6a4db94011d3 341 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 342 * @param __FLAG__: specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 343 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 344 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
sahilmgandhi 18:6a4db94011d3 345 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
sahilmgandhi 18:6a4db94011d3 346 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
sahilmgandhi 18:6a4db94011d3 347 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
sahilmgandhi 18:6a4db94011d3 348 * @arg DCMI_FLAG_LINERI: Line flag mask
sahilmgandhi 18:6a4db94011d3 349 * @retval None
sahilmgandhi 18:6a4db94011d3 350 */
sahilmgandhi 18:6a4db94011d3 351 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 /**
sahilmgandhi 18:6a4db94011d3 354 * @brief Enable the specified DCMI interrupts.
sahilmgandhi 18:6a4db94011d3 355 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 356 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
sahilmgandhi 18:6a4db94011d3 357 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 358 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
sahilmgandhi 18:6a4db94011d3 359 * @arg DCMI_IT_OVR: Overrun interrupt mask
sahilmgandhi 18:6a4db94011d3 360 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
sahilmgandhi 18:6a4db94011d3 361 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
sahilmgandhi 18:6a4db94011d3 362 * @arg DCMI_IT_LINE: Line interrupt mask
sahilmgandhi 18:6a4db94011d3 363 * @retval None
sahilmgandhi 18:6a4db94011d3 364 */
sahilmgandhi 18:6a4db94011d3 365 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 366
sahilmgandhi 18:6a4db94011d3 367 /**
sahilmgandhi 18:6a4db94011d3 368 * @brief Disable the specified DCMI interrupts.
sahilmgandhi 18:6a4db94011d3 369 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 370 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
sahilmgandhi 18:6a4db94011d3 371 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 372 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
sahilmgandhi 18:6a4db94011d3 373 * @arg DCMI_IT_OVR: Overrun interrupt mask
sahilmgandhi 18:6a4db94011d3 374 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
sahilmgandhi 18:6a4db94011d3 375 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
sahilmgandhi 18:6a4db94011d3 376 * @arg DCMI_IT_LINE: Line interrupt mask
sahilmgandhi 18:6a4db94011d3 377 * @retval None
sahilmgandhi 18:6a4db94011d3 378 */
sahilmgandhi 18:6a4db94011d3 379 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 380
sahilmgandhi 18:6a4db94011d3 381 /**
sahilmgandhi 18:6a4db94011d3 382 * @brief Check whether the specified DCMI interrupt has occurred or not.
sahilmgandhi 18:6a4db94011d3 383 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 384 * @param __INTERRUPT__: specifies the DCMI interrupt source to check.
sahilmgandhi 18:6a4db94011d3 385 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 386 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
sahilmgandhi 18:6a4db94011d3 387 * @arg DCMI_IT_OVR: Overrun interrupt mask
sahilmgandhi 18:6a4db94011d3 388 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
sahilmgandhi 18:6a4db94011d3 389 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
sahilmgandhi 18:6a4db94011d3 390 * @arg DCMI_IT_LINE: Line interrupt mask
sahilmgandhi 18:6a4db94011d3 391 * @retval The state of INTERRUPT.
sahilmgandhi 18:6a4db94011d3 392 */
sahilmgandhi 18:6a4db94011d3 393 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 394
sahilmgandhi 18:6a4db94011d3 395 /**
sahilmgandhi 18:6a4db94011d3 396 * @}
sahilmgandhi 18:6a4db94011d3 397 */
sahilmgandhi 18:6a4db94011d3 398
sahilmgandhi 18:6a4db94011d3 399 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 400 /** @addtogroup DCMI_Exported_Functions DCMI Exported Functions
sahilmgandhi 18:6a4db94011d3 401 * @{
sahilmgandhi 18:6a4db94011d3 402 */
sahilmgandhi 18:6a4db94011d3 403
sahilmgandhi 18:6a4db94011d3 404 /** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
sahilmgandhi 18:6a4db94011d3 405 * @{
sahilmgandhi 18:6a4db94011d3 406 */
sahilmgandhi 18:6a4db94011d3 407 /* Initialization and de-initialization functions *****************************/
sahilmgandhi 18:6a4db94011d3 408 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 409 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 410 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 411 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 412 /**
sahilmgandhi 18:6a4db94011d3 413 * @}
sahilmgandhi 18:6a4db94011d3 414 */
sahilmgandhi 18:6a4db94011d3 415
sahilmgandhi 18:6a4db94011d3 416 /** @addtogroup DCMI_Exported_Functions_Group2 IO operation functions
sahilmgandhi 18:6a4db94011d3 417 * @{
sahilmgandhi 18:6a4db94011d3 418 */
sahilmgandhi 18:6a4db94011d3 419 /* IO operation functions *****************************************************/
sahilmgandhi 18:6a4db94011d3 420 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
sahilmgandhi 18:6a4db94011d3 421 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 422 HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 423 HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 424 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 425 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 426 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 427 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 428 void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 429 void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 430 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 431 /**
sahilmgandhi 18:6a4db94011d3 432 * @}
sahilmgandhi 18:6a4db94011d3 433 */
sahilmgandhi 18:6a4db94011d3 434
sahilmgandhi 18:6a4db94011d3 435 /** @addtogroup DCMI_Exported_Functions_Group3 Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 436 * @{
sahilmgandhi 18:6a4db94011d3 437 */
sahilmgandhi 18:6a4db94011d3 438 /* Peripheral Control functions ***********************************************/
sahilmgandhi 18:6a4db94011d3 439 HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
sahilmgandhi 18:6a4db94011d3 440 HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 441 HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 442 /**
sahilmgandhi 18:6a4db94011d3 443 * @}
sahilmgandhi 18:6a4db94011d3 444 */
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 /** @addtogroup DCMI_Exported_Functions_Group4 Peripheral State functions
sahilmgandhi 18:6a4db94011d3 447 * @{
sahilmgandhi 18:6a4db94011d3 448 */
sahilmgandhi 18:6a4db94011d3 449 /* Peripheral State functions *************************************************/
sahilmgandhi 18:6a4db94011d3 450 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 451 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 452 /**
sahilmgandhi 18:6a4db94011d3 453 * @}
sahilmgandhi 18:6a4db94011d3 454 */
sahilmgandhi 18:6a4db94011d3 455
sahilmgandhi 18:6a4db94011d3 456 /**
sahilmgandhi 18:6a4db94011d3 457 * @}
sahilmgandhi 18:6a4db94011d3 458 */
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 461 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 462 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 463 /** @defgroup DCMI_Private_Constants DCMI Private Constants
sahilmgandhi 18:6a4db94011d3 464 * @{
sahilmgandhi 18:6a4db94011d3 465 */
sahilmgandhi 18:6a4db94011d3 466 #define DCMI_MIS_INDEX ((uint32_t)0x1000) /*!< DCMI MIS register index */
sahilmgandhi 18:6a4db94011d3 467 #define DCMI_SR_INDEX ((uint32_t)0x2000) /*!< DCMI SR register index */
sahilmgandhi 18:6a4db94011d3 468 /**
sahilmgandhi 18:6a4db94011d3 469 * @}
sahilmgandhi 18:6a4db94011d3 470 */
sahilmgandhi 18:6a4db94011d3 471 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 472 /** @defgroup DCMI_Private_Macros DCMI Private Macros
sahilmgandhi 18:6a4db94011d3 473 * @{
sahilmgandhi 18:6a4db94011d3 474 */
sahilmgandhi 18:6a4db94011d3 475 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
sahilmgandhi 18:6a4db94011d3 476 ((MODE) == DCMI_MODE_SNAPSHOT))
sahilmgandhi 18:6a4db94011d3 477
sahilmgandhi 18:6a4db94011d3 478 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
sahilmgandhi 18:6a4db94011d3 479 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
sahilmgandhi 18:6a4db94011d3 480
sahilmgandhi 18:6a4db94011d3 481 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
sahilmgandhi 18:6a4db94011d3 482 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
sahilmgandhi 18:6a4db94011d3 483
sahilmgandhi 18:6a4db94011d3 484 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
sahilmgandhi 18:6a4db94011d3 485 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
sahilmgandhi 18:6a4db94011d3 486
sahilmgandhi 18:6a4db94011d3 487 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
sahilmgandhi 18:6a4db94011d3 488 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
sahilmgandhi 18:6a4db94011d3 489
sahilmgandhi 18:6a4db94011d3 490 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 491 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
sahilmgandhi 18:6a4db94011d3 492
sahilmgandhi 18:6a4db94011d3 493 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
sahilmgandhi 18:6a4db94011d3 494 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
sahilmgandhi 18:6a4db94011d3 495 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
sahilmgandhi 18:6a4db94011d3 496
sahilmgandhi 18:6a4db94011d3 497 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
sahilmgandhi 18:6a4db94011d3 498 ((DATA) == DCMI_EXTEND_DATA_10B) || \
sahilmgandhi 18:6a4db94011d3 499 ((DATA) == DCMI_EXTEND_DATA_12B) || \
sahilmgandhi 18:6a4db94011d3 500 ((DATA) == DCMI_EXTEND_DATA_14B))
sahilmgandhi 18:6a4db94011d3 501
sahilmgandhi 18:6a4db94011d3 502 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
sahilmgandhi 18:6a4db94011d3 503
sahilmgandhi 18:6a4db94011d3 504 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
sahilmgandhi 18:6a4db94011d3 505
sahilmgandhi 18:6a4db94011d3 506 /**
sahilmgandhi 18:6a4db94011d3 507 * @}
sahilmgandhi 18:6a4db94011d3 508 */
sahilmgandhi 18:6a4db94011d3 509
sahilmgandhi 18:6a4db94011d3 510 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 511 /** @addtogroup DCMI_Private_Functions DCMI Private Functions
sahilmgandhi 18:6a4db94011d3 512 * @{
sahilmgandhi 18:6a4db94011d3 513 */
sahilmgandhi 18:6a4db94011d3 514
sahilmgandhi 18:6a4db94011d3 515 /**
sahilmgandhi 18:6a4db94011d3 516 * @}
sahilmgandhi 18:6a4db94011d3 517 */
sahilmgandhi 18:6a4db94011d3 518
sahilmgandhi 18:6a4db94011d3 519 #endif /* STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
sahilmgandhi 18:6a4db94011d3 520 STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
sahilmgandhi 18:6a4db94011d3 521 STM32F479xx */
sahilmgandhi 18:6a4db94011d3 522
sahilmgandhi 18:6a4db94011d3 523 /**
sahilmgandhi 18:6a4db94011d3 524 * @}
sahilmgandhi 18:6a4db94011d3 525 */
sahilmgandhi 18:6a4db94011d3 526
sahilmgandhi 18:6a4db94011d3 527 /**
sahilmgandhi 18:6a4db94011d3 528 * @}
sahilmgandhi 18:6a4db94011d3 529 */
sahilmgandhi 18:6a4db94011d3 530
sahilmgandhi 18:6a4db94011d3 531 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 532 }
sahilmgandhi 18:6a4db94011d3 533 #endif
sahilmgandhi 18:6a4db94011d3 534
sahilmgandhi 18:6a4db94011d3 535 #endif /* __STM32F4xx_HAL_DCMI_H */
sahilmgandhi 18:6a4db94011d3 536
sahilmgandhi 18:6a4db94011d3 537 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/