MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief This file contains all the functions prototypes for the HAL
sahilmgandhi 18:6a4db94011d3 8 * module driver.
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * @attention
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 15 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 16 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 17 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 19 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 20 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 22 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 23 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 24 *
sahilmgandhi 18:6a4db94011d3 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 35 *
sahilmgandhi 18:6a4db94011d3 36 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 37 */
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 40 #ifndef __STM32F4xx_HAL_H
sahilmgandhi 18:6a4db94011d3 41 #define __STM32F4xx_HAL_H
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 44 extern "C" {
sahilmgandhi 18:6a4db94011d3 45 #endif
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 48 #include "stm32f4xx_hal_conf.h"
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 51 * @{
sahilmgandhi 18:6a4db94011d3 52 */
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 /** @addtogroup HAL
sahilmgandhi 18:6a4db94011d3 55 * @{
sahilmgandhi 18:6a4db94011d3 56 */
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 59 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 60 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 61 /** @defgroup HAL_Exported_Macros HAL Exported Macros
sahilmgandhi 18:6a4db94011d3 62 * @{
sahilmgandhi 18:6a4db94011d3 63 */
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 /** @brief Freeze/Unfreeze Peripherals in Debug mode
sahilmgandhi 18:6a4db94011d3 66 */
sahilmgandhi 18:6a4db94011d3 67 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
sahilmgandhi 18:6a4db94011d3 68 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
sahilmgandhi 18:6a4db94011d3 69 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
sahilmgandhi 18:6a4db94011d3 70 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
sahilmgandhi 18:6a4db94011d3 71 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
sahilmgandhi 18:6a4db94011d3 72 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
sahilmgandhi 18:6a4db94011d3 73 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
sahilmgandhi 18:6a4db94011d3 74 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
sahilmgandhi 18:6a4db94011d3 75 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
sahilmgandhi 18:6a4db94011d3 76 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
sahilmgandhi 18:6a4db94011d3 77 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
sahilmgandhi 18:6a4db94011d3 78 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
sahilmgandhi 18:6a4db94011d3 79 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
sahilmgandhi 18:6a4db94011d3 80 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
sahilmgandhi 18:6a4db94011d3 81 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
sahilmgandhi 18:6a4db94011d3 82 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
sahilmgandhi 18:6a4db94011d3 83 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
sahilmgandhi 18:6a4db94011d3 84 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
sahilmgandhi 18:6a4db94011d3 85 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
sahilmgandhi 18:6a4db94011d3 86 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
sahilmgandhi 18:6a4db94011d3 87 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
sahilmgandhi 18:6a4db94011d3 88 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
sahilmgandhi 18:6a4db94011d3 91 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
sahilmgandhi 18:6a4db94011d3 92 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
sahilmgandhi 18:6a4db94011d3 93 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
sahilmgandhi 18:6a4db94011d3 94 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
sahilmgandhi 18:6a4db94011d3 95 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
sahilmgandhi 18:6a4db94011d3 96 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
sahilmgandhi 18:6a4db94011d3 97 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
sahilmgandhi 18:6a4db94011d3 98 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
sahilmgandhi 18:6a4db94011d3 99 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
sahilmgandhi 18:6a4db94011d3 100 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
sahilmgandhi 18:6a4db94011d3 101 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
sahilmgandhi 18:6a4db94011d3 102 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
sahilmgandhi 18:6a4db94011d3 103 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
sahilmgandhi 18:6a4db94011d3 104 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
sahilmgandhi 18:6a4db94011d3 105 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
sahilmgandhi 18:6a4db94011d3 106 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
sahilmgandhi 18:6a4db94011d3 107 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
sahilmgandhi 18:6a4db94011d3 108 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
sahilmgandhi 18:6a4db94011d3 109 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
sahilmgandhi 18:6a4db94011d3 110 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
sahilmgandhi 18:6a4db94011d3 111 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 /** @brief Main Flash memory mapped at 0x00000000
sahilmgandhi 18:6a4db94011d3 114 */
sahilmgandhi 18:6a4db94011d3 115 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 /** @brief System Flash memory mapped at 0x00000000
sahilmgandhi 18:6a4db94011d3 118 */
sahilmgandhi 18:6a4db94011d3 119 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
sahilmgandhi 18:6a4db94011d3 120 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
sahilmgandhi 18:6a4db94011d3 121 }while(0);
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 /** @brief Embedded SRAM mapped at 0x00000000
sahilmgandhi 18:6a4db94011d3 124 */
sahilmgandhi 18:6a4db94011d3 125 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
sahilmgandhi 18:6a4db94011d3 126 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
sahilmgandhi 18:6a4db94011d3 127 }while(0);
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
sahilmgandhi 18:6a4db94011d3 130 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
sahilmgandhi 18:6a4db94011d3 131 */
sahilmgandhi 18:6a4db94011d3 132 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
sahilmgandhi 18:6a4db94011d3 133 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
sahilmgandhi 18:6a4db94011d3 134 }while(0);
sahilmgandhi 18:6a4db94011d3 135 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 138 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 139 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
sahilmgandhi 18:6a4db94011d3 140 */
sahilmgandhi 18:6a4db94011d3 141 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
sahilmgandhi 18:6a4db94011d3 142 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
sahilmgandhi 18:6a4db94011d3 143 }while(0);
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
sahilmgandhi 18:6a4db94011d3 148 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
sahilmgandhi 18:6a4db94011d3 149 }while(0);
sahilmgandhi 18:6a4db94011d3 150 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 153 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
sahilmgandhi 18:6a4db94011d3 154 * @{
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156 /** @brief SYSCFG Break Lockup lock
sahilmgandhi 18:6a4db94011d3 157 * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
sahilmgandhi 18:6a4db94011d3 158 * @note The selected configuration is locked and can be unlocked by system reset
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
sahilmgandhi 18:6a4db94011d3 161 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
sahilmgandhi 18:6a4db94011d3 162 }while(0)
sahilmgandhi 18:6a4db94011d3 163 /**
sahilmgandhi 18:6a4db94011d3 164 * @}
sahilmgandhi 18:6a4db94011d3 165 */
sahilmgandhi 18:6a4db94011d3 166
sahilmgandhi 18:6a4db94011d3 167 /** @defgroup PVD_Lock_Enable PVD Lock
sahilmgandhi 18:6a4db94011d3 168 * @{
sahilmgandhi 18:6a4db94011d3 169 */
sahilmgandhi 18:6a4db94011d3 170 /** @brief SYSCFG Break PVD lock
sahilmgandhi 18:6a4db94011d3 171 * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
sahilmgandhi 18:6a4db94011d3 172 * @note The selected configuration is locked and can be unlocked by system reset
sahilmgandhi 18:6a4db94011d3 173 */
sahilmgandhi 18:6a4db94011d3 174 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
sahilmgandhi 18:6a4db94011d3 175 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
sahilmgandhi 18:6a4db94011d3 176 }while(0)
sahilmgandhi 18:6a4db94011d3 177 /**
sahilmgandhi 18:6a4db94011d3 178 * @}
sahilmgandhi 18:6a4db94011d3 179 */
sahilmgandhi 18:6a4db94011d3 180 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 181 /**
sahilmgandhi 18:6a4db94011d3 182 * @}
sahilmgandhi 18:6a4db94011d3 183 */
sahilmgandhi 18:6a4db94011d3 184
sahilmgandhi 18:6a4db94011d3 185 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 186 /** @addtogroup HAL_Exported_Functions
sahilmgandhi 18:6a4db94011d3 187 * @{
sahilmgandhi 18:6a4db94011d3 188 */
sahilmgandhi 18:6a4db94011d3 189 /** @addtogroup HAL_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 190 * @{
sahilmgandhi 18:6a4db94011d3 191 */
sahilmgandhi 18:6a4db94011d3 192 /* Initialization and de-initialization functions ******************************/
sahilmgandhi 18:6a4db94011d3 193 HAL_StatusTypeDef HAL_InitPre(void);
sahilmgandhi 18:6a4db94011d3 194 HAL_StatusTypeDef HAL_Init(void);
sahilmgandhi 18:6a4db94011d3 195 HAL_StatusTypeDef HAL_DeInit(void);
sahilmgandhi 18:6a4db94011d3 196 void HAL_MspInit(void);
sahilmgandhi 18:6a4db94011d3 197 void HAL_MspDeInit(void);
sahilmgandhi 18:6a4db94011d3 198 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
sahilmgandhi 18:6a4db94011d3 199 /**
sahilmgandhi 18:6a4db94011d3 200 * @}
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 /** @addtogroup HAL_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 204 * @{
sahilmgandhi 18:6a4db94011d3 205 */
sahilmgandhi 18:6a4db94011d3 206 /* Peripheral Control functions ************************************************/
sahilmgandhi 18:6a4db94011d3 207 void HAL_IncTick(void);
sahilmgandhi 18:6a4db94011d3 208 void HAL_Delay(__IO uint32_t Delay);
sahilmgandhi 18:6a4db94011d3 209 uint32_t HAL_GetTick(void);
sahilmgandhi 18:6a4db94011d3 210 void HAL_SuspendTick(void);
sahilmgandhi 18:6a4db94011d3 211 void HAL_ResumeTick(void);
sahilmgandhi 18:6a4db94011d3 212 uint32_t HAL_GetHalVersion(void);
sahilmgandhi 18:6a4db94011d3 213 uint32_t HAL_GetREVID(void);
sahilmgandhi 18:6a4db94011d3 214 uint32_t HAL_GetDEVID(void);
sahilmgandhi 18:6a4db94011d3 215 void HAL_DBGMCU_EnableDBGSleepMode(void);
sahilmgandhi 18:6a4db94011d3 216 void HAL_DBGMCU_DisableDBGSleepMode(void);
sahilmgandhi 18:6a4db94011d3 217 void HAL_DBGMCU_EnableDBGStopMode(void);
sahilmgandhi 18:6a4db94011d3 218 void HAL_DBGMCU_DisableDBGStopMode(void);
sahilmgandhi 18:6a4db94011d3 219 void HAL_DBGMCU_EnableDBGStandbyMode(void);
sahilmgandhi 18:6a4db94011d3 220 void HAL_DBGMCU_DisableDBGStandbyMode(void);
sahilmgandhi 18:6a4db94011d3 221 void HAL_EnableCompensationCell(void);
sahilmgandhi 18:6a4db94011d3 222 void HAL_DisableCompensationCell(void);
sahilmgandhi 18:6a4db94011d3 223 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 224 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 225 void HAL_EnableMemorySwappingBank(void);
sahilmgandhi 18:6a4db94011d3 226 void HAL_DisableMemorySwappingBank(void);
sahilmgandhi 18:6a4db94011d3 227 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 228 /**
sahilmgandhi 18:6a4db94011d3 229 * @}
sahilmgandhi 18:6a4db94011d3 230 */
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 /**
sahilmgandhi 18:6a4db94011d3 233 * @}
sahilmgandhi 18:6a4db94011d3 234 */
sahilmgandhi 18:6a4db94011d3 235 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 236 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 237 /** @defgroup HAL_Private_Variables HAL Private Variables
sahilmgandhi 18:6a4db94011d3 238 * @{
sahilmgandhi 18:6a4db94011d3 239 */
sahilmgandhi 18:6a4db94011d3 240 /**
sahilmgandhi 18:6a4db94011d3 241 * @}
sahilmgandhi 18:6a4db94011d3 242 */
sahilmgandhi 18:6a4db94011d3 243 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 244 /** @defgroup HAL_Private_Constants HAL Private Constants
sahilmgandhi 18:6a4db94011d3 245 * @{
sahilmgandhi 18:6a4db94011d3 246 */
sahilmgandhi 18:6a4db94011d3 247 /**
sahilmgandhi 18:6a4db94011d3 248 * @}
sahilmgandhi 18:6a4db94011d3 249 */
sahilmgandhi 18:6a4db94011d3 250 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 251 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 252 /**
sahilmgandhi 18:6a4db94011d3 253 * @}
sahilmgandhi 18:6a4db94011d3 254 */
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 /**
sahilmgandhi 18:6a4db94011d3 257 * @}
sahilmgandhi 18:6a4db94011d3 258 */
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 261 }
sahilmgandhi 18:6a4db94011d3 262 #endif
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 #endif /* __STM32F4xx_HAL_H */
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/