MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_iwdg.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_iwdg.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief IWDG HAL module driver.
sahilmgandhi 18:6a4db94011d3 8 * This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 9 * functionalities of the Independent Watchdog (IWDG) peripheral:
sahilmgandhi 18:6a4db94011d3 10 * + Initialization and Start functions
sahilmgandhi 18:6a4db94011d3 11 * + IO operation functions
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 @verbatim
sahilmgandhi 18:6a4db94011d3 14 ==============================================================================
sahilmgandhi 18:6a4db94011d3 15 ##### IWDG Generic features #####
sahilmgandhi 18:6a4db94011d3 16 ==============================================================================
sahilmgandhi 18:6a4db94011d3 17 [..]
sahilmgandhi 18:6a4db94011d3 18 (+) The IWDG can be started by either software or hardware (configurable
sahilmgandhi 18:6a4db94011d3 19 through option byte).
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
sahilmgandhi 18:6a4db94011d3 22 if the main clock fails.
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 (+) Once the IWDG is started, the LSI is forced ON and both can not be
sahilmgandhi 18:6a4db94011d3 25 disabled. The counter starts counting down from the reset value (0xFFF).
sahilmgandhi 18:6a4db94011d3 26 When it reaches the end of count value (0x000) a reset signal is
sahilmgandhi 18:6a4db94011d3 27 generated (IWDG reset).
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
sahilmgandhi 18:6a4db94011d3 30 the IWDG_RLR value is reloaded in the counter and the watchdog reset is
sahilmgandhi 18:6a4db94011d3 31 prevented.
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 (+) The IWDG is implemented in the VDD voltage domain that is still functional
sahilmgandhi 18:6a4db94011d3 34 in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
sahilmgandhi 18:6a4db94011d3 35 IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
sahilmgandhi 18:6a4db94011d3 36 reset occurs.
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 (+) Debug mode : When the microcontroller enters debug mode (core halted),
sahilmgandhi 18:6a4db94011d3 39 the IWDG counter either continues to work normally or stops, depending
sahilmgandhi 18:6a4db94011d3 40 on DBG_IWDG_STOP configuration bit in DBG module, accessible through
sahilmgandhi 18:6a4db94011d3 41 __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
sahilmgandhi 18:6a4db94011d3 44 The IWDG timeout may vary due to LSI frequency dispersion. STM32F2xx
sahilmgandhi 18:6a4db94011d3 45 devices provide the capability to measure the LSI frequency (LSI clock
sahilmgandhi 18:6a4db94011d3 46 connected internally to TIM5 CH4 input capture). The measured value
sahilmgandhi 18:6a4db94011d3 47 can be used to have an IWDG timeout with an acceptable accuracy.
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 ##### How to use this driver #####
sahilmgandhi 18:6a4db94011d3 50 ==============================================================================
sahilmgandhi 18:6a4db94011d3 51 [..]
sahilmgandhi 18:6a4db94011d3 52 (#) Use IWDG using HAL_IWDG_Init() function to :
sahilmgandhi 18:6a4db94011d3 53 (+) Enable instance by writing Start keyword in IWDG_KEY register. LSI
sahilmgandhi 18:6a4db94011d3 54 clock is forced ON and IWDG counter starts downcounting.
sahilmgandhi 18:6a4db94011d3 55 (+) Enable write access to configuration register: IWDG_PR & IWDG_RLR.
sahilmgandhi 18:6a4db94011d3 56 (+) Configure the IWDG prescaler and counter reload value. This reload
sahilmgandhi 18:6a4db94011d3 57 value will be loaded in the IWDG counter each time the watchdog is
sahilmgandhi 18:6a4db94011d3 58 reloaded, then the IWDG will start counting down from this value.
sahilmgandhi 18:6a4db94011d3 59 (+) wait for status flags to be reset"
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 (#) Then the application program must refresh the IWDG counter at regular
sahilmgandhi 18:6a4db94011d3 62 intervals during normal operation to prevent an MCU reset, using
sahilmgandhi 18:6a4db94011d3 63 HAL_IWDG_Refresh() function.
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 *** IWDG HAL driver macros list ***
sahilmgandhi 18:6a4db94011d3 66 ====================================
sahilmgandhi 18:6a4db94011d3 67 [..]
sahilmgandhi 18:6a4db94011d3 68 Below the list of most used macros in IWDG HAL driver:
sahilmgandhi 18:6a4db94011d3 69 (+) __HAL_IWDG_START: Enable the IWDG peripheral
sahilmgandhi 18:6a4db94011d3 70 (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
sahilmgandhi 18:6a4db94011d3 71 the reload register
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 @endverbatim
sahilmgandhi 18:6a4db94011d3 74 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 75 * @attention
sahilmgandhi 18:6a4db94011d3 76 *
sahilmgandhi 18:6a4db94011d3 77 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 78 *
sahilmgandhi 18:6a4db94011d3 79 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 80 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 81 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 82 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 83 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 84 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 85 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 86 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 87 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 88 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 89 *
sahilmgandhi 18:6a4db94011d3 90 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 91 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 92 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 93 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 94 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 95 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 96 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 97 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 98 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 99 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 100 *
sahilmgandhi 18:6a4db94011d3 101 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 102 */
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 105 #include "stm32f2xx_hal.h"
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 108 * @{
sahilmgandhi 18:6a4db94011d3 109 */
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 #ifdef HAL_IWDG_MODULE_ENABLED
sahilmgandhi 18:6a4db94011d3 112 /** @addtogroup IWDG
sahilmgandhi 18:6a4db94011d3 113 * @brief IWDG HAL module driver.
sahilmgandhi 18:6a4db94011d3 114 * @{
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 /* Private typedef -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 118 /* Private define ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 119 /** @defgroup IWDG_Private_Defines IWDG Private Defines
sahilmgandhi 18:6a4db94011d3 120 * @{
sahilmgandhi 18:6a4db94011d3 121 */
sahilmgandhi 18:6a4db94011d3 122 /* Status register need 5 RC LSI divided by prescaler clock to be updated. With
sahilmgandhi 18:6a4db94011d3 123 higher prescaler (256), and according to HSI variation, we need to wait at
sahilmgandhi 18:6a4db94011d3 124 least 6 cycles so 48 ms. */
sahilmgandhi 18:6a4db94011d3 125 #define HAL_IWDG_DEFAULT_TIMEOUT 48U
sahilmgandhi 18:6a4db94011d3 126 /**
sahilmgandhi 18:6a4db94011d3 127 * @}
sahilmgandhi 18:6a4db94011d3 128 */
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 131 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 132 /* Private function prototypes -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 133 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 /** @addtogroup IWDG_Exported_Functions
sahilmgandhi 18:6a4db94011d3 136 * @{
sahilmgandhi 18:6a4db94011d3 137 */
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 /** @addtogroup IWDG_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 140 * @brief Initialization and Start functions.
sahilmgandhi 18:6a4db94011d3 141 *
sahilmgandhi 18:6a4db94011d3 142 @verbatim
sahilmgandhi 18:6a4db94011d3 143 ===============================================================================
sahilmgandhi 18:6a4db94011d3 144 ##### Initialization and Start functions #####
sahilmgandhi 18:6a4db94011d3 145 ===============================================================================
sahilmgandhi 18:6a4db94011d3 146 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 147 (+) Initialize the IWDG according to the specified parameters in the
sahilmgandhi 18:6a4db94011d3 148 IWDG_InitTypeDef of associated handle.
sahilmgandhi 18:6a4db94011d3 149 (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
sahilmgandhi 18:6a4db94011d3 150 is reloaded in order to exit function with correct time base.
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 @endverbatim
sahilmgandhi 18:6a4db94011d3 153 * @{
sahilmgandhi 18:6a4db94011d3 154 */
sahilmgandhi 18:6a4db94011d3 155
sahilmgandhi 18:6a4db94011d3 156 /**
sahilmgandhi 18:6a4db94011d3 157 * @brief Initialize the IWDG according to the specified parameters in the
sahilmgandhi 18:6a4db94011d3 158 * IWDG_InitTypeDef and start watchdog. Before exiting function,
sahilmgandhi 18:6a4db94011d3 159 * watchdog is refreshed in order to have correct time base.
sahilmgandhi 18:6a4db94011d3 160 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 161 * the configuration information for the specified IWDG module.
sahilmgandhi 18:6a4db94011d3 162 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 163 */
sahilmgandhi 18:6a4db94011d3 164 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
sahilmgandhi 18:6a4db94011d3 165 {
sahilmgandhi 18:6a4db94011d3 166 uint32_t tickstart;
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 /* Check the IWDG handle allocation */
sahilmgandhi 18:6a4db94011d3 169 if(hiwdg == NULL)
sahilmgandhi 18:6a4db94011d3 170 {
sahilmgandhi 18:6a4db94011d3 171 return HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 172 }
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 175 assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
sahilmgandhi 18:6a4db94011d3 176 assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
sahilmgandhi 18:6a4db94011d3 177 assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
sahilmgandhi 18:6a4db94011d3 178
sahilmgandhi 18:6a4db94011d3 179 /* Enable IWDG. LSI is turned on automaticaly */
sahilmgandhi 18:6a4db94011d3 180 __HAL_IWDG_START(hiwdg);
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */
sahilmgandhi 18:6a4db94011d3 183 IWDG_ENABLE_WRITE_ACCESS(hiwdg);
sahilmgandhi 18:6a4db94011d3 184
sahilmgandhi 18:6a4db94011d3 185 /* Write to IWDG registers the Prescaler & Reload values to work with */
sahilmgandhi 18:6a4db94011d3 186 hiwdg->Instance->PR = hiwdg->Init.Prescaler;
sahilmgandhi 18:6a4db94011d3 187 hiwdg->Instance->RLR = hiwdg->Init.Reload;
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 /* Check pending flag, if previous update not done, return timeout */
sahilmgandhi 18:6a4db94011d3 190 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 /* Wait for register to be updated */
sahilmgandhi 18:6a4db94011d3 193 while(hiwdg->Instance->SR != RESET)
sahilmgandhi 18:6a4db94011d3 194 {
sahilmgandhi 18:6a4db94011d3 195 if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT)
sahilmgandhi 18:6a4db94011d3 196 {
sahilmgandhi 18:6a4db94011d3 197 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 198 }
sahilmgandhi 18:6a4db94011d3 199 }
sahilmgandhi 18:6a4db94011d3 200
sahilmgandhi 18:6a4db94011d3 201 /* Reload IWDG counter with value defined in the reload register */
sahilmgandhi 18:6a4db94011d3 202 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 /* Return function status */
sahilmgandhi 18:6a4db94011d3 205 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 206 }
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 /**
sahilmgandhi 18:6a4db94011d3 209 * @}
sahilmgandhi 18:6a4db94011d3 210 */
sahilmgandhi 18:6a4db94011d3 211
sahilmgandhi 18:6a4db94011d3 212 /** @addtogroup IWDG_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 213 * @brief IO operation functions
sahilmgandhi 18:6a4db94011d3 214 *
sahilmgandhi 18:6a4db94011d3 215 @verbatim
sahilmgandhi 18:6a4db94011d3 216 ===============================================================================
sahilmgandhi 18:6a4db94011d3 217 ##### IO operation functions #####
sahilmgandhi 18:6a4db94011d3 218 ===============================================================================
sahilmgandhi 18:6a4db94011d3 219 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 220 (+) Refresh the IWDG.
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 @endverbatim
sahilmgandhi 18:6a4db94011d3 223 * @{
sahilmgandhi 18:6a4db94011d3 224 */
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226 /**
sahilmgandhi 18:6a4db94011d3 227 * @brief Refresh the IWDG.
sahilmgandhi 18:6a4db94011d3 228 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 229 * the configuration information for the specified IWDG module.
sahilmgandhi 18:6a4db94011d3 230 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 231 */
sahilmgandhi 18:6a4db94011d3 232 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
sahilmgandhi 18:6a4db94011d3 233 {
sahilmgandhi 18:6a4db94011d3 234 /* Reload IWDG counter with value defined in the reload register */
sahilmgandhi 18:6a4db94011d3 235 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 /* Return function status */
sahilmgandhi 18:6a4db94011d3 238 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 239 }
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 /**
sahilmgandhi 18:6a4db94011d3 242 * @}
sahilmgandhi 18:6a4db94011d3 243 */
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /**
sahilmgandhi 18:6a4db94011d3 246 * @}
sahilmgandhi 18:6a4db94011d3 247 */
sahilmgandhi 18:6a4db94011d3 248
sahilmgandhi 18:6a4db94011d3 249 #endif /* HAL_IWDG_MODULE_ENABLED */
sahilmgandhi 18:6a4db94011d3 250 /**
sahilmgandhi 18:6a4db94011d3 251 * @}
sahilmgandhi 18:6a4db94011d3 252 */
sahilmgandhi 18:6a4db94011d3 253
sahilmgandhi 18:6a4db94011d3 254 /**
sahilmgandhi 18:6a4db94011d3 255 * @}
sahilmgandhi 18:6a4db94011d3 256 */
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/