MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_dma_ex.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_dma_ex.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief DMA Extension HAL module driver
sahilmgandhi 18:6a4db94011d3 8 * This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 9 * functionalities of the DMA Extension peripheral:
sahilmgandhi 18:6a4db94011d3 10 * + Extended features functions
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 @verbatim
sahilmgandhi 18:6a4db94011d3 13 ==============================================================================
sahilmgandhi 18:6a4db94011d3 14 ##### How to use this driver #####
sahilmgandhi 18:6a4db94011d3 15 ==============================================================================
sahilmgandhi 18:6a4db94011d3 16 [..]
sahilmgandhi 18:6a4db94011d3 17 The DMA Extension HAL driver can be used as follows:
sahilmgandhi 18:6a4db94011d3 18 (#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
sahilmgandhi 18:6a4db94011d3 19 for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
sahilmgandhi 18:6a4db94011d3 22 -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
sahilmgandhi 18:6a4db94011d3 23 -@- In Multi (Double) buffer mode, it is possible to update the base address for
sahilmgandhi 18:6a4db94011d3 24 the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 @endverbatim
sahilmgandhi 18:6a4db94011d3 27 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 28 * @attention
sahilmgandhi 18:6a4db94011d3 29 *
sahilmgandhi 18:6a4db94011d3 30 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 31 *
sahilmgandhi 18:6a4db94011d3 32 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 33 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 34 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 35 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 36 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 37 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 38 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 39 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 40 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 41 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 42 *
sahilmgandhi 18:6a4db94011d3 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 44 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 46 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 49 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 50 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 51 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 53 *
sahilmgandhi 18:6a4db94011d3 54 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 #include "stm32f2xx_hal.h"
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 61 * @{
sahilmgandhi 18:6a4db94011d3 62 */
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 /** @defgroup DMAEx DMAEx
sahilmgandhi 18:6a4db94011d3 65 * @brief DMA Extended HAL module driver
sahilmgandhi 18:6a4db94011d3 66 * @{
sahilmgandhi 18:6a4db94011d3 67 */
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 #ifdef HAL_DMA_MODULE_ENABLED
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 72 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 73 /* Private Constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 74 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 75 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 76 /** @addtogroup DMAEx_Private_Functions
sahilmgandhi 18:6a4db94011d3 77 * @{
sahilmgandhi 18:6a4db94011d3 78 */
sahilmgandhi 18:6a4db94011d3 79 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
sahilmgandhi 18:6a4db94011d3 80 /**
sahilmgandhi 18:6a4db94011d3 81 * @}
sahilmgandhi 18:6a4db94011d3 82 */
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 /* Exported functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 /** @addtogroup DMAEx_Exported_Functions
sahilmgandhi 18:6a4db94011d3 87 * @{
sahilmgandhi 18:6a4db94011d3 88 */
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 /** @addtogroup DMAEx_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 92 *
sahilmgandhi 18:6a4db94011d3 93 @verbatim
sahilmgandhi 18:6a4db94011d3 94 ===============================================================================
sahilmgandhi 18:6a4db94011d3 95 ##### Extended features functions #####
sahilmgandhi 18:6a4db94011d3 96 ===============================================================================
sahilmgandhi 18:6a4db94011d3 97 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 98 (+) Configure the source, destination address and data length and
sahilmgandhi 18:6a4db94011d3 99 Start MultiBuffer DMA transfer
sahilmgandhi 18:6a4db94011d3 100 (+) Configure the source, destination address and data length and
sahilmgandhi 18:6a4db94011d3 101 Start MultiBuffer DMA transfer with interrupt
sahilmgandhi 18:6a4db94011d3 102 (+) Change on the fly the memory0 or memory1 address.
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 @endverbatim
sahilmgandhi 18:6a4db94011d3 105 * @{
sahilmgandhi 18:6a4db94011d3 106 */
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 /**
sahilmgandhi 18:6a4db94011d3 110 * @brief Starts the multi_buffer DMA Transfer.
sahilmgandhi 18:6a4db94011d3 111 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 112 * the configuration information for the specified DMA Stream.
sahilmgandhi 18:6a4db94011d3 113 * @param SrcAddress: The source memory Buffer address
sahilmgandhi 18:6a4db94011d3 114 * @param DstAddress: The destination memory Buffer address
sahilmgandhi 18:6a4db94011d3 115 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
sahilmgandhi 18:6a4db94011d3 116 * @param DataLength: The length of data to be transferred from source to destination
sahilmgandhi 18:6a4db94011d3 117 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 118 */
sahilmgandhi 18:6a4db94011d3 119 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 124 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 /* Memory-to-memory transfer not supported in double buffering mode */
sahilmgandhi 18:6a4db94011d3 127 if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
sahilmgandhi 18:6a4db94011d3 128 {
sahilmgandhi 18:6a4db94011d3 129 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
sahilmgandhi 18:6a4db94011d3 130 status = HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 131 }
sahilmgandhi 18:6a4db94011d3 132 else
sahilmgandhi 18:6a4db94011d3 133 {
sahilmgandhi 18:6a4db94011d3 134 /* Process Locked */
sahilmgandhi 18:6a4db94011d3 135 __HAL_LOCK(hdma);
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 if(HAL_DMA_STATE_READY == hdma->State)
sahilmgandhi 18:6a4db94011d3 138 {
sahilmgandhi 18:6a4db94011d3 139 /* Change DMA peripheral state */
sahilmgandhi 18:6a4db94011d3 140 hdma->State = HAL_DMA_STATE_BUSY;
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 /* Enable the double buffer mode */
sahilmgandhi 18:6a4db94011d3 143 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 /* Configure DMA Stream destination address */
sahilmgandhi 18:6a4db94011d3 146 hdma->Instance->M1AR = SecondMemAddress;
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 /* Configure the source, destination address and the data length */
sahilmgandhi 18:6a4db94011d3 149 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 /* Enable the peripheral */
sahilmgandhi 18:6a4db94011d3 152 __HAL_DMA_ENABLE(hdma);
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154 else
sahilmgandhi 18:6a4db94011d3 155 {
sahilmgandhi 18:6a4db94011d3 156 /* Return error status */
sahilmgandhi 18:6a4db94011d3 157 status = HAL_BUSY;
sahilmgandhi 18:6a4db94011d3 158 }
sahilmgandhi 18:6a4db94011d3 159 }
sahilmgandhi 18:6a4db94011d3 160 return status;
sahilmgandhi 18:6a4db94011d3 161 }
sahilmgandhi 18:6a4db94011d3 162
sahilmgandhi 18:6a4db94011d3 163 /**
sahilmgandhi 18:6a4db94011d3 164 * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
sahilmgandhi 18:6a4db94011d3 165 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 166 * the configuration information for the specified DMA Stream.
sahilmgandhi 18:6a4db94011d3 167 * @param SrcAddress: The source memory Buffer address
sahilmgandhi 18:6a4db94011d3 168 * @param DstAddress: The destination memory Buffer address
sahilmgandhi 18:6a4db94011d3 169 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
sahilmgandhi 18:6a4db94011d3 170 * @param DataLength: The length of data to be transferred from source to destination
sahilmgandhi 18:6a4db94011d3 171 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 172 */
sahilmgandhi 18:6a4db94011d3 173 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
sahilmgandhi 18:6a4db94011d3 174 {
sahilmgandhi 18:6a4db94011d3 175 HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 178 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 /* Memory-to-memory transfer not supported in double buffering mode */
sahilmgandhi 18:6a4db94011d3 181 if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
sahilmgandhi 18:6a4db94011d3 182 {
sahilmgandhi 18:6a4db94011d3 183 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
sahilmgandhi 18:6a4db94011d3 184 return HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 185 }
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 /* Check callback functions */
sahilmgandhi 18:6a4db94011d3 188 if ((NULL == hdma->XferCpltCallback) || (NULL == hdma->XferM1CpltCallback) || (NULL == hdma->XferErrorCallback))
sahilmgandhi 18:6a4db94011d3 189 {
sahilmgandhi 18:6a4db94011d3 190 hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
sahilmgandhi 18:6a4db94011d3 191 return HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 192 }
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /* Process locked */
sahilmgandhi 18:6a4db94011d3 195 __HAL_LOCK(hdma);
sahilmgandhi 18:6a4db94011d3 196
sahilmgandhi 18:6a4db94011d3 197 if(HAL_DMA_STATE_READY == hdma->State)
sahilmgandhi 18:6a4db94011d3 198 {
sahilmgandhi 18:6a4db94011d3 199 /* Change DMA peripheral state */
sahilmgandhi 18:6a4db94011d3 200 hdma->State = HAL_DMA_STATE_BUSY;
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 /* Initialize the error code */
sahilmgandhi 18:6a4db94011d3 203 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 /* Enable the Double buffer mode */
sahilmgandhi 18:6a4db94011d3 206 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 /* Configure DMA Stream destination address */
sahilmgandhi 18:6a4db94011d3 209 hdma->Instance->M1AR = SecondMemAddress;
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 /* Configure the source, destination address and the data length */
sahilmgandhi 18:6a4db94011d3 212 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 /* Clear all flags */
sahilmgandhi 18:6a4db94011d3 215 __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
sahilmgandhi 18:6a4db94011d3 216 __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
sahilmgandhi 18:6a4db94011d3 217 __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
sahilmgandhi 18:6a4db94011d3 218 __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
sahilmgandhi 18:6a4db94011d3 219 __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 /* Enable Common interrupts*/
sahilmgandhi 18:6a4db94011d3 222 hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
sahilmgandhi 18:6a4db94011d3 223 hdma->Instance->FCR |= DMA_IT_FE;
sahilmgandhi 18:6a4db94011d3 224
sahilmgandhi 18:6a4db94011d3 225 if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
sahilmgandhi 18:6a4db94011d3 226 {
sahilmgandhi 18:6a4db94011d3 227 hdma->Instance->CR |= DMA_IT_HT;
sahilmgandhi 18:6a4db94011d3 228 }
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 /* Enable the peripheral */
sahilmgandhi 18:6a4db94011d3 231 __HAL_DMA_ENABLE(hdma);
sahilmgandhi 18:6a4db94011d3 232 }
sahilmgandhi 18:6a4db94011d3 233 else
sahilmgandhi 18:6a4db94011d3 234 {
sahilmgandhi 18:6a4db94011d3 235 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 236 __HAL_UNLOCK(hdma);
sahilmgandhi 18:6a4db94011d3 237
sahilmgandhi 18:6a4db94011d3 238 /* Return error status */
sahilmgandhi 18:6a4db94011d3 239 status = HAL_BUSY;
sahilmgandhi 18:6a4db94011d3 240 }
sahilmgandhi 18:6a4db94011d3 241 return status;
sahilmgandhi 18:6a4db94011d3 242 }
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 /**
sahilmgandhi 18:6a4db94011d3 245 * @brief Change the memory0 or memory1 address on the fly.
sahilmgandhi 18:6a4db94011d3 246 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 247 * the configuration information for the specified DMA Stream.
sahilmgandhi 18:6a4db94011d3 248 * @param Address: The new address
sahilmgandhi 18:6a4db94011d3 249 * @param memory: the memory to be changed, This parameter can be one of
sahilmgandhi 18:6a4db94011d3 250 * the following values:
sahilmgandhi 18:6a4db94011d3 251 * MEMORY0 /
sahilmgandhi 18:6a4db94011d3 252 * MEMORY1
sahilmgandhi 18:6a4db94011d3 253 * @note The MEMORY0 address can be changed only when the current transfer use
sahilmgandhi 18:6a4db94011d3 254 * MEMORY1 and the MEMORY1 address can be changed only when the current
sahilmgandhi 18:6a4db94011d3 255 * transfer use MEMORY0.
sahilmgandhi 18:6a4db94011d3 256 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 257 */
sahilmgandhi 18:6a4db94011d3 258 HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
sahilmgandhi 18:6a4db94011d3 259 {
sahilmgandhi 18:6a4db94011d3 260 if(memory == MEMORY0)
sahilmgandhi 18:6a4db94011d3 261 {
sahilmgandhi 18:6a4db94011d3 262 /* change the memory0 address */
sahilmgandhi 18:6a4db94011d3 263 hdma->Instance->M0AR = Address;
sahilmgandhi 18:6a4db94011d3 264 }
sahilmgandhi 18:6a4db94011d3 265 else
sahilmgandhi 18:6a4db94011d3 266 {
sahilmgandhi 18:6a4db94011d3 267 /* change the memory1 address */
sahilmgandhi 18:6a4db94011d3 268 hdma->Instance->M1AR = Address;
sahilmgandhi 18:6a4db94011d3 269 }
sahilmgandhi 18:6a4db94011d3 270
sahilmgandhi 18:6a4db94011d3 271 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 272 }
sahilmgandhi 18:6a4db94011d3 273
sahilmgandhi 18:6a4db94011d3 274 /**
sahilmgandhi 18:6a4db94011d3 275 * @}
sahilmgandhi 18:6a4db94011d3 276 */
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278 /**
sahilmgandhi 18:6a4db94011d3 279 * @}
sahilmgandhi 18:6a4db94011d3 280 */
sahilmgandhi 18:6a4db94011d3 281
sahilmgandhi 18:6a4db94011d3 282 /** @addtogroup DMAEx_Private_Functions
sahilmgandhi 18:6a4db94011d3 283 * @{
sahilmgandhi 18:6a4db94011d3 284 */
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 /**
sahilmgandhi 18:6a4db94011d3 287 * @brief Set the DMA Transfer parameter.
sahilmgandhi 18:6a4db94011d3 288 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 289 * the configuration information for the specified DMA Stream.
sahilmgandhi 18:6a4db94011d3 290 * @param SrcAddress: The source memory Buffer address
sahilmgandhi 18:6a4db94011d3 291 * @param DstAddress: The destination memory Buffer address
sahilmgandhi 18:6a4db94011d3 292 * @param DataLength: The length of data to be transferred from source to destination
sahilmgandhi 18:6a4db94011d3 293 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 294 */
sahilmgandhi 18:6a4db94011d3 295 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
sahilmgandhi 18:6a4db94011d3 296 {
sahilmgandhi 18:6a4db94011d3 297 /* Configure DMA Stream data length */
sahilmgandhi 18:6a4db94011d3 298 hdma->Instance->NDTR = DataLength;
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 /* Peripheral to Memory */
sahilmgandhi 18:6a4db94011d3 301 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
sahilmgandhi 18:6a4db94011d3 302 {
sahilmgandhi 18:6a4db94011d3 303 /* Configure DMA Stream destination address */
sahilmgandhi 18:6a4db94011d3 304 hdma->Instance->PAR = DstAddress;
sahilmgandhi 18:6a4db94011d3 305
sahilmgandhi 18:6a4db94011d3 306 /* Configure DMA Stream source address */
sahilmgandhi 18:6a4db94011d3 307 hdma->Instance->M0AR = SrcAddress;
sahilmgandhi 18:6a4db94011d3 308 }
sahilmgandhi 18:6a4db94011d3 309 /* Memory to Peripheral */
sahilmgandhi 18:6a4db94011d3 310 else
sahilmgandhi 18:6a4db94011d3 311 {
sahilmgandhi 18:6a4db94011d3 312 /* Configure DMA Stream source address */
sahilmgandhi 18:6a4db94011d3 313 hdma->Instance->PAR = SrcAddress;
sahilmgandhi 18:6a4db94011d3 314
sahilmgandhi 18:6a4db94011d3 315 /* Configure DMA Stream destination address */
sahilmgandhi 18:6a4db94011d3 316 hdma->Instance->M0AR = DstAddress;
sahilmgandhi 18:6a4db94011d3 317 }
sahilmgandhi 18:6a4db94011d3 318 }
sahilmgandhi 18:6a4db94011d3 319
sahilmgandhi 18:6a4db94011d3 320 /**
sahilmgandhi 18:6a4db94011d3 321 * @}
sahilmgandhi 18:6a4db94011d3 322 */
sahilmgandhi 18:6a4db94011d3 323
sahilmgandhi 18:6a4db94011d3 324 #endif /* HAL_DMA_MODULE_ENABLED */
sahilmgandhi 18:6a4db94011d3 325 /**
sahilmgandhi 18:6a4db94011d3 326 * @}
sahilmgandhi 18:6a4db94011d3 327 */
sahilmgandhi 18:6a4db94011d3 328
sahilmgandhi 18:6a4db94011d3 329 /**
sahilmgandhi 18:6a4db94011d3 330 * @}
sahilmgandhi 18:6a4db94011d3 331 */
sahilmgandhi 18:6a4db94011d3 332
sahilmgandhi 18:6a4db94011d3 333 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/