MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_dcmi.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_dcmi.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of DCMI HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_DCMI_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_DCMI_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #if defined(STM32F207xx) || defined(STM32F217xx)
sahilmgandhi 18:6a4db94011d3 47 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 48 #include "stm32f2xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 52 * @{
sahilmgandhi 18:6a4db94011d3 53 */
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /** @addtogroup DCMI DCMI
sahilmgandhi 18:6a4db94011d3 56 * @brief DCMI HAL module driver
sahilmgandhi 18:6a4db94011d3 57 * @{
sahilmgandhi 18:6a4db94011d3 58 */
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 61 /** @defgroup DCMI_Exported_Types DCMI Exported Types
sahilmgandhi 18:6a4db94011d3 62 * @{
sahilmgandhi 18:6a4db94011d3 63 */
sahilmgandhi 18:6a4db94011d3 64 /**
sahilmgandhi 18:6a4db94011d3 65 * @brief DCMI Embedded Synchronisation CODE Init structure definition
sahilmgandhi 18:6a4db94011d3 66 */
sahilmgandhi 18:6a4db94011d3 67 typedef struct
sahilmgandhi 18:6a4db94011d3 68 {
sahilmgandhi 18:6a4db94011d3 69 uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
sahilmgandhi 18:6a4db94011d3 70 uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */
sahilmgandhi 18:6a4db94011d3 71 uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */
sahilmgandhi 18:6a4db94011d3 72 uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
sahilmgandhi 18:6a4db94011d3 73 }DCMI_CodesInitTypeDef;
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /**
sahilmgandhi 18:6a4db94011d3 76 * @brief DCMI Init structure definition
sahilmgandhi 18:6a4db94011d3 77 */
sahilmgandhi 18:6a4db94011d3 78 typedef struct
sahilmgandhi 18:6a4db94011d3 79 {
sahilmgandhi 18:6a4db94011d3 80 uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
sahilmgandhi 18:6a4db94011d3 81 This parameter can be a value of @ref DCMI_Synchronization_Mode */
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
sahilmgandhi 18:6a4db94011d3 84 This parameter can be a value of @ref DCMI_PIXCK_Polarity */
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
sahilmgandhi 18:6a4db94011d3 87 This parameter can be a value of @ref DCMI_VSYNC_Polarity */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
sahilmgandhi 18:6a4db94011d3 90 This parameter can be a value of @ref DCMI_HSYNC_Polarity */
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 uint32_t CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
sahilmgandhi 18:6a4db94011d3 93 This parameter can be a value of @ref DCMI_Capture_Rate */
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 uint32_t ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
sahilmgandhi 18:6a4db94011d3 96 This parameter can be a value of @ref DCMI_Extended_Data_Mode */
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 DCMI_CodesInitTypeDef SyncroCode; /*!< Specifies the code of the frame start delimiter. */
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 uint32_t JPEGMode; /*!< Enable or Disable the JPEG mode.
sahilmgandhi 18:6a4db94011d3 101 This parameter can be a value of @ref DCMI_MODE_JPEG */
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 }DCMI_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 /**
sahilmgandhi 18:6a4db94011d3 106 * @brief HAL DCMI State structures definition
sahilmgandhi 18:6a4db94011d3 107 */
sahilmgandhi 18:6a4db94011d3 108 typedef enum
sahilmgandhi 18:6a4db94011d3 109 {
sahilmgandhi 18:6a4db94011d3 110 HAL_DCMI_STATE_RESET = 0x00U, /*!< DCMI not yet initialized or disabled */
sahilmgandhi 18:6a4db94011d3 111 HAL_DCMI_STATE_READY = 0x01U, /*!< DCMI initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 112 HAL_DCMI_STATE_BUSY = 0x02U, /*!< DCMI internal processing is ongoing */
sahilmgandhi 18:6a4db94011d3 113 HAL_DCMI_STATE_TIMEOUT = 0x03U, /*!< DCMI timeout state */
sahilmgandhi 18:6a4db94011d3 114 HAL_DCMI_STATE_ERROR = 0x04U, /*!< DCMI error state */
sahilmgandhi 18:6a4db94011d3 115 HAL_DCMI_STATE_SUSPENDED = 0x05U /*!< DCMI suspend state */
sahilmgandhi 18:6a4db94011d3 116 }HAL_DCMI_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 /**
sahilmgandhi 18:6a4db94011d3 119 * @brief DCMI handle Structure definition
sahilmgandhi 18:6a4db94011d3 120 */
sahilmgandhi 18:6a4db94011d3 121 typedef struct
sahilmgandhi 18:6a4db94011d3 122 {
sahilmgandhi 18:6a4db94011d3 123 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 DCMI_InitTypeDef Init; /*!< DCMI parameters */
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 HAL_LockTypeDef Lock; /*!< DCMI locking object */
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 __IO uint32_t XferCount; /*!< DMA transfer counter */
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 __IO uint32_t XferSize; /*!< DMA transfer size */
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 uint32_t XferTransferNumber; /*!< DMA transfer number */
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 __IO uint32_t ErrorCode; /*!< DCMI Error code */
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 }DCMI_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 144 /**
sahilmgandhi 18:6a4db94011d3 145 * @}
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 149 /** @defgroup DCMI_Exported_Constants DCMI Exported Constants
sahilmgandhi 18:6a4db94011d3 150 * @{
sahilmgandhi 18:6a4db94011d3 151 */
sahilmgandhi 18:6a4db94011d3 152
sahilmgandhi 18:6a4db94011d3 153 /** @defgroup DCMI_Error_Code DCMI Error Code
sahilmgandhi 18:6a4db94011d3 154 * @{
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156 #define HAL_DCMI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 157 #define HAL_DCMI_ERROR_OVR ((uint32_t)0x00000001U) /*!< Overrun error */
sahilmgandhi 18:6a4db94011d3 158 #define HAL_DCMI_ERROR_SYNC ((uint32_t)0x00000002U) /*!< Synchronization error */
sahilmgandhi 18:6a4db94011d3 159 #define HAL_DCMI_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
sahilmgandhi 18:6a4db94011d3 160 #define HAL_DCMI_ERROR_DMA ((uint32_t)0x00000040U) /*!< DMA error */
sahilmgandhi 18:6a4db94011d3 161 /**
sahilmgandhi 18:6a4db94011d3 162 * @}
sahilmgandhi 18:6a4db94011d3 163 */
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 /** @defgroup DCMI_Capture_Mode DCMI Capture Mode
sahilmgandhi 18:6a4db94011d3 166 * @{
sahilmgandhi 18:6a4db94011d3 167 */
sahilmgandhi 18:6a4db94011d3 168 #define DCMI_MODE_CONTINUOUS ((uint32_t)0x00000000U) /*!< The received data are transferred continuously
sahilmgandhi 18:6a4db94011d3 169 into the destination memory through the DMA */
sahilmgandhi 18:6a4db94011d3 170 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
sahilmgandhi 18:6a4db94011d3 171 frame and then transfers a single frame through the DMA */
sahilmgandhi 18:6a4db94011d3 172 /**
sahilmgandhi 18:6a4db94011d3 173 * @}
sahilmgandhi 18:6a4db94011d3 174 */
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode
sahilmgandhi 18:6a4db94011d3 177 * @{
sahilmgandhi 18:6a4db94011d3 178 */
sahilmgandhi 18:6a4db94011d3 179 #define DCMI_SYNCHRO_HARDWARE ((uint32_t)0x00000000U) /*!< Hardware synchronization data capture (frame/line start/stop)
sahilmgandhi 18:6a4db94011d3 180 is synchronized with the HSYNC/VSYNC signals */
sahilmgandhi 18:6a4db94011d3 181 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
sahilmgandhi 18:6a4db94011d3 182 synchronization codes embedded in the data flow */
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 /**
sahilmgandhi 18:6a4db94011d3 185 * @}
sahilmgandhi 18:6a4db94011d3 186 */
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity
sahilmgandhi 18:6a4db94011d3 189 * @{
sahilmgandhi 18:6a4db94011d3 190 */
sahilmgandhi 18:6a4db94011d3 191 #define DCMI_PCKPOLARITY_FALLING ((uint32_t)0x00000000U) /*!< Pixel clock active on Falling edge */
sahilmgandhi 18:6a4db94011d3 192 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /**
sahilmgandhi 18:6a4db94011d3 195 * @}
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity
sahilmgandhi 18:6a4db94011d3 199 * @{
sahilmgandhi 18:6a4db94011d3 200 */
sahilmgandhi 18:6a4db94011d3 201 #define DCMI_VSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Vertical synchronization active Low */
sahilmgandhi 18:6a4db94011d3 202 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 /**
sahilmgandhi 18:6a4db94011d3 205 * @}
sahilmgandhi 18:6a4db94011d3 206 */
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity
sahilmgandhi 18:6a4db94011d3 209 * @{
sahilmgandhi 18:6a4db94011d3 210 */
sahilmgandhi 18:6a4db94011d3 211 #define DCMI_HSPOLARITY_LOW ((uint32_t)0x00000000U) /*!< Horizontal synchronization active Low */
sahilmgandhi 18:6a4db94011d3 212 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 /**
sahilmgandhi 18:6a4db94011d3 215 * @}
sahilmgandhi 18:6a4db94011d3 216 */
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG
sahilmgandhi 18:6a4db94011d3 219 * @{
sahilmgandhi 18:6a4db94011d3 220 */
sahilmgandhi 18:6a4db94011d3 221 #define DCMI_JPEG_DISABLE ((uint32_t)0x00000000U) /*!< Mode JPEG Disabled */
sahilmgandhi 18:6a4db94011d3 222 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
sahilmgandhi 18:6a4db94011d3 223
sahilmgandhi 18:6a4db94011d3 224 /**
sahilmgandhi 18:6a4db94011d3 225 * @}
sahilmgandhi 18:6a4db94011d3 226 */
sahilmgandhi 18:6a4db94011d3 227
sahilmgandhi 18:6a4db94011d3 228 /** @defgroup DCMI_Capture_Rate DCMI Capture Rate
sahilmgandhi 18:6a4db94011d3 229 * @{
sahilmgandhi 18:6a4db94011d3 230 */
sahilmgandhi 18:6a4db94011d3 231 #define DCMI_CR_ALL_FRAME ((uint32_t)0x00000000U) /*!< All frames are captured */
sahilmgandhi 18:6a4db94011d3 232 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
sahilmgandhi 18:6a4db94011d3 233 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
sahilmgandhi 18:6a4db94011d3 234
sahilmgandhi 18:6a4db94011d3 235 /**
sahilmgandhi 18:6a4db94011d3 236 * @}
sahilmgandhi 18:6a4db94011d3 237 */
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode
sahilmgandhi 18:6a4db94011d3 240 * @{
sahilmgandhi 18:6a4db94011d3 241 */
sahilmgandhi 18:6a4db94011d3 242 #define DCMI_EXTEND_DATA_8B ((uint32_t)0x00000000U) /*!< Interface captures 8-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 243 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 244 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 245 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 /**
sahilmgandhi 18:6a4db94011d3 248 * @}
sahilmgandhi 18:6a4db94011d3 249 */
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate
sahilmgandhi 18:6a4db94011d3 252 * @{
sahilmgandhi 18:6a4db94011d3 253 */
sahilmgandhi 18:6a4db94011d3 254 #define DCMI_WINDOW_COORDINATE ((uint32_t)0x3FFFU) /*!< Window coordinate */
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 /**
sahilmgandhi 18:6a4db94011d3 257 * @}
sahilmgandhi 18:6a4db94011d3 258 */
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 /** @defgroup DCMI_Window_Height DCMI Window Height
sahilmgandhi 18:6a4db94011d3 261 * @{
sahilmgandhi 18:6a4db94011d3 262 */
sahilmgandhi 18:6a4db94011d3 263 #define DCMI_WINDOW_HEIGHT ((uint32_t)0x1FFFU) /*!< Window Height */
sahilmgandhi 18:6a4db94011d3 264
sahilmgandhi 18:6a4db94011d3 265 /**
sahilmgandhi 18:6a4db94011d3 266 * @}
sahilmgandhi 18:6a4db94011d3 267 */
sahilmgandhi 18:6a4db94011d3 268
sahilmgandhi 18:6a4db94011d3 269 /** @defgroup DCMI_Window_Vertical_Line DCMI Window Vertical Line
sahilmgandhi 18:6a4db94011d3 270 * @{
sahilmgandhi 18:6a4db94011d3 271 */
sahilmgandhi 18:6a4db94011d3 272 #define DCMI_POSITION_CWSIZE_VLINE (uint32_t)POSITION_VAL(DCMI_CWSIZE_VLINE) /*!< Required left shift to set crop window vertical line count */
sahilmgandhi 18:6a4db94011d3 273 #define DCMI_POSITION_CWSTRT_VST (uint32_t)POSITION_VAL(DCMI_CWSTRT_VST) /*!< Required left shift to set crop window vertical start line count */
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /**
sahilmgandhi 18:6a4db94011d3 276 * @}
sahilmgandhi 18:6a4db94011d3 277 */
sahilmgandhi 18:6a4db94011d3 278
sahilmgandhi 18:6a4db94011d3 279 /** @defgroup DCMI_interrupt_sources DCMI interrupt sources
sahilmgandhi 18:6a4db94011d3 280 * @{
sahilmgandhi 18:6a4db94011d3 281 */
sahilmgandhi 18:6a4db94011d3 282 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE) /*!< Capture complete interrupt */
sahilmgandhi 18:6a4db94011d3 283 #define DCMI_IT_OVR ((uint32_t)DCMI_IER_OVR_IE) /*!< Overrun interrupt */
sahilmgandhi 18:6a4db94011d3 284 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE) /*!< Synchronization error interrupt */
sahilmgandhi 18:6a4db94011d3 285 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE) /*!< VSYNC interrupt */
sahilmgandhi 18:6a4db94011d3 286 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE) /*!< Line interrupt */
sahilmgandhi 18:6a4db94011d3 287 /**
sahilmgandhi 18:6a4db94011d3 288 * @}
sahilmgandhi 18:6a4db94011d3 289 */
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 /** @defgroup DCMI_Flags DCMI Flags
sahilmgandhi 18:6a4db94011d3 292 * @{
sahilmgandhi 18:6a4db94011d3 293 */
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 /**
sahilmgandhi 18:6a4db94011d3 296 * @brief DCMI SR register
sahilmgandhi 18:6a4db94011d3 297 */
sahilmgandhi 18:6a4db94011d3 298 #define DCMI_FLAG_HSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_HSYNC) /*!< HSYNC pin state (active line / synchronization between lines) */
sahilmgandhi 18:6a4db94011d3 299 #define DCMI_FLAG_VSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_VSYNC) /*!< VSYNC pin state (active frame / synchronization between frames) */
sahilmgandhi 18:6a4db94011d3 300 #define DCMI_FLAG_FNE ((uint32_t)DCMI_SR_INDEX|DCMI_SR_FNE) /*!< FIFO not empty flag */
sahilmgandhi 18:6a4db94011d3 301 /**
sahilmgandhi 18:6a4db94011d3 302 * @brief DCMI RIS register
sahilmgandhi 18:6a4db94011d3 303 */
sahilmgandhi 18:6a4db94011d3 304 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RIS_FRAME_RIS) /*!< Frame capture complete interrupt flag */
sahilmgandhi 18:6a4db94011d3 305 #define DCMI_FLAG_OVRRI ((uint32_t)DCMI_RIS_OVR_RIS) /*!< Overrun interrupt flag */
sahilmgandhi 18:6a4db94011d3 306 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RIS_ERR_RIS) /*!< Synchronization error interrupt flag */
sahilmgandhi 18:6a4db94011d3 307 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RIS_VSYNC_RIS) /*!< VSYNC interrupt flag */
sahilmgandhi 18:6a4db94011d3 308 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RIS_LINE_RIS) /*!< Line interrupt flag */
sahilmgandhi 18:6a4db94011d3 309 /**
sahilmgandhi 18:6a4db94011d3 310 * @brief DCMI MIS register
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312 #define DCMI_FLAG_FRAMEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_FRAME_MIS) /*!< DCMI Frame capture complete masked interrupt status */
sahilmgandhi 18:6a4db94011d3 313 #define DCMI_FLAG_OVRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_OVR_MIS ) /*!< DCMI Overrun masked interrupt status */
sahilmgandhi 18:6a4db94011d3 314 #define DCMI_FLAG_ERRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_ERR_MIS ) /*!< DCMI Synchronization error masked interrupt status */
sahilmgandhi 18:6a4db94011d3 315 #define DCMI_FLAG_VSYNCMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_VSYNC_MIS) /*!< DCMI VSYNC masked interrupt status */
sahilmgandhi 18:6a4db94011d3 316 #define DCMI_FLAG_LINEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_LINE_MIS ) /*!< DCMI Line masked interrupt status */
sahilmgandhi 18:6a4db94011d3 317 /**
sahilmgandhi 18:6a4db94011d3 318 * @}
sahilmgandhi 18:6a4db94011d3 319 */
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 /**
sahilmgandhi 18:6a4db94011d3 322 * @}
sahilmgandhi 18:6a4db94011d3 323 */
sahilmgandhi 18:6a4db94011d3 324
sahilmgandhi 18:6a4db94011d3 325 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 326 /** @defgroup DCMI_Exported_Macros DCMI Exported Macros
sahilmgandhi 18:6a4db94011d3 327 * @{
sahilmgandhi 18:6a4db94011d3 328 */
sahilmgandhi 18:6a4db94011d3 329
sahilmgandhi 18:6a4db94011d3 330 /** @brief Reset DCMI handle state
sahilmgandhi 18:6a4db94011d3 331 * @param __HANDLE__: specifies the DCMI handle.
sahilmgandhi 18:6a4db94011d3 332 * @retval None
sahilmgandhi 18:6a4db94011d3 333 */
sahilmgandhi 18:6a4db94011d3 334 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 335
sahilmgandhi 18:6a4db94011d3 336 /**
sahilmgandhi 18:6a4db94011d3 337 * @brief Enable the DCMI.
sahilmgandhi 18:6a4db94011d3 338 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 339 * @retval None
sahilmgandhi 18:6a4db94011d3 340 */
sahilmgandhi 18:6a4db94011d3 341 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
sahilmgandhi 18:6a4db94011d3 342
sahilmgandhi 18:6a4db94011d3 343 /**
sahilmgandhi 18:6a4db94011d3 344 * @brief Disable the DCMI.
sahilmgandhi 18:6a4db94011d3 345 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 346 * @retval None
sahilmgandhi 18:6a4db94011d3 347 */
sahilmgandhi 18:6a4db94011d3 348 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
sahilmgandhi 18:6a4db94011d3 349
sahilmgandhi 18:6a4db94011d3 350 /* Interrupt & Flag management */
sahilmgandhi 18:6a4db94011d3 351 /**
sahilmgandhi 18:6a4db94011d3 352 * @brief Get the DCMI pending flag.
sahilmgandhi 18:6a4db94011d3 353 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 354 * @param __FLAG__: Get the specified flag.
sahilmgandhi 18:6a4db94011d3 355 * This parameter can be one of the following values (no combination allowed)
sahilmgandhi 18:6a4db94011d3 356 * @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines)
sahilmgandhi 18:6a4db94011d3 357 * @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames)
sahilmgandhi 18:6a4db94011d3 358 * @arg DCMI_FLAG_FNE: FIFO empty flag
sahilmgandhi 18:6a4db94011d3 359 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
sahilmgandhi 18:6a4db94011d3 360 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
sahilmgandhi 18:6a4db94011d3 361 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
sahilmgandhi 18:6a4db94011d3 362 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
sahilmgandhi 18:6a4db94011d3 363 * @arg DCMI_FLAG_LINERI: Line flag mask
sahilmgandhi 18:6a4db94011d3 364 * @arg DCMI_FLAG_FRAMEMI: DCMI Capture complete masked interrupt status
sahilmgandhi 18:6a4db94011d3 365 * @arg DCMI_FLAG_OVRMI: DCMI Overrun masked interrupt status
sahilmgandhi 18:6a4db94011d3 366 * @arg DCMI_FLAG_ERRMI: DCMI Synchronization error masked interrupt status
sahilmgandhi 18:6a4db94011d3 367 * @arg DCMI_FLAG_VSYNCMI: DCMI VSYNC masked interrupt status
sahilmgandhi 18:6a4db94011d3 368 * @arg DCMI_FLAG_LINEMI: DCMI Line masked interrupt status
sahilmgandhi 18:6a4db94011d3 369 * @retval The state of FLAG.
sahilmgandhi 18:6a4db94011d3 370 */
sahilmgandhi 18:6a4db94011d3 371 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
sahilmgandhi 18:6a4db94011d3 372 ((((__FLAG__) & (DCMI_SR_INDEX|DCMI_MIS_INDEX)) == 0x0U)? ((__HANDLE__)->Instance->RIS & (__FLAG__)) :\
sahilmgandhi 18:6a4db94011d3 373 (((__FLAG__) & DCMI_SR_INDEX) == 0x0U)? ((__HANDLE__)->Instance->MIS & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
sahilmgandhi 18:6a4db94011d3 374
sahilmgandhi 18:6a4db94011d3 375 /**
sahilmgandhi 18:6a4db94011d3 376 * @brief Clear the DCMI pending flags.
sahilmgandhi 18:6a4db94011d3 377 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 378 * @param __FLAG__: specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 379 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 380 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
sahilmgandhi 18:6a4db94011d3 381 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
sahilmgandhi 18:6a4db94011d3 382 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
sahilmgandhi 18:6a4db94011d3 383 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
sahilmgandhi 18:6a4db94011d3 384 * @arg DCMI_FLAG_LINERI: Line flag mask
sahilmgandhi 18:6a4db94011d3 385 * @retval None
sahilmgandhi 18:6a4db94011d3 386 */
sahilmgandhi 18:6a4db94011d3 387 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
sahilmgandhi 18:6a4db94011d3 388
sahilmgandhi 18:6a4db94011d3 389 /**
sahilmgandhi 18:6a4db94011d3 390 * @brief Enable the specified DCMI interrupts.
sahilmgandhi 18:6a4db94011d3 391 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 392 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
sahilmgandhi 18:6a4db94011d3 393 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 394 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
sahilmgandhi 18:6a4db94011d3 395 * @arg DCMI_IT_OVR: Overrun interrupt mask
sahilmgandhi 18:6a4db94011d3 396 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
sahilmgandhi 18:6a4db94011d3 397 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
sahilmgandhi 18:6a4db94011d3 398 * @arg DCMI_IT_LINE: Line interrupt mask
sahilmgandhi 18:6a4db94011d3 399 * @retval None
sahilmgandhi 18:6a4db94011d3 400 */
sahilmgandhi 18:6a4db94011d3 401 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 /**
sahilmgandhi 18:6a4db94011d3 404 * @brief Disable the specified DCMI interrupts.
sahilmgandhi 18:6a4db94011d3 405 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 406 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
sahilmgandhi 18:6a4db94011d3 407 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 408 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
sahilmgandhi 18:6a4db94011d3 409 * @arg DCMI_IT_OVR: Overrun interrupt mask
sahilmgandhi 18:6a4db94011d3 410 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
sahilmgandhi 18:6a4db94011d3 411 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
sahilmgandhi 18:6a4db94011d3 412 * @arg DCMI_IT_LINE: Line interrupt mask
sahilmgandhi 18:6a4db94011d3 413 * @retval None
sahilmgandhi 18:6a4db94011d3 414 */
sahilmgandhi 18:6a4db94011d3 415 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 416
sahilmgandhi 18:6a4db94011d3 417 /**
sahilmgandhi 18:6a4db94011d3 418 * @brief Check whether the specified DCMI interrupt has occurred or not.
sahilmgandhi 18:6a4db94011d3 419 * @param __HANDLE__: DCMI handle
sahilmgandhi 18:6a4db94011d3 420 * @param __INTERRUPT__: specifies the DCMI interrupt source to check.
sahilmgandhi 18:6a4db94011d3 421 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 422 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
sahilmgandhi 18:6a4db94011d3 423 * @arg DCMI_IT_OVR: Overrun interrupt mask
sahilmgandhi 18:6a4db94011d3 424 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
sahilmgandhi 18:6a4db94011d3 425 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
sahilmgandhi 18:6a4db94011d3 426 * @arg DCMI_IT_LINE: Line interrupt mask
sahilmgandhi 18:6a4db94011d3 427 * @retval The state of INTERRUPT.
sahilmgandhi 18:6a4db94011d3 428 */
sahilmgandhi 18:6a4db94011d3 429 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 430
sahilmgandhi 18:6a4db94011d3 431 /**
sahilmgandhi 18:6a4db94011d3 432 * @}
sahilmgandhi 18:6a4db94011d3 433 */
sahilmgandhi 18:6a4db94011d3 434
sahilmgandhi 18:6a4db94011d3 435 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 436 /** @addtogroup DCMI_Exported_Functions DCMI Exported Functions
sahilmgandhi 18:6a4db94011d3 437 * @{
sahilmgandhi 18:6a4db94011d3 438 */
sahilmgandhi 18:6a4db94011d3 439
sahilmgandhi 18:6a4db94011d3 440 /** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
sahilmgandhi 18:6a4db94011d3 441 * @{
sahilmgandhi 18:6a4db94011d3 442 */
sahilmgandhi 18:6a4db94011d3 443 /* Initialization and de-initialization functions *****************************/
sahilmgandhi 18:6a4db94011d3 444 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 445 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 446 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 447 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 448 /**
sahilmgandhi 18:6a4db94011d3 449 * @}
sahilmgandhi 18:6a4db94011d3 450 */
sahilmgandhi 18:6a4db94011d3 451
sahilmgandhi 18:6a4db94011d3 452 /** @addtogroup DCMI_Exported_Functions_Group2 IO operation functions
sahilmgandhi 18:6a4db94011d3 453 * @{
sahilmgandhi 18:6a4db94011d3 454 */
sahilmgandhi 18:6a4db94011d3 455 /* IO operation functions *****************************************************/
sahilmgandhi 18:6a4db94011d3 456 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
sahilmgandhi 18:6a4db94011d3 457 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 458 HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 459 HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi);
sahilmgandhi 18:6a4db94011d3 460 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 461 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 462 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 463 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 464 void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 465 void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 466 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 467 /**
sahilmgandhi 18:6a4db94011d3 468 * @}
sahilmgandhi 18:6a4db94011d3 469 */
sahilmgandhi 18:6a4db94011d3 470
sahilmgandhi 18:6a4db94011d3 471 /** @addtogroup DCMI_Exported_Functions_Group3 Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 472 * @{
sahilmgandhi 18:6a4db94011d3 473 */
sahilmgandhi 18:6a4db94011d3 474 /* Peripheral Control functions ***********************************************/
sahilmgandhi 18:6a4db94011d3 475 HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
sahilmgandhi 18:6a4db94011d3 476 HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 477 HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 478 /**
sahilmgandhi 18:6a4db94011d3 479 * @}
sahilmgandhi 18:6a4db94011d3 480 */
sahilmgandhi 18:6a4db94011d3 481
sahilmgandhi 18:6a4db94011d3 482 /** @addtogroup DCMI_Exported_Functions_Group4 Peripheral State functions
sahilmgandhi 18:6a4db94011d3 483 * @{
sahilmgandhi 18:6a4db94011d3 484 */
sahilmgandhi 18:6a4db94011d3 485 /* Peripheral State functions *************************************************/
sahilmgandhi 18:6a4db94011d3 486 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 487 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
sahilmgandhi 18:6a4db94011d3 488 /**
sahilmgandhi 18:6a4db94011d3 489 * @}
sahilmgandhi 18:6a4db94011d3 490 */
sahilmgandhi 18:6a4db94011d3 491
sahilmgandhi 18:6a4db94011d3 492 /**
sahilmgandhi 18:6a4db94011d3 493 * @}
sahilmgandhi 18:6a4db94011d3 494 */
sahilmgandhi 18:6a4db94011d3 495
sahilmgandhi 18:6a4db94011d3 496 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 497 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 498 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 499 /** @defgroup DCMI_Private_Constants DCMI Private Constants
sahilmgandhi 18:6a4db94011d3 500 * @{
sahilmgandhi 18:6a4db94011d3 501 */
sahilmgandhi 18:6a4db94011d3 502 #define DCMI_MIS_INDEX ((uint32_t)0x1000U) /*!< DCMI MIS register index */
sahilmgandhi 18:6a4db94011d3 503 #define DCMI_SR_INDEX ((uint32_t)0x2000U) /*!< DCMI SR register index */
sahilmgandhi 18:6a4db94011d3 504 /**
sahilmgandhi 18:6a4db94011d3 505 * @}
sahilmgandhi 18:6a4db94011d3 506 */
sahilmgandhi 18:6a4db94011d3 507 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 508 /** @defgroup DCMI_Private_Macros DCMI Private Macros
sahilmgandhi 18:6a4db94011d3 509 * @{
sahilmgandhi 18:6a4db94011d3 510 */
sahilmgandhi 18:6a4db94011d3 511 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
sahilmgandhi 18:6a4db94011d3 512 ((MODE) == DCMI_MODE_SNAPSHOT))
sahilmgandhi 18:6a4db94011d3 513
sahilmgandhi 18:6a4db94011d3 514 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
sahilmgandhi 18:6a4db94011d3 515 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
sahilmgandhi 18:6a4db94011d3 516
sahilmgandhi 18:6a4db94011d3 517 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
sahilmgandhi 18:6a4db94011d3 518 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
sahilmgandhi 18:6a4db94011d3 519
sahilmgandhi 18:6a4db94011d3 520 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
sahilmgandhi 18:6a4db94011d3 521 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
sahilmgandhi 18:6a4db94011d3 522
sahilmgandhi 18:6a4db94011d3 523 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
sahilmgandhi 18:6a4db94011d3 524 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
sahilmgandhi 18:6a4db94011d3 525
sahilmgandhi 18:6a4db94011d3 526 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 527 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
sahilmgandhi 18:6a4db94011d3 528
sahilmgandhi 18:6a4db94011d3 529 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
sahilmgandhi 18:6a4db94011d3 530 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
sahilmgandhi 18:6a4db94011d3 531 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
sahilmgandhi 18:6a4db94011d3 532
sahilmgandhi 18:6a4db94011d3 533 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
sahilmgandhi 18:6a4db94011d3 534 ((DATA) == DCMI_EXTEND_DATA_10B) || \
sahilmgandhi 18:6a4db94011d3 535 ((DATA) == DCMI_EXTEND_DATA_12B) || \
sahilmgandhi 18:6a4db94011d3 536 ((DATA) == DCMI_EXTEND_DATA_14B))
sahilmgandhi 18:6a4db94011d3 537
sahilmgandhi 18:6a4db94011d3 538 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
sahilmgandhi 18:6a4db94011d3 539
sahilmgandhi 18:6a4db94011d3 540 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
sahilmgandhi 18:6a4db94011d3 541
sahilmgandhi 18:6a4db94011d3 542 /**
sahilmgandhi 18:6a4db94011d3 543 * @}
sahilmgandhi 18:6a4db94011d3 544 */
sahilmgandhi 18:6a4db94011d3 545
sahilmgandhi 18:6a4db94011d3 546 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 547 /** @addtogroup DCMI_Private_Functions DCMI Private Functions
sahilmgandhi 18:6a4db94011d3 548 * @{
sahilmgandhi 18:6a4db94011d3 549 */
sahilmgandhi 18:6a4db94011d3 550
sahilmgandhi 18:6a4db94011d3 551 /**
sahilmgandhi 18:6a4db94011d3 552 * @}
sahilmgandhi 18:6a4db94011d3 553 */
sahilmgandhi 18:6a4db94011d3 554
sahilmgandhi 18:6a4db94011d3 555 #endif /* STM32F207xx || STM32F217xx */
sahilmgandhi 18:6a4db94011d3 556
sahilmgandhi 18:6a4db94011d3 557
sahilmgandhi 18:6a4db94011d3 558 /**
sahilmgandhi 18:6a4db94011d3 559 * @}
sahilmgandhi 18:6a4db94011d3 560 */
sahilmgandhi 18:6a4db94011d3 561
sahilmgandhi 18:6a4db94011d3 562 /**
sahilmgandhi 18:6a4db94011d3 563 * @}
sahilmgandhi 18:6a4db94011d3 564 */
sahilmgandhi 18:6a4db94011d3 565
sahilmgandhi 18:6a4db94011d3 566 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 567 }
sahilmgandhi 18:6a4db94011d3 568 #endif
sahilmgandhi 18:6a4db94011d3 569
sahilmgandhi 18:6a4db94011d3 570 #endif /* __STM32F2xx_HAL_DCMI_H */
sahilmgandhi 18:6a4db94011d3 571
sahilmgandhi 18:6a4db94011d3 572 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/