Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * Copyright (c) 2016, STMicroelectronics
sahilmgandhi 18:6a4db94011d3 4 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 7 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 8 *
sahilmgandhi 18:6a4db94011d3 9 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 10 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 12 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 13 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 15 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 16 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 28 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30 #ifndef MBED_PINNAMESTYPES_H
sahilmgandhi 18:6a4db94011d3 31 #define MBED_PINNAMESTYPES_H
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 36 extern "C" {
sahilmgandhi 18:6a4db94011d3 37 #endif
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 /* STM PIN data as used in pin_function is coded on 32 bits as below
sahilmgandhi 18:6a4db94011d3 40 * [2:0] Function (like in MODER reg) : Input / Output / Alt / Analog
sahilmgandhi 18:6a4db94011d3 41 * [3] Output Push-Pull / Open Drain (as in OTYPER reg)
sahilmgandhi 18:6a4db94011d3 42 * [5:4] as in PUPDR reg: No Pull, Pull-up, Pull-Donc
sahilmgandhi 18:6a4db94011d3 43 * [7:6] Reserved for speed config (as in OSPEEDR), but not used yet
sahilmgandhi 18:6a4db94011d3 44 * [11:8] Alternate Num (as in AFRL/AFRG reg)
sahilmgandhi 18:6a4db94011d3 45 * [16:12] Channel (Analog/Timer specific)
sahilmgandhi 18:6a4db94011d3 46 * [17] Inverted (Analog/Timer specific)
sahilmgandhi 18:6a4db94011d3 47 * [18] Analog ADC control - Only valid for specific families
sahilmgandhi 18:6a4db94011d3 48 * [32:19] Reserved
sahilmgandhi 18:6a4db94011d3 49 */
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 #define STM_PIN_FUNCTION_MASK 0x07
sahilmgandhi 18:6a4db94011d3 52 #define STM_PIN_FUNCTION_SHIFT 0
sahilmgandhi 18:6a4db94011d3 53 #define STM_PIN_FUNCTION_BITS (STM_PIN_FUNCTION_MASK << STM_PIN_FUNCTION_SHIFT)
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 #define STM_PIN_OD_MASK 0x01
sahilmgandhi 18:6a4db94011d3 56 #define STM_PIN_OD_SHIFT 3
sahilmgandhi 18:6a4db94011d3 57 #define STM_PIN_OD_BITS (STM_PIN_OD_MASK << STM_PIN_OD_SHIFT)
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 #define STM_PIN_PUPD_MASK 0x03
sahilmgandhi 18:6a4db94011d3 60 #define STM_PIN_PUPD_SHIFT 4
sahilmgandhi 18:6a4db94011d3 61 #define STM_PIN_PUPD_BITS (STM_PIN_PUPD_MASK << STM_PIN_PUPD_SHIFT)
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 #define STM_PIN_SPEED_MASK 0x03
sahilmgandhi 18:6a4db94011d3 64 #define STM_PIN_SPEED_SHIFT 6
sahilmgandhi 18:6a4db94011d3 65 #define STM_PIN_SPEED_BITS (STM_PIN_SPEED_MASK << STM_PIN_SPEED_SHIFT)
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 #define STM_PIN_AFNUM_MASK 0x0F
sahilmgandhi 18:6a4db94011d3 68 #define STM_PIN_AFNUM_SHIFT 8
sahilmgandhi 18:6a4db94011d3 69 #define STM_PIN_AFNUM_BITS (STM_PIN_AFNUM_MASK << STM_PIN_AFNUM_SHIFT)
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 #define STM_PIN_CHAN_MASK 0x1F
sahilmgandhi 18:6a4db94011d3 72 #define STM_PIN_CHAN_SHIFT 12
sahilmgandhi 18:6a4db94011d3 73 #define STM_PIN_CHANNEL_BIT (STM_PIN_CHAN_MASK << STM_PIN_CHAN_SHIFT)
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 #define STM_PIN_INV_MASK 0x01
sahilmgandhi 18:6a4db94011d3 76 #define STM_PIN_INV_SHIFT 17
sahilmgandhi 18:6a4db94011d3 77 #define STM_PIN_INV_BIT (STM_PIN_INV_MASK << STM_PIN_INV_SHIFT)
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 #define STM_PIN_AN_CTRL_MASK 0x01
sahilmgandhi 18:6a4db94011d3 80 #define STM_PIN_AN_CTRL_SHIFT 18
sahilmgandhi 18:6a4db94011d3 81 #define STM_PIN_ANALOG_CONTROL_BIT (STM_PIN_AN_CTRL_MASK << STM_PIN_AN_CTRL_SHIFT)
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 #define STM_PIN_FUNCTION(X) (((X) >> STM_PIN_FUNCTION_SHIFT) & STM_PIN_FUNCTION_MASK)
sahilmgandhi 18:6a4db94011d3 84 #define STM_PIN_OD(X) (((X) >> STM_PIN_OD_SHIFT) & STM_PIN_OD_MASK)
sahilmgandhi 18:6a4db94011d3 85 #define STM_PIN_PUPD(X) (((X) >> STM_PIN_PUPD_SHIFT) & STM_PIN_PUPD_MASK)
sahilmgandhi 18:6a4db94011d3 86 #define STM_PIN_SPEED(X) (((X) >> STM_PIN_SPEED_SHIFT) & STM_PIN_SPEED_MASK)
sahilmgandhi 18:6a4db94011d3 87 #define STM_PIN_AFNUM(X) (((X) >> STM_PIN_AFNUM_SHIFT) & STM_PIN_AFNUM_MASK)
sahilmgandhi 18:6a4db94011d3 88 #define STM_PIN_CHANNEL(X) (((X) >> STM_PIN_CHAN_SHIFT) & STM_PIN_CHAN_MASK)
sahilmgandhi 18:6a4db94011d3 89 #define STM_PIN_INVERTED(X) (((X) >> STM_PIN_INV_SHIFT) & STM_PIN_INV_MASK)
sahilmgandhi 18:6a4db94011d3 90 #define STM_PIN_ANALOG_CONTROL(X) (((X) >> STM_PIN_AN_CTRL_SHIFT) & STM_PIN_AN_CTRL_MASK)
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 #define STM_PIN_DEFINE(FUNC_OD, PUPD, AFNUM) ((int)(FUNC_OD) |\
sahilmgandhi 18:6a4db94011d3 93 ((PUPD & STM_PIN_PUPD_MASK) << STM_PIN_PUPD_SHIFT) |\
sahilmgandhi 18:6a4db94011d3 94 ((AFNUM & STM_PIN_AFNUM_MASK) << STM_PIN_AFNUM_SHIFT))
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 #define STM_PIN_DEFINE_EXT(FUNC_OD, PUPD, AFNUM, CHAN, INV) \
sahilmgandhi 18:6a4db94011d3 97 ((int)(FUNC_OD) |\
sahilmgandhi 18:6a4db94011d3 98 ((PUPD & STM_PIN_PUPD_MASK) << STM_PIN_PUPD_SHIFT) |\
sahilmgandhi 18:6a4db94011d3 99 ((AFNUM & STM_PIN_AFNUM_MASK) << STM_PIN_AFNUM_SHIFT) |\
sahilmgandhi 18:6a4db94011d3 100 ((CHAN & STM_PIN_CHAN_MASK) << STM_PIN_CHAN_SHIFT) |\
sahilmgandhi 18:6a4db94011d3 101 ((INV & STM_PIN_INV_MASK) << STM_PIN_INV_SHIFT))
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 /*
sahilmgandhi 18:6a4db94011d3 104 * MACROS to support the legacy definition of PIN formats
sahilmgandhi 18:6a4db94011d3 105 * The STM_MODE_ defines contain the function and the Push-pull/OpenDrain
sahilmgandhi 18:6a4db94011d3 106 * configuration (legacy inheritance).
sahilmgandhi 18:6a4db94011d3 107 */
sahilmgandhi 18:6a4db94011d3 108 #define STM_PIN_DATA(FUNC_OD, PUPD, AFNUM) \
sahilmgandhi 18:6a4db94011d3 109 STM_PIN_DEFINE(FUNC_OD, PUPD, AFNUM)
sahilmgandhi 18:6a4db94011d3 110 #define STM_PIN_DATA_EXT(FUNC_OD, PUPD, AFNUM, CHANNEL, INVERTED) \
sahilmgandhi 18:6a4db94011d3 111 STM_PIN_DEFINE_EXT(FUNC_OD, PUPD, AFNUM, CHANNEL, INVERTED)
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 typedef enum {
sahilmgandhi 18:6a4db94011d3 114 STM_PIN_INPUT = 0,
sahilmgandhi 18:6a4db94011d3 115 STM_PIN_OUTPUT = 1,
sahilmgandhi 18:6a4db94011d3 116 STM_PIN_ALTERNATE = 2,
sahilmgandhi 18:6a4db94011d3 117 STM_PIN_ANALOG = 3,
sahilmgandhi 18:6a4db94011d3 118 } StmPinFunction;
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 #define STM_MODE_INPUT (STM_PIN_INPUT)
sahilmgandhi 18:6a4db94011d3 121 #define STM_MODE_OUTPUT_PP (STM_PIN_OUTPUT)
sahilmgandhi 18:6a4db94011d3 122 #define STM_MODE_OUTPUT_OD (STM_PIN_OUTPUT | STM_PIN_OD_BITS)
sahilmgandhi 18:6a4db94011d3 123 #define STM_MODE_AF_PP (STM_PIN_ALTERNATE)
sahilmgandhi 18:6a4db94011d3 124 #define STM_MODE_AF_OD (STM_PIN_ALTERNATE | STM_PIN_OD_BITS)
sahilmgandhi 18:6a4db94011d3 125 #define STM_MODE_ANALOG (STM_PIN_ANALOG)
sahilmgandhi 18:6a4db94011d3 126 #define STM_MODE_ANALOG_ADC_CONTROL (STM_PIN_ANALOG | STM_PIN_ANALOG_CONTROL_BIT)
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 // High nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, 7=H)
sahilmgandhi 18:6a4db94011d3 129 // Low nibble = pin number
sahilmgandhi 18:6a4db94011d3 130 #define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF)
sahilmgandhi 18:6a4db94011d3 131 #define STM_PIN(X) ((uint32_t)(X) & 0xF)
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 /* Defines to be used by application */
sahilmgandhi 18:6a4db94011d3 134 typedef enum {
sahilmgandhi 18:6a4db94011d3 135 PIN_INPUT = 0,
sahilmgandhi 18:6a4db94011d3 136 PIN_OUTPUT
sahilmgandhi 18:6a4db94011d3 137 } PinDirection;
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 typedef enum {
sahilmgandhi 18:6a4db94011d3 140 PullNone = 0,
sahilmgandhi 18:6a4db94011d3 141 PullUp = 1,
sahilmgandhi 18:6a4db94011d3 142 PullDown = 2,
sahilmgandhi 18:6a4db94011d3 143 OpenDrainPullUp = 3,
sahilmgandhi 18:6a4db94011d3 144 OpenDrainNoPull = 4,
sahilmgandhi 18:6a4db94011d3 145 OpenDrainPullDown = 5,
sahilmgandhi 18:6a4db94011d3 146 PushPullNoPull = PullNone,
sahilmgandhi 18:6a4db94011d3 147 PushPullPullUp = PullUp,
sahilmgandhi 18:6a4db94011d3 148 PushPullPullDown = PullDown,
sahilmgandhi 18:6a4db94011d3 149 OpenDrain = OpenDrainPullUp,
sahilmgandhi 18:6a4db94011d3 150 PullDefault = PullNone
sahilmgandhi 18:6a4db94011d3 151 } PinMode;
sahilmgandhi 18:6a4db94011d3 152
sahilmgandhi 18:6a4db94011d3 153 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 154 }
sahilmgandhi 18:6a4db94011d3 155 #endif
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 #endif
sahilmgandhi 18:6a4db94011d3 158