MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_RENESAS/TARGET_RZ_A1H/serial_api.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2015 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 // math.h required for floating point operations for baud rate calculation
sahilmgandhi 18:6a4db94011d3 17 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 18 #include <math.h>
sahilmgandhi 18:6a4db94011d3 19 #include <string.h>
sahilmgandhi 18:6a4db94011d3 20 #include <stdlib.h>
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 23 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 24 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 25 #include "gpio_api.h"
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 #include "scif_iodefine.h"
sahilmgandhi 18:6a4db94011d3 28 #include "cpg_iodefine.h"
sahilmgandhi 18:6a4db94011d3 29
sahilmgandhi 18:6a4db94011d3 30 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 31 * INITIALIZATION
sahilmgandhi 18:6a4db94011d3 32 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 33 #define PCLK (66666666) // Define the peripheral clock P1 frequency.
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 #define UART_NUM 8
sahilmgandhi 18:6a4db94011d3 36 #define IRQ_NUM 4
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 static void uart0_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 39 static void uart1_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 40 static void uart2_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 41 static void uart3_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 42 static void uart4_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 43 static void uart5_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 44 static void uart6_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 45 static void uart7_tx_irq(void);
sahilmgandhi 18:6a4db94011d3 46 static void uart0_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 47 static void uart1_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 48 static void uart2_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 49 static void uart3_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 50 static void uart4_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 51 static void uart5_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 52 static void uart6_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 53 static void uart7_rx_irq(void);
sahilmgandhi 18:6a4db94011d3 54 static void uart0_er_irq(void);
sahilmgandhi 18:6a4db94011d3 55 static void uart1_er_irq(void);
sahilmgandhi 18:6a4db94011d3 56 static void uart2_er_irq(void);
sahilmgandhi 18:6a4db94011d3 57 static void uart3_er_irq(void);
sahilmgandhi 18:6a4db94011d3 58 static void uart4_er_irq(void);
sahilmgandhi 18:6a4db94011d3 59 static void uart5_er_irq(void);
sahilmgandhi 18:6a4db94011d3 60 static void uart6_er_irq(void);
sahilmgandhi 18:6a4db94011d3 61 static void uart7_er_irq(void);
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 static void serial_put_done(serial_t *obj);
sahilmgandhi 18:6a4db94011d3 64 static uint8_t serial_available_buffer(serial_t *obj);
sahilmgandhi 18:6a4db94011d3 65 static void serial_irq_err_set(serial_t *obj, uint32_t enable);
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 static const PinMap PinMap_UART_TX[] = {
sahilmgandhi 18:6a4db94011d3 68 {P2_14 , UART0, 6},
sahilmgandhi 18:6a4db94011d3 69 {P2_5 , UART1, 6},
sahilmgandhi 18:6a4db94011d3 70 {P4_12 , UART1, 7},
sahilmgandhi 18:6a4db94011d3 71 {P6_3 , UART2, 7},
sahilmgandhi 18:6a4db94011d3 72 {P4_14 , UART2, 7},
sahilmgandhi 18:6a4db94011d3 73 {P5_3 , UART3, 5},
sahilmgandhi 18:6a4db94011d3 74 {P8_8 , UART3, 7},
sahilmgandhi 18:6a4db94011d3 75 {P5_0 , UART4, 5},
sahilmgandhi 18:6a4db94011d3 76 {P8_14 , UART4, 7},
sahilmgandhi 18:6a4db94011d3 77 {P8_13 , UART5, 5},
sahilmgandhi 18:6a4db94011d3 78 {P11_10, UART5, 3},
sahilmgandhi 18:6a4db94011d3 79 {P6_6 , UART5, 5},
sahilmgandhi 18:6a4db94011d3 80 {P5_6 , UART6, 5},
sahilmgandhi 18:6a4db94011d3 81 {P11_1 , UART6, 4},
sahilmgandhi 18:6a4db94011d3 82 {P7_4 , UART7, 4},
sahilmgandhi 18:6a4db94011d3 83 {NC , NC , 0}
sahilmgandhi 18:6a4db94011d3 84 };
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 static const PinMap PinMap_UART_RX[] = {
sahilmgandhi 18:6a4db94011d3 87 {P2_15 , UART0, 6},
sahilmgandhi 18:6a4db94011d3 88 {P2_6 , UART1, 6},
sahilmgandhi 18:6a4db94011d3 89 {P4_13 , UART1, 7},
sahilmgandhi 18:6a4db94011d3 90 {P6_2 , UART2, 7},
sahilmgandhi 18:6a4db94011d3 91 {P4_15 , UART2, 7},
sahilmgandhi 18:6a4db94011d3 92 {P5_4 , UART3, 5},
sahilmgandhi 18:6a4db94011d3 93 {P8_9 , UART3, 7},
sahilmgandhi 18:6a4db94011d3 94 {P5_1 , UART4, 5},
sahilmgandhi 18:6a4db94011d3 95 {P8_15 , UART4, 7},
sahilmgandhi 18:6a4db94011d3 96 {P8_11 , UART5, 5},
sahilmgandhi 18:6a4db94011d3 97 {P11_11, UART5, 3},
sahilmgandhi 18:6a4db94011d3 98 {P6_7 , UART5, 5},
sahilmgandhi 18:6a4db94011d3 99 {P5_7 , UART6, 5},
sahilmgandhi 18:6a4db94011d3 100 {P11_2 , UART6, 4},
sahilmgandhi 18:6a4db94011d3 101 {P7_5 , UART7, 4},
sahilmgandhi 18:6a4db94011d3 102 {NC , NC , 0}
sahilmgandhi 18:6a4db94011d3 103 };
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 static const PinMap PinMap_UART_CTS[] = {
sahilmgandhi 18:6a4db94011d3 106 {P2_3 , UART1, 6},
sahilmgandhi 18:6a4db94011d3 107 {P11_7 , UART5, 3},
sahilmgandhi 18:6a4db94011d3 108 {P7_6 , UART7, 4},
sahilmgandhi 18:6a4db94011d3 109 {NC , NC , 0}
sahilmgandhi 18:6a4db94011d3 110 };
sahilmgandhi 18:6a4db94011d3 111 static const PinMap PinMap_UART_RTS[] = {
sahilmgandhi 18:6a4db94011d3 112 {P2_7 , UART1, 6},
sahilmgandhi 18:6a4db94011d3 113 {P11_8 , UART5, 3},
sahilmgandhi 18:6a4db94011d3 114 {P7_7 , UART7, 4},
sahilmgandhi 18:6a4db94011d3 115 {NC , NC , 0}
sahilmgandhi 18:6a4db94011d3 116 };
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 static const struct st_scif *SCIF[] = SCIF_ADDRESS_LIST;
sahilmgandhi 18:6a4db94011d3 121 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 124 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 struct serial_global_data_s {
sahilmgandhi 18:6a4db94011d3 127 uint32_t serial_irq_id;
sahilmgandhi 18:6a4db94011d3 128 gpio_t sw_rts, sw_cts;
sahilmgandhi 18:6a4db94011d3 129 uint8_t rx_irq_set_flow, rx_irq_set_api;
sahilmgandhi 18:6a4db94011d3 130 serial_t *tranferring_obj, *receiving_obj;
sahilmgandhi 18:6a4db94011d3 131 uint32_t async_tx_callback, async_rx_callback;
sahilmgandhi 18:6a4db94011d3 132 int event, wanted_rx_events;
sahilmgandhi 18:6a4db94011d3 133 };
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 static struct serial_global_data_s uart_data[UART_NUM];
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 static const IRQn_Type irq_set_tbl[UART_NUM][IRQ_NUM] = {
sahilmgandhi 18:6a4db94011d3 138 {SCIFRXI0_IRQn, SCIFTXI0_IRQn, SCIFBRI0_IRQn, SCIFERI0_IRQn},
sahilmgandhi 18:6a4db94011d3 139 {SCIFRXI1_IRQn, SCIFTXI1_IRQn, SCIFBRI1_IRQn, SCIFERI1_IRQn},
sahilmgandhi 18:6a4db94011d3 140 {SCIFRXI2_IRQn, SCIFTXI2_IRQn, SCIFBRI2_IRQn, SCIFERI2_IRQn},
sahilmgandhi 18:6a4db94011d3 141 {SCIFRXI3_IRQn, SCIFTXI3_IRQn, SCIFBRI3_IRQn, SCIFERI3_IRQn},
sahilmgandhi 18:6a4db94011d3 142 {SCIFRXI4_IRQn, SCIFTXI4_IRQn, SCIFBRI4_IRQn, SCIFERI4_IRQn},
sahilmgandhi 18:6a4db94011d3 143 {SCIFRXI5_IRQn, SCIFTXI5_IRQn, SCIFBRI5_IRQn, SCIFERI5_IRQn},
sahilmgandhi 18:6a4db94011d3 144 {SCIFRXI6_IRQn, SCIFTXI6_IRQn, SCIFBRI6_IRQn, SCIFERI6_IRQn},
sahilmgandhi 18:6a4db94011d3 145 {SCIFRXI7_IRQn, SCIFTXI7_IRQn, SCIFBRI7_IRQn, SCIFERI7_IRQn}
sahilmgandhi 18:6a4db94011d3 146 };
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 static const IRQHandler hander_set_tbl[UART_NUM][IRQ_NUM] = {
sahilmgandhi 18:6a4db94011d3 149 {uart0_rx_irq, uart0_tx_irq, uart0_er_irq, uart0_er_irq},
sahilmgandhi 18:6a4db94011d3 150 {uart1_rx_irq, uart1_tx_irq, uart1_er_irq, uart1_er_irq},
sahilmgandhi 18:6a4db94011d3 151 {uart2_rx_irq, uart2_tx_irq, uart2_er_irq, uart2_er_irq},
sahilmgandhi 18:6a4db94011d3 152 {uart3_rx_irq, uart3_tx_irq, uart3_er_irq, uart3_er_irq},
sahilmgandhi 18:6a4db94011d3 153 {uart4_rx_irq, uart4_tx_irq, uart4_er_irq, uart4_er_irq},
sahilmgandhi 18:6a4db94011d3 154 {uart5_rx_irq, uart5_tx_irq, uart5_er_irq, uart5_er_irq},
sahilmgandhi 18:6a4db94011d3 155 {uart6_rx_irq, uart6_tx_irq, uart6_er_irq, uart6_er_irq},
sahilmgandhi 18:6a4db94011d3 156 {uart7_rx_irq, uart7_tx_irq, uart7_er_irq, uart7_er_irq}
sahilmgandhi 18:6a4db94011d3 157 };
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 static __IO uint16_t *SCSCR_MATCH[] = {
sahilmgandhi 18:6a4db94011d3 160 &SCSCR_0,
sahilmgandhi 18:6a4db94011d3 161 &SCSCR_1,
sahilmgandhi 18:6a4db94011d3 162 &SCSCR_2,
sahilmgandhi 18:6a4db94011d3 163 &SCSCR_3,
sahilmgandhi 18:6a4db94011d3 164 &SCSCR_4,
sahilmgandhi 18:6a4db94011d3 165 &SCSCR_5,
sahilmgandhi 18:6a4db94011d3 166 &SCSCR_6,
sahilmgandhi 18:6a4db94011d3 167 &SCSCR_7,
sahilmgandhi 18:6a4db94011d3 168 };
sahilmgandhi 18:6a4db94011d3 169
sahilmgandhi 18:6a4db94011d3 170 static __IO uint16_t *SCFSR_MATCH[] = {
sahilmgandhi 18:6a4db94011d3 171 &SCFSR_0,
sahilmgandhi 18:6a4db94011d3 172 &SCFSR_1,
sahilmgandhi 18:6a4db94011d3 173 &SCFSR_2,
sahilmgandhi 18:6a4db94011d3 174 &SCFSR_3,
sahilmgandhi 18:6a4db94011d3 175 &SCFSR_4,
sahilmgandhi 18:6a4db94011d3 176 &SCFSR_5,
sahilmgandhi 18:6a4db94011d3 177 &SCFSR_6,
sahilmgandhi 18:6a4db94011d3 178 &SCFSR_7,
sahilmgandhi 18:6a4db94011d3 179 };
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sahilmgandhi 18:6a4db94011d3 183 volatile uint8_t dummy ;
sahilmgandhi 18:6a4db94011d3 184 int is_stdio_uart = 0;
sahilmgandhi 18:6a4db94011d3 185 // determine the UART to use
sahilmgandhi 18:6a4db94011d3 186 uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 187 uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 188 uint32_t uart = pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 189
sahilmgandhi 18:6a4db94011d3 190 MBED_ASSERT((int)uart != NC);
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 obj->serial.uart = (struct st_scif *)SCIF[uart];
sahilmgandhi 18:6a4db94011d3 193 // enable power
sahilmgandhi 18:6a4db94011d3 194 switch (uart) {
sahilmgandhi 18:6a4db94011d3 195 case UART0:
sahilmgandhi 18:6a4db94011d3 196 CPG.STBCR4 &= ~(1 << 7);
sahilmgandhi 18:6a4db94011d3 197 break;
sahilmgandhi 18:6a4db94011d3 198 case UART1:
sahilmgandhi 18:6a4db94011d3 199 CPG.STBCR4 &= ~(1 << 6);
sahilmgandhi 18:6a4db94011d3 200 break;
sahilmgandhi 18:6a4db94011d3 201 case UART2:
sahilmgandhi 18:6a4db94011d3 202 CPG.STBCR4 &= ~(1 << 5);
sahilmgandhi 18:6a4db94011d3 203 break;
sahilmgandhi 18:6a4db94011d3 204 case UART3:
sahilmgandhi 18:6a4db94011d3 205 CPG.STBCR4 &= ~(1 << 4);
sahilmgandhi 18:6a4db94011d3 206 break;
sahilmgandhi 18:6a4db94011d3 207 case UART4:
sahilmgandhi 18:6a4db94011d3 208 CPG.STBCR4 &= ~(1 << 3);
sahilmgandhi 18:6a4db94011d3 209 break;
sahilmgandhi 18:6a4db94011d3 210 case UART5:
sahilmgandhi 18:6a4db94011d3 211 CPG.STBCR4 &= ~(1 << 2);
sahilmgandhi 18:6a4db94011d3 212 break;
sahilmgandhi 18:6a4db94011d3 213 case UART6:
sahilmgandhi 18:6a4db94011d3 214 CPG.STBCR4 &= ~(1 << 1);
sahilmgandhi 18:6a4db94011d3 215 break;
sahilmgandhi 18:6a4db94011d3 216 case UART7:
sahilmgandhi 18:6a4db94011d3 217 CPG.STBCR4 &= ~(1 << 0);
sahilmgandhi 18:6a4db94011d3 218 break;
sahilmgandhi 18:6a4db94011d3 219 }
sahilmgandhi 18:6a4db94011d3 220 dummy = CPG.STBCR4;
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 /* ==== SCIF initial setting ==== */
sahilmgandhi 18:6a4db94011d3 223 /* ---- Serial control register (SCSCR) setting ---- */
sahilmgandhi 18:6a4db94011d3 224 /* B'00 : Internal CLK */
sahilmgandhi 18:6a4db94011d3 225 obj->serial.uart->SCSCR = 0x0000u; /* SCIF transmitting and receiving operations stop */
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 /* ---- FIFO control register (SCFCR) setting ---- */
sahilmgandhi 18:6a4db94011d3 228 /* Transmit FIFO reset & Receive FIFO data register reset */
sahilmgandhi 18:6a4db94011d3 229 obj->serial.uart->SCFCR = 0x0006;
sahilmgandhi 18:6a4db94011d3 230
sahilmgandhi 18:6a4db94011d3 231 /* ---- Serial status register (SCFSR) setting ---- */
sahilmgandhi 18:6a4db94011d3 232 dummy = obj->serial.uart->SCFSR;
sahilmgandhi 18:6a4db94011d3 233 obj->serial.uart->SCFSR = (dummy & 0xFF6Cu); /* ER,BRK,DR bit clear */
sahilmgandhi 18:6a4db94011d3 234
sahilmgandhi 18:6a4db94011d3 235 /* ---- Line status register (SCLSR) setting ---- */
sahilmgandhi 18:6a4db94011d3 236 /* ORER bit clear */
sahilmgandhi 18:6a4db94011d3 237 obj->serial.uart->SCLSR = 0;
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /* ---- Serial extension mode register (SCEMR) setting ----
sahilmgandhi 18:6a4db94011d3 240 b7 BGDM - Baud rate generator double-speed mode : Normal mode
sahilmgandhi 18:6a4db94011d3 241 b0 ABCS - Base clock select in asynchronous mode : Base clock is 16 times the bit rate */
sahilmgandhi 18:6a4db94011d3 242 obj->serial.uart->SCEMR = 0x0000u;
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 /* ---- Bit rate register (SCBRR) setting ---- */
sahilmgandhi 18:6a4db94011d3 245 serial_baud (obj, 9600);
sahilmgandhi 18:6a4db94011d3 246 serial_format(obj, 8, ParityNone, 1);
sahilmgandhi 18:6a4db94011d3 247
sahilmgandhi 18:6a4db94011d3 248 /* ---- FIFO control register (SCFCR) setting ---- */
sahilmgandhi 18:6a4db94011d3 249 obj->serial.uart->SCFCR = 0x0030u;
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 /* ---- Serial port register (SCSPTR) setting ----
sahilmgandhi 18:6a4db94011d3 252 b1 SPB2IO - Serial port break output : disabled
sahilmgandhi 18:6a4db94011d3 253 b0 SPB2DT - Serial port break data : High-level */
sahilmgandhi 18:6a4db94011d3 254 obj->serial.uart->SCSPTR = 0x0003u; // SPB2IO = 1, SPB2DT = 1
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 /* ---- Line status register (SCLSR) setting ----
sahilmgandhi 18:6a4db94011d3 257 b0 ORER - Overrun error detect : clear */
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 if (obj->serial.uart->SCLSR & 0x0001) {
sahilmgandhi 18:6a4db94011d3 260 obj->serial.uart->SCLSR = 0u; // ORER clear
sahilmgandhi 18:6a4db94011d3 261 }
sahilmgandhi 18:6a4db94011d3 262
sahilmgandhi 18:6a4db94011d3 263 // pinout the chosen uart
sahilmgandhi 18:6a4db94011d3 264 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 265 pinmap_pinout(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 266
sahilmgandhi 18:6a4db94011d3 267 switch (uart) {
sahilmgandhi 18:6a4db94011d3 268 case UART0:
sahilmgandhi 18:6a4db94011d3 269 obj->serial.index = 0;
sahilmgandhi 18:6a4db94011d3 270 break;
sahilmgandhi 18:6a4db94011d3 271 case UART1:
sahilmgandhi 18:6a4db94011d3 272 obj->serial.index = 1;
sahilmgandhi 18:6a4db94011d3 273 break;
sahilmgandhi 18:6a4db94011d3 274 case UART2:
sahilmgandhi 18:6a4db94011d3 275 obj->serial.index = 2;
sahilmgandhi 18:6a4db94011d3 276 break;
sahilmgandhi 18:6a4db94011d3 277 case UART3:
sahilmgandhi 18:6a4db94011d3 278 obj->serial.index = 3;
sahilmgandhi 18:6a4db94011d3 279 break;
sahilmgandhi 18:6a4db94011d3 280 case UART4:
sahilmgandhi 18:6a4db94011d3 281 obj->serial.index = 4;
sahilmgandhi 18:6a4db94011d3 282 break;
sahilmgandhi 18:6a4db94011d3 283 case UART5:
sahilmgandhi 18:6a4db94011d3 284 obj->serial.index = 5;
sahilmgandhi 18:6a4db94011d3 285 break;
sahilmgandhi 18:6a4db94011d3 286 case UART6:
sahilmgandhi 18:6a4db94011d3 287 obj->serial.index = 6;
sahilmgandhi 18:6a4db94011d3 288 break;
sahilmgandhi 18:6a4db94011d3 289 case UART7:
sahilmgandhi 18:6a4db94011d3 290 obj->serial.index = 7;
sahilmgandhi 18:6a4db94011d3 291 break;
sahilmgandhi 18:6a4db94011d3 292 }
sahilmgandhi 18:6a4db94011d3 293 uart_data[obj->serial.index].sw_rts.pin = NC;
sahilmgandhi 18:6a4db94011d3 294 uart_data[obj->serial.index].sw_cts.pin = NC;
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 /* ---- Serial control register (SCSCR) setting ---- */
sahilmgandhi 18:6a4db94011d3 297 /* Setting the TE and RE bits enables the TxD and RxD pins to be used. */
sahilmgandhi 18:6a4db94011d3 298 obj->serial.uart->SCSCR = 0x0070;
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 if (is_stdio_uart) {
sahilmgandhi 18:6a4db94011d3 303 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 304 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 305 }
sahilmgandhi 18:6a4db94011d3 306 }
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 void serial_free(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 309 uart_data[obj->serial.index].serial_irq_id = 0;
sahilmgandhi 18:6a4db94011d3 310 }
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 // serial_baud
sahilmgandhi 18:6a4db94011d3 313 // set the baud rate, taking in to account the current SystemFrequency
sahilmgandhi 18:6a4db94011d3 314 void serial_baud(serial_t *obj, int baudrate) {
sahilmgandhi 18:6a4db94011d3 315 uint16_t DL;
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317 obj->serial.uart->SCSMR &= ~0x0003;
sahilmgandhi 18:6a4db94011d3 318
sahilmgandhi 18:6a4db94011d3 319 if (baudrate > 32552) {
sahilmgandhi 18:6a4db94011d3 320 obj->serial.uart->SCEMR = 0x0081; // BGDM = 1, ABCS = 1
sahilmgandhi 18:6a4db94011d3 321 DL = PCLK / (8 * baudrate);
sahilmgandhi 18:6a4db94011d3 322 if (DL > 0) {
sahilmgandhi 18:6a4db94011d3 323 DL--;
sahilmgandhi 18:6a4db94011d3 324 }
sahilmgandhi 18:6a4db94011d3 325 obj->serial.uart->SCBRR = (uint8_t)DL;
sahilmgandhi 18:6a4db94011d3 326 } else if (baudrate > 16276) {
sahilmgandhi 18:6a4db94011d3 327 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
sahilmgandhi 18:6a4db94011d3 328 obj->serial.uart->SCBRR = PCLK / (16 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 329 } else if (baudrate > 8138) {
sahilmgandhi 18:6a4db94011d3 330 obj->serial.uart->SCEMR = 0x0000;
sahilmgandhi 18:6a4db94011d3 331 obj->serial.uart->SCBRR = PCLK / (32 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 332 } else if (baudrate > 4169) {
sahilmgandhi 18:6a4db94011d3 333 obj->serial.uart->SCSMR |= 0x0001;
sahilmgandhi 18:6a4db94011d3 334 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
sahilmgandhi 18:6a4db94011d3 335 obj->serial.uart->SCBRR = PCLK / (64 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 336 } else if (baudrate > 2034) {
sahilmgandhi 18:6a4db94011d3 337 obj->serial.uart->SCSMR |= 0x0001;
sahilmgandhi 18:6a4db94011d3 338 obj->serial.uart->SCEMR = 0x0000;
sahilmgandhi 18:6a4db94011d3 339 obj->serial.uart->SCBRR = PCLK / (128 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 340 } else if (baudrate > 1017) {
sahilmgandhi 18:6a4db94011d3 341 obj->serial.uart->SCSMR |= 0x0002;
sahilmgandhi 18:6a4db94011d3 342 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
sahilmgandhi 18:6a4db94011d3 343 obj->serial.uart->SCBRR = PCLK / (256 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 344 } else if (baudrate > 508) {
sahilmgandhi 18:6a4db94011d3 345 obj->serial.uart->SCSMR |= 0x0002;
sahilmgandhi 18:6a4db94011d3 346 obj->serial.uart->SCEMR = 0x0000;
sahilmgandhi 18:6a4db94011d3 347 obj->serial.uart->SCBRR = PCLK / (512 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 348 } else if (baudrate > 254) {
sahilmgandhi 18:6a4db94011d3 349 obj->serial.uart->SCSMR |= 0x0003;
sahilmgandhi 18:6a4db94011d3 350 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
sahilmgandhi 18:6a4db94011d3 351 obj->serial.uart->SCBRR = PCLK / (1024 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 352 } else if (baudrate > 127) {
sahilmgandhi 18:6a4db94011d3 353 obj->serial.uart->SCSMR |= 0x0003;
sahilmgandhi 18:6a4db94011d3 354 obj->serial.uart->SCEMR = 0x0000;
sahilmgandhi 18:6a4db94011d3 355 obj->serial.uart->SCBRR = PCLK / (2048 * baudrate) - 1;
sahilmgandhi 18:6a4db94011d3 356 } else {
sahilmgandhi 18:6a4db94011d3 357 obj->serial.uart->SCSMR |= 0x0003;
sahilmgandhi 18:6a4db94011d3 358 obj->serial.uart->SCEMR = 0x0000;
sahilmgandhi 18:6a4db94011d3 359 obj->serial.uart->SCBRR = 0xFFu;
sahilmgandhi 18:6a4db94011d3 360 }
sahilmgandhi 18:6a4db94011d3 361 }
sahilmgandhi 18:6a4db94011d3 362
sahilmgandhi 18:6a4db94011d3 363 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sahilmgandhi 18:6a4db94011d3 364 int parity_enable;
sahilmgandhi 18:6a4db94011d3 365 int parity_select;
sahilmgandhi 18:6a4db94011d3 366
sahilmgandhi 18:6a4db94011d3 367 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
sahilmgandhi 18:6a4db94011d3 368 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 5: 5 data bits ... 3: 8 data bits
sahilmgandhi 18:6a4db94011d3 369 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
sahilmgandhi 18:6a4db94011d3 370 (parity == ParityForced1) || (parity == ParityForced0));
sahilmgandhi 18:6a4db94011d3 371
sahilmgandhi 18:6a4db94011d3 372 stop_bits = (stop_bits == 1)? 0:
sahilmgandhi 18:6a4db94011d3 373 (stop_bits == 2)? 1:
sahilmgandhi 18:6a4db94011d3 374 0; // must not to be
sahilmgandhi 18:6a4db94011d3 375
sahilmgandhi 18:6a4db94011d3 376 data_bits = (data_bits == 8)? 0:
sahilmgandhi 18:6a4db94011d3 377 (data_bits == 7)? 1:
sahilmgandhi 18:6a4db94011d3 378 0; // must not to be
sahilmgandhi 18:6a4db94011d3 379
sahilmgandhi 18:6a4db94011d3 380 switch (parity) {
sahilmgandhi 18:6a4db94011d3 381 case ParityNone:
sahilmgandhi 18:6a4db94011d3 382 parity_enable = 0;
sahilmgandhi 18:6a4db94011d3 383 parity_select = 0;
sahilmgandhi 18:6a4db94011d3 384 break;
sahilmgandhi 18:6a4db94011d3 385 case ParityOdd:
sahilmgandhi 18:6a4db94011d3 386 parity_enable = 1;
sahilmgandhi 18:6a4db94011d3 387 parity_select = 1;
sahilmgandhi 18:6a4db94011d3 388 break;
sahilmgandhi 18:6a4db94011d3 389 case ParityEven:
sahilmgandhi 18:6a4db94011d3 390 parity_enable = 1;
sahilmgandhi 18:6a4db94011d3 391 parity_select = 0;
sahilmgandhi 18:6a4db94011d3 392 break;
sahilmgandhi 18:6a4db94011d3 393 case ParityForced1:
sahilmgandhi 18:6a4db94011d3 394 case ParityForced0:
sahilmgandhi 18:6a4db94011d3 395 default:
sahilmgandhi 18:6a4db94011d3 396 parity_enable = 0;
sahilmgandhi 18:6a4db94011d3 397 parity_select = 0;
sahilmgandhi 18:6a4db94011d3 398 break;
sahilmgandhi 18:6a4db94011d3 399 }
sahilmgandhi 18:6a4db94011d3 400
sahilmgandhi 18:6a4db94011d3 401 obj->serial.uart->SCSMR = (obj->serial.uart->SCSMR & ~0x0078)
sahilmgandhi 18:6a4db94011d3 402 | (data_bits << 6)
sahilmgandhi 18:6a4db94011d3 403 | (parity_enable << 5)
sahilmgandhi 18:6a4db94011d3 404 | (parity_select << 4)
sahilmgandhi 18:6a4db94011d3 405 | (stop_bits << 3);
sahilmgandhi 18:6a4db94011d3 406 }
sahilmgandhi 18:6a4db94011d3 407
sahilmgandhi 18:6a4db94011d3 408 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 409 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 410 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 static void uart_tx_irq(IRQn_Type irq_num, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 413 __IO uint16_t *dmy_rd_scscr;
sahilmgandhi 18:6a4db94011d3 414 __IO uint16_t *dmy_rd_scfsr;
sahilmgandhi 18:6a4db94011d3 415 serial_t *obj;
sahilmgandhi 18:6a4db94011d3 416 int i;
sahilmgandhi 18:6a4db94011d3 417
sahilmgandhi 18:6a4db94011d3 418 dmy_rd_scscr = SCSCR_MATCH[index];
sahilmgandhi 18:6a4db94011d3 419 *dmy_rd_scscr &= 0x007B; // Clear TIE and Write to bit15~8,2 is always 0
sahilmgandhi 18:6a4db94011d3 420 dmy_rd_scfsr = SCFSR_MATCH[index];
sahilmgandhi 18:6a4db94011d3 421 *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0020); // Set TEND
sahilmgandhi 18:6a4db94011d3 422
sahilmgandhi 18:6a4db94011d3 423 obj = uart_data[index].tranferring_obj;
sahilmgandhi 18:6a4db94011d3 424 if (obj) {
sahilmgandhi 18:6a4db94011d3 425 i = obj->tx_buff.length - obj->tx_buff.pos;
sahilmgandhi 18:6a4db94011d3 426 if (0 < i) {
sahilmgandhi 18:6a4db94011d3 427 if (serial_available_buffer(obj) < i) {
sahilmgandhi 18:6a4db94011d3 428 i = serial_available_buffer(obj);
sahilmgandhi 18:6a4db94011d3 429 }
sahilmgandhi 18:6a4db94011d3 430 do {
sahilmgandhi 18:6a4db94011d3 431 uint8_t c = *(uint8_t *)obj->tx_buff.buffer;
sahilmgandhi 18:6a4db94011d3 432 obj->tx_buff.buffer = (uint8_t *)obj->tx_buff.buffer + 1;
sahilmgandhi 18:6a4db94011d3 433 ++obj->tx_buff.pos;
sahilmgandhi 18:6a4db94011d3 434 obj->serial.uart->SCFTDR = c;
sahilmgandhi 18:6a4db94011d3 435 } while (--i);
sahilmgandhi 18:6a4db94011d3 436 serial_put_done(obj);
sahilmgandhi 18:6a4db94011d3 437 } else {
sahilmgandhi 18:6a4db94011d3 438 uart_data[index].tranferring_obj = NULL;
sahilmgandhi 18:6a4db94011d3 439 uart_data[index].event = SERIAL_EVENT_TX_COMPLETE;
sahilmgandhi 18:6a4db94011d3 440 ((void (*)())uart_data[index].async_tx_callback)();
sahilmgandhi 18:6a4db94011d3 441 }
sahilmgandhi 18:6a4db94011d3 442 }
sahilmgandhi 18:6a4db94011d3 443
sahilmgandhi 18:6a4db94011d3 444 irq_handler(uart_data[index].serial_irq_id, TxIrq);
sahilmgandhi 18:6a4db94011d3 445 }
sahilmgandhi 18:6a4db94011d3 446
sahilmgandhi 18:6a4db94011d3 447 static void uart_rx_irq(IRQn_Type irq_num, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 448 __IO uint16_t *dmy_rd_scscr;
sahilmgandhi 18:6a4db94011d3 449 __IO uint16_t *dmy_rd_scfsr;
sahilmgandhi 18:6a4db94011d3 450 serial_t *obj;
sahilmgandhi 18:6a4db94011d3 451 int c;
sahilmgandhi 18:6a4db94011d3 452
sahilmgandhi 18:6a4db94011d3 453 dmy_rd_scscr = SCSCR_MATCH[index];
sahilmgandhi 18:6a4db94011d3 454 *dmy_rd_scscr &= 0x00B3; // Clear RIE,REIE and Write to bit15~8,2 is always 0
sahilmgandhi 18:6a4db94011d3 455 dmy_rd_scfsr = SCFSR_MATCH[index];
sahilmgandhi 18:6a4db94011d3 456 *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0003); // Clear RDF,DR
sahilmgandhi 18:6a4db94011d3 457
sahilmgandhi 18:6a4db94011d3 458 obj = uart_data[index].receiving_obj;
sahilmgandhi 18:6a4db94011d3 459 if (obj) {
sahilmgandhi 18:6a4db94011d3 460 if (obj->serial.uart->SCLSR & 1) {
sahilmgandhi 18:6a4db94011d3 461 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_OVERRUN_ERROR) {
sahilmgandhi 18:6a4db94011d3 462 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 463 uart_data[index].event = SERIAL_EVENT_RX_OVERRUN_ERROR;
sahilmgandhi 18:6a4db94011d3 464 ((void (*)())uart_data[index].async_rx_callback)();
sahilmgandhi 18:6a4db94011d3 465 }
sahilmgandhi 18:6a4db94011d3 466 return;
sahilmgandhi 18:6a4db94011d3 467 }
sahilmgandhi 18:6a4db94011d3 468 c = serial_getc(obj);
sahilmgandhi 18:6a4db94011d3 469 if (c != -1) {
sahilmgandhi 18:6a4db94011d3 470 ((uint8_t *)obj->rx_buff.buffer)[obj->rx_buff.pos] = c;
sahilmgandhi 18:6a4db94011d3 471 ++obj->rx_buff.pos;
sahilmgandhi 18:6a4db94011d3 472 if (c == obj->char_match && ! obj->char_found) {
sahilmgandhi 18:6a4db94011d3 473 obj->char_found = 1;
sahilmgandhi 18:6a4db94011d3 474 if (obj->rx_buff.pos == obj->rx_buff.length) {
sahilmgandhi 18:6a4db94011d3 475 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_COMPLETE) {
sahilmgandhi 18:6a4db94011d3 476 uart_data[index].event = SERIAL_EVENT_RX_COMPLETE;
sahilmgandhi 18:6a4db94011d3 477 }
sahilmgandhi 18:6a4db94011d3 478 }
sahilmgandhi 18:6a4db94011d3 479 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
sahilmgandhi 18:6a4db94011d3 480 uart_data[index].event |= SERIAL_EVENT_RX_CHARACTER_MATCH;
sahilmgandhi 18:6a4db94011d3 481 }
sahilmgandhi 18:6a4db94011d3 482 if (uart_data[index].event) {
sahilmgandhi 18:6a4db94011d3 483 uart_data[index].receiving_obj = NULL;
sahilmgandhi 18:6a4db94011d3 484 ((void (*)())uart_data[index].async_rx_callback)();
sahilmgandhi 18:6a4db94011d3 485 }
sahilmgandhi 18:6a4db94011d3 486 } else if (obj->rx_buff.pos == obj->rx_buff.length) {
sahilmgandhi 18:6a4db94011d3 487 uart_data[index].receiving_obj = NULL;
sahilmgandhi 18:6a4db94011d3 488 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_COMPLETE) {
sahilmgandhi 18:6a4db94011d3 489 uart_data[index].event = SERIAL_EVENT_RX_COMPLETE;
sahilmgandhi 18:6a4db94011d3 490 ((void (*)())uart_data[index].async_rx_callback)();
sahilmgandhi 18:6a4db94011d3 491 }
sahilmgandhi 18:6a4db94011d3 492 }
sahilmgandhi 18:6a4db94011d3 493 } else {
sahilmgandhi 18:6a4db94011d3 494 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 495 if (uart_data[index].wanted_rx_events & (SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR)) {
sahilmgandhi 18:6a4db94011d3 496 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR;
sahilmgandhi 18:6a4db94011d3 497 if (obj->serial.uart->SCFSR & 1 << 2) {
sahilmgandhi 18:6a4db94011d3 498 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR;
sahilmgandhi 18:6a4db94011d3 499 } else if (obj->serial.uart->SCFSR & 1 << 3) {
sahilmgandhi 18:6a4db94011d3 500 uart_data[index].event = SERIAL_EVENT_RX_FRAMING_ERROR;
sahilmgandhi 18:6a4db94011d3 501 }
sahilmgandhi 18:6a4db94011d3 502 ((void (*)())uart_data[index].async_rx_callback)();
sahilmgandhi 18:6a4db94011d3 503 }
sahilmgandhi 18:6a4db94011d3 504 return;
sahilmgandhi 18:6a4db94011d3 505 }
sahilmgandhi 18:6a4db94011d3 506 }
sahilmgandhi 18:6a4db94011d3 507
sahilmgandhi 18:6a4db94011d3 508 irq_handler(uart_data[index].serial_irq_id, RxIrq);
sahilmgandhi 18:6a4db94011d3 509 }
sahilmgandhi 18:6a4db94011d3 510
sahilmgandhi 18:6a4db94011d3 511 static void uart_err_irq(IRQn_Type irq_num, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 512 serial_t *obj = uart_data[index].receiving_obj;
sahilmgandhi 18:6a4db94011d3 513 int was_masked, err_read;
sahilmgandhi 18:6a4db94011d3 514
sahilmgandhi 18:6a4db94011d3 515 if (obj) {
sahilmgandhi 18:6a4db94011d3 516 serial_irq_err_set(obj, 0);
sahilmgandhi 18:6a4db94011d3 517 if (uart_data[index].wanted_rx_events & (SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR)) {
sahilmgandhi 18:6a4db94011d3 518 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR;
sahilmgandhi 18:6a4db94011d3 519 if (obj->serial.uart->SCFSR & 1 << 2) {
sahilmgandhi 18:6a4db94011d3 520 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR;
sahilmgandhi 18:6a4db94011d3 521 } else if (obj->serial.uart->SCFSR & 1 << 3) {
sahilmgandhi 18:6a4db94011d3 522 uart_data[index].event = SERIAL_EVENT_RX_FRAMING_ERROR;
sahilmgandhi 18:6a4db94011d3 523 }
sahilmgandhi 18:6a4db94011d3 524 ((void (*)())uart_data[index].async_rx_callback)();
sahilmgandhi 18:6a4db94011d3 525 }
sahilmgandhi 18:6a4db94011d3 526 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 527
sahilmgandhi 18:6a4db94011d3 528 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 529 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 530 #else
sahilmgandhi 18:6a4db94011d3 531 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 532 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 533 if (obj->serial.uart->SCFSR & 0x93) {
sahilmgandhi 18:6a4db94011d3 534 err_read = obj->serial.uart->SCFSR;
sahilmgandhi 18:6a4db94011d3 535 obj->serial.uart->SCFSR = (err_read & ~0x93);
sahilmgandhi 18:6a4db94011d3 536 }
sahilmgandhi 18:6a4db94011d3 537 if (obj->serial.uart->SCLSR & 1) {
sahilmgandhi 18:6a4db94011d3 538 obj->serial.uart->SCLSR = 0;
sahilmgandhi 18:6a4db94011d3 539 }
sahilmgandhi 18:6a4db94011d3 540 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 541 __enable_irq();
sahilmgandhi 18:6a4db94011d3 542 }
sahilmgandhi 18:6a4db94011d3 543 }
sahilmgandhi 18:6a4db94011d3 544 }
sahilmgandhi 18:6a4db94011d3 545
sahilmgandhi 18:6a4db94011d3 546 /* TX handler */
sahilmgandhi 18:6a4db94011d3 547 static void uart0_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 548 uart_tx_irq(SCIFTXI0_IRQn, 0);
sahilmgandhi 18:6a4db94011d3 549 }
sahilmgandhi 18:6a4db94011d3 550 static void uart1_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 551 uart_tx_irq(SCIFTXI1_IRQn, 1);
sahilmgandhi 18:6a4db94011d3 552 }
sahilmgandhi 18:6a4db94011d3 553 static void uart2_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 554 uart_tx_irq(SCIFTXI2_IRQn, 2);
sahilmgandhi 18:6a4db94011d3 555 }
sahilmgandhi 18:6a4db94011d3 556 static void uart3_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 557 uart_tx_irq(SCIFTXI3_IRQn, 3);
sahilmgandhi 18:6a4db94011d3 558 }
sahilmgandhi 18:6a4db94011d3 559 static void uart4_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 560 uart_tx_irq(SCIFTXI4_IRQn, 4);
sahilmgandhi 18:6a4db94011d3 561 }
sahilmgandhi 18:6a4db94011d3 562 static void uart5_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 563 uart_tx_irq(SCIFTXI5_IRQn, 5);
sahilmgandhi 18:6a4db94011d3 564 }
sahilmgandhi 18:6a4db94011d3 565 static void uart6_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 566 uart_tx_irq(SCIFTXI6_IRQn, 6);
sahilmgandhi 18:6a4db94011d3 567 }
sahilmgandhi 18:6a4db94011d3 568 static void uart7_tx_irq(void) {
sahilmgandhi 18:6a4db94011d3 569 uart_tx_irq(SCIFTXI7_IRQn, 7);
sahilmgandhi 18:6a4db94011d3 570 }
sahilmgandhi 18:6a4db94011d3 571 /* RX handler */
sahilmgandhi 18:6a4db94011d3 572 static void uart0_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 573 uart_rx_irq(SCIFRXI0_IRQn, 0);
sahilmgandhi 18:6a4db94011d3 574 }
sahilmgandhi 18:6a4db94011d3 575 static void uart1_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 576 uart_rx_irq(SCIFRXI1_IRQn, 1);
sahilmgandhi 18:6a4db94011d3 577 }
sahilmgandhi 18:6a4db94011d3 578 static void uart2_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 579 uart_rx_irq(SCIFRXI2_IRQn, 2);
sahilmgandhi 18:6a4db94011d3 580 }
sahilmgandhi 18:6a4db94011d3 581 static void uart3_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 582 uart_rx_irq(SCIFRXI3_IRQn, 3);
sahilmgandhi 18:6a4db94011d3 583 }
sahilmgandhi 18:6a4db94011d3 584 static void uart4_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 585 uart_rx_irq(SCIFRXI4_IRQn, 4);
sahilmgandhi 18:6a4db94011d3 586 }
sahilmgandhi 18:6a4db94011d3 587 static void uart5_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 588 uart_rx_irq(SCIFRXI5_IRQn, 5);
sahilmgandhi 18:6a4db94011d3 589 }
sahilmgandhi 18:6a4db94011d3 590 static void uart6_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 591 uart_rx_irq(SCIFRXI6_IRQn, 6);
sahilmgandhi 18:6a4db94011d3 592 }
sahilmgandhi 18:6a4db94011d3 593 static void uart7_rx_irq(void) {
sahilmgandhi 18:6a4db94011d3 594 uart_rx_irq(SCIFRXI7_IRQn, 7);
sahilmgandhi 18:6a4db94011d3 595 }
sahilmgandhi 18:6a4db94011d3 596 /* Error handler */
sahilmgandhi 18:6a4db94011d3 597 static void uart0_er_irq(void)
sahilmgandhi 18:6a4db94011d3 598 {
sahilmgandhi 18:6a4db94011d3 599 uart_err_irq(SCIFERI0_IRQn, 0);
sahilmgandhi 18:6a4db94011d3 600 }
sahilmgandhi 18:6a4db94011d3 601 static void uart1_er_irq(void)
sahilmgandhi 18:6a4db94011d3 602 {
sahilmgandhi 18:6a4db94011d3 603 uart_err_irq(SCIFERI0_IRQn, 1);
sahilmgandhi 18:6a4db94011d3 604 }
sahilmgandhi 18:6a4db94011d3 605 static void uart2_er_irq(void)
sahilmgandhi 18:6a4db94011d3 606 {
sahilmgandhi 18:6a4db94011d3 607 uart_err_irq(SCIFERI0_IRQn, 2);
sahilmgandhi 18:6a4db94011d3 608 }
sahilmgandhi 18:6a4db94011d3 609 static void uart3_er_irq(void)
sahilmgandhi 18:6a4db94011d3 610 {
sahilmgandhi 18:6a4db94011d3 611 uart_err_irq(SCIFERI0_IRQn, 3);
sahilmgandhi 18:6a4db94011d3 612 }
sahilmgandhi 18:6a4db94011d3 613 static void uart4_er_irq(void)
sahilmgandhi 18:6a4db94011d3 614 {
sahilmgandhi 18:6a4db94011d3 615 uart_err_irq(SCIFERI0_IRQn, 4);
sahilmgandhi 18:6a4db94011d3 616 }
sahilmgandhi 18:6a4db94011d3 617 static void uart5_er_irq(void)
sahilmgandhi 18:6a4db94011d3 618 {
sahilmgandhi 18:6a4db94011d3 619 uart_err_irq(SCIFERI0_IRQn, 5);
sahilmgandhi 18:6a4db94011d3 620 }
sahilmgandhi 18:6a4db94011d3 621 static void uart6_er_irq(void)
sahilmgandhi 18:6a4db94011d3 622 {
sahilmgandhi 18:6a4db94011d3 623 uart_err_irq(SCIFERI0_IRQn, 6);
sahilmgandhi 18:6a4db94011d3 624 }
sahilmgandhi 18:6a4db94011d3 625 static void uart7_er_irq(void)
sahilmgandhi 18:6a4db94011d3 626 {
sahilmgandhi 18:6a4db94011d3 627 uart_err_irq(SCIFERI0_IRQn, 7);
sahilmgandhi 18:6a4db94011d3 628 }
sahilmgandhi 18:6a4db94011d3 629
sahilmgandhi 18:6a4db94011d3 630 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 631 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 632 uart_data[obj->serial.index].serial_irq_id = id;
sahilmgandhi 18:6a4db94011d3 633 }
sahilmgandhi 18:6a4db94011d3 634
sahilmgandhi 18:6a4db94011d3 635 static void serial_irq_set_irq(IRQn_Type IRQn, IRQHandler handler, uint32_t enable)
sahilmgandhi 18:6a4db94011d3 636 {
sahilmgandhi 18:6a4db94011d3 637 if (enable) {
sahilmgandhi 18:6a4db94011d3 638 InterruptHandlerRegister(IRQn, (void (*)(uint32_t))handler);
sahilmgandhi 18:6a4db94011d3 639 GIC_SetPriority(IRQn, 5);
sahilmgandhi 18:6a4db94011d3 640 GIC_EnableIRQ(IRQn);
sahilmgandhi 18:6a4db94011d3 641 } else {
sahilmgandhi 18:6a4db94011d3 642 GIC_DisableIRQ(IRQn);
sahilmgandhi 18:6a4db94011d3 643 }
sahilmgandhi 18:6a4db94011d3 644 }
sahilmgandhi 18:6a4db94011d3 645
sahilmgandhi 18:6a4db94011d3 646 static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 647 IRQn_Type IRQn;
sahilmgandhi 18:6a4db94011d3 648 IRQHandler handler;
sahilmgandhi 18:6a4db94011d3 649
sahilmgandhi 18:6a4db94011d3 650 IRQn = irq_set_tbl[obj->serial.index][irq];
sahilmgandhi 18:6a4db94011d3 651 handler = hander_set_tbl[obj->serial.index][irq];
sahilmgandhi 18:6a4db94011d3 652
sahilmgandhi 18:6a4db94011d3 653 if ((obj->serial.index >= 0) && (obj->serial.index <= 7)) {
sahilmgandhi 18:6a4db94011d3 654 serial_irq_set_irq(IRQn, handler, enable);
sahilmgandhi 18:6a4db94011d3 655 }
sahilmgandhi 18:6a4db94011d3 656 }
sahilmgandhi 18:6a4db94011d3 657
sahilmgandhi 18:6a4db94011d3 658 static void serial_irq_err_set(serial_t *obj, uint32_t enable)
sahilmgandhi 18:6a4db94011d3 659 {
sahilmgandhi 18:6a4db94011d3 660 serial_irq_set_irq(irq_set_tbl[obj->serial.index][2], hander_set_tbl[obj->serial.index][2], enable);
sahilmgandhi 18:6a4db94011d3 661 serial_irq_set_irq(irq_set_tbl[obj->serial.index][3], hander_set_tbl[obj->serial.index][3], enable);
sahilmgandhi 18:6a4db94011d3 662 }
sahilmgandhi 18:6a4db94011d3 663
sahilmgandhi 18:6a4db94011d3 664 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 665 if (RxIrq == irq) {
sahilmgandhi 18:6a4db94011d3 666 uart_data[obj->serial.index].rx_irq_set_api = enable;
sahilmgandhi 18:6a4db94011d3 667 }
sahilmgandhi 18:6a4db94011d3 668 serial_irq_set_internal(obj, irq, enable);
sahilmgandhi 18:6a4db94011d3 669 }
sahilmgandhi 18:6a4db94011d3 670
sahilmgandhi 18:6a4db94011d3 671 static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 672 uart_data[obj->serial.index].rx_irq_set_flow = enable;
sahilmgandhi 18:6a4db94011d3 673 serial_irq_set_internal(obj, RxIrq, enable);
sahilmgandhi 18:6a4db94011d3 674 }
sahilmgandhi 18:6a4db94011d3 675
sahilmgandhi 18:6a4db94011d3 676 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 677 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 678 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 679 int serial_getc(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 680 uint16_t err_read;
sahilmgandhi 18:6a4db94011d3 681 int data;
sahilmgandhi 18:6a4db94011d3 682 int was_masked;
sahilmgandhi 18:6a4db94011d3 683
sahilmgandhi 18:6a4db94011d3 684 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 685 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 686 #else
sahilmgandhi 18:6a4db94011d3 687 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 688 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 689 if (obj->serial.uart->SCFSR & 0x93) {
sahilmgandhi 18:6a4db94011d3 690 err_read = obj->serial.uart->SCFSR;
sahilmgandhi 18:6a4db94011d3 691 obj->serial.uart->SCFSR = (err_read & ~0x93);
sahilmgandhi 18:6a4db94011d3 692 }
sahilmgandhi 18:6a4db94011d3 693 obj->serial.uart->SCSCR |= 0x0040; // Set RIE
sahilmgandhi 18:6a4db94011d3 694 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 695 __enable_irq();
sahilmgandhi 18:6a4db94011d3 696 }
sahilmgandhi 18:6a4db94011d3 697
sahilmgandhi 18:6a4db94011d3 698 if (obj->serial.uart->SCLSR & 0x0001) {
sahilmgandhi 18:6a4db94011d3 699 obj->serial.uart->SCLSR = 0u; // ORER clear
sahilmgandhi 18:6a4db94011d3 700 }
sahilmgandhi 18:6a4db94011d3 701
sahilmgandhi 18:6a4db94011d3 702 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 703 data = obj->serial.uart->SCFRDR & 0xff;
sahilmgandhi 18:6a4db94011d3 704
sahilmgandhi 18:6a4db94011d3 705 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 706 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 707 #else
sahilmgandhi 18:6a4db94011d3 708 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 709 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 710 err_read = obj->serial.uart->SCFSR;
sahilmgandhi 18:6a4db94011d3 711 obj->serial.uart->SCFSR = (err_read & 0xfffD); // Clear RDF
sahilmgandhi 18:6a4db94011d3 712 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 713 __enable_irq();
sahilmgandhi 18:6a4db94011d3 714 }
sahilmgandhi 18:6a4db94011d3 715
sahilmgandhi 18:6a4db94011d3 716 if (err_read & 0x80) {
sahilmgandhi 18:6a4db94011d3 717 data = -1; //err
sahilmgandhi 18:6a4db94011d3 718 }
sahilmgandhi 18:6a4db94011d3 719 return data;
sahilmgandhi 18:6a4db94011d3 720 }
sahilmgandhi 18:6a4db94011d3 721
sahilmgandhi 18:6a4db94011d3 722 void serial_putc(serial_t *obj, int c) {
sahilmgandhi 18:6a4db94011d3 723 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 724 obj->serial.uart->SCFTDR = c;
sahilmgandhi 18:6a4db94011d3 725 serial_put_done(obj);
sahilmgandhi 18:6a4db94011d3 726 }
sahilmgandhi 18:6a4db94011d3 727
sahilmgandhi 18:6a4db94011d3 728 static void serial_put_done(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 729 {
sahilmgandhi 18:6a4db94011d3 730 int was_masked;
sahilmgandhi 18:6a4db94011d3 731 volatile uint16_t dummy_read;
sahilmgandhi 18:6a4db94011d3 732
sahilmgandhi 18:6a4db94011d3 733 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 734 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 735 #else
sahilmgandhi 18:6a4db94011d3 736 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 737 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 738 dummy_read = obj->serial.uart->SCFSR;
sahilmgandhi 18:6a4db94011d3 739 obj->serial.uart->SCFSR = (dummy_read & 0xff9f); // Clear TEND/TDFE
sahilmgandhi 18:6a4db94011d3 740 obj->serial.uart->SCSCR |= 0x0080; // Set TIE
sahilmgandhi 18:6a4db94011d3 741 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 742 __enable_irq();
sahilmgandhi 18:6a4db94011d3 743 }
sahilmgandhi 18:6a4db94011d3 744 }
sahilmgandhi 18:6a4db94011d3 745
sahilmgandhi 18:6a4db94011d3 746 int serial_readable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 747 return ((obj->serial.uart->SCFSR & 0x02) != 0); // RDF
sahilmgandhi 18:6a4db94011d3 748 }
sahilmgandhi 18:6a4db94011d3 749
sahilmgandhi 18:6a4db94011d3 750 int serial_writable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 751 return ((obj->serial.uart->SCFSR & 0x20) != 0); // TDFE
sahilmgandhi 18:6a4db94011d3 752 }
sahilmgandhi 18:6a4db94011d3 753
sahilmgandhi 18:6a4db94011d3 754 void serial_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 755 int was_masked;
sahilmgandhi 18:6a4db94011d3 756 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 757 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 758 #else
sahilmgandhi 18:6a4db94011d3 759 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 760 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 761
sahilmgandhi 18:6a4db94011d3 762 obj->serial.uart->SCFCR |= 0x06; // TFRST = 1, RFRST = 1
sahilmgandhi 18:6a4db94011d3 763 obj->serial.uart->SCFCR &= ~0x06; // TFRST = 0, RFRST = 0
sahilmgandhi 18:6a4db94011d3 764 obj->serial.uart->SCFSR &= ~0x0093u; // ER, BRK, RDF, DR = 0
sahilmgandhi 18:6a4db94011d3 765
sahilmgandhi 18:6a4db94011d3 766 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 767 __enable_irq();
sahilmgandhi 18:6a4db94011d3 768 }
sahilmgandhi 18:6a4db94011d3 769 }
sahilmgandhi 18:6a4db94011d3 770
sahilmgandhi 18:6a4db94011d3 771 void serial_pinout_tx(PinName tx) {
sahilmgandhi 18:6a4db94011d3 772 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 773 }
sahilmgandhi 18:6a4db94011d3 774
sahilmgandhi 18:6a4db94011d3 775 void serial_break_set(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 776 int was_masked;
sahilmgandhi 18:6a4db94011d3 777 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 778 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 779 #else
sahilmgandhi 18:6a4db94011d3 780 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 781 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 782 // TxD Output(L)
sahilmgandhi 18:6a4db94011d3 783 obj->serial.uart->SCSPTR &= ~0x0001u; // SPB2DT = 0
sahilmgandhi 18:6a4db94011d3 784 obj->serial.uart->SCSCR &= ~0x0020u; // TE = 0 (Output disable)
sahilmgandhi 18:6a4db94011d3 785 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 786 __enable_irq();
sahilmgandhi 18:6a4db94011d3 787 }
sahilmgandhi 18:6a4db94011d3 788 }
sahilmgandhi 18:6a4db94011d3 789
sahilmgandhi 18:6a4db94011d3 790 void serial_break_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 791 int was_masked;
sahilmgandhi 18:6a4db94011d3 792 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 793 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 794 #else
sahilmgandhi 18:6a4db94011d3 795 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 796 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 797 obj->serial.uart->SCSCR |= 0x0020u; // TE = 1 (Output enable)
sahilmgandhi 18:6a4db94011d3 798 obj->serial.uart->SCSPTR |= 0x0001u; // SPB2DT = 1
sahilmgandhi 18:6a4db94011d3 799 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 800 __enable_irq();
sahilmgandhi 18:6a4db94011d3 801 }
sahilmgandhi 18:6a4db94011d3 802 }
sahilmgandhi 18:6a4db94011d3 803
sahilmgandhi 18:6a4db94011d3 804 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
sahilmgandhi 18:6a4db94011d3 805 // determine the UART to use
sahilmgandhi 18:6a4db94011d3 806 int was_masked;
sahilmgandhi 18:6a4db94011d3 807
sahilmgandhi 18:6a4db94011d3 808 serial_flow_irq_set(obj, 0);
sahilmgandhi 18:6a4db94011d3 809
sahilmgandhi 18:6a4db94011d3 810 if (type == FlowControlRTSCTS) {
sahilmgandhi 18:6a4db94011d3 811 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 812 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 813 #else
sahilmgandhi 18:6a4db94011d3 814 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 815 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 816 obj->serial.uart->SCFCR = 0x0008u; // CTS/RTS enable
sahilmgandhi 18:6a4db94011d3 817 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 818 __enable_irq();
sahilmgandhi 18:6a4db94011d3 819 }
sahilmgandhi 18:6a4db94011d3 820 pinmap_pinout(rxflow, PinMap_UART_RTS);
sahilmgandhi 18:6a4db94011d3 821 pinmap_pinout(txflow, PinMap_UART_CTS);
sahilmgandhi 18:6a4db94011d3 822 } else {
sahilmgandhi 18:6a4db94011d3 823 #if defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 824 was_masked = __disable_irq_iar();
sahilmgandhi 18:6a4db94011d3 825 #else
sahilmgandhi 18:6a4db94011d3 826 was_masked = __disable_irq();
sahilmgandhi 18:6a4db94011d3 827 #endif /* __ICCARM__ */
sahilmgandhi 18:6a4db94011d3 828 obj->serial.uart->SCFCR = 0x0000u; // CTS/RTS diable
sahilmgandhi 18:6a4db94011d3 829 if (!was_masked) {
sahilmgandhi 18:6a4db94011d3 830 __enable_irq();
sahilmgandhi 18:6a4db94011d3 831 }
sahilmgandhi 18:6a4db94011d3 832 }
sahilmgandhi 18:6a4db94011d3 833 }
sahilmgandhi 18:6a4db94011d3 834
sahilmgandhi 18:6a4db94011d3 835 static uint8_t serial_available_buffer(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 836 {
sahilmgandhi 18:6a4db94011d3 837 return 1;
sahilmgandhi 18:6a4db94011d3 838 /* Faster but unstable way */
sahilmgandhi 18:6a4db94011d3 839 /*
sahilmgandhi 18:6a4db94011d3 840 uint16_t ret = 16 - ((obj->serial.uart->SCFDR >> 8) & 0x1F);
sahilmgandhi 18:6a4db94011d3 841 while (ret == 0) {
sahilmgandhi 18:6a4db94011d3 842 ret = 16 - ((obj->serial.uart->SCFDR >> 8) & 0x1F);
sahilmgandhi 18:6a4db94011d3 843 }
sahilmgandhi 18:6a4db94011d3 844 MBED_ASSERT(0 < ret && ret <= 16);
sahilmgandhi 18:6a4db94011d3 845 return ret;
sahilmgandhi 18:6a4db94011d3 846 */
sahilmgandhi 18:6a4db94011d3 847 }
sahilmgandhi 18:6a4db94011d3 848
sahilmgandhi 18:6a4db94011d3 849 #if DEVICE_SERIAL_ASYNCH
sahilmgandhi 18:6a4db94011d3 850
sahilmgandhi 18:6a4db94011d3 851 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 852 * ASYNCHRONOUS HAL
sahilmgandhi 18:6a4db94011d3 853 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 854
sahilmgandhi 18:6a4db94011d3 855 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
sahilmgandhi 18:6a4db94011d3 856 {
sahilmgandhi 18:6a4db94011d3 857 int i;
sahilmgandhi 18:6a4db94011d3 858 buffer_t *buf = &obj->tx_buff;
sahilmgandhi 18:6a4db94011d3 859 struct serial_global_data_s *data = uart_data + obj->serial.index;
sahilmgandhi 18:6a4db94011d3 860
sahilmgandhi 18:6a4db94011d3 861 if (tx_length == 0) {
sahilmgandhi 18:6a4db94011d3 862 return 0;
sahilmgandhi 18:6a4db94011d3 863 }
sahilmgandhi 18:6a4db94011d3 864
sahilmgandhi 18:6a4db94011d3 865 buf->buffer = (void *)tx;
sahilmgandhi 18:6a4db94011d3 866 buf->length = tx_length * tx_width / 8;
sahilmgandhi 18:6a4db94011d3 867 buf->pos = 0;
sahilmgandhi 18:6a4db94011d3 868 buf->width = tx_width;
sahilmgandhi 18:6a4db94011d3 869 data->tranferring_obj = obj;
sahilmgandhi 18:6a4db94011d3 870 data->async_tx_callback = handler;
sahilmgandhi 18:6a4db94011d3 871 serial_irq_set(obj, TxIrq, 1);
sahilmgandhi 18:6a4db94011d3 872
sahilmgandhi 18:6a4db94011d3 873 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 874 i = buf->length;
sahilmgandhi 18:6a4db94011d3 875 if (serial_available_buffer(obj) < i) {
sahilmgandhi 18:6a4db94011d3 876 i = serial_available_buffer(obj);
sahilmgandhi 18:6a4db94011d3 877 }
sahilmgandhi 18:6a4db94011d3 878 do {
sahilmgandhi 18:6a4db94011d3 879 uint8_t c = *(uint8_t *)buf->buffer;
sahilmgandhi 18:6a4db94011d3 880 obj->tx_buff.buffer = (uint8_t *)obj->tx_buff.buffer + 1;
sahilmgandhi 18:6a4db94011d3 881 ++buf->pos;
sahilmgandhi 18:6a4db94011d3 882 obj->serial.uart->SCFTDR = c;
sahilmgandhi 18:6a4db94011d3 883 } while (--i);
sahilmgandhi 18:6a4db94011d3 884 serial_put_done(obj);
sahilmgandhi 18:6a4db94011d3 885
sahilmgandhi 18:6a4db94011d3 886 return buf->length;
sahilmgandhi 18:6a4db94011d3 887 }
sahilmgandhi 18:6a4db94011d3 888
sahilmgandhi 18:6a4db94011d3 889 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
sahilmgandhi 18:6a4db94011d3 890 {
sahilmgandhi 18:6a4db94011d3 891 buffer_t *buf = &obj->rx_buff;
sahilmgandhi 18:6a4db94011d3 892 struct serial_global_data_s *data = uart_data + obj->serial.index;
sahilmgandhi 18:6a4db94011d3 893
sahilmgandhi 18:6a4db94011d3 894 if (rx_length == 0) {
sahilmgandhi 18:6a4db94011d3 895 return;
sahilmgandhi 18:6a4db94011d3 896 }
sahilmgandhi 18:6a4db94011d3 897
sahilmgandhi 18:6a4db94011d3 898 buf->buffer = rx;
sahilmgandhi 18:6a4db94011d3 899 buf->length = rx_length * rx_width / 8;
sahilmgandhi 18:6a4db94011d3 900 buf->pos = 0;
sahilmgandhi 18:6a4db94011d3 901 buf->width = rx_width;
sahilmgandhi 18:6a4db94011d3 902 obj->char_match = char_match;
sahilmgandhi 18:6a4db94011d3 903 obj->char_found = 0;
sahilmgandhi 18:6a4db94011d3 904 data->receiving_obj = obj;
sahilmgandhi 18:6a4db94011d3 905 data->async_rx_callback = handler;
sahilmgandhi 18:6a4db94011d3 906 data->event = 0;
sahilmgandhi 18:6a4db94011d3 907 data->wanted_rx_events = event;
sahilmgandhi 18:6a4db94011d3 908
sahilmgandhi 18:6a4db94011d3 909 serial_irq_set(obj, RxIrq, 1);
sahilmgandhi 18:6a4db94011d3 910 serial_irq_err_set(obj, 1);
sahilmgandhi 18:6a4db94011d3 911 }
sahilmgandhi 18:6a4db94011d3 912
sahilmgandhi 18:6a4db94011d3 913 uint8_t serial_tx_active(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 914 {
sahilmgandhi 18:6a4db94011d3 915 return uart_data[obj->serial.index].tranferring_obj != NULL;
sahilmgandhi 18:6a4db94011d3 916 }
sahilmgandhi 18:6a4db94011d3 917
sahilmgandhi 18:6a4db94011d3 918 uint8_t serial_rx_active(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 919 {
sahilmgandhi 18:6a4db94011d3 920 return uart_data[obj->serial.index].receiving_obj != NULL;
sahilmgandhi 18:6a4db94011d3 921 }
sahilmgandhi 18:6a4db94011d3 922
sahilmgandhi 18:6a4db94011d3 923 int serial_irq_handler_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 924 {
sahilmgandhi 18:6a4db94011d3 925 return uart_data[obj->serial.index].event;
sahilmgandhi 18:6a4db94011d3 926 }
sahilmgandhi 18:6a4db94011d3 927
sahilmgandhi 18:6a4db94011d3 928 void serial_tx_abort_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 929 {
sahilmgandhi 18:6a4db94011d3 930 uart_data[obj->serial.index].tranferring_obj = NULL;
sahilmgandhi 18:6a4db94011d3 931 obj->serial.uart->SCFCR |= 1 << 2;
sahilmgandhi 18:6a4db94011d3 932 obj->serial.uart->SCFCR &= ~(1 << 2);
sahilmgandhi 18:6a4db94011d3 933 }
sahilmgandhi 18:6a4db94011d3 934
sahilmgandhi 18:6a4db94011d3 935 void serial_rx_abort_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 936 {
sahilmgandhi 18:6a4db94011d3 937 uart_data[obj->serial.index].receiving_obj = NULL;
sahilmgandhi 18:6a4db94011d3 938 obj->serial.uart->SCFCR |= 1 << 1;
sahilmgandhi 18:6a4db94011d3 939 obj->serial.uart->SCFCR &= ~(1 << 1);
sahilmgandhi 18:6a4db94011d3 940 }
sahilmgandhi 18:6a4db94011d3 941
sahilmgandhi 18:6a4db94011d3 942 #endif