MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_RENESAS/TARGET_RZ_A1H/gpio_irq_api.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include <stddef.h>
sahilmgandhi 18:6a4db94011d3 17
sahilmgandhi 18:6a4db94011d3 18 #include "gpio_irq_api.h"
sahilmgandhi 18:6a4db94011d3 19 #include "intc_iodefine.h"
sahilmgandhi 18:6a4db94011d3 20 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 21 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 22 #include "gpio_addrdefine.h"
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 #define CHANNEL_NUM 8
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 static void gpio_irq0(void);
sahilmgandhi 18:6a4db94011d3 27 static void gpio_irq1(void);
sahilmgandhi 18:6a4db94011d3 28 static void gpio_irq2(void);
sahilmgandhi 18:6a4db94011d3 29 static void gpio_irq3(void);
sahilmgandhi 18:6a4db94011d3 30 static void gpio_irq4(void);
sahilmgandhi 18:6a4db94011d3 31 static void gpio_irq5(void);
sahilmgandhi 18:6a4db94011d3 32 static void gpio_irq6(void);
sahilmgandhi 18:6a4db94011d3 33 static void gpio_irq7(void);
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 static gpio_irq_t *channel_obj[CHANNEL_NUM] = {NULL};
sahilmgandhi 18:6a4db94011d3 36 static gpio_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 37 static const int nIRQn_h = 32;
sahilmgandhi 18:6a4db94011d3 38 extern PinName gpio_multi_guard;
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 enum {
sahilmgandhi 18:6a4db94011d3 41 IRQ0,IRQ1,
sahilmgandhi 18:6a4db94011d3 42 IRQ2,IRQ3,
sahilmgandhi 18:6a4db94011d3 43 IRQ4,IRQ5,
sahilmgandhi 18:6a4db94011d3 44 IRQ6,IRQ7,
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 } IRQNo;
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 static const IRQHandler irq_tbl[CHANNEL_NUM] = {
sahilmgandhi 18:6a4db94011d3 49 &gpio_irq0,
sahilmgandhi 18:6a4db94011d3 50 &gpio_irq1,
sahilmgandhi 18:6a4db94011d3 51 &gpio_irq2,
sahilmgandhi 18:6a4db94011d3 52 &gpio_irq3,
sahilmgandhi 18:6a4db94011d3 53 &gpio_irq4,
sahilmgandhi 18:6a4db94011d3 54 &gpio_irq5,
sahilmgandhi 18:6a4db94011d3 55 &gpio_irq6,
sahilmgandhi 18:6a4db94011d3 56 &gpio_irq7,
sahilmgandhi 18:6a4db94011d3 57 };
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 static const PinMap PinMap_IRQ[] = {
sahilmgandhi 18:6a4db94011d3 60 {P1_0, IRQ0, 4}, {P1_1, IRQ1, 4}, {P1_2, IRQ2, 4},
sahilmgandhi 18:6a4db94011d3 61 {P1_3, IRQ3, 4}, {P1_4, IRQ4, 4}, {P1_5, IRQ5, 4},
sahilmgandhi 18:6a4db94011d3 62 {P1_6, IRQ6, 4}, {P1_7, IRQ7, 4}, {P1_8, IRQ2, 3},
sahilmgandhi 18:6a4db94011d3 63 {P1_9, IRQ3, 3}, {P1_10, IRQ4, 3}, {P1_11, IRQ5, 3}, // 11
sahilmgandhi 18:6a4db94011d3 64 {P2_0, IRQ5, 6}, {P2_12, IRQ6, 6}, {P2_13, IRQ7, 8},
sahilmgandhi 18:6a4db94011d3 65 {P2_14, IRQ0, 8}, {P2_15, IRQ1, 8}, // 16
sahilmgandhi 18:6a4db94011d3 66 {P3_0, IRQ2, 3}, {P3_1, IRQ6, 3}, {P3_3, IRQ4, 3},
sahilmgandhi 18:6a4db94011d3 67 {P3_9, IRQ6, 8}, // 20
sahilmgandhi 18:6a4db94011d3 68 {P4_8, IRQ0, 8}, {P4_9, IRQ1, 8}, {P4_10, IRQ2, 8},
sahilmgandhi 18:6a4db94011d3 69 {P4_11, IRQ3, 8}, {P4_12, IRQ4, 8}, {P4_13, IRQ5, 8},
sahilmgandhi 18:6a4db94011d3 70 {P4_14, IRQ6, 8}, {P4_15, IRQ7, 8}, // 28
sahilmgandhi 18:6a4db94011d3 71 {P5_6, IRQ6, 6}, {P5_8, IRQ0, 2}, {P5_9, IRQ2, 4}, // 31
sahilmgandhi 18:6a4db94011d3 72 {P6_0, IRQ5, 6}, {P6_1, IRQ4, 4}, {P6_2, IRQ7, 4},
sahilmgandhi 18:6a4db94011d3 73 {P6_3, IRQ2, 4}, {P6_4, IRQ3, 4}, {P6_8, IRQ0, 8},
sahilmgandhi 18:6a4db94011d3 74 {P6_9, IRQ1, 8}, {P6_10, IRQ2, 8}, {P6_11, IRQ3, 8},
sahilmgandhi 18:6a4db94011d3 75 {P6_12, IRQ4, 8}, {P6_13, IRQ5, 8}, {P6_14, IRQ6, 8},
sahilmgandhi 18:6a4db94011d3 76 {P6_15, IRQ7, 8}, // 44
sahilmgandhi 18:6a4db94011d3 77 {P7_8, IRQ1, 8}, {P7_9, IRQ0, 8}, {P7_10, IRQ2, 8},
sahilmgandhi 18:6a4db94011d3 78 {P7_11, IRQ3, 8}, {P7_12, IRQ4, 8}, {P7_13, IRQ5, 8},
sahilmgandhi 18:6a4db94011d3 79 {P7_14, IRQ6, 8}, // 51
sahilmgandhi 18:6a4db94011d3 80 {P8_2, IRQ0, 5}, {P8_3, IRQ1, 6}, {P8_7, IRQ5, 4},
sahilmgandhi 18:6a4db94011d3 81 {P9_1, IRQ0, 4}, // 55
sahilmgandhi 18:6a4db94011d3 82 {P11_12,IRQ3, 3}, {P11_15,IRQ1, 3}, // 57
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 {NC, NC, 0}
sahilmgandhi 18:6a4db94011d3 85 };
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 static void handle_interrupt_in(int irq_num) {
sahilmgandhi 18:6a4db94011d3 88 uint16_t irqs;
sahilmgandhi 18:6a4db94011d3 89 uint16_t edge_req;
sahilmgandhi 18:6a4db94011d3 90 gpio_irq_t *obj;
sahilmgandhi 18:6a4db94011d3 91 gpio_irq_event irq_event;
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 irqs = INTCIRQRR;
sahilmgandhi 18:6a4db94011d3 94 if (irqs & (1 << irq_num)) {
sahilmgandhi 18:6a4db94011d3 95 obj = channel_obj[irq_num];
sahilmgandhi 18:6a4db94011d3 96 if (obj != NULL) {
sahilmgandhi 18:6a4db94011d3 97 edge_req = ((INTCICR1 >> (obj->ch * 2)) & 3);
sahilmgandhi 18:6a4db94011d3 98 if (edge_req == 1) {
sahilmgandhi 18:6a4db94011d3 99 irq_event = IRQ_FALL;
sahilmgandhi 18:6a4db94011d3 100 } else if (edge_req == 2) {
sahilmgandhi 18:6a4db94011d3 101 irq_event = IRQ_RISE;
sahilmgandhi 18:6a4db94011d3 102 } else {
sahilmgandhi 18:6a4db94011d3 103 uint32_t mask = (1 << (obj->pin & 0x0F));
sahilmgandhi 18:6a4db94011d3 104 __I uint32_t *reg_in = (volatile uint32_t *) PPR((int)PINGROUP(obj->pin));
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 if ((*reg_in & mask) == 0) {
sahilmgandhi 18:6a4db94011d3 107 irq_event = IRQ_FALL;
sahilmgandhi 18:6a4db94011d3 108 } else {
sahilmgandhi 18:6a4db94011d3 109 irq_event = IRQ_RISE;
sahilmgandhi 18:6a4db94011d3 110 }
sahilmgandhi 18:6a4db94011d3 111 }
sahilmgandhi 18:6a4db94011d3 112 irq_handler(obj->port, irq_event);
sahilmgandhi 18:6a4db94011d3 113 }
sahilmgandhi 18:6a4db94011d3 114 INTCIRQRR &= ~(1 << irq_num);
sahilmgandhi 18:6a4db94011d3 115 }
sahilmgandhi 18:6a4db94011d3 116 }
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 static void gpio_irq0(void) {
sahilmgandhi 18:6a4db94011d3 119 handle_interrupt_in(0);
sahilmgandhi 18:6a4db94011d3 120 }
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 static void gpio_irq1(void) {
sahilmgandhi 18:6a4db94011d3 123 handle_interrupt_in(1);
sahilmgandhi 18:6a4db94011d3 124 }
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 static void gpio_irq2(void) {
sahilmgandhi 18:6a4db94011d3 127 handle_interrupt_in(2);
sahilmgandhi 18:6a4db94011d3 128 }
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 static void gpio_irq3(void) {
sahilmgandhi 18:6a4db94011d3 131 handle_interrupt_in(3);
sahilmgandhi 18:6a4db94011d3 132 }
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 static void gpio_irq4(void) {
sahilmgandhi 18:6a4db94011d3 135 handle_interrupt_in(4);
sahilmgandhi 18:6a4db94011d3 136 }
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 static void gpio_irq5(void) {
sahilmgandhi 18:6a4db94011d3 139 handle_interrupt_in(5);
sahilmgandhi 18:6a4db94011d3 140 }
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 static void gpio_irq6(void) {
sahilmgandhi 18:6a4db94011d3 143 handle_interrupt_in(6);
sahilmgandhi 18:6a4db94011d3 144 }
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 static void gpio_irq7(void) {
sahilmgandhi 18:6a4db94011d3 147 handle_interrupt_in(7);
sahilmgandhi 18:6a4db94011d3 148 }
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 151 int shift;
sahilmgandhi 18:6a4db94011d3 152 if (pin == NC) return -1;
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 obj->ch = pinmap_peripheral(pin, PinMap_IRQ);
sahilmgandhi 18:6a4db94011d3 155 obj->pin = (int)pin ;
sahilmgandhi 18:6a4db94011d3 156 obj->port = (int)id ;
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158 shift = obj->ch*2;
sahilmgandhi 18:6a4db94011d3 159 channel_obj[obj->ch] = obj;
sahilmgandhi 18:6a4db94011d3 160 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 161
sahilmgandhi 18:6a4db94011d3 162 pinmap_pinout(pin, PinMap_IRQ);
sahilmgandhi 18:6a4db94011d3 163 gpio_multi_guard = pin; /* Set multi guard */
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 // INTC settings
sahilmgandhi 18:6a4db94011d3 166 InterruptHandlerRegister((IRQn_Type)(nIRQn_h+obj->ch), (void (*)(uint32_t))irq_tbl[obj->ch]);
sahilmgandhi 18:6a4db94011d3 167 INTCICR1 &= ~(0x3 << shift);
sahilmgandhi 18:6a4db94011d3 168 GIC_SetPriority((IRQn_Type)(nIRQn_h+obj->ch), 5);
sahilmgandhi 18:6a4db94011d3 169 obj->int_enable = 1;
sahilmgandhi 18:6a4db94011d3 170 __enable_irq();
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 return 0;
sahilmgandhi 18:6a4db94011d3 173 }
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 void gpio_irq_free(gpio_irq_t *obj) {
sahilmgandhi 18:6a4db94011d3 176 channel_obj[obj->ch] = NULL;
sahilmgandhi 18:6a4db94011d3 177 }
sahilmgandhi 18:6a4db94011d3 178
sahilmgandhi 18:6a4db94011d3 179 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 180 int shift = obj->ch*2;
sahilmgandhi 18:6a4db94011d3 181 uint16_t val = event == IRQ_RISE ? 2 :
sahilmgandhi 18:6a4db94011d3 182 event == IRQ_FALL ? 1 : 0;
sahilmgandhi 18:6a4db94011d3 183 uint16_t work_icr_val;
sahilmgandhi 18:6a4db94011d3 184
sahilmgandhi 18:6a4db94011d3 185 /* check edge interrupt setting */
sahilmgandhi 18:6a4db94011d3 186 work_icr_val = INTCICR1;
sahilmgandhi 18:6a4db94011d3 187 if (enable == 1) {
sahilmgandhi 18:6a4db94011d3 188 /* Set interrupt serect */
sahilmgandhi 18:6a4db94011d3 189 work_icr_val |= (val << shift);
sahilmgandhi 18:6a4db94011d3 190 } else {
sahilmgandhi 18:6a4db94011d3 191 /* Clear interrupt serect */
sahilmgandhi 18:6a4db94011d3 192 work_icr_val &= ~(val << shift);
sahilmgandhi 18:6a4db94011d3 193 }
sahilmgandhi 18:6a4db94011d3 194
sahilmgandhi 18:6a4db94011d3 195 if ((work_icr_val & (3 << shift)) == 0) {
sahilmgandhi 18:6a4db94011d3 196 /* No edge interrupt setting */
sahilmgandhi 18:6a4db94011d3 197 GIC_DisableIRQ((IRQn_Type)(nIRQn_h+obj->ch));
sahilmgandhi 18:6a4db94011d3 198 /* Clear Interrupt flags */
sahilmgandhi 18:6a4db94011d3 199 INTCIRQRR &= ~(1 << obj->ch);
sahilmgandhi 18:6a4db94011d3 200 INTCICR1 = work_icr_val;
sahilmgandhi 18:6a4db94011d3 201 } else if (obj->int_enable == 1) {
sahilmgandhi 18:6a4db94011d3 202 INTCICR1 = work_icr_val;
sahilmgandhi 18:6a4db94011d3 203 GIC_EnableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
sahilmgandhi 18:6a4db94011d3 204 } else {
sahilmgandhi 18:6a4db94011d3 205 INTCICR1 = work_icr_val;
sahilmgandhi 18:6a4db94011d3 206 }
sahilmgandhi 18:6a4db94011d3 207 }
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 void gpio_irq_enable(gpio_irq_t *obj) {
sahilmgandhi 18:6a4db94011d3 210 int shift = obj->ch*2;
sahilmgandhi 18:6a4db94011d3 211 uint16_t work_icr_val = INTCICR1;
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 /* check edge interrupt setting */
sahilmgandhi 18:6a4db94011d3 214 if ((work_icr_val & (3 << shift)) != 0) {
sahilmgandhi 18:6a4db94011d3 215 GIC_EnableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
sahilmgandhi 18:6a4db94011d3 216 }
sahilmgandhi 18:6a4db94011d3 217 obj->int_enable = 1;
sahilmgandhi 18:6a4db94011d3 218 }
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 void gpio_irq_disable(gpio_irq_t *obj) {
sahilmgandhi 18:6a4db94011d3 221 GIC_DisableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
sahilmgandhi 18:6a4db94011d3 222 obj->int_enable = 0;
sahilmgandhi 18:6a4db94011d3 223 }
sahilmgandhi 18:6a4db94011d3 224