Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #ifndef MBED_OBJECTS_H
sahilmgandhi 18:6a4db94011d3 17 #define MBED_OBJECTS_H
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 20 #include "PortNames.h"
sahilmgandhi 18:6a4db94011d3 21 #include "PeripheralNames.h"
sahilmgandhi 18:6a4db94011d3 22 #include "PinNames.h"
sahilmgandhi 18:6a4db94011d3 23 #include "gpio_object.h"
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 26 extern "C" {
sahilmgandhi 18:6a4db94011d3 27 #endif
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 struct gpio_irq_s {
sahilmgandhi 18:6a4db94011d3 30 uint32_t port;
sahilmgandhi 18:6a4db94011d3 31 uint32_t pin;
sahilmgandhi 18:6a4db94011d3 32 uint32_t ch;
sahilmgandhi 18:6a4db94011d3 33 };
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 struct port_s {
sahilmgandhi 18:6a4db94011d3 36 __IO uint32_t *reg_dir;
sahilmgandhi 18:6a4db94011d3 37 __IO uint32_t *reg_out;
sahilmgandhi 18:6a4db94011d3 38 __I uint32_t *reg_in;
sahilmgandhi 18:6a4db94011d3 39 PortName port;
sahilmgandhi 18:6a4db94011d3 40 uint32_t mask;
sahilmgandhi 18:6a4db94011d3 41 };
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 struct pwmout_s {
sahilmgandhi 18:6a4db94011d3 44 PWMName pwm;
sahilmgandhi 18:6a4db94011d3 45 uint8_t mr;
sahilmgandhi 18:6a4db94011d3 46 };
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 struct serial_s {
sahilmgandhi 18:6a4db94011d3 49 LPC_USART_T *uart;
sahilmgandhi 18:6a4db94011d3 50 int index;
sahilmgandhi 18:6a4db94011d3 51 };
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 struct analogin_s {
sahilmgandhi 18:6a4db94011d3 54 LPC_ADC_T *adc;
sahilmgandhi 18:6a4db94011d3 55 uint8_t num;
sahilmgandhi 18:6a4db94011d3 56 uint8_t ch;
sahilmgandhi 18:6a4db94011d3 57 };
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 struct dac_s {
sahilmgandhi 18:6a4db94011d3 60 DACName dac;
sahilmgandhi 18:6a4db94011d3 61 };
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 struct can_s {
sahilmgandhi 18:6a4db94011d3 64 LPC_CCAN_T *dev;
sahilmgandhi 18:6a4db94011d3 65 };
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 struct i2c_s {
sahilmgandhi 18:6a4db94011d3 68 LPC_I2C_T *i2c;
sahilmgandhi 18:6a4db94011d3 69 };
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 struct spi_s {
sahilmgandhi 18:6a4db94011d3 72 LPC_SSP_T *spi;
sahilmgandhi 18:6a4db94011d3 73 };
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 76 }
sahilmgandhi 18:6a4db94011d3 77 #endif
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 #endif