MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC15XX/serial_api.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 // math.h required for floating point operations for baud rate calculation
sahilmgandhi 18:6a4db94011d3 17 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 18 #include <math.h>
sahilmgandhi 18:6a4db94011d3 19 #include <string.h>
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 22 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 23 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 24 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 27 * INITIALIZATION
sahilmgandhi 18:6a4db94011d3 28 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 29 #define UART_NUM 3
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 static const SWM_Map SWM_UART_TX[] = {
sahilmgandhi 18:6a4db94011d3 32 {0, 0}, // Pin assign register0, 7:0bit
sahilmgandhi 18:6a4db94011d3 33 {1, 8}, // Pin assign register1, 15:8bit
sahilmgandhi 18:6a4db94011d3 34 {2, 16}, // Pin assign register2, 23:16bit
sahilmgandhi 18:6a4db94011d3 35 };
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 static const SWM_Map SWM_UART_RX[] = {
sahilmgandhi 18:6a4db94011d3 38 {0, 8},
sahilmgandhi 18:6a4db94011d3 39 {1, 16},
sahilmgandhi 18:6a4db94011d3 40 {2, 24},
sahilmgandhi 18:6a4db94011d3 41 };
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 static const SWM_Map SWM_UART_RTS[] = {
sahilmgandhi 18:6a4db94011d3 44 {0, 16},
sahilmgandhi 18:6a4db94011d3 45 {1, 24},
sahilmgandhi 18:6a4db94011d3 46 {3, 0}, // not available
sahilmgandhi 18:6a4db94011d3 47 };
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 static const SWM_Map SWM_UART_CTS[] = {
sahilmgandhi 18:6a4db94011d3 50 {0, 24},
sahilmgandhi 18:6a4db94011d3 51 {2, 0},
sahilmgandhi 18:6a4db94011d3 52 {3, 8} // not available
sahilmgandhi 18:6a4db94011d3 53 };
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 // bit flags for used UARTs
sahilmgandhi 18:6a4db94011d3 56 static unsigned char uart_used = 0;
sahilmgandhi 18:6a4db94011d3 57 static int get_available_uart(void) {
sahilmgandhi 18:6a4db94011d3 58 int i;
sahilmgandhi 18:6a4db94011d3 59 for (i=0; i<3; i++) {
sahilmgandhi 18:6a4db94011d3 60 if ((uart_used & (1 << i)) == 0)
sahilmgandhi 18:6a4db94011d3 61 return i;
sahilmgandhi 18:6a4db94011d3 62 }
sahilmgandhi 18:6a4db94011d3 63 return -1;
sahilmgandhi 18:6a4db94011d3 64 }
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 #define UART_EN (0x01<<0)
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68 #define CTS_DELTA (0x01<<5)
sahilmgandhi 18:6a4db94011d3 69 #define RXBRK (0x01<<10)
sahilmgandhi 18:6a4db94011d3 70 #define DELTA_RXBRK (0x01<<11)
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 #define RXRDY (0x01<<0)
sahilmgandhi 18:6a4db94011d3 73 #define TXRDY (0x01<<2)
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 #define TXBRKEN (0x01<<1)
sahilmgandhi 18:6a4db94011d3 76 #define CTSEN (0x01<<9)
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 static uint32_t UARTSysClk;
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 static uint32_t serial_irq_ids[UART_NUM] = {0};
sahilmgandhi 18:6a4db94011d3 81 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 84 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 static void switch_pin(const SWM_Map *swm, PinName pn)
sahilmgandhi 18:6a4db94011d3 87 {
sahilmgandhi 18:6a4db94011d3 88 uint32_t regVal;
sahilmgandhi 18:6a4db94011d3 89 if (pn != NC)
sahilmgandhi 18:6a4db94011d3 90 {
sahilmgandhi 18:6a4db94011d3 91 // check if we have any function mapped to this pin already and remove it
sahilmgandhi 18:6a4db94011d3 92 for (uint32_t n = 0; n < sizeof(LPC_SWM->PINASSIGN)/sizeof(*LPC_SWM->PINASSIGN); n ++) {
sahilmgandhi 18:6a4db94011d3 93 regVal = LPC_SWM->PINASSIGN[n];
sahilmgandhi 18:6a4db94011d3 94 for (uint32_t j = 0; j <= 24; j += 8) {
sahilmgandhi 18:6a4db94011d3 95 if (((regVal >> j) & 0xFF) == (uint32_t)pn)
sahilmgandhi 18:6a4db94011d3 96 regVal |= (0xFF << j);
sahilmgandhi 18:6a4db94011d3 97 }
sahilmgandhi 18:6a4db94011d3 98 LPC_SWM->PINASSIGN[n] = regVal;
sahilmgandhi 18:6a4db94011d3 99 }
sahilmgandhi 18:6a4db94011d3 100 }
sahilmgandhi 18:6a4db94011d3 101 // now map it
sahilmgandhi 18:6a4db94011d3 102 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
sahilmgandhi 18:6a4db94011d3 103 LPC_SWM->PINASSIGN[swm->n] = regVal | (pn << swm->offset);
sahilmgandhi 18:6a4db94011d3 104 }
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sahilmgandhi 18:6a4db94011d3 107 int is_stdio_uart = 0;
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 int uart_n = get_available_uart();
sahilmgandhi 18:6a4db94011d3 110 if (uart_n == -1) {
sahilmgandhi 18:6a4db94011d3 111 error("No available UART");
sahilmgandhi 18:6a4db94011d3 112 }
sahilmgandhi 18:6a4db94011d3 113 obj->index = uart_n;
sahilmgandhi 18:6a4db94011d3 114 switch (uart_n) {
sahilmgandhi 18:6a4db94011d3 115 case 0: obj->uart = (LPC_USART0_Type *)LPC_USART0_BASE; break;
sahilmgandhi 18:6a4db94011d3 116 case 1: obj->uart = (LPC_USART0_Type *)LPC_USART1_BASE; break;
sahilmgandhi 18:6a4db94011d3 117 case 2: obj->uart = (LPC_USART0_Type *)LPC_USART2_BASE; break;
sahilmgandhi 18:6a4db94011d3 118 }
sahilmgandhi 18:6a4db94011d3 119 uart_used |= (1 << uart_n);
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 switch_pin(&SWM_UART_TX[uart_n], tx);
sahilmgandhi 18:6a4db94011d3 122 switch_pin(&SWM_UART_RX[uart_n], rx);
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 /* uart clock divided by 6 */
sahilmgandhi 18:6a4db94011d3 125 LPC_SYSCON->UARTCLKDIV =6;
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 /* disable uart interrupts */
sahilmgandhi 18:6a4db94011d3 128 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 /* Enable UART clock */
sahilmgandhi 18:6a4db94011d3 131 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (17 + uart_n));
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 /* Peripheral reset control to UART, a "1" bring it out of reset. */
sahilmgandhi 18:6a4db94011d3 134 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (17 + uart_n));
sahilmgandhi 18:6a4db94011d3 135 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (17 + uart_n));
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 // set default baud rate and format
sahilmgandhi 18:6a4db94011d3 140 serial_baud (obj, 9600);
sahilmgandhi 18:6a4db94011d3 141 serial_format(obj, 8, ParityNone, 1);
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 /* Clear all status bits. */
sahilmgandhi 18:6a4db94011d3 144 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 /* enable uart interrupts */
sahilmgandhi 18:6a4db94011d3 147 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 /* Enable UART */
sahilmgandhi 18:6a4db94011d3 150 obj->uart->CFG |= UART_EN;
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 if (is_stdio_uart) {
sahilmgandhi 18:6a4db94011d3 155 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 156 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 157 }
sahilmgandhi 18:6a4db94011d3 158 }
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 void serial_free(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 161 uart_used &= ~(1 << obj->index);
sahilmgandhi 18:6a4db94011d3 162 serial_irq_ids[obj->index] = 0;
sahilmgandhi 18:6a4db94011d3 163 }
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 // serial_baud
sahilmgandhi 18:6a4db94011d3 166 // set the baud rate, taking in to account the current SystemFrequency
sahilmgandhi 18:6a4db94011d3 167 void serial_baud(serial_t *obj, int baudrate) {
sahilmgandhi 18:6a4db94011d3 168 /* Integer divider:
sahilmgandhi 18:6a4db94011d3 169 BRG = UARTSysClk/(Baudrate * 16) - 1
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 Frational divider:
sahilmgandhi 18:6a4db94011d3 172 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 where
sahilmgandhi 18:6a4db94011d3 175 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
sahilmgandhi 18:6a4db94011d3 178 register is 0xFF.
sahilmgandhi 18:6a4db94011d3 179 (2) In ADD register value, depending on the value of UartSysClk,
sahilmgandhi 18:6a4db94011d3 180 baudrate, BRG register value, and SUB register value, be careful
sahilmgandhi 18:6a4db94011d3 181 about the order of multiplier and divider and make sure any
sahilmgandhi 18:6a4db94011d3 182 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
sahilmgandhi 18:6a4db94011d3 183 down below one(integer 0).
sahilmgandhi 18:6a4db94011d3 184 (3) ADD should be always less than SUB.
sahilmgandhi 18:6a4db94011d3 185 */
sahilmgandhi 18:6a4db94011d3 186 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 // To use of the fractional baud rate generator, you must write 0xFF to the DIV
sahilmgandhi 18:6a4db94011d3 189 // value to yield a denominator value of 256. All other values are not supported.
sahilmgandhi 18:6a4db94011d3 190 LPC_SYSCON->FRGCTRL = 0xFF;
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 LPC_SYSCON->FRGCTRL |= ( ( ((UARTSysClk / 16) * (0xFF + 1)) /
sahilmgandhi 18:6a4db94011d3 193 (baudrate * (obj->uart->BRG + 1))
sahilmgandhi 18:6a4db94011d3 194 ) - (0xFF + 1) ) << 8;
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 }
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sahilmgandhi 18:6a4db94011d3 199 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
sahilmgandhi 18:6a4db94011d3 200 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
sahilmgandhi 18:6a4db94011d3 201 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 stop_bits -= 1;
sahilmgandhi 18:6a4db94011d3 204 data_bits -= 7;
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 int paritysel;
sahilmgandhi 18:6a4db94011d3 207 switch (parity) {
sahilmgandhi 18:6a4db94011d3 208 case ParityNone: paritysel = 0; break;
sahilmgandhi 18:6a4db94011d3 209 case ParityEven: paritysel = 2; break;
sahilmgandhi 18:6a4db94011d3 210 case ParityOdd : paritysel = 3; break;
sahilmgandhi 18:6a4db94011d3 211 default:
sahilmgandhi 18:6a4db94011d3 212 break;
sahilmgandhi 18:6a4db94011d3 213 }
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 // First disable the the usart as described in documentation and then enable while updating CFG
sahilmgandhi 18:6a4db94011d3 216
sahilmgandhi 18:6a4db94011d3 217 // 24.6.1 USART Configuration register
sahilmgandhi 18:6a4db94011d3 218 // Remark: If software needs to change configuration values, the following sequence should
sahilmgandhi 18:6a4db94011d3 219 // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
sahilmgandhi 18:6a4db94011d3 220 // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
sahilmgandhi 18:6a4db94011d3 221 // Write the new configuration value, with the ENABLE bit set to 1.
sahilmgandhi 18:6a4db94011d3 222 obj->uart->CFG &= ~(1 << 0);
sahilmgandhi 18:6a4db94011d3 223
sahilmgandhi 18:6a4db94011d3 224 obj->uart->CFG = (1 << 0) // this will enable the usart
sahilmgandhi 18:6a4db94011d3 225 | (data_bits << 2)
sahilmgandhi 18:6a4db94011d3 226 | (paritysel << 4)
sahilmgandhi 18:6a4db94011d3 227 | (stop_bits << 6);
sahilmgandhi 18:6a4db94011d3 228 }
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 231 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 232 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 233 static inline void uart_irq(SerialIrq irq_type, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 234 if (serial_irq_ids[index] != 0)
sahilmgandhi 18:6a4db94011d3 235 irq_handler(serial_irq_ids[index], irq_type);
sahilmgandhi 18:6a4db94011d3 236 }
sahilmgandhi 18:6a4db94011d3 237
sahilmgandhi 18:6a4db94011d3 238 void uart0_irq() {uart_irq((LPC_USART0->INTSTAT & 1) ? RxIrq : TxIrq, 0);}
sahilmgandhi 18:6a4db94011d3 239 void uart1_irq() {uart_irq((LPC_USART1->INTSTAT & 1) ? RxIrq : TxIrq, 1);}
sahilmgandhi 18:6a4db94011d3 240 void uart2_irq() {uart_irq((LPC_USART2->INTSTAT & 1) ? RxIrq : TxIrq, 2);}
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 243 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 244 serial_irq_ids[obj->index] = id;
sahilmgandhi 18:6a4db94011d3 245 }
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 248 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 249 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 250 switch ((int)obj->uart) {
sahilmgandhi 18:6a4db94011d3 251 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
sahilmgandhi 18:6a4db94011d3 252 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
sahilmgandhi 18:6a4db94011d3 253 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
sahilmgandhi 18:6a4db94011d3 254 }
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 if (enable) {
sahilmgandhi 18:6a4db94011d3 257 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 258 obj->uart->INTENSET |= (1 << ((irq == RxIrq) ? 0 : 2));
sahilmgandhi 18:6a4db94011d3 259 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 260 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 261 } else { // disable
sahilmgandhi 18:6a4db94011d3 262 int all_disabled = 0;
sahilmgandhi 18:6a4db94011d3 263 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
sahilmgandhi 18:6a4db94011d3 264 obj->uart->INTENCLR |= (1 << ((irq == RxIrq) ? 0 : 2)); // disable the interrupt
sahilmgandhi 18:6a4db94011d3 265 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
sahilmgandhi 18:6a4db94011d3 266 if (all_disabled)
sahilmgandhi 18:6a4db94011d3 267 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 268 }
sahilmgandhi 18:6a4db94011d3 269 }
sahilmgandhi 18:6a4db94011d3 270
sahilmgandhi 18:6a4db94011d3 271 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 272 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 273 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 274 int serial_getc(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 275 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 276 return obj->uart->RXDATA;
sahilmgandhi 18:6a4db94011d3 277 }
sahilmgandhi 18:6a4db94011d3 278
sahilmgandhi 18:6a4db94011d3 279 void serial_putc(serial_t *obj, int c) {
sahilmgandhi 18:6a4db94011d3 280 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 281 obj->uart->TXDATA = c;
sahilmgandhi 18:6a4db94011d3 282 }
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284 int serial_readable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 285 return obj->uart->STAT & RXRDY;
sahilmgandhi 18:6a4db94011d3 286 }
sahilmgandhi 18:6a4db94011d3 287
sahilmgandhi 18:6a4db94011d3 288 int serial_writable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 289 return obj->uart->STAT & TXRDY;
sahilmgandhi 18:6a4db94011d3 290 }
sahilmgandhi 18:6a4db94011d3 291
sahilmgandhi 18:6a4db94011d3 292 void serial_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 293 // [TODO]
sahilmgandhi 18:6a4db94011d3 294 }
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 void serial_pinout_tx(PinName tx) {
sahilmgandhi 18:6a4db94011d3 297
sahilmgandhi 18:6a4db94011d3 298 }
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 void serial_break_set(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 301 obj->uart->CTRL |= TXBRKEN;
sahilmgandhi 18:6a4db94011d3 302 }
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 void serial_break_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 305 obj->uart->CTRL &= ~TXBRKEN;
sahilmgandhi 18:6a4db94011d3 306 }
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
sahilmgandhi 18:6a4db94011d3 309 if ((FlowControlNone == type || FlowControlRTS == type)) txflow = NC;
sahilmgandhi 18:6a4db94011d3 310 if ((FlowControlNone == type || FlowControlCTS == type)) rxflow = NC;
sahilmgandhi 18:6a4db94011d3 311 switch_pin(&SWM_UART_RTS[obj->index], rxflow);
sahilmgandhi 18:6a4db94011d3 312 switch_pin(&SWM_UART_CTS[obj->index], txflow);
sahilmgandhi 18:6a4db94011d3 313 if (txflow == NC) obj->uart->CFG &= ~CTSEN;
sahilmgandhi 18:6a4db94011d3 314 else obj->uart->CFG |= CTSEN;
sahilmgandhi 18:6a4db94011d3 315 }
sahilmgandhi 18:6a4db94011d3 316