MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/startup_LPC13xx.S@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* File: startup_ARMCM3.s
sahilmgandhi 18:6a4db94011d3 2 * Purpose: startup file for Cortex-M3/M4 devices. Should use with
sahilmgandhi 18:6a4db94011d3 3 * GNU Tools for ARM Embedded Processors
sahilmgandhi 18:6a4db94011d3 4 * Version: V1.1
sahilmgandhi 18:6a4db94011d3 5 * Date: 17 June 2011
sahilmgandhi 18:6a4db94011d3 6 *
sahilmgandhi 18:6a4db94011d3 7 * Copyright (C) 2011 ARM Limited. All rights reserved.
sahilmgandhi 18:6a4db94011d3 8 * ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4
sahilmgandhi 18:6a4db94011d3 9 * processor based microcontrollers. This file can be freely distributed
sahilmgandhi 18:6a4db94011d3 10 * within development tools that are supporting such ARM based processors.
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 13 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 15 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
sahilmgandhi 18:6a4db94011d3 16 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 17 */
sahilmgandhi 18:6a4db94011d3 18 .syntax unified
sahilmgandhi 18:6a4db94011d3 19 .arch armv7-m
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 /* Memory Model
sahilmgandhi 18:6a4db94011d3 22 The HEAP starts at the end of the DATA section and grows upward.
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 The STACK starts at the end of the RAM and grows downward.
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 The HEAP and stack STACK are only checked at compile time:
sahilmgandhi 18:6a4db94011d3 27 (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 This is just a check for the bare minimum for the Heap+Stack area before
sahilmgandhi 18:6a4db94011d3 30 aborting compilation, it is not the run time limit:
sahilmgandhi 18:6a4db94011d3 31 Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
sahilmgandhi 18:6a4db94011d3 32 */
sahilmgandhi 18:6a4db94011d3 33 .section .stack
sahilmgandhi 18:6a4db94011d3 34 .align 3
sahilmgandhi 18:6a4db94011d3 35 #ifdef __STACK_SIZE
sahilmgandhi 18:6a4db94011d3 36 .equ Stack_Size, __STACK_SIZE
sahilmgandhi 18:6a4db94011d3 37 #else
sahilmgandhi 18:6a4db94011d3 38 .equ Stack_Size, 0xc00
sahilmgandhi 18:6a4db94011d3 39 #endif
sahilmgandhi 18:6a4db94011d3 40 .globl __StackTop
sahilmgandhi 18:6a4db94011d3 41 .globl __StackLimit
sahilmgandhi 18:6a4db94011d3 42 __StackLimit:
sahilmgandhi 18:6a4db94011d3 43 .space Stack_Size
sahilmgandhi 18:6a4db94011d3 44 .size __StackLimit, . - __StackLimit
sahilmgandhi 18:6a4db94011d3 45 __StackTop:
sahilmgandhi 18:6a4db94011d3 46 .size __StackTop, . - __StackTop
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 .section .heap
sahilmgandhi 18:6a4db94011d3 49 .align 3
sahilmgandhi 18:6a4db94011d3 50 #ifdef __HEAP_SIZE
sahilmgandhi 18:6a4db94011d3 51 .equ Heap_Size, __HEAP_SIZE
sahilmgandhi 18:6a4db94011d3 52 #else
sahilmgandhi 18:6a4db94011d3 53 .equ Heap_Size, 0x800
sahilmgandhi 18:6a4db94011d3 54 #endif
sahilmgandhi 18:6a4db94011d3 55 .globl __HeapBase
sahilmgandhi 18:6a4db94011d3 56 .globl __HeapLimit
sahilmgandhi 18:6a4db94011d3 57 __HeapBase:
sahilmgandhi 18:6a4db94011d3 58 .space Heap_Size
sahilmgandhi 18:6a4db94011d3 59 .size __HeapBase, . - __HeapBase
sahilmgandhi 18:6a4db94011d3 60 __HeapLimit:
sahilmgandhi 18:6a4db94011d3 61 .size __HeapLimit, . - __HeapLimit
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 .section .isr_vector
sahilmgandhi 18:6a4db94011d3 64 .align 2
sahilmgandhi 18:6a4db94011d3 65 .globl __isr_vector
sahilmgandhi 18:6a4db94011d3 66 __isr_vector:
sahilmgandhi 18:6a4db94011d3 67 .long __StackTop /* Top of Stack */
sahilmgandhi 18:6a4db94011d3 68 .long Reset_Handler /* Reset Handler */
sahilmgandhi 18:6a4db94011d3 69 .long NMI_Handler /* NMI Handler */
sahilmgandhi 18:6a4db94011d3 70 .long HardFault_Handler /* Hard Fault Handler */
sahilmgandhi 18:6a4db94011d3 71 .long MemManage_Handler /* MPU Fault Handler */
sahilmgandhi 18:6a4db94011d3 72 .long BusFault_Handler /* Bus Fault Handler */
sahilmgandhi 18:6a4db94011d3 73 .long UsageFault_Handler /* Usage Fault Handler */
sahilmgandhi 18:6a4db94011d3 74 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 75 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 76 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 77 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 78 .long SVC_Handler /* SVCall Handler */
sahilmgandhi 18:6a4db94011d3 79 .long DebugMon_Handler /* Debug Monitor Handler */
sahilmgandhi 18:6a4db94011d3 80 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 81 .long PendSV_Handler /* PendSV Handler */
sahilmgandhi 18:6a4db94011d3 82 .long SysTick_Handler /* SysTick Handler */
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 .long PIN_INT0_Handler /* All GPIO pin can be routed to PIN_INTx */
sahilmgandhi 18:6a4db94011d3 86 .long PIN_INT1_Handler
sahilmgandhi 18:6a4db94011d3 87 .long PIN_INT2_Handler
sahilmgandhi 18:6a4db94011d3 88 .long PIN_INT3_Handler
sahilmgandhi 18:6a4db94011d3 89 .long PIN_INT4_Handler
sahilmgandhi 18:6a4db94011d3 90 .long PIN_INT5_Handler
sahilmgandhi 18:6a4db94011d3 91 .long PIN_INT6_Handler
sahilmgandhi 18:6a4db94011d3 92 .long PIN_INT7_Handler
sahilmgandhi 18:6a4db94011d3 93 .long GINT0_Handler
sahilmgandhi 18:6a4db94011d3 94 .long GINT1_Handler /* PIO0 (0:7) */
sahilmgandhi 18:6a4db94011d3 95 .long 0
sahilmgandhi 18:6a4db94011d3 96 .long 0
sahilmgandhi 18:6a4db94011d3 97 .long OSTIMER_Handler
sahilmgandhi 18:6a4db94011d3 98 .long 0
sahilmgandhi 18:6a4db94011d3 99 .long SSP1_Handler /* SSP1 */
sahilmgandhi 18:6a4db94011d3 100 .long I2C_Handler /* I2C */
sahilmgandhi 18:6a4db94011d3 101 .long CT16B0_Handler /* 16-bit Timer0 */
sahilmgandhi 18:6a4db94011d3 102 .long CT16B1_Handler /* 16-bit Timer1 */
sahilmgandhi 18:6a4db94011d3 103 .long CT32B0_Handler /* 32-bit Timer0 */
sahilmgandhi 18:6a4db94011d3 104 .long CT32B1_Handler /* 32-bit Timer1 */
sahilmgandhi 18:6a4db94011d3 105 .long SSP0_Handler /* SSP0 */
sahilmgandhi 18:6a4db94011d3 106 .long USART_Handler /* USART */
sahilmgandhi 18:6a4db94011d3 107 .long USB_Handler /* USB IRQ */
sahilmgandhi 18:6a4db94011d3 108 .long USB_FIQHandler /* USB FIQ */
sahilmgandhi 18:6a4db94011d3 109 .long ADC_Handler /* A/D Converter */
sahilmgandhi 18:6a4db94011d3 110 .long WDT_Handler /* Watchdog timer */
sahilmgandhi 18:6a4db94011d3 111 .long BOD_Handler /* Brown Out Detect */
sahilmgandhi 18:6a4db94011d3 112 .long FMC_Handler /* IP2111 Flash Memory Controller */
sahilmgandhi 18:6a4db94011d3 113 .long OSCFAIL_Handler /* OSC FAIL */
sahilmgandhi 18:6a4db94011d3 114 .long PVTCIRCUIT_Handler /* PVT CIRCUIT */
sahilmgandhi 18:6a4db94011d3 115 .long USBWakeup_Handler /* USB wake up */
sahilmgandhi 18:6a4db94011d3 116 .long 0
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 .size __isr_vector, . - __isr_vector
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 .text
sahilmgandhi 18:6a4db94011d3 121 .thumb
sahilmgandhi 18:6a4db94011d3 122 .thumb_func
sahilmgandhi 18:6a4db94011d3 123 .align 2
sahilmgandhi 18:6a4db94011d3 124 .globl Reset_Handler
sahilmgandhi 18:6a4db94011d3 125 .type Reset_Handler, %function
sahilmgandhi 18:6a4db94011d3 126 Reset_Handler:
sahilmgandhi 18:6a4db94011d3 127 /* Loop to copy data from read only memory to RAM. The ranges
sahilmgandhi 18:6a4db94011d3 128 * of copy from/to are specified by following symbols evaluated in
sahilmgandhi 18:6a4db94011d3 129 * linker script.
sahilmgandhi 18:6a4db94011d3 130 * _etext: End of code section, i.e., begin of data sections to copy from.
sahilmgandhi 18:6a4db94011d3 131 * __data_start__/__data_end__: RAM address range that data should be
sahilmgandhi 18:6a4db94011d3 132 * copied to. Both must be aligned to 4 bytes boundary. */
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 ldr r1, =__etext
sahilmgandhi 18:6a4db94011d3 135 ldr r2, =__data_start__
sahilmgandhi 18:6a4db94011d3 136 ldr r3, =__data_end__
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 .Lflash_to_ram_loop:
sahilmgandhi 18:6a4db94011d3 139 cmp r2, r3
sahilmgandhi 18:6a4db94011d3 140 ittt lt
sahilmgandhi 18:6a4db94011d3 141 ldrlt r0, [r1], #4
sahilmgandhi 18:6a4db94011d3 142 strlt r0, [r2], #4
sahilmgandhi 18:6a4db94011d3 143 blt .Lflash_to_ram_loop
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 ldr r0, =SystemInit
sahilmgandhi 18:6a4db94011d3 146 blx r0
sahilmgandhi 18:6a4db94011d3 147 ldr r0, =_start
sahilmgandhi 18:6a4db94011d3 148 bx r0
sahilmgandhi 18:6a4db94011d3 149 .pool
sahilmgandhi 18:6a4db94011d3 150 .size Reset_Handler, . - Reset_Handler
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 .text
sahilmgandhi 18:6a4db94011d3 153 /* Macro to define default handlers. Default handler
sahilmgandhi 18:6a4db94011d3 154 * will be weak symbol and just dead loops. They can be
sahilmgandhi 18:6a4db94011d3 155 * overwritten by other handlers */
sahilmgandhi 18:6a4db94011d3 156 .macro def_default_handler handler_name
sahilmgandhi 18:6a4db94011d3 157 .align 1
sahilmgandhi 18:6a4db94011d3 158 .thumb_func
sahilmgandhi 18:6a4db94011d3 159 .weak \handler_name
sahilmgandhi 18:6a4db94011d3 160 .type \handler_name, %function
sahilmgandhi 18:6a4db94011d3 161 \handler_name :
sahilmgandhi 18:6a4db94011d3 162 b .
sahilmgandhi 18:6a4db94011d3 163 .size \handler_name, . - \handler_name
sahilmgandhi 18:6a4db94011d3 164 .endm
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 def_default_handler NMI_Handler
sahilmgandhi 18:6a4db94011d3 167 def_default_handler HardFault_Handler
sahilmgandhi 18:6a4db94011d3 168 def_default_handler MemManage_Handler
sahilmgandhi 18:6a4db94011d3 169 def_default_handler BusFault_Handler
sahilmgandhi 18:6a4db94011d3 170 def_default_handler UsageFault_Handler
sahilmgandhi 18:6a4db94011d3 171 def_default_handler SVC_Handler
sahilmgandhi 18:6a4db94011d3 172 def_default_handler DebugMon_Handler
sahilmgandhi 18:6a4db94011d3 173 def_default_handler PendSV_Handler
sahilmgandhi 18:6a4db94011d3 174 def_default_handler SysTick_Handler
sahilmgandhi 18:6a4db94011d3 175 def_default_handler Default_Handler
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 .macro def_irq_default_handler handler_name
sahilmgandhi 18:6a4db94011d3 178 .weak \handler_name
sahilmgandhi 18:6a4db94011d3 179 .set \handler_name, Default_Handler
sahilmgandhi 18:6a4db94011d3 180 .endm
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 def_irq_default_handler PIN_INT0_Handler
sahilmgandhi 18:6a4db94011d3 183 def_irq_default_handler PIN_INT1_Handler
sahilmgandhi 18:6a4db94011d3 184 def_irq_default_handler PIN_INT2_Handler
sahilmgandhi 18:6a4db94011d3 185 def_irq_default_handler PIN_INT3_Handler
sahilmgandhi 18:6a4db94011d3 186 def_irq_default_handler PIN_INT4_Handler
sahilmgandhi 18:6a4db94011d3 187 def_irq_default_handler PIN_INT5_Handler
sahilmgandhi 18:6a4db94011d3 188 def_irq_default_handler PIN_INT6_Handler
sahilmgandhi 18:6a4db94011d3 189 def_irq_default_handler PIN_INT7_Handler
sahilmgandhi 18:6a4db94011d3 190 def_irq_default_handler GINT0_Handler
sahilmgandhi 18:6a4db94011d3 191 def_irq_default_handler GINT1_Handler
sahilmgandhi 18:6a4db94011d3 192 def_irq_default_handler OSTIMER_Handler
sahilmgandhi 18:6a4db94011d3 193 def_irq_default_handler SSP1_Handler
sahilmgandhi 18:6a4db94011d3 194 def_irq_default_handler I2C_Handler
sahilmgandhi 18:6a4db94011d3 195 def_irq_default_handler CT16B0_Handler
sahilmgandhi 18:6a4db94011d3 196 def_irq_default_handler CT16B1_Handler
sahilmgandhi 18:6a4db94011d3 197 def_irq_default_handler CT32B0_Handler
sahilmgandhi 18:6a4db94011d3 198 def_irq_default_handler CT32B1_Handler
sahilmgandhi 18:6a4db94011d3 199 def_irq_default_handler SSP0_Handler
sahilmgandhi 18:6a4db94011d3 200 def_irq_default_handler USART_Handler
sahilmgandhi 18:6a4db94011d3 201 def_irq_default_handler USB_Handler
sahilmgandhi 18:6a4db94011d3 202 def_irq_default_handler USB_FIQHandler
sahilmgandhi 18:6a4db94011d3 203 def_irq_default_handler ADC_Handler
sahilmgandhi 18:6a4db94011d3 204 def_irq_default_handler WDT_Handler
sahilmgandhi 18:6a4db94011d3 205 def_irq_default_handler BOD_Handler
sahilmgandhi 18:6a4db94011d3 206 def_irq_default_handler FMC_Handler
sahilmgandhi 18:6a4db94011d3 207 def_irq_default_handler OSCFAIL_Handler
sahilmgandhi 18:6a4db94011d3 208 def_irq_default_handler PVTCIRCUIT_Handler
sahilmgandhi 18:6a4db94011d3 209 def_irq_default_handler USBWakeup_Handler
sahilmgandhi 18:6a4db94011d3 210 def_irq_default_handler DEF_IRQHandler
sahilmgandhi 18:6a4db94011d3 211
sahilmgandhi 18:6a4db94011d3 212 .end
sahilmgandhi 18:6a4db94011d3 213