Mouse code for the MacroRat
mbed-dev/targets/TARGET_NXP/TARGET_LPC11UXX/spi_api.c@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2013 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #include "mbed_assert.h" |
sahilmgandhi | 18:6a4db94011d3 | 17 | #include <math.h> |
sahilmgandhi | 18:6a4db94011d3 | 18 | #include "spi_api.h" |
sahilmgandhi | 18:6a4db94011d3 | 19 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 20 | #include "pinmap.h" |
sahilmgandhi | 18:6a4db94011d3 | 21 | #include "mbed_error.h" |
sahilmgandhi | 18:6a4db94011d3 | 22 | #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform |
sahilmgandhi | 18:6a4db94011d3 | 23 | |
sahilmgandhi | 18:6a4db94011d3 | 24 | static inline int ssp_disable(spi_t *obj); |
sahilmgandhi | 18:6a4db94011d3 | 25 | static inline int ssp_enable(spi_t *obj); |
sahilmgandhi | 18:6a4db94011d3 | 26 | |
sahilmgandhi | 18:6a4db94011d3 | 27 | void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) { |
sahilmgandhi | 18:6a4db94011d3 | 28 | // determine the SPI to use |
sahilmgandhi | 18:6a4db94011d3 | 29 | SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI); |
sahilmgandhi | 18:6a4db94011d3 | 30 | SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO); |
sahilmgandhi | 18:6a4db94011d3 | 31 | SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK); |
sahilmgandhi | 18:6a4db94011d3 | 32 | SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL); |
sahilmgandhi | 18:6a4db94011d3 | 33 | SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso); |
sahilmgandhi | 18:6a4db94011d3 | 34 | SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel); |
sahilmgandhi | 18:6a4db94011d3 | 35 | |
sahilmgandhi | 18:6a4db94011d3 | 36 | obj->spi = (LPC_SSPx_Type*)pinmap_merge(spi_data, spi_cntl); |
sahilmgandhi | 18:6a4db94011d3 | 37 | MBED_ASSERT((int)obj->spi != NC); |
sahilmgandhi | 18:6a4db94011d3 | 38 | |
sahilmgandhi | 18:6a4db94011d3 | 39 | // enable power and clocking |
sahilmgandhi | 18:6a4db94011d3 | 40 | switch ((int)obj->spi) { |
sahilmgandhi | 18:6a4db94011d3 | 41 | case SPI_0: |
sahilmgandhi | 18:6a4db94011d3 | 42 | LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11; |
sahilmgandhi | 18:6a4db94011d3 | 43 | LPC_SYSCON->SSP0CLKDIV = 0x01; |
sahilmgandhi | 18:6a4db94011d3 | 44 | LPC_SYSCON->PRESETCTRL |= 1 << 0; |
sahilmgandhi | 18:6a4db94011d3 | 45 | break; |
sahilmgandhi | 18:6a4db94011d3 | 46 | case SPI_1: |
sahilmgandhi | 18:6a4db94011d3 | 47 | LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18; |
sahilmgandhi | 18:6a4db94011d3 | 48 | LPC_SYSCON->SSP1CLKDIV = 0x01; |
sahilmgandhi | 18:6a4db94011d3 | 49 | LPC_SYSCON->PRESETCTRL |= 1 << 2; |
sahilmgandhi | 18:6a4db94011d3 | 50 | break; |
sahilmgandhi | 18:6a4db94011d3 | 51 | } |
sahilmgandhi | 18:6a4db94011d3 | 52 | |
sahilmgandhi | 18:6a4db94011d3 | 53 | // pin out the spi pins |
sahilmgandhi | 18:6a4db94011d3 | 54 | pinmap_pinout(mosi, PinMap_SPI_MOSI); |
sahilmgandhi | 18:6a4db94011d3 | 55 | pinmap_pinout(miso, PinMap_SPI_MISO); |
sahilmgandhi | 18:6a4db94011d3 | 56 | pinmap_pinout(sclk, PinMap_SPI_SCLK); |
sahilmgandhi | 18:6a4db94011d3 | 57 | if (ssel != NC) { |
sahilmgandhi | 18:6a4db94011d3 | 58 | pinmap_pinout(ssel, PinMap_SPI_SSEL); |
sahilmgandhi | 18:6a4db94011d3 | 59 | } |
sahilmgandhi | 18:6a4db94011d3 | 60 | } |
sahilmgandhi | 18:6a4db94011d3 | 61 | |
sahilmgandhi | 18:6a4db94011d3 | 62 | void spi_free(spi_t *obj) {} |
sahilmgandhi | 18:6a4db94011d3 | 63 | |
sahilmgandhi | 18:6a4db94011d3 | 64 | void spi_format(spi_t *obj, int bits, int mode, int slave) { |
sahilmgandhi | 18:6a4db94011d3 | 65 | MBED_ASSERT((bits >= 4 && bits <= 16) || (mode >= 0 && mode <= 3)); |
sahilmgandhi | 18:6a4db94011d3 | 66 | |
sahilmgandhi | 18:6a4db94011d3 | 67 | ssp_disable(obj); |
sahilmgandhi | 18:6a4db94011d3 | 68 | |
sahilmgandhi | 18:6a4db94011d3 | 69 | int polarity = (mode & 0x2) ? 1 : 0; |
sahilmgandhi | 18:6a4db94011d3 | 70 | int phase = (mode & 0x1) ? 1 : 0; |
sahilmgandhi | 18:6a4db94011d3 | 71 | |
sahilmgandhi | 18:6a4db94011d3 | 72 | // set it up |
sahilmgandhi | 18:6a4db94011d3 | 73 | int DSS = bits - 1; // DSS (data select size) |
sahilmgandhi | 18:6a4db94011d3 | 74 | int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity |
sahilmgandhi | 18:6a4db94011d3 | 75 | int SPH = (phase) ? 1 : 0; // SPH - clock out phase |
sahilmgandhi | 18:6a4db94011d3 | 76 | |
sahilmgandhi | 18:6a4db94011d3 | 77 | int FRF = 0; // FRF (frame format) = SPI |
sahilmgandhi | 18:6a4db94011d3 | 78 | uint32_t tmp = obj->spi->CR0; |
sahilmgandhi | 18:6a4db94011d3 | 79 | tmp &= ~(0xFFFF); |
sahilmgandhi | 18:6a4db94011d3 | 80 | tmp |= DSS << 0 |
sahilmgandhi | 18:6a4db94011d3 | 81 | | FRF << 4 |
sahilmgandhi | 18:6a4db94011d3 | 82 | | SPO << 6 |
sahilmgandhi | 18:6a4db94011d3 | 83 | | SPH << 7; |
sahilmgandhi | 18:6a4db94011d3 | 84 | obj->spi->CR0 = tmp; |
sahilmgandhi | 18:6a4db94011d3 | 85 | |
sahilmgandhi | 18:6a4db94011d3 | 86 | tmp = obj->spi->CR1; |
sahilmgandhi | 18:6a4db94011d3 | 87 | tmp &= ~(0xD); |
sahilmgandhi | 18:6a4db94011d3 | 88 | tmp |= 0 << 0 // LBM - loop back mode - off |
sahilmgandhi | 18:6a4db94011d3 | 89 | | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave |
sahilmgandhi | 18:6a4db94011d3 | 90 | | 0 << 3; // SOD - slave output disable - na |
sahilmgandhi | 18:6a4db94011d3 | 91 | obj->spi->CR1 = tmp; |
sahilmgandhi | 18:6a4db94011d3 | 92 | |
sahilmgandhi | 18:6a4db94011d3 | 93 | ssp_enable(obj); |
sahilmgandhi | 18:6a4db94011d3 | 94 | } |
sahilmgandhi | 18:6a4db94011d3 | 95 | |
sahilmgandhi | 18:6a4db94011d3 | 96 | void spi_frequency(spi_t *obj, int hz) { |
sahilmgandhi | 18:6a4db94011d3 | 97 | ssp_disable(obj); |
sahilmgandhi | 18:6a4db94011d3 | 98 | |
sahilmgandhi | 18:6a4db94011d3 | 99 | uint32_t PCLK = SystemCoreClock; |
sahilmgandhi | 18:6a4db94011d3 | 100 | |
sahilmgandhi | 18:6a4db94011d3 | 101 | int prescaler; |
sahilmgandhi | 18:6a4db94011d3 | 102 | |
sahilmgandhi | 18:6a4db94011d3 | 103 | for (prescaler = 2; prescaler <= 254; prescaler += 2) { |
sahilmgandhi | 18:6a4db94011d3 | 104 | int prescale_hz = PCLK / prescaler; |
sahilmgandhi | 18:6a4db94011d3 | 105 | |
sahilmgandhi | 18:6a4db94011d3 | 106 | // calculate the divider |
sahilmgandhi | 18:6a4db94011d3 | 107 | int divider = floor(((float)prescale_hz / (float)hz) + 0.5f); |
sahilmgandhi | 18:6a4db94011d3 | 108 | |
sahilmgandhi | 18:6a4db94011d3 | 109 | // check we can support the divider |
sahilmgandhi | 18:6a4db94011d3 | 110 | if (divider < 256) { |
sahilmgandhi | 18:6a4db94011d3 | 111 | // prescaler |
sahilmgandhi | 18:6a4db94011d3 | 112 | obj->spi->CPSR = prescaler; |
sahilmgandhi | 18:6a4db94011d3 | 113 | |
sahilmgandhi | 18:6a4db94011d3 | 114 | // divider |
sahilmgandhi | 18:6a4db94011d3 | 115 | obj->spi->CR0 &= ~(0xFFFF << 8); |
sahilmgandhi | 18:6a4db94011d3 | 116 | obj->spi->CR0 |= (divider - 1) << 8; |
sahilmgandhi | 18:6a4db94011d3 | 117 | ssp_enable(obj); |
sahilmgandhi | 18:6a4db94011d3 | 118 | return; |
sahilmgandhi | 18:6a4db94011d3 | 119 | } |
sahilmgandhi | 18:6a4db94011d3 | 120 | } |
sahilmgandhi | 18:6a4db94011d3 | 121 | error("Couldn't setup requested SPI frequency"); |
sahilmgandhi | 18:6a4db94011d3 | 122 | } |
sahilmgandhi | 18:6a4db94011d3 | 123 | |
sahilmgandhi | 18:6a4db94011d3 | 124 | static inline int ssp_disable(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 125 | return obj->spi->CR1 &= ~(1 << 1); |
sahilmgandhi | 18:6a4db94011d3 | 126 | } |
sahilmgandhi | 18:6a4db94011d3 | 127 | |
sahilmgandhi | 18:6a4db94011d3 | 128 | static inline int ssp_enable(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 129 | return obj->spi->CR1 |= (1 << 1); |
sahilmgandhi | 18:6a4db94011d3 | 130 | } |
sahilmgandhi | 18:6a4db94011d3 | 131 | |
sahilmgandhi | 18:6a4db94011d3 | 132 | static inline int ssp_readable(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 133 | return obj->spi->SR & (1 << 2); |
sahilmgandhi | 18:6a4db94011d3 | 134 | } |
sahilmgandhi | 18:6a4db94011d3 | 135 | |
sahilmgandhi | 18:6a4db94011d3 | 136 | static inline int ssp_writeable(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 137 | return obj->spi->SR & (1 << 1); |
sahilmgandhi | 18:6a4db94011d3 | 138 | } |
sahilmgandhi | 18:6a4db94011d3 | 139 | |
sahilmgandhi | 18:6a4db94011d3 | 140 | static inline void ssp_write(spi_t *obj, int value) { |
sahilmgandhi | 18:6a4db94011d3 | 141 | while (!ssp_writeable(obj)); |
sahilmgandhi | 18:6a4db94011d3 | 142 | obj->spi->DR = value; |
sahilmgandhi | 18:6a4db94011d3 | 143 | } |
sahilmgandhi | 18:6a4db94011d3 | 144 | |
sahilmgandhi | 18:6a4db94011d3 | 145 | static inline int ssp_read(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 146 | while (!ssp_readable(obj)); |
sahilmgandhi | 18:6a4db94011d3 | 147 | return obj->spi->DR; |
sahilmgandhi | 18:6a4db94011d3 | 148 | } |
sahilmgandhi | 18:6a4db94011d3 | 149 | |
sahilmgandhi | 18:6a4db94011d3 | 150 | static inline int ssp_busy(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 151 | return (obj->spi->SR & (1 << 4)) ? (1) : (0); |
sahilmgandhi | 18:6a4db94011d3 | 152 | } |
sahilmgandhi | 18:6a4db94011d3 | 153 | |
sahilmgandhi | 18:6a4db94011d3 | 154 | int spi_master_write(spi_t *obj, int value) { |
sahilmgandhi | 18:6a4db94011d3 | 155 | ssp_write(obj, value); |
sahilmgandhi | 18:6a4db94011d3 | 156 | return ssp_read(obj); |
sahilmgandhi | 18:6a4db94011d3 | 157 | } |
sahilmgandhi | 18:6a4db94011d3 | 158 | |
sahilmgandhi | 18:6a4db94011d3 | 159 | int spi_slave_receive(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 160 | return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0); |
sahilmgandhi | 18:6a4db94011d3 | 161 | } |
sahilmgandhi | 18:6a4db94011d3 | 162 | |
sahilmgandhi | 18:6a4db94011d3 | 163 | int spi_slave_read(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 164 | return obj->spi->DR; |
sahilmgandhi | 18:6a4db94011d3 | 165 | } |
sahilmgandhi | 18:6a4db94011d3 | 166 | |
sahilmgandhi | 18:6a4db94011d3 | 167 | void spi_slave_write(spi_t *obj, int value) { |
sahilmgandhi | 18:6a4db94011d3 | 168 | while (ssp_writeable(obj) == 0) ; |
sahilmgandhi | 18:6a4db94011d3 | 169 | obj->spi->DR = value; |
sahilmgandhi | 18:6a4db94011d3 | 170 | } |
sahilmgandhi | 18:6a4db94011d3 | 171 | |
sahilmgandhi | 18:6a4db94011d3 | 172 | int spi_busy(spi_t *obj) { |
sahilmgandhi | 18:6a4db94011d3 | 173 | return ssp_busy(obj); |
sahilmgandhi | 18:6a4db94011d3 | 174 | } |