MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_sys.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
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sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file SYS.h
sahilmgandhi 18:6a4db94011d3 3 * @version V1.0
sahilmgandhi 18:6a4db94011d3 4 * $Revision 1 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 15/10/21 1:35p $
sahilmgandhi 18:6a4db94011d3 6 * @brief NUC472/NUC442 SYS Header File
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 11
sahilmgandhi 18:6a4db94011d3 12 #ifndef __SYS_H__
sahilmgandhi 18:6a4db94011d3 13 #define __SYS_H__
sahilmgandhi 18:6a4db94011d3 14
sahilmgandhi 18:6a4db94011d3 15 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 16 extern "C"
sahilmgandhi 18:6a4db94011d3 17 {
sahilmgandhi 18:6a4db94011d3 18 #endif
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
sahilmgandhi 18:6a4db94011d3 21 @{
sahilmgandhi 18:6a4db94011d3 22 */
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 /** @addtogroup NUC472_442_SYS_Driver SYS Driver
sahilmgandhi 18:6a4db94011d3 25 @{
sahilmgandhi 18:6a4db94011d3 26 */
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 /** @addtogroup NUC472_442_SYS_EXPORTED_CONSTANTS SYS Exported Constants
sahilmgandhi 18:6a4db94011d3 29 @{
sahilmgandhi 18:6a4db94011d3 30 */
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 33 /* Module Reset Control Resister constant definitions. */
sahilmgandhi 18:6a4db94011d3 34 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 35 #define PDMA_RST ((0x0<<24)|SYS_IPRST0_PDMARST_Pos) /*!<Reset PDMA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 36 #define EBI_RST ((0x0<<24)|SYS_IPRST0_EBIRST_Pos) /*!<Reset EBI \hideinitializer */
sahilmgandhi 18:6a4db94011d3 37 #define USBH_RST ((0x0<<24)|SYS_IPRST0_USBHRST_Pos) /*!<Reset USBH \hideinitializer */
sahilmgandhi 18:6a4db94011d3 38 #define EMAC_RST ((0x0<<24)|SYS_IPRST0_EMACRST_Pos) /*!<Reset EMAC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 39 #define SDH_RST ((0x0<<24)|SYS_IPRST0_SDHRST_Pos) /*!<Reset SDIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 40 #define CRC_RST ((0x0<<24)|SYS_IPRST0_CRCRST_Pos) /*!<Reset CRC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 41 #define CAP_RST ((0x0<<24)|SYS_IPRST0_CAPRST_Pos) /*!<Reset CAP \hideinitializer */
sahilmgandhi 18:6a4db94011d3 42 #define CRYPTO_RST ((0x0<<24)|SYS_IPRST0_CRYPTORST_Pos) /*!<Reset CRYPTO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 43 #define GPIO_RST ((0x4<<24)|SYS_IPRST1_GPIORST_Pos) /*!<Reset GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 44 #define TMR0_RST ((0x4<<24)|SYS_IPRST1_TMR0RST_Pos) /*!<Reset TMR0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 45 #define TMR1_RST ((0x4<<24)|SYS_IPRST1_TMR1RST_Pos) /*!<Reset TMR1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 46 #define TMR2_RST ((0x4<<24)|SYS_IPRST1_TMR2RST_Pos) /*!<Reset TMR2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 47 #define TMR3_RST ((0x4<<24)|SYS_IPRST1_TMR3RST_Pos) /*!<Reset TMR3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 48 #define ACMP_RST ((0x4<<24)|SYS_IPRST1_ACMPRST_Pos) /*!<Reset ACMP \hideinitializer */
sahilmgandhi 18:6a4db94011d3 49 #define I2C0_RST ((0x4<<24)|SYS_IPRST1_I2C0RST_Pos) /*!<Reset I2C0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 50 #define I2C1_RST ((0x4<<24)|SYS_IPRST1_I2C1RST_Pos) /*!<Reset I2C1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 51 #define I2C2_RST ((0x4<<24)|SYS_IPRST1_I2C2RST_Pos) /*!<Reset I2C2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 52 #define I2C3_RST ((0x4<<24)|SYS_IPRST1_I2C3RST_Pos) /*!<Reset I2C3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 53 #define SPI0_RST ((0x4<<24)|SYS_IPRST1_SPI0RST_Pos) /*!<Reset SPI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 54 #define SPI1_RST ((0x4<<24)|SYS_IPRST1_SPI1RST_Pos) /*!<Reset SPI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 55 #define SPI2_RST ((0x4<<24)|SYS_IPRST1_SPI2RST_Pos) /*!<Reset SPI2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 56 #define SPI3_RST ((0x4<<24)|SYS_IPRST1_SPI3RST_Pos) /*!<Reset SPI3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 57 #define UART0_RST ((0x4<<24)|SYS_IPRST1_UART0RST_Pos) /*!<Reset UART0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 58 #define UART1_RST ((0x4<<24)|SYS_IPRST1_UART1RST_Pos) /*!<Reset UART1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 59 #define UART2_RST ((0x4<<24)|SYS_IPRST1_UART2RST_Pos) /*!<Reset UART2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 60 #define UART3_RST ((0x4<<24)|SYS_IPRST1_UART3RST_Pos) /*!<Reset UART3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 61 #define UART4_RST ((0x4<<24)|SYS_IPRST1_UART4RST_Pos) /*!<Reset UART4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 62 #define UART5_RST ((0x4<<24)|SYS_IPRST1_UART5RST_Pos) /*!<Reset UART5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 63 #define CAN0_RST ((0x4<<24)|SYS_IPRST1_CAN0RST_Pos) /*!<Reset CAN0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 64 #define CAN1_RST ((0x4<<24)|SYS_IPRST1_CAN1RST_Pos) /*!<Reset CAN1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 65 #define OTG_RST ((0x4<<24)|SYS_IPRST1_OTGRST_Pos) /*!<Reset OTG \hideinitializer */
sahilmgandhi 18:6a4db94011d3 66 #define USBD_RST ((0x4<<24)|SYS_IPRST1_USBDRST_Pos) /*!<Reset USBD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 67 #define ADC_RST ((0x4<<24)|SYS_IPRST1_ADCRST_Pos) /*!<Reset ADC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 68 #define I2S0_RST ((0x4<<24)|SYS_IPRST1_I2S0RST_Pos) /*!<Reset I2S0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 69 #define I2S1_RST ((0x4<<24)|SYS_IPRST1_I2S1RST_Pos) /*!<Reset I2S1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 70 #define PS2_RST ((0x4<<24)|SYS_IPRST1_PS2RST_Pos) /*!<Reset PS2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 71 #define SC0_RST ((0x8<<24)|SYS_IPRST2_SC0RST_Pos) /*!<Reset SC0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 72 #define SC1_RST ((0x8<<24)|SYS_IPRST2_SC1RST_Pos) /*!<Reset SC1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 73 #define SC2_RST ((0x8<<24)|SYS_IPRST2_SC2RST_Pos) /*!<Reset SC2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 74 #define SC3_RST ((0x8<<24)|SYS_IPRST2_SC3RST_Pos) /*!<Reset SC3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 75 #define SC4_RST ((0x8<<24)|SYS_IPRST2_SC4RST_Pos) /*!<Reset SC4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 76 #define SC5_RST ((0x8<<24)|SYS_IPRST2_SC5RST_Pos) /*!<Reset SC5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 77 #define I2C4_RST ((0x8<<24)|SYS_IPRST2_I2C4RST_Pos) /*!<Reset I2C4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 78 #define PWM0_RST ((0x8<<24)|SYS_IPRST2_PWM0RST_Pos) /*!<Reset PWM0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 79 #define PWM1_RST ((0x8<<24)|SYS_IPRST2_PWM1RST_Pos) /*!<Reset PWM1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 80 #define QEI0_RST ((0x8<<24)|SYS_IPRST2_QEI0RST_Pos) /*!<Reset QEI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 81 #define QEI1_RST ((0x8<<24)|SYS_IPRST2_QEI1RST_Pos) /*!<Reset QEI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 84 /* BODCTL constant definitions. */
sahilmgandhi 18:6a4db94011d3 85 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 86 #define SYS_BODCTL_BODVL_2_2V (0x0UL<<SYS_BODCTL_BODVL_Pos) /*!<Threshold voltage of BOD is selected 2.2V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 87 #define SYS_BODCTL_BODVL_2_7V (0x1UL<<SYS_BODCTL_BODVL_Pos) /*!<Threshold voltage of BOD is selected 2.7V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 88 #define SYS_BODCTL_BODVL_3_8V (0x2UL<<SYS_BODCTL_BODVL_Pos) /*!<Threshold voltage of BOD is selected 3.82V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 89 #define SYS_BODCTL_BODVL_4_5V (0x3UL<<SYS_BODCTL_BODVL_Pos) /*!<Threshold voltage of BOD is selected 4.5V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 90 #define SYS_BODCTL_BODRSTEN (0x1UL<<SYS_BODCTL_BODRSTEN_Pos) /*!<Enable reset function of BOD. \hideinitializer */
sahilmgandhi 18:6a4db94011d3 91 #define SYS_BODCTL_BODINTEN (0x0UL<<SYS_BODCTL_BODRSTEN_Pos) /*!<Enable interrupt function of BOD. \hideinitializer */
sahilmgandhi 18:6a4db94011d3 92 #define SYS_BODCTL_BODLPM (0x1UL<<SYS_BODCTL_BODLPM_Pos) /*!<BOD work in low power mode. \hideinitializer */
sahilmgandhi 18:6a4db94011d3 93 #define SYS_BODCTL_BODOUT (0x1UL<<SYS_BODCTL_BODOUT_Pos) /*!<Output of BOD IP. \hideinitializer */
sahilmgandhi 18:6a4db94011d3 94 #define SYS_BODCTL_LVREN (0x1UL<<SYS_BODCTL_LVREN_Pos) /*!<Enable LVR function. \hideinitializer */
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 97 /* VREFCTL constant definitions. (Write-Protection Register) */
sahilmgandhi 18:6a4db94011d3 98 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 99 #define SYS_VREFCTL_VREF_2_65V (0x03UL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 2.56V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 100 #define SYS_VREFCTL_VREF_2_048V (0x07UL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 2.048V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 101 #define SYS_VREFCTL_VREF_3_072V (0x0BUL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 3.072V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 102 #define SYS_VREFCTL_VREF_4_096V (0x0FUL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 4.096V \hideinitializer */
sahilmgandhi 18:6a4db94011d3 103 #define SYS_VREFCTL_VREF_AVDD (0x10UL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= AVDD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 104 #define SYS_VREFCTL_ADCMODESEL_EADC (0x1UL<<SYS_VREFCTL_ADCMODESEL_Pos) /*!< EADC mode \hideinitializer */
sahilmgandhi 18:6a4db94011d3 105 #define SYS_VREFCTL_ADCMODESEL_ADC (0x0UL<<SYS_VREFCTL_ADCMODESEL_Pos) /*!< ADC mode \hideinitializer */
sahilmgandhi 18:6a4db94011d3 106 #define SYS_VREFCTL_PWMSYNCMODE_EN (0x1UL<<SYS_VREFCTL_PWMSYNCMODE_Pos)/*!<PWM SYNC MODE ENABLED, PWM engine clock is same as HCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 109 /* USBROLE constant definitions. (Write-Protection Register) */
sahilmgandhi 18:6a4db94011d3 110 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 111 #define SYS_USBPHY_USBROLE_OTG_V33_EN (0x1UL<<SYS_USBPHY_LDO33EN_Pos) /*!< USB LDO33 Enabled \hideinitializer */
sahilmgandhi 18:6a4db94011d3 112 #define SYS_USBPHY_USBROLE_STD_USBD (0x0UL<<SYS_USBPHY_USBROLE_Pos) /*!< Standard USB device \hideinitializer */
sahilmgandhi 18:6a4db94011d3 113 #define SYS_USBPHY_USBROLE_STD_USBH (0x1UL<<SYS_USBPHY_USBROLE_Pos) /*!< Standard USB host \hideinitializer */
sahilmgandhi 18:6a4db94011d3 114 #define SYS_USBPHY_USBROLE_ID_DEPH (0x2UL<<SYS_USBPHY_USBROLE_Pos) /*!< ID dependent device \hideinitializer */
sahilmgandhi 18:6a4db94011d3 115 #define SYS_USBPHY_USBROLE_ON_THE_GO (0x3UL<<SYS_USBPHY_USBROLE_Pos) /*!< On-The-Go device \hideinitializer */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 120 /* Multi-Function constant definitions. */
sahilmgandhi 18:6a4db94011d3 121 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 122 /* How to use below #define?
sahilmgandhi 18:6a4db94011d3 123 Example 1: If user want to set PA.0 as SC0_CD in initial function,
sahilmgandhi 18:6a4db94011d3 124 user can issue following command to achieve it.
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 SYS->GPA_MFPL = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA0MFP_Msk) ) | SYS_GPA_MFPL_PA0MFP_SC0_CD ;
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 */
sahilmgandhi 18:6a4db94011d3 129 //GPA_MFPL_PA0MFP
sahilmgandhi 18:6a4db94011d3 130 #define SYS_GPA_MFPL_PA0MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA0MFP_Pos) /*!< GPA_MFPL PA0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 131 #define SYS_GPA_MFPL_PA0MFP_TAMPER0 (0x1UL<<SYS_GPA_MFPL_PA0MFP_Pos) /*!< GPA_MFPL PA0 setting for TAMPER0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 132 #define SYS_GPA_MFPL_PA0MFP_SC0_CD (0x2UL<<SYS_GPA_MFPL_PA0MFP_Pos) /*!< GPA_MFPL PA0 setting for SC0_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 133 #define SYS_GPA_MFPL_PA0MFP_CAN1_RXD (0x3UL<<SYS_GPA_MFPL_PA0MFP_Pos) /*!< GPA_MFPL PA0 setting for CAN1_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 134 #define SYS_GPA_MFPL_PA0MFP_INT0 (0x8UL<<SYS_GPA_MFPL_PA0MFP_Pos) /*!< GPA_MFPL PA0 setting for INT0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 //GPA_MFPL_PA1MFP
sahilmgandhi 18:6a4db94011d3 137 #define SYS_GPA_MFPL_PA1MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA1MFP_Pos) /*!< GPA_MFPL PA1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 138 #define SYS_GPA_MFPL_PA1MFP_TAMPER1 (0x1UL<<SYS_GPA_MFPL_PA1MFP_Pos) /*!< GPA_MFPL PA1 setting for TAMPER1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 139 #define SYS_GPA_MFPL_PA1MFP_SC5_CD (0x2UL<<SYS_GPA_MFPL_PA1MFP_Pos) /*!< GPA_MFPL PA1 setting for SC5_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 140 #define SYS_GPA_MFPL_PA1MFP_CAN1_TXD (0x3UL<<SYS_GPA_MFPL_PA1MFP_Pos) /*!< GPA_MFPL PA1 setting for CAN1_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 141 #define SYS_GPA_MFPL_PA1MFP_EBI_A22 (0x7UL<<SYS_GPA_MFPL_PA1MFP_Pos) /*!< GPA_MFPL PA1 setting for EBI_A22 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 //GPA_MFPL_PA2MFP
sahilmgandhi 18:6a4db94011d3 144 #define SYS_GPA_MFPL_PA2MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA2MFP_Pos) /*!< GPA_MFPL PA2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 145 #define SYS_GPA_MFPL_PA2MFP_SC2_DAT (0x1UL<<SYS_GPA_MFPL_PA2MFP_Pos) /*!< GPA_MFPL PA2 setting for SC2_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 146 #define SYS_GPA_MFPL_PA2MFP_SPI3_MISO0 (0x2UL<<SYS_GPA_MFPL_PA2MFP_Pos) /*!< GPA_MFPL PA2 setting for SPI3_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 147 #define SYS_GPA_MFPL_PA2MFP_I2S0_MCLK (0x3UL<<SYS_GPA_MFPL_PA2MFP_Pos) /*!< GPA_MFPL PA2 setting for I2S0_MCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 148 #define SYS_GPA_MFPL_PA2MFP_BRAKE11 (0x4UL<<SYS_GPA_MFPL_PA2MFP_Pos) /*!< GPA_MFPL PA2 setting for BRAKE11 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 149 #define SYS_GPA_MFPL_PA2MFP_CAP_SFIELD (0x5UL<<SYS_GPA_MFPL_PA2MFP_Pos) /*!< GPA_MFPL PA2 setting for CAP_SFIELD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 150 #define SYS_GPA_MFPL_PA2MFP_EBI_A12 (0x7UL<<SYS_GPA_MFPL_PA2MFP_Pos) /*!< GPA_MFPL PA2 setting for EBI_A12 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 //GPA_MFPL_PA3MFP
sahilmgandhi 18:6a4db94011d3 153 #define SYS_GPA_MFPL_PA3MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA3MFP_Pos) /*!< GPA_MFPL PA3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 154 #define SYS_GPA_MFPL_PA3MFP_SC2_CLK (0x1UL<<SYS_GPA_MFPL_PA3MFP_Pos) /*!< GPA_MFPL PA3 setting for SC2_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 155 #define SYS_GPA_MFPL_PA3MFP_SPI3_MOSI0 (0x2UL<<SYS_GPA_MFPL_PA3MFP_Pos) /*!< GPA_MFPL PA3 setting for SPI3_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 156 #define SYS_GPA_MFPL_PA3MFP_I2S0_DO (0x3UL<<SYS_GPA_MFPL_PA3MFP_Pos) /*!< GPA_MFPL PA3 setting for I2S0_D0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 157 #define SYS_GPA_MFPL_PA3MFP_BRAKE10 (0x4UL<<SYS_GPA_MFPL_PA3MFP_Pos) /*!< GPA_MFPL PA3 setting for BRAKE10 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 158 #define SYS_GPA_MFPL_PA3MFP_EBI_A13 (0x7UL<<SYS_GPA_MFPL_PA3MFP_Pos) /*!< GPA_MFPL PA3 setting for EBI_A13 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 //GPA_MFPL_PA4MFP
sahilmgandhi 18:6a4db94011d3 161 #define SYS_GPA_MFPL_PA4MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA4MFP_Pos) /*!< GPA_MFPL PA4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 162 #define SYS_GPA_MFPL_PA4MFP_SC2_PWR (0x1UL<<SYS_GPA_MFPL_PA4MFP_Pos) /*!< GPA_MFPL PA4 setting for SC2_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 163 #define SYS_GPA_MFPL_PA4MFP_SPI3_CLK (0x2UL<<SYS_GPA_MFPL_PA4MFP_Pos) /*!< GPA_MFPL PA4 setting for SPI3_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 164 #define SYS_GPA_MFPL_PA4MFP_I2S0_DI (0x3UL<<SYS_GPA_MFPL_PA4MFP_Pos) /*!< GPA_MFPL PA4 setting for I2S0_DI \hideinitializer */
sahilmgandhi 18:6a4db94011d3 165 #define SYS_GPA_MFPL_PA4MFP_QEI1_Z (0x5UL<<SYS_GPA_MFPL_PA4MFP_Pos) /*!< GPA_MFPL PA4 setting for QEI1_Z \hideinitializer */
sahilmgandhi 18:6a4db94011d3 166 #define SYS_GPA_MFPL_PA4MFP_EBI_A14 (0x7UL<<SYS_GPA_MFPL_PA4MFP_Pos) /*!< GPA_MFPL PA4 setting for EBI_A14 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 167 #define SYS_GPA_MFPL_PA4MFP_ECAP1_IC2 (0x8UL<<SYS_GPA_MFPL_PA4MFP_Pos) /*!< GPA_MFPL PA4 setting for ECAP1_IC2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 //GPA_MFPL_PA5MFP
sahilmgandhi 18:6a4db94011d3 170 #define SYS_GPA_MFPL_PA5MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 171 #define SYS_GPA_MFPL_PA5MFP_SC2_RST (0x1UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for SC2_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 172 #define SYS_GPA_MFPL_PA5MFP_SPI3_SS0 (0x2UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for SPI3_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 173 #define SYS_GPA_MFPL_PA5MFP_I2S0_BCLK (0x3UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for I2S0_BCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 174 #define SYS_GPA_MFPL_PA5MFP_PWM0_CH0 (0x4UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for PWM0 CH0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 175 #define SYS_GPA_MFPL_PA5MFP_QEI1_B (0x5UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for QEI1_B \hideinitializer */
sahilmgandhi 18:6a4db94011d3 176 #define SYS_GPA_MFPL_PA5MFP_EBI_A15 (0x7UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for EBI_A15 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 177 #define SYS_GPA_MFPL_PA5MFP_ECAP1_IC1 (0x8UL<<SYS_GPA_MFPL_PA5MFP_Pos) /*!< GPA_MFPL PA5 setting for ECAP1_IC1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 178
sahilmgandhi 18:6a4db94011d3 179 //GPA_MFPL_PA6MFP
sahilmgandhi 18:6a4db94011d3 180 #define SYS_GPA_MFPL_PA6MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 181 #define SYS_GPA_MFPL_PA6MFP_SC2_CD (0x1UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for SC2_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 182 #define SYS_GPA_MFPL_PA6MFP_I2S0_LRCK (0x3UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for I2S0_LRCK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 183 #define SYS_GPA_MFPL_PA6MFP_PWM0_CH1 (0x4UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for PWM1 CH1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 184 #define SYS_GPA_MFPL_PA6MFP_QEI1_A (0x5UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for QEI1_A \hideinitializer */
sahilmgandhi 18:6a4db94011d3 185 #define SYS_GPA_MFPL_PA6MFP_CAN1_TXD (0x6UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for CAN1_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 186 #define SYS_GPA_MFPL_PA6MFP_EBI_A16 (0x7UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for EBI_A16 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 187 #define SYS_GPA_MFPL_PA6MFP_ECAP1_IC0 (0x8UL<<SYS_GPA_MFPL_PA6MFP_Pos) /*!< GPA_MFPL PA6 setting for ECAP1_IC0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 //GPA_MFPL_PA7MFP
sahilmgandhi 18:6a4db94011d3 190 #define SYS_GPA_MFPL_PA7MFP_GPIO (0x0UL<<SYS_GPA_MFPL_PA7MFP_Pos) /*!< GPA_MFPL PA7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 191 #define SYS_GPA_MFPL_PA7MFP_SC0_CLK (0x2UL<<SYS_GPA_MFPL_PA7MFP_Pos) /*!< GPA_MFPL PA7 setting for SC0_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 192 #define SYS_GPA_MFPL_PA7MFP_SPI3_SS0 (0x3UL<<SYS_GPA_MFPL_PA7MFP_Pos) /*!< GPA_MFPL PA7 setting for SPI3_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 193 #define SYS_GPA_MFPL_PA7MFP_PWM1_CH3 (0x4UL<<SYS_GPA_MFPL_PA7MFP_Pos) /*!< GPA_MFPL PA7 setting for PWM1 CH3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 194 #define SYS_GPA_MFPL_PA7MFP_EPWM0_CH5 (0x5UL<<SYS_GPA_MFPL_PA7MFP_Pos) /*!< GPA_MFPL PA7 setting for EPWM0 CH5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 195 #define SYS_GPA_MFPL_PA7MFP_EBI_A17 (0x7UL<<SYS_GPA_MFPL_PA7MFP_Pos) /*!< GPA_MFPL PA7 setting for EBI_A17 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 196
sahilmgandhi 18:6a4db94011d3 197 //GPA_MFPL_PA8MFP
sahilmgandhi 18:6a4db94011d3 198 #define SYS_GPA_MFPH_PA8MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA8MFP_Pos) /*!< GPA_MFPH PA8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 199 #define SYS_GPA_MFPH_PA8MFP_SC0_RST (0x2UL<<SYS_GPA_MFPH_PA8MFP_Pos) /*!< GPA_MFPH PA8 setting for SC0_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 200 #define SYS_GPA_MFPH_PA8MFP_SPI3_CLK (0x3UL<<SYS_GPA_MFPH_PA8MFP_Pos) /*!< GPA_MFPH PA8 setting for SPI3_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 201 #define SYS_GPA_MFPH_PA8MFP_PWM1_CH2 (0x4UL<<SYS_GPA_MFPH_PA8MFP_Pos) /*!< GPA_MFPH PA8 setting for PWM1 CH2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 202 #define SYS_GPA_MFPH_PA8MFP_EPWM0_CH4 (0x5UL<<SYS_GPA_MFPH_PA8MFP_Pos) /*!< GPA_MFPH PA8 setting for EPWM0_CH4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 203 #define SYS_GPA_MFPH_PA8MFP_EBI_A18 (0x7UL<<SYS_GPA_MFPH_PA8MFP_Pos) /*!< GPA_MFPH PA8 setting for EBI_A18 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 //GPA_MFPH_PA9MFP
sahilmgandhi 18:6a4db94011d3 206 #define SYS_GPA_MFPH_PA9MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA9MFP_Pos) /*!< GPA_MFPH PA9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 207 #define SYS_GPA_MFPH_PA9MFP_SC0_PWR (0x2UL<<SYS_GPA_MFPH_PA9MFP_Pos) /*!< GPA_MFPH PA9 setting for SC0_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 208 #define SYS_GPA_MFPH_PA9MFP_SPI3_MISO0 (0x3UL<<SYS_GPA_MFPH_PA9MFP_Pos) /*!< GPA_MFPH PA9 setting for SPI3_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 209 #define SYS_GPA_MFPH_PA9MFP_PWM1_CH1 (0x4UL<<SYS_GPA_MFPH_PA9MFP_Pos) /*!< GPA_MFPH PA9 setting for PWM1 CH1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 210 #define SYS_GPA_MFPH_PA9MFP_EPWM0_CH3 (0x5UL<<SYS_GPA_MFPH_PA9MFP_Pos) /*!< GPA_MFPH PA9 setting for EPWM0 CH3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 211 #define SYS_GPA_MFPH_PA9MFP_EBI_A19 (0x7UL<<SYS_GPA_MFPH_PA9MFP_Pos) /*!< GPA_MFPH PA9 setting for EBI_A19 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 //GPA_MFPH_PA10MFP
sahilmgandhi 18:6a4db94011d3 214 #define SYS_GPA_MFPH_PA10MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< GPA_MFPH PA10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 215 #define SYS_GPA_MFPH_PA10MFP_SC0_DAT (0x2UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< GPA_MFPH PA10 setting for SC0_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 216 #define SYS_GPA_MFPH_PA10MFP_SPI3_MOSI0 (0x3UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< GPA_MFPH PA10 setting for SPI3_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 217 #define SYS_GPA_MFPH_PA10MFP_PWM1_CH0 (0x4UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< GPA_MFPH PA10 setting for PWM1_CH0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 218 #define SYS_GPA_MFPH_PA10MFP_EPWM0_CH2 (0x5UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< GPA_MFPH PA10 setting for EPWM0_CH2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 219 #define SYS_GPA_MFPH_PA10MFP_EBI_A20 (0x7UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< GPA_MFPH PA10 setting for EBI_A20 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 //GPA_MFPH_PA11MFP
sahilmgandhi 18:6a4db94011d3 222 #define SYS_GPA_MFPH_PA11MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< GPA_MFPH PA11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 223 #define SYS_GPA_MFPH_PA11MFP_UART0_RTS (0x1UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< GPA_MFPH PA11 setting for UART0_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 224 #define SYS_GPA_MFPH_PA11MFP_SPI3_MISO1 (0x3UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< GPA_MFPH PA11 setting for SPI3_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 225 #define SYS_GPA_MFPH_PA11MFP_PWM0_CH5 (0x4UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< GPA_MFPH PA11 setting for PWM0_CH5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 226 #define SYS_GPA_MFPH_PA11MFP_EPWM0_CH1 (0x5UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< GPA_MFPH PA11 setting for EPWM0_CH1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 227 #define SYS_GPA_MFPH_PA11MFP_EBI_AD0 (0x7UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< GPA_MFPH PA11 setting for EBI_AD0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 //GPA_MFPH_PA12MFP
sahilmgandhi 18:6a4db94011d3 230 #define SYS_GPA_MFPH_PA12MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< GPA_MFPH PA12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 231 #define SYS_GPA_MFPH_PA12MFP_UART0_CTS (0x1UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< GPA_MFPH PA12 setting for UART0_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 232 #define SYS_GPA_MFPH_PA12MFP_SPI3_MOSI1 (0x3UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< GPA_MFPH PA12 setting for SPI3_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 233 #define SYS_GPA_MFPH_PA12MFP_PWM0_CH4 (0x4UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< GPA_MFPH PA12 setting for PWM0_CH4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 234 #define SYS_GPA_MFPH_PA12MFP_EPWM0_CH0 (0x5UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< GPA_MFPH PA12 setting for EPWM0_CH0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 235 #define SYS_GPA_MFPH_PA12MFP_EBI_AD1 (0x7UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< GPA_MFPH PA12 setting for EBI_AD1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 //GPA_MFPH_PA13MFP
sahilmgandhi 18:6a4db94011d3 238 #define SYS_GPA_MFPH_PA13MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< GPA_MFPH PA13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 239 #define SYS_GPA_MFPH_PA13MFP_UART0_RXD (0x1UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< GPA_MFPH PA13 setting for UART0_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 240 #define SYS_GPA_MFPH_PA13MFP_SC3_DAT (0x3UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< GPA_MFPH PA13 setting for SC3_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 241 #define SYS_GPA_MFPH_PA13MFP_PWM1_CH4 (0x4UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< GPA_MFPH PA13 setting for PWM1_CH4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 242 #define SYS_GPA_MFPH_PA13MFP_EBI_AD2 (0x7UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< GPA_MFPH PA13 setting for EBI_AD2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 //GPA_MFPH_PA14MFP
sahilmgandhi 18:6a4db94011d3 245 #define SYS_GPA_MFPH_PA14MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< GPA_MFPH PA14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 246 #define SYS_GPA_MFPH_PA14MFP_UART0_TXD (0x1UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< GPA_MFPH PA14 setting for UART0_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 247 #define SYS_GPA_MFPH_PA14MFP_SC3_CLK (0x3UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< GPA_MFPH PA14 setting for SC3_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 248 #define SYS_GPA_MFPH_PA14MFP_PWM1_CH5 (0x4UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< GPA_MFPH PA14 setting for PWM1_CH5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 249 #define SYS_GPA_MFPH_PA14MFP_EBI_AD3 (0x7UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< GPA_MFPH PA14 setting for EBI_AD3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 250 //GPA_MFPH_PA15MFP
sahilmgandhi 18:6a4db94011d3 251 #define SYS_GPA_MFPH_PA15MFP_GPIO (0x0UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< GPA_MFPH PA15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 252 #define SYS_GPA_MFPH_PA15MFP_SC3_PWR (0x1UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< GPA_MFPH PA15 setting for SC3_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 253 #define SYS_GPA_MFPH_PA15MFP_UART2_RTS (0x2UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< GPA_MFPH PA15 setting for UART2_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 254 #define SYS_GPA_MFPH_PA15MFP_I2C0_SCL (0x4UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< GPA_MFPH PA15 setting for I2C0_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 255 #define SYS_GPA_MFPH_PA15MFP_EBI_A21 (0x7UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< GPA_MFPH PA15 setting for EBI_A21 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 256
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 //GPB_MFPL_PB0MFP
sahilmgandhi 18:6a4db94011d3 259 #define SYS_GPB_MFPL_PB0MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB0MFP_Pos) /*!< GPB_MFPL PB0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 260 #define SYS_GPB_MFPL_PB0MFP_USB0_OTG5V_ST (0x1UL<<SYS_GPB_MFPL_PB0MFP_Pos) /*!< GPB_MFPL PB0 setting for USB0_OTG5V_ST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 261 #define SYS_GPB_MFPL_PB0MFP_I2C4_SCL (0x2UL<<SYS_GPB_MFPL_PB0MFP_Pos) /*!< GPB_MFPL PB0 setting for I2C4_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 262 #define SYS_GPB_MFPL_PB0MFP_INT1 (0x8UL<<SYS_GPB_MFPL_PB0MFP_Pos) /*!< GPB_MFPL PB0 setting for INT1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 //GPB_MFPL_PB1MFP
sahilmgandhi 18:6a4db94011d3 265 #define SYS_GPB_MFPL_PB1MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB1MFP_Pos) /*!< GPB_MFPL PB1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 266 #define SYS_GPB_MFPL_PB1MFP_USB0_OTG5V_EN (0x1UL<<SYS_GPB_MFPL_PB1MFP_Pos) /*!< GPB_MFPL PB1 setting for USB0_OTG5V_EN \hideinitializer */
sahilmgandhi 18:6a4db94011d3 267 #define SYS_GPB_MFPL_PB1MFP_I2C4_SDA (0x2UL<<SYS_GPB_MFPL_PB1MFP_Pos) /*!< GPB_MFPL PB1 setting for I2C4_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 268 #define SYS_GPB_MFPL_PB1MFP_TM1_CNT_OUT (0x3UL<<SYS_GPB_MFPL_PB1MFP_Pos) /*!< GPB_MFPL PB1 setting for TM1_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 269
sahilmgandhi 18:6a4db94011d3 270 //GPB_MFPL_PB2MFP
sahilmgandhi 18:6a4db94011d3 271 #define SYS_GPB_MFPL_PB2MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB2MFP_Pos) /*!< GPB_MFPL PB2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 272 #define SYS_GPB_MFPL_PB2MFP_UART1_RXD (0x1UL<<SYS_GPB_MFPL_PB2MFP_Pos) /*!< GPB_MFPL PB2 setting for UART1_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 273 #define SYS_GPB_MFPL_PB2MFP_SPI2_SS0 (0x2UL<<SYS_GPB_MFPL_PB2MFP_Pos) /*!< GPB_MFPL PB2 setting for SPI2_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 274 #define SYS_GPB_MFPL_PB2MFP_USB1_D_N (0x3UL<<SYS_GPB_MFPL_PB2MFP_Pos) /*!< GPB_MFPL PB2 setting for USB1_D_N \hideinitializer */
sahilmgandhi 18:6a4db94011d3 275 #define SYS_GPB_MFPL_PB2MFP_EBI_AD4 (0x7UL<<SYS_GPB_MFPL_PB2MFP_Pos) /*!< GPB_MFPL PB2 setting for EBI_AD4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 //GPB_MFPL_PB3MFP
sahilmgandhi 18:6a4db94011d3 278 #define SYS_GPB_MFPL_PB3MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB3MFP_Pos) /*!< GPB_MFPL PB3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 279 #define SYS_GPB_MFPL_PB3MFP_UART1_TXD (0x1UL<<SYS_GPB_MFPL_PB3MFP_Pos) /*!< GPB_MFPL PB3 setting for UART1_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 280 #define SYS_GPB_MFPL_PB3MFP_SPI2_CLK (0x2UL<<SYS_GPB_MFPL_PB3MFP_Pos) /*!< GPB_MFPL PB3 setting for SPI2_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 281 #define SYS_GPB_MFPL_PB3MFP_USB1_D_P (0x3UL<<SYS_GPB_MFPL_PB3MFP_Pos) /*!< GPB_MFPL PB3 setting for USB1_D_P \hideinitializer */
sahilmgandhi 18:6a4db94011d3 282 #define SYS_GPB_MFPL_PB3MFP_EBI_AD5 (0x7UL<<SYS_GPB_MFPL_PB3MFP_Pos) /*!< GPB_MFPL PB3 setting for EBI_AD5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284 //GPB_MFPL_PB4MFP
sahilmgandhi 18:6a4db94011d3 285 #define SYS_GPB_MFPL_PB4MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB4MFP_Pos) /*!< GPB_MFPL PB4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 286 #define SYS_GPB_MFPL_PB4MFP_UART1_RTS (0x1UL<<SYS_GPB_MFPL_PB4MFP_Pos) /*!< GPB_MFPL PB4 setting for UART1_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 287 #define SYS_GPB_MFPL_PB4MFP_SPI2_MISO0 (0x2UL<<SYS_GPB_MFPL_PB4MFP_Pos) /*!< GPB_MFPL PB4 setting for SPI2_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 288 #define SYS_GPB_MFPL_PB4MFP_UART4_RXD (0x3UL<<SYS_GPB_MFPL_PB4MFP_Pos) /*!< GPB_MFPL PB4 setting for UART4_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 289 #define SYS_GPB_MFPL_PB4MFP_TM0_CNT_OUT (0x4UL<<SYS_GPB_MFPL_PB4MFP_Pos) /*!< GPB_MFPL PB4 setting for TM0_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 290 #define SYS_GPB_MFPL_PB4MFP_EBI_AD6 (0x7UL<<SYS_GPB_MFPL_PB4MFP_Pos) /*!< GPB_MFPL PB4 setting for EBI_AD6 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 291
sahilmgandhi 18:6a4db94011d3 292 //GPB_MFPL_PB5MFP
sahilmgandhi 18:6a4db94011d3 293 #define SYS_GPB_MFPL_PB5MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< GPB_MFPL PB5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 294 #define SYS_GPB_MFPL_PB5MFP_UART1_CTS (0x1UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< GPB_MFPL PB5 setting for UART1_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 295 #define SYS_GPB_MFPL_PB5MFP_SPI2_MOSI0 (0x2UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< GPB_MFPL PB5 setting for SPI2_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 296 #define SYS_GPB_MFPL_PB5MFP_UART4_TXD (0x3UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< GPB_MFPL PB5 setting for UART4_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 297 #define SYS_GPB_MFPL_PB5MFP_EBI_AD7 (0x7UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< GPB_MFPL PB5 setting for EBI_AD7 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 //GPB_MFPL_PB6MFP
sahilmgandhi 18:6a4db94011d3 300 #define SYS_GPB_MFPL_PB6MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB6MFP_Pos) /*!< GPB_MFPL PB6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 301 #define SYS_GPB_MFPL_PB6MFP_I2C2_SCL (0x1UL<<SYS_GPB_MFPL_PB6MFP_Pos) /*!< GPB_MFPL PB6 setting for I2C2_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 302 #define SYS_GPB_MFPL_PB6MFP_BRAKE01 (0x2UL<<SYS_GPB_MFPL_PB6MFP_Pos) /*!< GPB_MFPL PB6 setting for BRAKE01 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 303 #define SYS_GPB_MFPL_PB6MFP_UART4_RTS (0x3UL<<SYS_GPB_MFPL_PB6MFP_Pos) /*!< GPB_MFPL PB6 setting for UART4_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 304 #define SYS_GPB_MFPL_PB6MFP_PWM1_CH4 (0x4UL<<SYS_GPB_MFPL_PB6MFP_Pos) /*!< GPB_MFPL PB6 setting for PWM1_CH4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 305 #define SYS_GPB_MFPL_PB6MFP_EPWM1_CH0 (0x5UL<<SYS_GPB_MFPL_PB6MFP_Pos) /*!< GPB_MFPL PB6 setting for EPWM1_CH0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 306 #define SYS_GPB_MFPL_PB6MFP_EBI_AD8 (0x7UL<<SYS_GPB_MFPL_PB6MFP_Pos) /*!< GPB_MFPL PB6 setting for EBI_AD8 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 //GPB_MFPL_PB7MFP
sahilmgandhi 18:6a4db94011d3 309 #define SYS_GPB_MFPL_PB7MFP_GPIO (0x0UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 310 #define SYS_GPB_MFPL_PB7MFP_I2C2_SDA (0x1UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for I2C2_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 311 #define SYS_GPB_MFPL_PB7MFP_BRAKE00 (0x2UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for BRAKE00 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 312 #define SYS_GPB_MFPL_PB7MFP_UART4_CTS (0x3UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for UART4_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 313 #define SYS_GPB_MFPL_PB7MFP_PWM1_CH5 (0x4UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for PWM1_CH5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 314 #define SYS_GPB_MFPL_PB7MFP_EPWM1_CH1 (0x5UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for EPWM1_CH1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 315 #define SYS_GPB_MFPL_PB7MFP_ETM_TRACE_DATA3 (0x6UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for ETM_TRACE_DATA3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 316 #define SYS_GPB_MFPL_PB7MFP_EBI_AD9 (0x7UL<<SYS_GPB_MFPL_PB7MFP_Pos) /*!< GPB_MFPL PB7 setting for EBI_AD9 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 //GPB_MFPL_PB8MFP
sahilmgandhi 18:6a4db94011d3 319 #define SYS_GPB_MFPH_PB8MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB8MFP_Pos) /*!< GPB_MFPH PB8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 320 #define SYS_GPB_MFPH_PB8MFP_UART5_CTS (0x1UL<<SYS_GPB_MFPH_PB8MFP_Pos) /*!< GPB_MFPH PB8 setting for UART5_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 321 #define SYS_GPB_MFPH_PB8MFP_EPWM1_CH2 (0x5UL<<SYS_GPB_MFPH_PB8MFP_Pos) /*!< GPB_MFPH PB8 setting for EPWM1_CH2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 322 #define SYS_GPB_MFPH_PB8MFP_ETM_TRACE_DATA2 (0x6UL<<SYS_GPB_MFPH_PB8MFP_Pos) /*!< GPB_MFPH PB8 setting for ETM_TRACE_DATA2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 323 #define SYS_GPB_MFPH_PB8MFP_EBI_AD10 (0x7UL<<SYS_GPB_MFPH_PB8MFP_Pos) /*!< GPB_MFPH PB8 setting for EBI_AD10 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 324
sahilmgandhi 18:6a4db94011d3 325 //GPB_MFPH_PB9MFP
sahilmgandhi 18:6a4db94011d3 326 #define SYS_GPB_MFPH_PB9MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB9MFP_Pos) /*!< GPB_MFPH PB9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 327 #define SYS_GPB_MFPH_PB9MFP_UART5_RTS (0x1UL<<SYS_GPB_MFPH_PB9MFP_Pos) /*!< GPB_MFPH PB9 setting for UART5_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 328 #define SYS_GPB_MFPH_PB9MFP_EPWM1_CH3 (0x5UL<<SYS_GPB_MFPH_PB9MFP_Pos) /*!< GPB_MFPH PB9 setting for EPWM1_CH3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 329 #define SYS_GPB_MFPH_PB9MFP_ETM_TRACE_DATA1 (0x6UL<<SYS_GPB_MFPH_PB9MFP_Pos) /*!< GPB_MFPH PB9 setting for ETM_TRACE_DATA1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 330 #define SYS_GPB_MFPH_PB9MFP_EBI_AD11 (0x7UL<<SYS_GPB_MFPH_PB9MFP_Pos) /*!< GPB_MFPH PB9 setting for EBI_AD11 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 331
sahilmgandhi 18:6a4db94011d3 332 //GPB_MFPH_PB10MFP
sahilmgandhi 18:6a4db94011d3 333 #define SYS_GPB_MFPH_PB10MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< GPB_MFPH PB10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 334 #define SYS_GPB_MFPH_PB10MFP_UART5_TXD (0x1UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< GPB_MFPH PB10 setting for UART5_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 335 #define SYS_GPB_MFPH_PB10MFP_EPWM1_CH4 (0x5UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< GPB_MFPH PB10 setting for EPWM1_CH4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 336 #define SYS_GPB_MFPH_PB10MFP_ETM_TRACE_DATA0 (0x6UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< GPB_MFPH PB10 setting for ETM_TRACE_DATA0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 337 #define SYS_GPB_MFPH_PB10MFP_EBI_AD12 (0x7UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< GPB_MFPH PB10 setting for EBI_AD12 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 //GPB_MFPH_PB11MFP
sahilmgandhi 18:6a4db94011d3 340 #define SYS_GPB_MFPH_PB11MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< GPB_MFPH PB11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 341 #define SYS_GPB_MFPH_PB11MFP_UART5_RXD (0x1UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< GPB_MFPH PB11 setting for UART5_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 342 #define SYS_GPB_MFPH_PB11MFP_EPWM1_CH5 (0x5UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< GPB_MFPH PB11 setting for EPWM1_CH5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 343 #define SYS_GPB_MFPH_PB11MFP_ETM_TRACE_CLK (0x6UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< GPB_MFPH PB11 setting for ETM_TRACE_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 344 #define SYS_GPB_MFPH_PB11MFP_EBI_AD13 (0x7UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< GPB_MFPH PB11 setting for EBI_AD13 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 345
sahilmgandhi 18:6a4db94011d3 346 //GPB_MFPH_PB12MFP
sahilmgandhi 18:6a4db94011d3 347 #define SYS_GPB_MFPH_PB12MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< GPB_MFPH PB12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 348 #define SYS_GPB_MFPH_PB12MFP_UART4_RTS (0x1UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< GPB_MFPH PB12 setting for UART4_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 349 #define SYS_GPB_MFPH_PB12MFP_SPI2_MISO1 (0x2UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< GPB_MFPH PB12 setting for _SPI2_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 350 #define SYS_GPB_MFPH_PB12MFP_CAN0_RXD (0x3UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< GPB_MFPH PB12 setting for CAN0_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 351 #define SYS_GPB_MFPH_PB12MFP_EMAC_MII_MDC (0x6UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< GPB_MFPH PB12 setting for EMAC_MII_MDC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 352 #define SYS_GPB_MFPH_PB12MFP_EBI_AD14 (0x7UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< GPB_MFPH PB12 setting for EBI_AD4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 353
sahilmgandhi 18:6a4db94011d3 354 //GPB_MFPH_PB13MFP
sahilmgandhi 18:6a4db94011d3 355 #define SYS_GPB_MFPH_PB13MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< GPB_MFPH PB13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 356 #define SYS_GPB_MFPH_PB13MFP_UART4_CTS (0x1UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< GPB_MFPH PB13 setting for UART4_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 357 #define SYS_GPB_MFPH_PB13MFP_SPI2_MOSI1 (0x2UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< GPB_MFPH PB13 setting for SPI2_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 358 #define SYS_GPB_MFPH_PB13MFP_CAN0_TXD (0x3UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< GPB_MFPH PB13 setting for CAN0_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 359 #define SYS_GPB_MFPH_PB13MFP_EMAC_MII_MDIO (0x6UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< GPB_MFPH PB13 setting for EMAC_MII_MDIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 360 #define SYS_GPB_MFPH_PB13MFP_EBI_AD15 (0x7UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< GPB_MFPH PB13 setting for EBI_AD15 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 361
sahilmgandhi 18:6a4db94011d3 362 //GPB_MFPH_PB14MFP
sahilmgandhi 18:6a4db94011d3 363 #define SYS_GPB_MFPH_PB14MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< GPB_MFPH PB14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 364 #define SYS_GPB_MFPH_PB14MFP_I2S1_MCLK (0x1UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< GPB_MFPH PB14 setting for I2S1_MCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 365 #define SYS_GPB_MFPH_PB14MFP_SC1_RST (0x2UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< GPB_MFPH PB14 setting for SC1_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 366 #define SYS_GPB_MFPH_PB14MFP_BRAKE01 (0x4UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< GPB_MFPH PB14 setting for BRAKE01 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 367 #define SYS_GPB_MFPH_PB14MFP_EMAC_MII_MDC (0x6UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< GPB_MFPH PB14 setting for EMAC_MII_MDC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 368
sahilmgandhi 18:6a4db94011d3 369 //GPB_MFPH_PB15MFP
sahilmgandhi 18:6a4db94011d3 370 #define SYS_GPB_MFPH_PB15MFP_GPIO (0x0UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< GPA_MFPH PB15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 371 #define SYS_GPB_MFPH_PB15MFP_I2S1_DO (0x1UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< GPA_MFPH PB15 setting for I2S1_DO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 372 #define SYS_GPB_MFPH_PB15MFP_SC1_DAT (0x2UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< GPA_MFPH PB15 setting for SC1_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 373 #define SYS_GPB_MFPH_PB15MFP_BRAKE00 (0x4UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< GPA_MFPH PB15 setting for BRAKE00 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 374 #define SYS_GPB_MFPH_PB15MFP_EMAC_MII_MDIO (0x6UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< GPA_MFPH PB15 setting for EMAC_MII_MDIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 375
sahilmgandhi 18:6a4db94011d3 376
sahilmgandhi 18:6a4db94011d3 377 //GPC_MFPL_PC0MFP
sahilmgandhi 18:6a4db94011d3 378 #define SYS_GPC_MFPL_PC0MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC0MFP_Pos) /*!< GPC_MFPL PC0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 379 #define SYS_GPC_MFPL_PC0MFP_I2S1_DI (0x1UL<<SYS_GPC_MFPL_PC0MFP_Pos) /*!< GPC_MFPL PC0 setting for I2S1_D1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 380 #define SYS_GPC_MFPL_PC0MFP_SC1_DAT (0x2UL<<SYS_GPC_MFPL_PC0MFP_Pos) /*!< GPC_MFPL PC0 setting for SC1_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 381 #define SYS_GPC_MFPL_PC0MFP_UART4_RXD (0x3UL<<SYS_GPC_MFPL_PC0MFP_Pos) /*!< GPC_MFPL PC0 setting for UART4_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 382 #define SYS_GPC_MFPL_PC0MFP_EMAC_REFCLK (0x6UL<<SYS_GPC_MFPL_PC0MFP_Pos) /*!< GPC_MFPL PC0 setting for EMAC_REFCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 383 #define SYS_GPC_MFPL_PC0MFP_EBI_MCLK (0x7UL<<SYS_GPC_MFPL_PC0MFP_Pos) /*!< GPC_MFPL PC0 setting for EBI_MCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 384 #define SYS_GPC_MFPL_PC0MFP_INT2 (0x8UL<<SYS_GPC_MFPL_PC0MFP_Pos) /*!< GPC_MFPL PC0 setting for INT2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 385
sahilmgandhi 18:6a4db94011d3 386
sahilmgandhi 18:6a4db94011d3 387 //GPC_MFPL_PC1MFP
sahilmgandhi 18:6a4db94011d3 388 #define SYS_GPC_MFPL_PC1MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC1MFP_Pos) /*!< GPC_MFPL PC1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 389 #define SYS_GPC_MFPL_PC1MFP_I2S1_BCLK (0x1UL<<SYS_GPC_MFPL_PC1MFP_Pos) /*!< GPC_MFPL PC1 setting for I2S1_BCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 390 #define SYS_GPC_MFPL_PC1MFP_SC1_CLK (0x2UL<<SYS_GPC_MFPL_PC1MFP_Pos) /*!< GPC_MFPL PC1 setting for SC1_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 391 #define SYS_GPC_MFPL_PC1MFP_UART4_TXD (0x3UL<<SYS_GPC_MFPL_PC1MFP_Pos) /*!< GPC_MFPL PC1 setting for UART4_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 392 #define SYS_GPC_MFPL_PC1MFP_TM3_CNT_OUT (0x5UL<<SYS_GPC_MFPL_PC1MFP_Pos) /*!< GPC_MFPL PC1 setting for TM3_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 393 #define SYS_GPC_MFPL_PC1MFP_EMAC_MII_RXERR (0x6UL<<SYS_GPC_MFPL_PC1MFP_Pos) /*!< GPC_MFPL PC1 setting for EMAC_MII_RXERR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 394 #define SYS_GPC_MFPL_PC1MFP_EBI_AD13 (0x7UL<<SYS_GPC_MFPL_PC1MFP_Pos) /*!< GPC_MFPL PC1 setting for EBI_AD13 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 395
sahilmgandhi 18:6a4db94011d3 396 //GPC_MFPL_PC2MFP
sahilmgandhi 18:6a4db94011d3 397 #define SYS_GPC_MFPL_PC2MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC2MFP_Pos) /*!< GPC_MFPL PC2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 398 #define SYS_GPC_MFPL_PC2MFP_I2S1_LRCK (0x1UL<<SYS_GPC_MFPL_PC2MFP_Pos) /*!< GPC_MFPL PC2 setting for I2S1_LRCK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 399 #define SYS_GPC_MFPL_PC2MFP_SC1_PWR (0x2UL<<SYS_GPC_MFPL_PC2MFP_Pos) /*!< GPC_MFPL PC2 setting for SC1_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 400 #define SYS_GPC_MFPL_PC2MFP_UART4_RTS (0x3UL<<SYS_GPC_MFPL_PC2MFP_Pos) /*!< GPC_MFPL PC2 setting for UART4_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 401 #define SYS_GPC_MFPL_PC2MFP_SPI0_SS0 (0x4UL<<SYS_GPC_MFPL_PC2MFP_Pos) /*!< GPC_MFPL PC2 setting for SPI0_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 402 #define SYS_GPC_MFPL_PC2MFP_EMAC_MII_RXDV (0x6UL<<SYS_GPC_MFPL_PC2MFP_Pos) /*!< GPC_MFPL PC2 setting for EMAC_MII_RXDV \hideinitializer */
sahilmgandhi 18:6a4db94011d3 403 #define SYS_GPC_MFPL_PC2MFP_EBI_AD12 (0x7UL<<SYS_GPC_MFPL_PC2MFP_Pos) /*!< GPC_MFPL PC2 setting for EBI_AD12 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 404
sahilmgandhi 18:6a4db94011d3 405 //GPC_MFPL_PC3MFP
sahilmgandhi 18:6a4db94011d3 406 #define SYS_GPC_MFPL_PC3MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 407 #define SYS_GPC_MFPL_PC3MFP_I2S1_MCLK (0x1UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for I2S1_MCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 408 #define SYS_GPC_MFPL_PC3MFP_SC1_CD (0x2UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for SC1_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 409 #define SYS_GPC_MFPL_PC3MFP_UART4_CTS (0x3UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for UART4_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 410 #define SYS_GPC_MFPL_PC3MFP_SPI0_MISO1 (0x4UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for SPI0_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 411 #define SYS_GPC_MFPL_PC3MFP_QEI0_Z (0x5UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for QEI0_Z \hideinitializer */
sahilmgandhi 18:6a4db94011d3 412 #define SYS_GPC_MFPL_PC3MFP_EMAC_MII_RXD1 (0x6UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for EMAC_MII_RXD1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 413 #define SYS_GPC_MFPL_PC3MFP_EBI_AD11 (0x7UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for EBI_AD11 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 414 #define SYS_GPC_MFPL_PC3MFP_ECAP0_IC2 (0x8UL<<SYS_GPC_MFPL_PC3MFP_Pos) /*!< GPC_MFPL PC3 setting for ECAP0_IC2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 415
sahilmgandhi 18:6a4db94011d3 416 //GPC_MFPL_PC4MFP
sahilmgandhi 18:6a4db94011d3 417 #define SYS_GPC_MFPL_PC4MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 418 #define SYS_GPC_MFPL_PC4MFP_I2S1_DO (0x1UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for I2S1_DO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 419 #define SYS_GPC_MFPL_PC4MFP_SC1_RST (0x2UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for SC1_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 420 #define SYS_GPC_MFPL_PC4MFP_SPI0_MOSI1 (0x4UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for SPI0_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 421 #define SYS_GPC_MFPL_PC4MFP_QEI0_B (0x5UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for QEI0_B \hideinitializer */
sahilmgandhi 18:6a4db94011d3 422 #define SYS_GPC_MFPL_PC4MFP_EMAC_MII_RXD0 (0x6UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for EMAC_MII_RXD0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 423 #define SYS_GPC_MFPL_PC4MFP_EBI_AD10 (0x7UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for EBI_AD10 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 424 #define SYS_GPC_MFPL_PC4MFP_ECAP0_IC1 (0x8UL<<SYS_GPC_MFPL_PC4MFP_Pos) /*!< GPC_MFPL PC4 setting for ECAP0_IC1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 425
sahilmgandhi 18:6a4db94011d3 426 //GPC_MFPL_PC5MFP
sahilmgandhi 18:6a4db94011d3 427 #define SYS_GPC_MFPL_PC5MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC5MFP_Pos) /*!< GPC_MFPL PC5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 428 #define SYS_GPC_MFPL_PC5MFP_CLK_O (0x1UL<<SYS_GPC_MFPL_PC5MFP_Pos) /*!< GPC_MFPL PC5 setting for CLK_O \hideinitializer */
sahilmgandhi 18:6a4db94011d3 429 #define SYS_GPC_MFPL_PC5MFP_QEI0_A (0x5UL<<SYS_GPC_MFPL_PC5MFP_Pos) /*!< GPC_MFPL PC5 setting for QEI0_A \hideinitializer */
sahilmgandhi 18:6a4db94011d3 430 #define SYS_GPC_MFPL_PC5MFP_EMAC_MII_RXCLK (0x6UL<<SYS_GPC_MFPL_PC5MFP_Pos) /*!< GPC_MFPL PC5 setting for EMAC_MII_RXCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 431 #define SYS_GPC_MFPL_PC5MFP_EBI_MCLK (0x7UL<<SYS_GPC_MFPL_PC5MFP_Pos) /*!< GPC_MFPL PC5 setting for EBI_MCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 432 #define SYS_GPC_MFPL_PC5MFP_ECAP0_IC0 (0x8UL<<SYS_GPC_MFPL_PC5MFP_Pos) /*!< GPC_MFPL PC5 setting for ECAP0_IC0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 433
sahilmgandhi 18:6a4db94011d3 434 //GPC_MFPL_PC6MFP
sahilmgandhi 18:6a4db94011d3 435 #define SYS_GPC_MFPL_PC6MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC6MFP_Pos) /*!< GPC_MFPL PC6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 436 #define SYS_GPC_MFPL_PC6MFP_TM2_EXT (0x1UL<<SYS_GPC_MFPL_PC6MFP_Pos) /*!< GPC_MFPL PC6 setting for TM2_EXT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 437 #define SYS_GPC_MFPL_PC6MFP_SPI0_MISO0 (0x4UL<<SYS_GPC_MFPL_PC6MFP_Pos) /*!< GPC_MFPL PC6 setting for SPI0_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 438 #define SYS_GPC_MFPL_PC6MFP_TM2_CNT_OUT (0x5UL<<SYS_GPC_MFPL_PC6MFP_Pos) /*!< GPC_MFPL PC6 setting for TM2_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 439 #define SYS_GPC_MFPL_PC6MFP_EMAC_MII_TXD0 (0x6UL<<SYS_GPC_MFPL_PC6MFP_Pos) /*!< GPC_MFPL PC6 setting for EMAC_MII_TXD0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 440 #define SYS_GPC_MFPL_PC6MFP_EBI_AD9 (0x7UL<<SYS_GPC_MFPL_PC6MFP_Pos) /*!< GPC_MFPL PC6 setting for EBI_AD9 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 441
sahilmgandhi 18:6a4db94011d3 442 //GPC_MFPL_PC7MFP
sahilmgandhi 18:6a4db94011d3 443 #define SYS_GPC_MFPL_PC7MFP_GPIO (0x0UL<<SYS_GPC_MFPL_PC7MFP_Pos) /*!< GPC_MFPL PC7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 444 #define SYS_GPC_MFPL_PC7MFP_TM1_EXT (0x1UL<<SYS_GPC_MFPL_PC7MFP_Pos) /*!< GPC_MFPL PC7 setting for TM1_EXT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 445 #define SYS_GPC_MFPL_PC7MFP_SPI0_MOSI0 (0x4UL<<SYS_GPC_MFPL_PC7MFP_Pos) /*!< GPC_MFPL PC7 setting for SPI0_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 446 #define SYS_GPC_MFPL_PC7MFP_EMAC_MII_TXD1 (0x6UL<<SYS_GPC_MFPL_PC7MFP_Pos) /*!< GPC_MFPL PC7 setting for EMAC_MII_TXD1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 447 #define SYS_GPC_MFPL_PC7MFP_EBI_AD8 (0x7UL<<SYS_GPC_MFPL_PC7MFP_Pos) /*!< GPC_MFPL PC7 setting for EBI_AD8 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 448
sahilmgandhi 18:6a4db94011d3 449 //GPC_MFPL_PC8MFP
sahilmgandhi 18:6a4db94011d3 450 #define SYS_GPC_MFPH_PC8MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC8MFP_Pos) /*!< GPC_MFPH PC8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 451 #define SYS_GPC_MFPH_PC8MFP_TM0_EXT (0x1UL<<SYS_GPC_MFPH_PC8MFP_Pos) /*!< GPC_MFPH PC8 setting for TM0_EXT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 452 #define SYS_GPC_MFPH_PC8MFP_SPI0_CLK (0x4UL<<SYS_GPC_MFPH_PC8MFP_Pos) /*!< GPC_MFPH PC8 setting for SPI0_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 453 #define SYS_GPC_MFPH_PC8MFP_EMAC_MII_TXEN (0x6UL<<SYS_GPC_MFPH_PC8MFP_Pos) /*!< GPC_MFPH PC8 setting for EMAC_MII_TXEN \hideinitializer */
sahilmgandhi 18:6a4db94011d3 454
sahilmgandhi 18:6a4db94011d3 455 //GPC_MFPH_PC9MFP
sahilmgandhi 18:6a4db94011d3 456 #define SYS_GPC_MFPH_PC9MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 457 #define SYS_GPC_MFPH_PC9MFP_STADC (0x1UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for STADC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 458 #define SYS_GPC_MFPH_PC9MFP_UART2_CTS (0x2UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for UART2_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 459 #define SYS_GPC_MFPH_PC9MFP_SC3_RST (0x3UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for SC3_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 460 #define SYS_GPC_MFPH_PC9MFP_I2C0_SDA (0x4UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for I2C0_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 461 #define SYS_GPC_MFPH_PC9MFP_CAP_DATA1 (0x5UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for CAP_DATA1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 462 #define SYS_GPC_MFPH_PC9MFP_I2C3_SCL (0x6UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for I2C3_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 463 #define SYS_GPC_MFPH_PC9MFP_EBI_A22 (0x7UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for EBI_A22 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 464 #define SYS_GPC_MFPH_PC9MFP_SD1_DAT0 (0x8UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for SD1_DAT0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 465 #define SYS_GPC_MFPH_PC9MFP_EBI_A6 (0x9UL<<SYS_GPC_MFPH_PC9MFP_Pos) /*!< GPC_MFPH PC9 setting for EBI_A6 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 466 //GPC_MFPH_PC10MFP
sahilmgandhi 18:6a4db94011d3 467 #define SYS_GPC_MFPH_PC10MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< GPC_MFPH PC10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 468 #define SYS_GPC_MFPH_PC10MFP_SC3_CD (0x1UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< GPC_MFPH PC10 setting for SC3_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 469 #define SYS_GPC_MFPH_PC10MFP_UART2_RXD (0x2UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< GPC_MFPH PC10 setting for UART2_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 470 #define SYS_GPC_MFPH_PC10MFP_PWM0_CH2 (0x4UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< GPC_MFPH PC10 setting for PWM0_CH2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 471 #define SYS_GPC_MFPH_PC10MFP_EBI_A23 (0x6UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< GPC_MFPH PC10 setting for EBI_A23 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 472 #define SYS_GPC_MFPH_PC10MFP_EBI_AD2 (0x7UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< GPC_MFPH PC10 setting for EBI_AD2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 473
sahilmgandhi 18:6a4db94011d3 474 //GPC_MFPH_PC11MFP
sahilmgandhi 18:6a4db94011d3 475 #define SYS_GPC_MFPH_PC11MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< GPC_MFPH PC11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 476 #define SYS_GPC_MFPH_PC11MFP_UART2_TXD (0x2UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< GPC_MFPH PC11 setting for UART2_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 477 #define SYS_GPC_MFPH_PC11MFP_PWM0_CH3 (0x4UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< GPC_MFPH PC11 setting for PWM0_CH3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 478 #define SYS_GPC_MFPH_PC11MFP_EBI_A24 (0x6UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< GPC_MFPH PC11 setting for EBI_A24 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 479 #define SYS_GPC_MFPH_PC11MFP_EBI_AD3 (0x7UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< GPC_MFPH PC11 setting for EBI_AD3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 480
sahilmgandhi 18:6a4db94011d3 481 //GPC_MFPH_PC12MFP
sahilmgandhi 18:6a4db94011d3 482 #define SYS_GPC_MFPH_PC12MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< GPC_MFPH PC12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 483 #define SYS_GPC_MFPH_PC12MFP_SPI1_SS0 (0x1UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< GPC_MFPH PC12 setting for SPI1_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 484 #define SYS_GPC_MFPH_PC12MFP_SC4_CD (0x2UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< GPC_MFPH PC12 setting for SC4_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 485 #define SYS_GPC_MFPH_PC12MFP_SD1_CDn (0x4UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< GPC_MFPH PC12 setting for SD1_CDn \hideinitializer */
sahilmgandhi 18:6a4db94011d3 486 #define SYS_GPC_MFPH_PC12MFP_CAP_DATA7 (0x5UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< GPC_MFPH PC12 setting for CAP_DATA7 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 487 #define SYS_GPC_MFPH_PC12MFP_ETM_TRACE_DATA3 (0x6UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< GPC_MFPH PC12 setting for ETM_TRACE_DATA3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 488 #define SYS_GPC_MFPH_PC12MFP_EBI_A0 (0x7UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< GPC_MFPH PC12 setting for MFP_EBI_A0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 489
sahilmgandhi 18:6a4db94011d3 490 //GPC_MFPH_PC13MFP
sahilmgandhi 18:6a4db94011d3 491 #define SYS_GPC_MFPH_PC13MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< GPC_MFPH PC13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 492 #define SYS_GPC_MFPH_PC13MFP_SPI1_MOSI1 (0x1UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< GPC_MFPH PC13 setting for SPI1_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 493 #define SYS_GPC_MFPH_PC13MFP_SC4_RST (0x2UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< GPC_MFPH PC13 setting for SC4_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 494 #define SYS_GPC_MFPH_PC13MFP_SD1_CMD (0x4UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< GPC_MFPH PC13 setting for SD1_CMD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 495 #define SYS_GPC_MFPH_PC13MFP_CAP_DATA6 (0x5UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< GPC_MFPH PC13 setting for CAP_DATA6 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 496 #define SYS_GPC_MFPH_PC13MFP_ETM_TRACE_DATA2 (0x6UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< GPC_MFPH PC13 setting for ETM_TRACE_DATA2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 497 #define SYS_GPC_MFPH_PC13MFP_EBI_A1 (0x7UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< GPC_MFPH PC13 setting for EBI_A1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 498
sahilmgandhi 18:6a4db94011d3 499 //GPC_MFPH_PC14MFP
sahilmgandhi 18:6a4db94011d3 500 #define SYS_GPC_MFPH_PC14MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 501 #define SYS_GPC_MFPH_PC14MFP_SPI1_MISO1 (0x1UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for SPI1_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 502 #define SYS_GPC_MFPH_PC14MFP_SC4_PWR (0x2UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for SC4_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 503 #define SYS_GPC_MFPH_PC14MFP_TM3_EXT (0x3UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for TM3_EXT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 504 #define SYS_GPC_MFPH_PC14MFP_SD1_CLK (0x4UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for SD1_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 505 #define SYS_GPC_MFPH_PC14MFP_CAP_DATA5 (0x5UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for CAP_DATA5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 506 #define SYS_GPC_MFPH_PC14MFP_ETM_TRACE_DATA1 (0x6UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for ETM_TRACE_DATA1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 507 #define SYS_GPC_MFPH_PC14MFP_EBI_A2 (0x7UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< GPC_MFPH PC14 setting for EBI_A2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 508
sahilmgandhi 18:6a4db94011d3 509 //GPC_MFPH_PC15MFP
sahilmgandhi 18:6a4db94011d3 510 #define SYS_GPC_MFPH_PC15MFP_GPIO (0x0UL<<SYS_GPC_MFPH_PC15MFP_Pos) /*!< GPC_MFPH PC15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 511 #define SYS_GPC_MFPH_PC15MFP_SPI1_MOSI0 (0x1UL<<SYS_GPC_MFPH_PC15MFP_Pos) /*!< GPC_MFPH PC15 setting for SPI1_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 512 #define SYS_GPC_MFPH_PC15MFP_SC4_DAT (0x2UL<<SYS_GPC_MFPH_PC15MFP_Pos) /*!< GPC_MFPH PC15 setting for SC4_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 513 #define SYS_GPC_MFPH_PC15MFP_SD1_DAT3 (0x4UL<<SYS_GPC_MFPH_PC15MFP_Pos) /*!< GPC_MFPH PC15 setting for SD1_DAT3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 514 #define SYS_GPC_MFPH_PC15MFP_CAP_DATA4 (0x5UL<<SYS_GPC_MFPH_PC15MFP_Pos) /*!< GPC_MFPH PC15 setting for CAP_DATA4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 515 #define SYS_GPC_MFPH_PC15MFP_ETM_TRACE_DATA0 (0x6UL<<SYS_GPC_MFPH_PC15MFP_Pos) /*!< GPC_MFPH PC15 setting for ETM_TRACE_DATA0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 516 #define SYS_GPC_MFPH_PC15MFP_EBI_A3 (0x7UL<<SYS_GPC_MFPH_PC15MFP_Pos) /*!< GPC_MFPH PC15 setting for EBI_A3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 517
sahilmgandhi 18:6a4db94011d3 518 //GPD_MFPL_PD0MFP
sahilmgandhi 18:6a4db94011d3 519 #define SYS_GPD_MFPL_PD0MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 520 #define SYS_GPD_MFPL_PD0MFP_SPI1_MISO0 (0x1UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for SPI1_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 521 #define SYS_GPD_MFPL_PD0MFP_SC4_CLK (0x2UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for SC4_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 522 #define SYS_GPD_MFPL_PD0MFP_SD1_DAT2 (0x4UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for SD1_DAT2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 523 #define SYS_GPD_MFPL_PD0MFP_CAP_DATA3 (0x5UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for CAP_DATA3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 524 #define SYS_GPD_MFPL_PD0MFP_ETM_TRACE_CLK (0x6UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for ETM_TRACE_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 525 #define SYS_GPD_MFPL_PD0MFP_EBI_A4 (0x7UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for EBI_A4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 526 #define SYS_GPD_MFPL_PD0MFP_INT3 (0x8UL<<SYS_GPD_MFPL_PD0MFP_Pos) /*!< GPD_MFPL PD0 setting for INT3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 527
sahilmgandhi 18:6a4db94011d3 528 //GPD_MFPL_PD1MFP
sahilmgandhi 18:6a4db94011d3 529 #define SYS_GPD_MFPL_PD1MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD1MFP_Pos) /*!< GPD_MFPL PD1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 530 #define SYS_GPD_MFPL_PD1MFP_SPI1_CLK (0x1UL<<SYS_GPD_MFPL_PD1MFP_Pos) /*!< GPD_MFPL PD1 setting for SPI1_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 531 #define SYS_GPD_MFPL_PD1MFP_TM0_CNT_OUT (0x3UL<<SYS_GPD_MFPL_PD1MFP_Pos) /*!< GPD_MFPL PD1 setting for TM0_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 532 #define SYS_GPD_MFPL_PD1MFP_SD1_DAT1 (0x4UL<<SYS_GPD_MFPL_PD1MFP_Pos) /*!< GPD_MFPL PD1 setting for SD1_DAT1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 533 #define SYS_GPD_MFPL_PD1MFP_CAP_DATA2 (0x5UL<<SYS_GPD_MFPL_PD1MFP_Pos) /*!< GPD_MFPL PD1 setting for CAP_DATA2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 534 #define SYS_GPD_MFPL_PD1MFP_EBI_A5 (0x7UL<<SYS_GPD_MFPL_PD1MFP_Pos) /*!< GPD_MFPL PD1 setting for EBI_A5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 535
sahilmgandhi 18:6a4db94011d3 536 //GPD_MFPL_PD2MFP
sahilmgandhi 18:6a4db94011d3 537 #define SYS_GPD_MFPL_PD2MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD2MFP_Pos) /*!< GPD_MFPL PD2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 538 #define SYS_GPD_MFPL_PD2MFP_STADC (0x1UL<<SYS_GPD_MFPL_PD2MFP_Pos) /*!< GPD_MFPL PD2 setting for STADC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 539 #define SYS_GPD_MFPL_PD2MFP_I2C3_SCL (0x2UL<<SYS_GPD_MFPL_PD2MFP_Pos) /*!< GPD_MFPL PD2 setting for I2C3_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 540 #define SYS_GPD_MFPL_PD2MFP_SD1_DAT0 (0x4UL<<SYS_GPD_MFPL_PD2MFP_Pos) /*!< GPD_MFPL PD2 setting for SD1_DAT0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 541 #define SYS_GPD_MFPL_PD2MFP_CAP_DATA1 (0x5UL<<SYS_GPD_MFPL_PD2MFP_Pos) /*!< GPD_MFPL PD2 setting for CAP_DATA1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 542 #define SYS_GPD_MFPL_PD2MFP_EBI_A6 (0x7UL<<SYS_GPD_MFPL_PD2MFP_Pos) /*!< GPD_MFPL PD2 setting for EBI_A6 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 543
sahilmgandhi 18:6a4db94011d3 544 //GPD_MFPL_PD3MFP
sahilmgandhi 18:6a4db94011d3 545 #define SYS_GPD_MFPL_PD3MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 546 #define SYS_GPD_MFPL_PD3MFP_SC5_CLK (0x1UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for SC5_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 547 #define SYS_GPD_MFPL_PD3MFP_I2C3_SDA (0x2UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for I2C3_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 548 #define SYS_GPD_MFPL_PD3MFP_ACMP2_O (0x3UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for ACMP2_O \hideinitializer */
sahilmgandhi 18:6a4db94011d3 549 #define SYS_GPD_MFPL_PD3MFP_SD0_CDn (0x4UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for SD0_CDn \hideinitializer */
sahilmgandhi 18:6a4db94011d3 550 #define SYS_GPD_MFPL_PD3MFP_CAP_DATA0 (0x5UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for CAP_DATA0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 551 #define SYS_GPD_MFPL_PD3MFP_JTAG_TDO (0x6UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for JTAG_TDO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 552 #define SYS_GPD_MFPL_PD3MFP_EBI_A7 (0x7UL<<SYS_GPD_MFPL_PD3MFP_Pos) /*!< GPD_MFPL PD3 setting for EBI_A7 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 553
sahilmgandhi 18:6a4db94011d3 554 //GPD_MFPL_PD4MFP
sahilmgandhi 18:6a4db94011d3 555 #define SYS_GPD_MFPL_PD4MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD4MFP_Pos) /*!< GPD_MFPL PD4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 556 #define SYS_GPD_MFPL_PD4MFP_SC5_CD (0x1UL<<SYS_GPD_MFPL_PD4MFP_Pos) /*!< GPD_MFPL PD4 setting for SC5_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 557 #define SYS_GPD_MFPL_PD4MFP_UART3_RXD (0x2UL<<SYS_GPD_MFPL_PD4MFP_Pos) /*!< GPD_MFPL PD4 setting for UART3_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 558 #define SYS_GPD_MFPL_PD4MFP_ACMP1_O (0x3UL<<SYS_GPD_MFPL_PD4MFP_Pos) /*!< GPD_MFPL PD4 setting for ACMP1_O \hideinitializer */
sahilmgandhi 18:6a4db94011d3 559 #define SYS_GPD_MFPL_PD4MFP_CAP_SCLK (0x5UL<<SYS_GPD_MFPL_PD4MFP_Pos) /*!< GPD_MFPL PD4 setting for CAP_SCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 560 #define SYS_GPD_MFPL_PD4MFP_JTAG_TDI (0x6UL<<SYS_GPD_MFPL_PD4MFP_Pos) /*!< GPD_MFPL PD4 setting for JTAG_TDI \hideinitializer */
sahilmgandhi 18:6a4db94011d3 561 #define SYS_GPD_MFPL_PD4MFP_EBI_A8 (0x7UL<<SYS_GPD_MFPL_PD4MFP_Pos) /*!< GPD_MFPL PD4 setting for EBI_A8 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 562
sahilmgandhi 18:6a4db94011d3 563 //GPD_MFPL_PD5MFP
sahilmgandhi 18:6a4db94011d3 564 #define SYS_GPD_MFPL_PD5MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD5MFP_Pos) /*!< GPD_MFPL PD5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 565 #define SYS_GPD_MFPL_PD5MFP_SC5_RST (0x1UL<<SYS_GPD_MFPL_PD5MFP_Pos) /*!< GPD_MFPL PD5 setting for SC5_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 566 #define SYS_GPD_MFPL_PD5MFP_UART3_TXD (0x2UL<<SYS_GPD_MFPL_PD5MFP_Pos) /*!< GPD_MFPL PD5 setting for UART3_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 567 #define SYS_GPD_MFPL_PD5MFP_CAP_VSYNC (0x5UL<<SYS_GPD_MFPL_PD5MFP_Pos) /*!< GPD_MFPL PD5 setting for CAP_VSYNC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 568 #define SYS_GPD_MFPL_PD5MFP_JTAG_nTRST (0x6UL<<SYS_GPD_MFPL_PD5MFP_Pos) /*!< GPD_MFPL PD5 setting for JTAG_nTRST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 569 #define SYS_GPD_MFPL_PD5MFP_EBI_A9 (0x7UL<<SYS_GPD_MFPL_PD5MFP_Pos) /*!< GPD_MFPL PD5 setting for EBI_A9 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 570
sahilmgandhi 18:6a4db94011d3 571 //GPD_MFPL_PD6MFP
sahilmgandhi 18:6a4db94011d3 572 #define SYS_GPD_MFPL_PD6MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD6MFP_Pos) /*!< GPD_MFPL PD6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 573 #define SYS_GPD_MFPL_PD6MFP_SC5_PWR (0x1UL<<SYS_GPD_MFPL_PD6MFP_Pos) /*!< GPD_MFPL PD6 setting for SC5_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 574 #define SYS_GPD_MFPL_PD6MFP_UART3_RTS (0x2UL<<SYS_GPD_MFPL_PD6MFP_Pos) /*!< GPD_MFPL PD6 setting for UART3_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 575 #define SYS_GPD_MFPL_PD6MFP_SD0_CMD (0x4UL<<SYS_GPD_MFPL_PD6MFP_Pos) /*!< GPD_MFPL PD6 setting for SD0_CMD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 576 #define SYS_GPD_MFPL_PD6MFP_CAP_HSYNC (0x5UL<<SYS_GPD_MFPL_PD6MFP_Pos) /*!< GPD_MFPL PD6 setting for CAP_HSYNC \hideinitializer */
sahilmgandhi 18:6a4db94011d3 577 #define SYS_GPD_MFPL_PD6MFP_EBI_A10 (0x7UL<<SYS_GPD_MFPL_PD6MFP_Pos) /*!< GPD_MFPL PD6 setting for EBI_A10 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 578
sahilmgandhi 18:6a4db94011d3 579 //GPD_MFPL_PD7MFP
sahilmgandhi 18:6a4db94011d3 580 #define SYS_GPD_MFPL_PD7MFP_GPIO (0x0UL<<SYS_GPD_MFPL_PD7MFP_Pos) /*!< GPD_MFPL PD7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 581 #define SYS_GPD_MFPL_PD7MFP_SC5_DAT (0x1UL<<SYS_GPD_MFPL_PD7MFP_Pos) /*!< GPD_MFPL PD7 setting for SC5_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 582 #define SYS_GPD_MFPL_PD7MFP_UART3_CTS (0x2UL<<SYS_GPD_MFPL_PD7MFP_Pos) /*!< GPD_MFPL PD7 setting for UART3_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 583 #define SYS_GPD_MFPL_PD7MFP_SD0_CLK (0x4UL<<SYS_GPD_MFPL_PD7MFP_Pos) /*!< GPD_MFPL PD7 setting for SD0_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 584 #define SYS_GPD_MFPL_PD7MFP_CAP_PIXCLK (0x5UL<<SYS_GPD_MFPL_PD7MFP_Pos) /*!< GPD_MFPL PD7 setting for CAP_PIXCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 585 #define SYS_GPD_MFPL_PD7MFP_EBI_A11 (0x7UL<<SYS_GPD_MFPL_PD7MFP_Pos) /*!< GPD_MFPL PD7 setting for EBI_A11 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 586
sahilmgandhi 18:6a4db94011d3 587 //GPD_MFPL_PD8MFP
sahilmgandhi 18:6a4db94011d3 588 #define SYS_GPD_MFPH_PD8MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD8MFP_Pos) /*!< GPD_MFPH PD8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 589 #define SYS_GPD_MFPH_PD8MFP_SPI3_MISO1 (0x1UL<<SYS_GPD_MFPH_PD8MFP_Pos) /*!< GPD_MFPH PD8 setting for SPI3_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 590 #define SYS_GPD_MFPH_PD8MFP_I2C0_SCL (0x2UL<<SYS_GPD_MFPH_PD8MFP_Pos) /*!< GPD_MFPH PD8 setting for I2C0_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 591
sahilmgandhi 18:6a4db94011d3 592 //GPD_MFPH_PD9MFP
sahilmgandhi 18:6a4db94011d3 593 #define SYS_GPD_MFPH_PD9MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD9MFP_Pos) /*!< GPD_MFPH PD9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 594 #define SYS_GPD_MFPH_PD9MFP_SPI3_MOSI1 (0x1UL<<SYS_GPD_MFPH_PD9MFP_Pos) /*!< GPD_MFPH PD9 setting for SPI3_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 595 #define SYS_GPD_MFPH_PD9MFP_I2C0_SDA (0x2UL<<SYS_GPD_MFPH_PD9MFP_Pos) /*!< GPD_MFPH PD9 setting for I2C0_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 596
sahilmgandhi 18:6a4db94011d3 597 //GPD_MFPH_PD10MFP
sahilmgandhi 18:6a4db94011d3 598 #define SYS_GPD_MFPH_PD10MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< GPD_MFPH PD10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 599 #define SYS_GPD_MFPH_PD10MFP_SC3_DAT (0x1UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< GPD_MFPH PD10 setting for SC3_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 600 #define SYS_GPD_MFPH_PD10MFP_I2C4_SCL (0x2UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< GPD_MFPH PD10 setting for I2C4_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 601
sahilmgandhi 18:6a4db94011d3 602 //GPD_MFPH_PD11MFP
sahilmgandhi 18:6a4db94011d3 603 #define SYS_GPD_MFPH_PD11MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< GPD_MFPH PD11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 604 #define SYS_GPD_MFPH_PD11MFP_SC3_RST (0x1UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< GPD_MFPH PD11 setting for SC3_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 605 #define SYS_GPD_MFPH_PD11MFP_TM3_CNT_OUT (0x3UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< GPD_MFPH PD11 setting for TM3_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 606
sahilmgandhi 18:6a4db94011d3 607 //GPD_MFPH_PD12MFP
sahilmgandhi 18:6a4db94011d3 608 #define SYS_GPD_MFPH_PD12MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< GPD_MFPH PD12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 609 #define SYS_GPD_MFPH_PD12MFP_SC3_CLK (0x1UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< GPD_MFPH PD12 setting for SC3_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 610 #define SYS_GPD_MFPH_PD12MFP_I2C4_SDA (0x2UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< GPD_MFPH PD12 setting for I2C4_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 611
sahilmgandhi 18:6a4db94011d3 612 //GPD_MFPH_PD13MFP
sahilmgandhi 18:6a4db94011d3 613 #define SYS_GPD_MFPH_PD13MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< GPD_MFPH PD13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 614 #define SYS_GPD_MFPH_PD13MFP_SPI1_SS0 (0x1UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< GPD_MFPH PD13 setting for SPI1_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 615 #define SYS_GPD_MFPH_PD13MFP_UART5_CTS (0x2UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< GPD_MFPH PD13 setting for UART5_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 616 #define SYS_GPD_MFPH_PD13MFP_ECAP0_IC2 (0x3UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< GPD_MFPH PD13 setting for ECAP0_IC2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 617
sahilmgandhi 18:6a4db94011d3 618 //GPD_MFPH_PD14MFP
sahilmgandhi 18:6a4db94011d3 619 #define SYS_GPD_MFPH_PD14MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< GPD_MFPH PD14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 620 #define SYS_GPD_MFPH_PD14MFP_SPI1_CLK (0x1UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< GPD_MFPH PD14 setting for SPI1_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 621 #define SYS_GPD_MFPH_PD14MFP_UART5_RTS (0x2UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< GPD_MFPH PD14 setting for UART5_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 622 #define SYS_GPD_MFPH_PD14MFP_ECAP0_IC1 (0x3UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< GPD_MFPH PD14 setting for ECAP0_IC1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 623
sahilmgandhi 18:6a4db94011d3 624 //GPD_MFPH_PD15MFP
sahilmgandhi 18:6a4db94011d3 625 #define SYS_GPD_MFPH_PD15MFP_GPIO (0x0UL<<SYS_GPD_MFPH_PD15MFP_Pos) /*!< GPD_MFPH PD15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 626 #define SYS_GPD_MFPH_PD15MFP_SPI1_MISO0 (0x1UL<<SYS_GPD_MFPH_PD15MFP_Pos) /*!< GPD_MFPH PD15 setting for SPI1_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 627 #define SYS_GPD_MFPH_PD15MFP_UART5_TXD (0x2UL<<SYS_GPD_MFPH_PD15MFP_Pos) /*!< GPD_MFPH PD15 setting for UART5_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 628 #define SYS_GPD_MFPH_PD15MFP_ECAP0_IC0 (0x3UL<<SYS_GPD_MFPH_PD15MFP_Pos) /*!< GPD_MFPH PD15 setting for ECAP0_IC0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 629
sahilmgandhi 18:6a4db94011d3 630 //GPE_MFPL_PE0MFP
sahilmgandhi 18:6a4db94011d3 631 #define SYS_GPE_MFPL_PE0MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE0MFP_Pos) /*!< GPE_MFPL PE0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 632 #define SYS_GPE_MFPL_PE0MFP_ADC0_0 (0x1UL<<SYS_GPE_MFPL_PE0MFP_Pos) /*!< GPE_MFPL PE0 setting for ADC0_0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 633 #define SYS_GPE_MFPL_PE0MFP_INT4 (0x8UL<<SYS_GPE_MFPL_PE0MFP_Pos) /*!< GPE_MFPL PE0 setting for INT4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 634
sahilmgandhi 18:6a4db94011d3 635 //GPE_MFPL_PE1MFP
sahilmgandhi 18:6a4db94011d3 636 #define SYS_GPE_MFPL_PE1MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE1MFP_Pos) /*!< GPE_MFPL PE1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 637 #define SYS_GPE_MFPL_PE1MFP_ADC0_1 (0x1UL<<SYS_GPE_MFPL_PE1MFP_Pos) /*!< GPE_MFPL PE1 setting for ADC0_1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 638 #define SYS_GPE_MFPL_PE1MFP_TM2_CNT_OUT (0x3UL<<SYS_GPE_MFPL_PE1MFP_Pos) /*!< GPE_MFPL PE1 setting for TM2_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 639
sahilmgandhi 18:6a4db94011d3 640 //GPE_MFPL_PE2MFP
sahilmgandhi 18:6a4db94011d3 641 #define SYS_GPE_MFPL_PE2MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE2MFP_Pos) /*!< GPE_MFPL PE2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 642 #define SYS_GPE_MFPL_PE2MFP_ADC0_2 (0x1UL<<SYS_GPE_MFPL_PE2MFP_Pos) /*!< GPE_MFPL PE2 setting for ADC0_2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 643 #define SYS_GPE_MFPL_PE2MFP_ACMP0_O (0x2UL<<SYS_GPE_MFPL_PE2MFP_Pos) /*!< GPE_MFPL PE2 setting for ACMP0_O \hideinitializer */
sahilmgandhi 18:6a4db94011d3 644 #define SYS_GPE_MFPL_PE2MFP_SPI0_MISO0 (0x3UL<<SYS_GPE_MFPL_PE2MFP_Pos) /*!< GPE_MFPL PE2 setting for SPI0_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 645
sahilmgandhi 18:6a4db94011d3 646 //GPE_MFPL_PE3MFP
sahilmgandhi 18:6a4db94011d3 647 #define SYS_GPE_MFPL_PE3MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE3MFP_Pos) /*!< GPE_MFPL PE3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 648 #define SYS_GPE_MFPL_PE3MFP_ADC0_3 (0x1UL<<SYS_GPE_MFPL_PE3MFP_Pos) /*!< GPE_MFPL PE3 setting for ADC0_3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 649 #define SYS_GPE_MFPL_PE3MFP_ACMP0_P3 (0x2UL<<SYS_GPE_MFPL_PE3MFP_Pos) /*!< GPE_MFPL PE3 setting for ACMP0_P3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 650 #define SYS_GPE_MFPL_PE3MFP_SPI0_MOSI0 (0x3UL<<SYS_GPE_MFPL_PE3MFP_Pos) /*!< GPE_MFPL PE3 setting for SPI0_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 651
sahilmgandhi 18:6a4db94011d3 652 //GPE_MFPL_PE4MFP
sahilmgandhi 18:6a4db94011d3 653 #define SYS_GPE_MFPL_PE4MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE4MFP_Pos) /*!< GPE_MFPL PE4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 654 #define SYS_GPE_MFPL_PE4MFP_ADC0_4 (0x1UL<<SYS_GPE_MFPL_PE4MFP_Pos) /*!< GPE_MFPL PE4 setting for ADC0_4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 655 #define SYS_GPE_MFPL_PE4MFP_ACMP0_P2 (0x2UL<<SYS_GPE_MFPL_PE4MFP_Pos) /*!< GPE_MFPL PE4 setting for ACMP0_P2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 656 #define SYS_GPE_MFPL_PE4MFP_SPI0_SS0 (0x3UL<<SYS_GPE_MFPL_PE4MFP_Pos) /*!< GPE_MFPL PE4 setting for SPI0_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 657
sahilmgandhi 18:6a4db94011d3 658 //GPE_MFPL_PE5MFP
sahilmgandhi 18:6a4db94011d3 659 #define SYS_GPE_MFPL_PE5MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE5MFP_Pos) /*!< GPE_MFPL PE5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 660 #define SYS_GPE_MFPL_PE5MFP_ADC0_5 (0x1UL<<SYS_GPE_MFPL_PE5MFP_Pos) /*!< GPE_MFPL PE5 setting for ADC0_5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 661 #define SYS_GPE_MFPL_PE5MFP_ACMP0_P1 (0x2UL<<SYS_GPE_MFPL_PE5MFP_Pos) /*!< GPE_MFPL PE5 setting for ACMP0_P1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 662 #define SYS_GPE_MFPL_PE5MFP_SPI0_CLK (0x3UL<<SYS_GPE_MFPL_PE5MFP_Pos) /*!< GPE_MFPL PE5 setting for SPI0_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 663 #define SYS_GPE_MFPL_PE5MFP_SD0_CDn (0x4UL<<SYS_GPE_MFPL_PE5MFP_Pos) /*!< GPE_MFPL PE5 setting for SD0_CDn \hideinitializer */
sahilmgandhi 18:6a4db94011d3 664
sahilmgandhi 18:6a4db94011d3 665 //GPE_MFPL_PE6MFP
sahilmgandhi 18:6a4db94011d3 666 #define SYS_GPE_MFPL_PE6MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE6MFP_Pos) /*!< GPE_MFPL PE6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 667 #define SYS_GPE_MFPL_PE6MFP_ADC0_6 (0x1UL<<SYS_GPE_MFPL_PE6MFP_Pos) /*!< GPE_MFPL PE6 setting for ADC0_6 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 668 #define SYS_GPE_MFPL_PE6MFP_ACMP0_P0 (0x2UL<<SYS_GPE_MFPL_PE6MFP_Pos) /*!< GPE_MFPL PE6 setting for ACMP0_P0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 669 #define SYS_GPE_MFPL_PE6MFP_SPI0_MISO0 (0x3UL<<SYS_GPE_MFPL_PE6MFP_Pos) /*!< GPE_MFPL PE6 setting for SPI0_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 670 #define SYS_GPE_MFPL_PE6MFP_SD0_CMD (0x4UL<<SYS_GPE_MFPL_PE6MFP_Pos) /*!< GPE_MFPL PE6 setting for SD0_CMD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 671 #define SYS_GPE_MFPL_PE6MFP_EBI_nWR (0x7UL<<SYS_GPE_MFPL_PE6MFP_Pos) /*!< GPE_MFPL PE6 setting for EBI_nWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 672
sahilmgandhi 18:6a4db94011d3 673 //GPE_MFPL_PE7MFP
sahilmgandhi 18:6a4db94011d3 674 #define SYS_GPE_MFPL_PE7MFP_GPIO (0x0UL<<SYS_GPE_MFPL_PE7MFP_Pos) /*!< GPE_MFPL PE7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 675 #define SYS_GPE_MFPL_PE7MFP_ADC0_7 (0x1UL<<SYS_GPE_MFPL_PE7MFP_Pos) /*!< GPE_MFPL PE7 setting for ADC0_7 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 676 #define SYS_GPE_MFPL_PE7MFP_ACMP0_N (0x2UL<<SYS_GPE_MFPL_PE7MFP_Pos) /*!< GPE_MFPL PE7 setting for ACMP0_N \hideinitializer */
sahilmgandhi 18:6a4db94011d3 677 #define SYS_GPE_MFPL_PE7MFP_SPI0_MOSI0 (0x3UL<<SYS_GPE_MFPL_PE7MFP_Pos) /*!< GPE_MFPL PE7 setting for SPI0_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 678 #define SYS_GPE_MFPL_PE7MFP_SD0_CLK (0x4UL<<SYS_GPE_MFPL_PE7MFP_Pos) /*!< GPE_MFPL PE7 setting for SD0_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 679 #define SYS_GPE_MFPL_PE7MFP_EBI_nRD (0x7UL<<SYS_GPE_MFPL_PE7MFP_Pos) /*!< GPE_MFPL PE7 setting for _EBI_nRD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 680
sahilmgandhi 18:6a4db94011d3 681 //GPE_MFPL_PE8MFP
sahilmgandhi 18:6a4db94011d3 682 #define SYS_GPE_MFPH_PE8MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE8MFP_Pos) /*!< GPE_MFPH PE8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 683 #define SYS_GPE_MFPH_PE8MFP_ADC0_8 (0x1UL<<SYS_GPE_MFPH_PE8MFP_Pos) /*!< GPE_MFPH PE8 setting for ADC0_8 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 684 #define SYS_GPE_MFPH_PE8MFP_ADC1_0 (0x1UL<<SYS_GPE_MFPH_PE8MFP_Pos) /*!< GPE_MFPH PE8 setting for ADC1_0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 685 #define SYS_GPE_MFPH_PE8MFP_ACMP1_N (0x2UL<<SYS_GPE_MFPH_PE8MFP_Pos) /*!< GPE_MFPH PE8 setting for ACMP1_N \hideinitializer */
sahilmgandhi 18:6a4db94011d3 686 #define SYS_GPE_MFPH_PE8MFP_TM1_CNT_OUT (0x3UL<<SYS_GPE_MFPH_PE8MFP_Pos) /*!< GPE_MFPH PE8 setting for TM1_CNT_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 687 #define SYS_GPE_MFPH_PE8MFP_SD0_DAT3 (0x4UL<<SYS_GPE_MFPH_PE8MFP_Pos) /*!< GPE_MFPH PE8 setting for SD0_DAT3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 688 #define SYS_GPE_MFPH_PE8MFP_EBI_ALE (0x7UL<<SYS_GPE_MFPH_PE8MFP_Pos) /*!< GPE_MFPH PE8 setting for EBI_ALE \hideinitializer */
sahilmgandhi 18:6a4db94011d3 689
sahilmgandhi 18:6a4db94011d3 690 //GPE_MFPH_PE9MFP
sahilmgandhi 18:6a4db94011d3 691 #define SYS_GPE_MFPH_PE9MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< GPE_MFPH PE9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 692 #define SYS_GPE_MFPH_PE9MFP_ADC0_9 (0x1UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< GPE_MFPH PE9 setting for ADC0_9 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 693 #define SYS_GPE_MFPH_PE9MFP_ADC1_1 (0x1UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< GPE_MFPH PE9 setting for ADC1_1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 694 #define SYS_GPE_MFPH_PE9MFP_ACMP1_P0 (0x2UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< GPE_MFPH PE9 setting for ACMP1_P0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 695 #define SYS_GPE_MFPH_PE9MFP_SD0_DAT2 (0x4UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< GPE_MFPH PE9 setting for SD0_DAT2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 696 #define SYS_GPE_MFPH_PE9MFP_EBI_nWRH (0x7UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< GPE_MFPH PE9 setting for EBI_nWRH \hideinitializer */
sahilmgandhi 18:6a4db94011d3 697
sahilmgandhi 18:6a4db94011d3 698 //GPE_MFPH_PE10MFP
sahilmgandhi 18:6a4db94011d3 699 #define SYS_GPE_MFPH_PE10MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< GPE_MFPH PE10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 700 #define SYS_GPE_MFPH_PE10MFP_ADC0_10 (0x1UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< GPE_MFPH PE10 setting for ADC0_10 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 701 #define SYS_GPE_MFPH_PE10MFP_ADC1_2 (0x1UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< GPE_MFPH PE10 setting for ADC1_2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 702 #define SYS_GPE_MFPH_PE10MFP_ACMP1_P1 (0x2UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< GPE_MFPH PE10 setting for ACMP1_P1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 703 #define SYS_GPE_MFPH_PE10MFP_SPI0_MISO1 (0x3UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< GPE_MFPH PE10 setting for SPI0_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 704 #define SYS_GPE_MFPH_PE10MFP_SD0_DAT1 (0x4UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< GPE_MFPH PE10 setting for SD0_DAT1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 705 #define SYS_GPE_MFPH_PE10MFP_EBI_nWRL (0x7UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< GPE_MFPH PE10 setting for EBI_nWRL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 706
sahilmgandhi 18:6a4db94011d3 707 //GPE_MFPH_PE11MFP
sahilmgandhi 18:6a4db94011d3 708 #define SYS_GPE_MFPH_PE11MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 709 #define SYS_GPE_MFPH_PE11MFP_ADC0_11 (0x1UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for ADC0_11 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 710 #define SYS_GPE_MFPH_PE11MFP_ADC1_3 (0x1UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for ADC1_3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 711 #define SYS_GPE_MFPH_PE11MFP_ACMP1_P2 (0x2UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for ACMP1_P2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 712 #define SYS_GPE_MFPH_PE11MFP_SPI0_MOSI1 (0x3UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for SPI0_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 713 #define SYS_GPE_MFPH_PE11MFP_SD0_DAT0 (0x4UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for SD0_DAT0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 714 #define SYS_GPE_MFPH_PE11MFP_ACMP2_P3 (0x5UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for ACMP2_P3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 715 #define SYS_GPE_MFPH_PE11MFP_EBI_nCS0 (0x7UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< GPE_MFPH PE11 setting for EBI_nCS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 716
sahilmgandhi 18:6a4db94011d3 717 //GPE_MFPH_PE12MFP
sahilmgandhi 18:6a4db94011d3 718 #define SYS_GPE_MFPH_PE12MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< GPE_MFPH PE12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 719 #define SYS_GPE_MFPH_PE12MFP_ADC1_4 (0x1UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< GPE_MFPH PE12 setting for ADC1_4 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 720 #define SYS_GPE_MFPH_PE12MFP_ACMP1_P3 (0x2UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< GPE_MFPH PE12 setting for ACMP1_P3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 721 #define SYS_GPE_MFPH_PE12MFP_ACMP2_P2 (0x3UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< GPE_MFPH PE12 setting for ACMP2_P2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 722 #define SYS_GPE_MFPH_PE12MFP_EBI_nCS1 (0x7UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< GPE_MFPH PE12 setting for EBI_nCS1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 723 //GPE_MFPH_PE13MFP
sahilmgandhi 18:6a4db94011d3 724 #define SYS_GPE_MFPH_PE13MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< GPE_MFPH PE13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 725 #define SYS_GPE_MFPH_PE13MFP_ADC1_5 (0x1UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< GPE_MFPH PE13 setting for ADC1_5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 726 #define SYS_GPE_MFPH_PE13MFP_ACMP2_P1 (0x3UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< GPE_MFPH PE13 setting for ACMP2_P1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 727 #define SYS_GPE_MFPH_PE13MFP_EBI_nCS2 (0x7UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< GPE_MFPH PE13 setting for EBI_nCS2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 728
sahilmgandhi 18:6a4db94011d3 729 //GPE_MFPH_PE14MFP
sahilmgandhi 18:6a4db94011d3 730 #define SYS_GPE_MFPH_PE14MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< GPE_MFPH PE14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 731 #define SYS_GPE_MFPH_PE14MFP_ADC1_6 (0x1UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< GPE_MFPH PE14 setting for ADC1_6 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 732 #define SYS_GPE_MFPH_PE14MFP_ACMP2_P0 (0x3UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< GPE_MFPH PE14 setting for ACMP2_P0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 733 #define SYS_GPE_MFPH_PE14MFP_EBI_nCS3 (0x7UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< GPE_MFPH PE14 setting for EBI_nCS3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 734
sahilmgandhi 18:6a4db94011d3 735 //GPE_MFPH_PE15MFP
sahilmgandhi 18:6a4db94011d3 736 #define SYS_GPE_MFPH_PE15MFP_GPIO (0x0UL<<SYS_GPE_MFPH_PE15MFP_Pos) /*!< GPE_MFPH PE15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 737 #define SYS_GPE_MFPH_PE15MFP_ADC1_7 (0x1UL<<SYS_GPE_MFPH_PE15MFP_Pos) /*!< GPE_MFPH PE15 setting for ADC1_7 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 738 #define SYS_GPE_MFPH_PE15MFP_ACMP2_N (0x3UL<<SYS_GPE_MFPH_PE15MFP_Pos) /*!< GPE_MFPH PE15 setting for ACMP2_N \hideinitializer */
sahilmgandhi 18:6a4db94011d3 739
sahilmgandhi 18:6a4db94011d3 740 //GPF_MFPL_PF0MFP
sahilmgandhi 18:6a4db94011d3 741 #define SYS_GPF_MFPL_PF0MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF0MFP_Pos) /*!< GPF_MFPL PF0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 742 #define SYS_GPF_MFPL_PF0MFP_SPI1_MOSI0 (0x1UL<<SYS_GPF_MFPL_PF0MFP_Pos) /*!< GPF_MFPL PF0 setting for SPI1_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 743 #define SYS_GPF_MFPL_PF0MFP_UART5_RXD (0x2UL<<SYS_GPF_MFPL_PF0MFP_Pos) /*!< GPF_MFPL PF0 setting for UART5_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 744 #define SYS_GPF_MFPL_PF0MFP_INT5 (0x8UL<<SYS_GPF_MFPL_PF0MFP_Pos) /*!< GPF_MFPL PF0 setting for INT5 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 745
sahilmgandhi 18:6a4db94011d3 746 //GPF_MFPL_PF1MFP
sahilmgandhi 18:6a4db94011d3 747 #define SYS_GPF_MFPL_PF1MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF1MFP_Pos) /*!< GPF_MFPL PF1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 748 #define SYS_GPF_MFPL_PF1MFP_SPI2_MOSI1 (0x1UL<<SYS_GPF_MFPL_PF1MFP_Pos) /*!< GPF_MFPL PF1 setting for SPI2_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 749
sahilmgandhi 18:6a4db94011d3 750 //GPF_MFPL_PF2MFP
sahilmgandhi 18:6a4db94011d3 751 #define SYS_GPF_MFPL_PF2MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF2MFP_Pos) /*!< GPF_MFPL PF2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 752 #define SYS_GPF_MFPL_PF2MFP_SPI3_SS0 (0x1UL<<SYS_GPF_MFPL_PF2MFP_Pos) /*!< GPF_MFPL PF2 setting for SPI3_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 753 #define SYS_GPF_MFPL_PF2MFP_SD0_DAT3 (0x4UL<<SYS_GPF_MFPL_PF2MFP_Pos) /*!< GPF_MFPL PF2 setting for SD0_DAT3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 754 #define SYS_GPF_MFPL_PF2MFP_EMAC_MII_RXD3 (0x6UL<<SYS_GPF_MFPL_PF2MFP_Pos) /*!< GPF_MFPL PF2 setting for EMAC_MII_RXD3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 755
sahilmgandhi 18:6a4db94011d3 756 //GPF_MFPL_PF3MFP
sahilmgandhi 18:6a4db94011d3 757 #define SYS_GPF_MFPL_PF3MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF3MFP_Pos) /*!< GPF_MFPL PF3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 758 #define SYS_GPF_MFPL_PF3MFP_SPI3_CLK (0x1UL<<SYS_GPF_MFPL_PF3MFP_Pos) /*!< GPF_MFPL PF3 setting for SPI3_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 759 #define SYS_GPF_MFPL_PF3MFP_SD0_DAT2 (0x4UL<<SYS_GPF_MFPL_PF3MFP_Pos) /*!< GPF_MFPL PF3 setting for SD0_DAT2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 760 #define SYS_GPF_MFPL_PF3MFP_EMAC_MII_RXD2 (0x6UL<<SYS_GPF_MFPL_PF3MFP_Pos) /*!< GPF_MFPL PF3 setting for EMAC_MII_RXD2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 761
sahilmgandhi 18:6a4db94011d3 762 //GPF_MFPL_PF4MFP
sahilmgandhi 18:6a4db94011d3 763 #define SYS_GPF_MFPL_PF4MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF4MFP_Pos) /*!< GPF_MFPL PF4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 764 #define SYS_GPF_MFPL_PF4MFP_SPI3_MISO0 (0x1UL<<SYS_GPF_MFPL_PF4MFP_Pos) /*!< GPF_MFPL PF4 setting for SPI3_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 765 #define SYS_GPF_MFPL_PF4MFP_SD0_DAT1 (0x4UL<<SYS_GPF_MFPL_PF4MFP_Pos) /*!< GPF_MFPL PF4 setting for SD0_DAT1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 766 #define SYS_GPF_MFPL_PF4MFP_EMAC_MII_COL0 (0x6UL<<SYS_GPF_MFPL_PF4MFP_Pos) /*!< GPF_MFPL PF4 setting for EMAC_MII_COL0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 767
sahilmgandhi 18:6a4db94011d3 768 //GPF_MFPL_PF5MFP
sahilmgandhi 18:6a4db94011d3 769 #define SYS_GPF_MFPL_PF5MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF5MFP_Pos) /*!< GPF_MFPL PF5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 770 #define SYS_GPF_MFPL_PF5MFP_SPI3_MOSI0 (0x1UL<<SYS_GPF_MFPL_PF5MFP_Pos) /*!< GPF_MFPL PF5 setting for SPI3_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 771 #define SYS_GPF_MFPL_PF5MFP_SD0_DAT0 (0x4UL<<SYS_GPF_MFPL_PF5MFP_Pos) /*!< GPF_MFPL PF5 setting for SD0_DAT0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 772 #define SYS_GPF_MFPL_PF5MFP_EMAC_MII_CRS (0x6UL<<SYS_GPF_MFPL_PF5MFP_Pos) /*!< GPF_MFPL PF5 setting for EMAC_MII_CRS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 773
sahilmgandhi 18:6a4db94011d3 774 //GPF_MFPL_PF6MFP
sahilmgandhi 18:6a4db94011d3 775 #define SYS_GPF_MFPL_PF6MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF6MFP_Pos) /*!< GPF_MFPL PF6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 776 #define SYS_GPF_MFPL_PF6MFP_UART2_RXD (0x1UL<<SYS_GPF_MFPL_PF6MFP_Pos) /*!< GPF_MFPL PF6 setting for UART2_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 777 #define SYS_GPF_MFPL_PF6MFP_SD0_CDn (0x4UL<<SYS_GPF_MFPL_PF6MFP_Pos) /*!< GPF_MFPL PF6 setting for SD0_CDn \hideinitializer */
sahilmgandhi 18:6a4db94011d3 778 #define SYS_GPF_MFPL_PF6MFP_EMAC_MII_TXCLK (0x6UL<<SYS_GPF_MFPL_PF6MFP_Pos) /*!< GPF_MFPL PF6 setting for EMAC_MII_TXCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 779
sahilmgandhi 18:6a4db94011d3 780 //GPF_MFPL_PF7MFP
sahilmgandhi 18:6a4db94011d3 781 #define SYS_GPF_MFPL_PF7MFP_GPIO (0x0UL<<SYS_GPF_MFPL_PF7MFP_Pos) /*!< GPF_MFPL PF7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 782 #define SYS_GPF_MFPL_PF7MFP_UART2_TXD (0x1UL<<SYS_GPF_MFPL_PF7MFP_Pos) /*!< GPF_MFPL PF7 setting for UART2_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 783 #define SYS_GPF_MFPL_PF7MFP_SD0_CMD (0x4UL<<SYS_GPF_MFPL_PF7MFP_Pos) /*!< GPF_MFPL PF7 setting for SD0_CMD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 784 #define SYS_GPF_MFPL_PF7MFP_EMAC_MII_TXD3 (0x6UL<<SYS_GPF_MFPL_PF7MFP_Pos) /*!< GPF_MFPL PF7 setting for EMAC_MII_TXD3 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 785
sahilmgandhi 18:6a4db94011d3 786 //GPF_MFPL_PF8MFP
sahilmgandhi 18:6a4db94011d3 787 #define SYS_GPF_MFPH_PF8MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF8MFP_Pos) /*!< GPF_MFPH PF8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 788 #define SYS_GPF_MFPH_PF8MFP_UART2_RTS (0x1UL<<SYS_GPF_MFPH_PF8MFP_Pos) /*!< GPF_MFPH PF8 setting for UART2_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 789 #define SYS_GPF_MFPH_PF8MFP_SD0_CLK (0x4UL<<SYS_GPF_MFPH_PF8MFP_Pos) /*!< GPF_MFPH PF8 setting for SD0_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 790 #define SYS_GPF_MFPH_PF8MFP_EMAC_MII_TXD2 (0x6UL<<SYS_GPF_MFPH_PF8MFP_Pos) /*!< GPF_MFPH PF8 setting for EMAC_MII_TXD2 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 791
sahilmgandhi 18:6a4db94011d3 792 //GPF_MFPH_PF9MFP
sahilmgandhi 18:6a4db94011d3 793 #define SYS_GPF_MFPH_PF9MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF9MFP_Pos) /*!< GPF_MFPH PF9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 794 #define SYS_GPF_MFPH_PF9MFP_OPA0_IN_P (0x1UL<<SYS_GPF_MFPH_PF9MFP_Pos) /*!< GPF_MFPH PF9 setting for OPA0_IN_P \hideinitializer */
sahilmgandhi 18:6a4db94011d3 795 #define SYS_GPF_MFPH_PF9MFP_PWM0_CH0 (0x4UL<<SYS_GPF_MFPH_PF9MFP_Pos) /*!< GPF_MFPH PF9 setting for PWM0_CH0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 796
sahilmgandhi 18:6a4db94011d3 797 //GPF_MFPH_PF10MFP
sahilmgandhi 18:6a4db94011d3 798 #define SYS_GPF_MFPH_PF10MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< GPF_MFPH PF10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 799 #define SYS_GPF_MFPH_PF10MFP_OPA0_IN_N (0x1UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< GPF_MFPH PF10 setting for OPA0_IN_N \hideinitializer */
sahilmgandhi 18:6a4db94011d3 800 #define SYS_GPF_MFPH_PF10MFP_PWM0_CH1 (0x4UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< GPF_MFPH PF10 setting for PWM0_CH1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 801
sahilmgandhi 18:6a4db94011d3 802 //GPF_MFPH_PF11MFP
sahilmgandhi 18:6a4db94011d3 803 #define SYS_GPF_MFPH_PF11MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< GPF_MFPH PF11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 804 #define SYS_GPF_MFPH_PF11MFP_OPA0_O (0x1UL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< GPF_MFPH PF11 setting for OPA0_O \hideinitializer */
sahilmgandhi 18:6a4db94011d3 805 #define SYS_GPF_MFPH_PF11MFP_UART1_RTS (0x2UL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< GPF_MFPH PF11 setting for UART1_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 806
sahilmgandhi 18:6a4db94011d3 807 //GPF_MFPH_PF12MFP
sahilmgandhi 18:6a4db94011d3 808 #define SYS_GPF_MFPH_PF12MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF12MFP_Pos) /*!< GPF_MFPH PF12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 809 #define SYS_GPF_MFPH_PF12MFP_OPA1_IN_P (0x1UL<<SYS_GPF_MFPH_PF12MFP_Pos) /*!< GPF_MFPH PF12 setting for OPA1_IN_P \hideinitializer */
sahilmgandhi 18:6a4db94011d3 810 #define SYS_GPF_MFPH_PF12MFP_UART1_CTS (0x2UL<<SYS_GPF_MFPH_PF12MFP_Pos) /*!< GPF_MFPH PF12 setting for UART1_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 811 //GPF_MFPH_PF13MFP
sahilmgandhi 18:6a4db94011d3 812 #define SYS_GPF_MFPH_PF13MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF13MFP_Pos) /*!< GPF_MFPH PF13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 813 #define SYS_GPF_MFPH_PF13MFP_OPA1_IN_N (0x1UL<<SYS_GPF_MFPH_PF13MFP_Pos) /*!< GPF_MFPH PF13 setting for OPA1_IN_N \hideinitializer */
sahilmgandhi 18:6a4db94011d3 814 #define SYS_GPF_MFPH_PF13MFP_UART1_TXD (0x2UL<<SYS_GPF_MFPH_PF13MFP_Pos) /*!< GPF_MFPH PF13 setting for UART1_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 815
sahilmgandhi 18:6a4db94011d3 816 //GPF_MFPH_PF14MFP
sahilmgandhi 18:6a4db94011d3 817 #define SYS_GPF_MFPH_PF14MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF14MFP_Pos) /*!< GPF_MFPH PF14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 818 #define SYS_GPF_MFPH_PF14MFP_OPA1_O (0x1UL<<SYS_GPF_MFPH_PF14MFP_Pos) /*!< GPF_MFPH PF14 setting for OPA1_O \hideinitializer */
sahilmgandhi 18:6a4db94011d3 819 #define SYS_GPF_MFPH_PF14MFP_UART1_RXD (0x2UL<<SYS_GPF_MFPH_PF14MFP_Pos) /*!< GPF_MFPH PF14 setting for UART1_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 820
sahilmgandhi 18:6a4db94011d3 821 //GPF_MFPH_PF15MFP
sahilmgandhi 18:6a4db94011d3 822 #define SYS_GPF_MFPH_PF15MFP_GPIO (0x0UL<<SYS_GPF_MFPH_PF15MFP_Pos) /*!< GPF_MFPH PF15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 823 #define SYS_GPF_MFPH_PF15MFP_UART0_RTS (0x1UL<<SYS_GPF_MFPH_PF15MFP_Pos) /*!< GPF_MFPH PF15 setting for UART0_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 824
sahilmgandhi 18:6a4db94011d3 825
sahilmgandhi 18:6a4db94011d3 826 //GPG_MFPL_PG0MFP
sahilmgandhi 18:6a4db94011d3 827 #define SYS_GPG_MFPL_PG0MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG0MFP_Pos) /*!< GPG_MFPL PG0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 828 #define SYS_GPG_MFPL_PG0MFP_UART0_CTS (0x1UL<<SYS_GPG_MFPL_PG0MFP_Pos) /*!< GPG_MFPL PG0 setting for UART0_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 829 #define SYS_GPG_MFPL_PG0MFP_INT6 (0x8UL<<SYS_GPG_MFPL_PG0MFP_Pos) /*!< GPG_MFPL PG0 setting for INT6 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 830
sahilmgandhi 18:6a4db94011d3 831 //GPG_MFPL_PG1MFP
sahilmgandhi 18:6a4db94011d3 832 #define SYS_GPG_MFPL_PG1MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG1MFP_Pos) /*!< GPG_MFPL PG1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 833 #define SYS_GPG_MFPL_PG1MFP_UART0_RXD (0x1UL<<SYS_GPG_MFPL_PG1MFP_Pos) /*!< GPG_MFPL PG1 setting for UART0_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 834
sahilmgandhi 18:6a4db94011d3 835 //GPG_MFPL_PG2MFP
sahilmgandhi 18:6a4db94011d3 836 #define SYS_GPG_MFPL_PG2MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG2MFP_Pos) /*!< GPG_MFPL PG2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 837 #define SYS_GPG_MFPL_PG2MFP_UART0_TXD (0x1UL<<SYS_GPG_MFPL_PG2MFP_Pos) /*!< GPG_MFPL PG2 setting for UART0_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 838
sahilmgandhi 18:6a4db94011d3 839 //GPG_MFPL_PG3MFP
sahilmgandhi 18:6a4db94011d3 840 #define SYS_GPG_MFPL_PG3MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG3MFP_Pos) /*!< GPG_MFPL PG3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 841 #define SYS_GPG_MFPL_PG3MFP_PS2_CLK (0x1UL<<SYS_GPG_MFPL_PG3MFP_Pos) /*!< GPG_MFPL PG3 setting for PS2_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 842 #define SYS_GPG_MFPL_PG3MFP_I2S1_DO (0x2UL<<SYS_GPG_MFPL_PG3MFP_Pos) /*!< GPG_MFPL PG3 setting for I2S1_DO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 843 #define SYS_GPG_MFPL_PG3MFP_SC1_RST (0x3UL<<SYS_GPG_MFPL_PG3MFP_Pos) /*!< GPG_MFPL PG3 setting for SC1_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 844 //GPG_MFPL_PG4MFP
sahilmgandhi 18:6a4db94011d3 845 #define SYS_GPG_MFPL_PG4MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG4MFP_Pos) /*!< GPG_MFPL PG4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 846 #define SYS_GPG_MFPL_PG4MFP_PS2_DAT (0x1UL<<SYS_GPG_MFPL_PG4MFP_Pos) /*!< GPG_MFPL PG4 setting for PS2_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 847 #define SYS_GPG_MFPL_PG4MFP_I2S1_DI (0x2UL<<SYS_GPG_MFPL_PG4MFP_Pos) /*!< GPG_MFPL PG4 setting for I2S1_DI \hideinitializer */
sahilmgandhi 18:6a4db94011d3 848 #define SYS_GPG_MFPL_PG4MFP_SC1_PWR (0x3UL<<SYS_GPG_MFPL_PG4MFP_Pos) /*!< GPG_MFPL PG4 setting for SC1_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 849
sahilmgandhi 18:6a4db94011d3 850 //GPG_MFPL_PG5MFP
sahilmgandhi 18:6a4db94011d3 851 #define SYS_GPG_MFPL_PG5MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG5MFP_Pos) /*!< GPG_MFPL PG5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 852 #define SYS_GPG_MFPL_PG5MFP_I2S1_BCLK (0x2UL<<SYS_GPG_MFPL_PG5MFP_Pos) /*!< GPG_MFPL PG5 setting for I2S1_BCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 853 #define SYS_GPG_MFPL_PG5MFP_SC1_DAT (0x3UL<<SYS_GPG_MFPL_PG5MFP_Pos) /*!< GPG_MFPL PG5 setting for SC1_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 854 //GPG_MFPL_PG6MFP
sahilmgandhi 18:6a4db94011d3 855 #define SYS_GPG_MFPL_PG6MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG6MFP_Pos) /*!< GPG_MFPL PG6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 856 #define SYS_GPG_MFPL_PG6MFP_I2S1_LRCK (0x2UL<<SYS_GPG_MFPL_PG6MFP_Pos) /*!< GPG_MFPL PG6 setting for I2S1_LRCK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 857 #define SYS_GPG_MFPL_PG6MFP_SC1_CLK (0x3UL<<SYS_GPG_MFPL_PG6MFP_Pos) /*!< GPG_MFPL PG6 setting for SC1_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 858
sahilmgandhi 18:6a4db94011d3 859 //GPG_MFPL_PG7MFP
sahilmgandhi 18:6a4db94011d3 860 #define SYS_GPG_MFPL_PG7MFP_GPIO (0x0UL<<SYS_GPG_MFPL_PG7MFP_Pos) /*!< GPG_MFPL PG7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 861 #define SYS_GPG_MFPL_PG7MFP_SPI2_MISO0 (0x1UL<<SYS_GPG_MFPL_PG7MFP_Pos) /*!< GPG_MFPL PG7 setting for SPI2_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 862 #define SYS_GPG_MFPL_PG7MFP_I2S1_MCLK (0x2UL<<SYS_GPG_MFPL_PG7MFP_Pos) /*!< GPG_MFPL PG7 setting for I2S1_MCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 863 #define SYS_GPG_MFPL_PG7MFP_SC1_CD (0x3UL<<SYS_GPG_MFPL_PG7MFP_Pos) /*!< GPG_MFPL PG7 setting for SC1_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 864 #define SYS_GPG_MFPL_PG7MFP_SC3_RST (0x4UL<<SYS_GPG_MFPL_PG7MFP_Pos) /*!< GPG_MFPL PG7 setting for SC3_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 865
sahilmgandhi 18:6a4db94011d3 866 //GPG_MFPL_PG8MFP
sahilmgandhi 18:6a4db94011d3 867 #define SYS_GPG_MFPH_PG8MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG8MFP_Pos) /*!< GPG_MFPH PG8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 868 #define SYS_GPG_MFPH_PG8MFP_SPI2_MOSI0 (0x1UL<<SYS_GPG_MFPH_PG8MFP_Pos) /*!< GPG_MFPH PG8 setting for SPI2_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 869 #define SYS_GPG_MFPH_PG8MFP_I2S1_DO (0x2UL<<SYS_GPG_MFPH_PG8MFP_Pos) /*!< GPG_MFPH PG8 setting for I2S1_DO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 870 #define SYS_GPG_MFPH_PG8MFP_UART4_RTS (0x3UL<<SYS_GPG_MFPH_PG8MFP_Pos) /*!< GPG_MFPH PG8 setting for UART4_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 871 #define SYS_GPG_MFPH_PG8MFP_SC3_DAT (0x4UL<<SYS_GPG_MFPH_PG8MFP_Pos) /*!< GPG_MFPH PG8 setting for SC3_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 872
sahilmgandhi 18:6a4db94011d3 873 //GPG_MFPH_PG9MFP
sahilmgandhi 18:6a4db94011d3 874 #define SYS_GPG_MFPH_PG9MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG9MFP_Pos) /*!< GPG_MFPH PG9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 875 #define SYS_GPG_MFPH_PG9MFP_SPI2_CLK (0x1UL<<SYS_GPG_MFPH_PG9MFP_Pos) /*!< GPG_MFPH PG9 setting for SPI2_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 876 #define SYS_GPG_MFPH_PG9MFP_I2S1_DI (0x2UL<<SYS_GPG_MFPH_PG9MFP_Pos) /*!< GPG_MFPH PG9 setting for I2S1_DI \hideinitializer */
sahilmgandhi 18:6a4db94011d3 877 #define SYS_GPG_MFPH_PG9MFP_UART4_CTS (0x3UL<<SYS_GPG_MFPH_PG9MFP_Pos) /*!< GPG_MFPH PG9 setting for UART4_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 878 #define SYS_GPG_MFPH_PG9MFP_SC3_CLK (0x4UL<<SYS_GPG_MFPH_PG9MFP_Pos) /*!< GPG_MFPH PG9 setting for SC3_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 879
sahilmgandhi 18:6a4db94011d3 880 //GPG_MFPH_PG10MFP
sahilmgandhi 18:6a4db94011d3 881 #define SYS_GPG_MFPH_PG10MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< GPG_MFPH PG10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 882 #define SYS_GPG_MFPH_PG10MFP_ICE_CLK (0x1UL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< GPG_MFPH PG10 setting for ICE_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 883 #define SYS_GPG_MFPH_PG10MFP_JTAG_TCLK (0x6UL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< GPG_MFPH PG10 setting for JTAG_TCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 884
sahilmgandhi 18:6a4db94011d3 885 //GPG_MFPH_PG11MFP
sahilmgandhi 18:6a4db94011d3 886 #define SYS_GPG_MFPH_PG11MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< GPG_MFPH PG11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 887 #define SYS_GPG_MFPH_PG11MFP_ICE_DAT (0x1UL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< GPG_MFPH PG11 setting for ICE_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 888 #define SYS_GPG_MFPH_PG11MFP_JTAG_TMS (0x6UL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< GPG_MFPH PG11 setting for JTAG_TMS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 889
sahilmgandhi 18:6a4db94011d3 890 //GPG_MFPH_PG12MFP
sahilmgandhi 18:6a4db94011d3 891 #define SYS_GPG_MFPH_PG12MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG12MFP_Pos) /*!< GPG_MFPH PG12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 892 #define SYS_GPG_MFPH_PG12MFP_XT1_OUT (0x1UL<<SYS_GPG_MFPH_PG12MFP_Pos) /*!< GPG_MFPH PG12 setting for XT1_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 893
sahilmgandhi 18:6a4db94011d3 894 //GPG_MFPH_PG13MFP
sahilmgandhi 18:6a4db94011d3 895 #define SYS_GPG_MFPH_PG13MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG13MFP_Pos) /*!< GPG_MFPH PG13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 896 #define SYS_GPG_MFPH_PG13MFP_XT1_IN (0x1UL<<SYS_GPG_MFPH_PG13MFP_Pos) /*!< GPG_MFPH PG13 setting for XT1_IN \hideinitializer */
sahilmgandhi 18:6a4db94011d3 897
sahilmgandhi 18:6a4db94011d3 898 //GPG_MFPH_PG14MFP
sahilmgandhi 18:6a4db94011d3 899 #define SYS_GPG_MFPH_PG14MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< GPG_MFPH PG14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 900 #define SYS_GPG_MFPH_PG14MFP_X32K_OUT (0x1UL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< GPG_MFPH PG14 setting for X32K_OUT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 901 #define SYS_GPG_MFPH_PG14MFP_I2C1_SDA (0x3UL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< GPG_MFPH PG14 setting for I2C1_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 902
sahilmgandhi 18:6a4db94011d3 903 //GPG_MFPH_PG15MFP
sahilmgandhi 18:6a4db94011d3 904 #define SYS_GPG_MFPH_PG15MFP_GPIO (0x0UL<<SYS_GPG_MFPH_PG15MFP_Pos) /*!< GPG_MFPH PG15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 905 #define SYS_GPG_MFPH_PG15MFP_X32K_IN (0x1UL<<SYS_GPG_MFPH_PG15MFP_Pos) /*!< GPG_MFPH PG15 setting for X32K_IN \hideinitializer */
sahilmgandhi 18:6a4db94011d3 906 #define SYS_GPG_MFPH_PG15MFP_I2C1_SCL (0x3UL<<SYS_GPG_MFPH_PG15MFP_Pos) /*!< GPG_MFPH PG15 setting for I2C1_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 907
sahilmgandhi 18:6a4db94011d3 908
sahilmgandhi 18:6a4db94011d3 909 //GPH_MFPL_PH0MFP
sahilmgandhi 18:6a4db94011d3 910 #define SYS_GPH_MFPL_PH0MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH0MFP_Pos) /*!< GPH_MFPL PH0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 911 #define SYS_GPH_MFPL_PH0MFP_I2C1_SCL (0x1UL<<SYS_GPH_MFPL_PH0MFP_Pos) /*!< GPH_MFPL PH0 setting for I2C1_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 912 #define SYS_GPH_MFPL_PH0MFP_UART4_RXD (0x2UL<<SYS_GPH_MFPL_PH0MFP_Pos) /*!< GPH_MFPL PH0 setting for UART4_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 913 #define SYS_GPH_MFPL_PH0MFP_CAN1_RXD (0x3UL<<SYS_GPH_MFPL_PH0MFP_Pos) /*!< GPH_MFPL PH0 setting for CAN1_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 914 #define SYS_GPH_MFPL_PH0MFP_INT7 (0x8UL<<SYS_GPH_MFPL_PH0MFP_Pos) /*!< GPH_MFPL PH0 setting for INT7 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 915
sahilmgandhi 18:6a4db94011d3 916 //GPH_MFPL_PH1MFP
sahilmgandhi 18:6a4db94011d3 917 #define SYS_GPH_MFPL_PH1MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH1MFP_Pos) /*!< GPH_MFPL PH1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 918 #define SYS_GPH_MFPL_PH1MFP_UART4_TXD (0x1UL<<SYS_GPH_MFPL_PH1MFP_Pos) /*!< GPH_MFPL PH1 setting for UART4_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 919 #define SYS_GPH_MFPL_PH1MFP_I2C1_SDA (0x2UL<<SYS_GPH_MFPL_PH1MFP_Pos) /*!< GPH_MFPL PH1 setting for I2C1_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 920 #define SYS_GPH_MFPL_PH1MFP_CAN1_TXD (0x3UL<<SYS_GPH_MFPL_PH1MFP_Pos) /*!< GPH_MFPL PH1 setting for CAN1_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 921
sahilmgandhi 18:6a4db94011d3 922 //GPH_MFPL_PH2MFP
sahilmgandhi 18:6a4db94011d3 923 #define SYS_GPH_MFPL_PH2MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH2MFP_Pos) /*!< GPH_MFPL PH2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 924 #define SYS_GPH_MFPL_PH2MFP_UART2_CTS (0x1UL<<SYS_GPH_MFPL_PH2MFP_Pos) /*!< GPH_MFPL PH2 setting for UART2_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 925
sahilmgandhi 18:6a4db94011d3 926 //GPH_MFPL_PH3MFP
sahilmgandhi 18:6a4db94011d3 927 #define SYS_GPH_MFPL_PH3MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH3MFP_Pos) /*!< GPH_MFPL PH3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 928 #define SYS_GPH_MFPL_PH3MFP_I2C3_SCL (0x1UL<<SYS_GPH_MFPL_PH3MFP_Pos) /*!< GPH_MFPL PH3 setting for I2C3_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 929
sahilmgandhi 18:6a4db94011d3 930 //GPH_MFPL_PH4MFP
sahilmgandhi 18:6a4db94011d3 931 #define SYS_GPH_MFPL_PH4MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH4MFP_Pos) /*!< GPH_MFPL PH4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 932 #define SYS_GPH_MFPL_PH4MFP_I2C3_SDA (0x1UL<<SYS_GPH_MFPL_PH4MFP_Pos) /*!< GPH_MFPL PH4 setting for I2C3_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 933
sahilmgandhi 18:6a4db94011d3 934 //GPH_MFPL_PH5MFP
sahilmgandhi 18:6a4db94011d3 935 #define SYS_GPH_MFPL_PH5MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH5MFP_Pos) /*!< GPH_MFPL PH5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 936 #define SYS_GPH_MFPL_PH5MFP_SPI2_SS0 (0x1UL<<SYS_GPH_MFPL_PH5MFP_Pos) /*!< GPH_MFPL PH5 setting for SPI2_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 937
sahilmgandhi 18:6a4db94011d3 938 //GPH_MFPL_PH6MFP
sahilmgandhi 18:6a4db94011d3 939 #define SYS_GPH_MFPL_PH6MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH6MFP_Pos) /*!< GPH_MFPL PH6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 940 #define SYS_GPH_MFPL_PH6MFP_SPI2_CLK (0x1UL<<SYS_GPH_MFPL_PH6MFP_Pos) /*!< GPH_MFPL PH6 setting for SPI2_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 941
sahilmgandhi 18:6a4db94011d3 942 //GPH_MFPL_PH7MFP
sahilmgandhi 18:6a4db94011d3 943 #define SYS_GPH_MFPL_PH7MFP_GPIO (0x0UL<<SYS_GPH_MFPL_PH7MFP_Pos) /*!< GPH_MFPL PH7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 944 #define SYS_GPH_MFPL_PH7MFP_SPI2_MISO0 (0x1UL<<SYS_GPH_MFPL_PH7MFP_Pos) /*!< GPH_MFPL PH7 setting for SPI2_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 945
sahilmgandhi 18:6a4db94011d3 946 //GPH_MFPL_PH8MFP
sahilmgandhi 18:6a4db94011d3 947 #define SYS_GPH_MFPH_PH8MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH8MFP_Pos) /*!< GPH_MFPH PH8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 948 #define SYS_GPH_MFPH_PH8MFP_SPI2_MOSI0 (0x1UL<<SYS_GPH_MFPH_PH8MFP_Pos) /*!< GPH_MFPH PH8 setting for SPI2_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 949
sahilmgandhi 18:6a4db94011d3 950 //GPH_MFPH_PH9MFP
sahilmgandhi 18:6a4db94011d3 951 #define SYS_GPH_MFPH_PH9MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH9MFP_Pos) /*!< GPH_MFPH PH9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 952 #define SYS_GPH_MFPH_PH9MFP_SPI2_MISO1 (0x1UL<<SYS_GPH_MFPH_PH9MFP_Pos) /*!< GPH_MFPH PH9 setting for SPI2_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 953
sahilmgandhi 18:6a4db94011d3 954 //GPH_MFPH_PH10MFP
sahilmgandhi 18:6a4db94011d3 955 #define SYS_GPH_MFPH_PH10MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< GPH_MFPH PH10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 956 #define SYS_GPH_MFPH_PH10MFP_SPI2_MOSI1 (0x1UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< GPH_MFPH PH10 setting for SPI2_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 957
sahilmgandhi 18:6a4db94011d3 958 //GPH_MFPH_PH11MFP
sahilmgandhi 18:6a4db94011d3 959 #define SYS_GPH_MFPH_PH11MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< GPH_MFPH PH11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 960 #define SYS_GPH_MFPH_PH11MFP_UART3_RXD (0x1UL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< GPH_MFPH PH11 setting for UART3_RXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 961
sahilmgandhi 18:6a4db94011d3 962 //GPH_MFPH_PH12MFP
sahilmgandhi 18:6a4db94011d3 963 #define SYS_GPH_MFPH_PH12MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH12MFP_Pos) /*!< GPH_MFPH PH12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 964 #define SYS_GPH_MFPH_PH12MFP_UART3_TXD (0x1UL<<SYS_GPH_MFPH_PH12MFP_Pos) /*!< GPH_MFPH PH12 setting for UART3_TXD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 965
sahilmgandhi 18:6a4db94011d3 966 //GPH_MFPH_PH13MFP
sahilmgandhi 18:6a4db94011d3 967 #define SYS_GPH_MFPH_PH13MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH13MFP_Pos) /*!< GPH_MFPH PH13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 968 #define SYS_GPH_MFPH_PH13MFP_UART3_RTS (0x1UL<<SYS_GPH_MFPH_PH13MFP_Pos) /*!< GPH_MFPH PH13 setting for UART3_RTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 969
sahilmgandhi 18:6a4db94011d3 970 //GPH_MFPH_PH14MFP
sahilmgandhi 18:6a4db94011d3 971 #define SYS_GPH_MFPH_PH14MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH14MFP_Pos) /*!< GPH_MFPH PH14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 972 #define SYS_GPH_MFPH_PH14MFP_UART3_CTS (0x1UL<<SYS_GPH_MFPH_PH14MFP_Pos) /*!< GPH_MFPH PH14 setting for UART3_CTS \hideinitializer */
sahilmgandhi 18:6a4db94011d3 973
sahilmgandhi 18:6a4db94011d3 974 //GPH_MFPH_PH15MFP
sahilmgandhi 18:6a4db94011d3 975 #define SYS_GPH_MFPH_PH15MFP_GPIO (0x0UL<<SYS_GPH_MFPH_PH15MFP_Pos) /*!< GPH_MFPH PH15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 976 #define SYS_GPH_MFPH_PH15MFP_SC5_CLK (0x2UL<<SYS_GPH_MFPH_PH15MFP_Pos) /*!< GPH_MFPH PH15 setting for SC5_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 977
sahilmgandhi 18:6a4db94011d3 978 //GPI_MFPL_PI0MFP
sahilmgandhi 18:6a4db94011d3 979 #define SYS_GPI_MFPL_PI0MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI0MFP_Pos) /*!< GPI_MFPL PI0 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 980 #define SYS_GPI_MFPL_PI0MFP_SC5_RST (0x2UL<<SYS_GPI_MFPL_PI0MFP_Pos) /*!< GPI_MFPL PI0 setting for SC5_RST \hideinitializer */
sahilmgandhi 18:6a4db94011d3 981
sahilmgandhi 18:6a4db94011d3 982 //GPI_MFPL_PI1MFP
sahilmgandhi 18:6a4db94011d3 983 #define SYS_GPI_MFPL_PI1MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI1MFP_Pos) /*!< GPI_MFPL PI1 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 984 #define SYS_GPI_MFPL_PI1MFP_SC5_PWR (0x2UL<<SYS_GPI_MFPL_PI1MFP_Pos) /*!< GPI_MFPL PI1 setting for SC5_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 985
sahilmgandhi 18:6a4db94011d3 986 //GPI_MFPL_PI2MFP
sahilmgandhi 18:6a4db94011d3 987 #define SYS_GPI_MFPL_PI2MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI2MFP_Pos) /*!< GPI_MFPL PI2 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 988 #define SYS_GPI_MFPL_PI2MFP_SC5_DAT (0x2UL<<SYS_GPI_MFPL_PI2MFP_Pos) /*!< GPI_MFPL PI2 setting for SC5_DAT \hideinitializer */
sahilmgandhi 18:6a4db94011d3 989
sahilmgandhi 18:6a4db94011d3 990 //GPI_MFPL_PI3MFP
sahilmgandhi 18:6a4db94011d3 991 #define SYS_GPI_MFPL_PI3MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI3MFP_Pos) /*!< GPI_MFPL PI3 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 992 #define SYS_GPI_MFPL_PI3MFP_SPI3_SS0 (0x1UL<<SYS_GPI_MFPL_PI3MFP_Pos) /*!< GPI_MFPL PI3 setting for SPI3_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 993
sahilmgandhi 18:6a4db94011d3 994 //GPI_MFPL_PI4MFP
sahilmgandhi 18:6a4db94011d3 995 #define SYS_GPI_MFPL_PI4MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI4MFP_Pos) /*!< GPI_MFPL PI4 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 996 #define SYS_GPI_MFPL_PI4MFP_SPI3_CLK (0x1UL<<SYS_GPI_MFPL_PI4MFP_Pos) /*!< GPI_MFPL PI4 setting for SPI3_CLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 997
sahilmgandhi 18:6a4db94011d3 998 //GPI_MFPL_PI5MFP
sahilmgandhi 18:6a4db94011d3 999 #define SYS_GPI_MFPL_PI5MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI5MFP_Pos) /*!< GPI_MFPL PI5 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1000 #define SYS_GPI_MFPL_PI5MFP_SPI3_MISO0 (0x1UL<<SYS_GPI_MFPL_PI5MFP_Pos) /*!< GPI_MFPL PI5 setting for SPI3_MISO0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1001
sahilmgandhi 18:6a4db94011d3 1002 //GPI_MFPL_PI6MFP
sahilmgandhi 18:6a4db94011d3 1003 #define SYS_GPI_MFPL_PI6MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI6MFP_Pos) /*!< GPI_MFPL PI6 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1004 #define SYS_GPI_MFPL_PI6MFP_SPI3_MOSI0 (0x1UL<<SYS_GPI_MFPL_PI6MFP_Pos) /*!< GPI_MFPL PI6 setting for SPI3_MOSI0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1005
sahilmgandhi 18:6a4db94011d3 1006 //GPI_MFPL_PI7MFP
sahilmgandhi 18:6a4db94011d3 1007 #define SYS_GPI_MFPL_PI7MFP_GPIO (0x0UL<<SYS_GPI_MFPL_PI7MFP_Pos) /*!< GPI_MFPL PI7 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1008 #define SYS_GPI_MFPL_PI7MFP_I2C2_SCL (0x1UL<<SYS_GPI_MFPL_PI7MFP_Pos) /*!< GPI_MFPL PI7 setting for I2C2_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1009 #define SYS_GPI_MFPL_PI7MFP_SPI3_MISO1 (0x2UL<<SYS_GPI_MFPL_PI7MFP_Pos) /*!< GPI_MFPL PI7 setting for SPI3_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1010
sahilmgandhi 18:6a4db94011d3 1011 //GPI_MFPL_PI8MFP
sahilmgandhi 18:6a4db94011d3 1012 #define SYS_GPI_MFPH_PI8MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI8MFP_Pos) /*!< GPI_MFPH PI8 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1013 #define SYS_GPI_MFPH_PI8MFP_I2C2_SDA (0x1UL<<SYS_GPI_MFPH_PI8MFP_Pos) /*!< GPI_MFPH PI8 setting for I2C2_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1014 #define SYS_GPI_MFPH_PI8MFP_SPI3_MOSI1 (0x2UL<<SYS_GPI_MFPH_PI8MFP_Pos) /*!< GPI_MFPH PI8 setting for SPI3_MOSI1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1015
sahilmgandhi 18:6a4db94011d3 1016 //GPI_MFPH_PI9MFP
sahilmgandhi 18:6a4db94011d3 1017 #define SYS_GPI_MFPH_PI9MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI9MFP_Pos) /*!< GPI_MFPH PI9 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1018 #define SYS_GPI_MFPH_PI9MFP_I2C4_SCL (0x4UL<<SYS_GPI_MFPH_PI9MFP_Pos) /*!< GPI_MFPH PI9 setting for I2C4_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1019
sahilmgandhi 18:6a4db94011d3 1020 //GPI_MFPH_PI10MFP
sahilmgandhi 18:6a4db94011d3 1021 #define SYS_GPI_MFPH_PI10MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI10MFP_Pos) /*!< GPI_MFPH PI10 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1022
sahilmgandhi 18:6a4db94011d3 1023 //GPI_MFPH_PI11MFP
sahilmgandhi 18:6a4db94011d3 1024 #define SYS_GPI_MFPH_PI11MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI11MFP_Pos) /*!< GPI_MFPH PI11 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1025 #define SYS_GPI_MFPH_PI11MFP_SPI2_SS0 (0x1UL<<SYS_GPI_MFPH_PI11MFP_Pos) /*!< GPI_MFPH PI11 setting for SPI2_SS0 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1026 #define SYS_GPI_MFPH_PI11MFP_I2S1_BCLK (0x2UL<<SYS_GPI_MFPH_PI11MFP_Pos) /*!< GPI_MFPH PI11 setting for I2S1_BCLK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1027 #define SYS_GPI_MFPH_PI11MFP_I2C4_SCL (0x3UL<<SYS_GPI_MFPH_PI11MFP_Pos) /*!< GPI_MFPH PI11 setting for I2C4_SCL \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1028 #define SYS_GPI_MFPH_PI11MFP_SC3_PWR (0x4UL<<SYS_GPI_MFPH_PI11MFP_Pos) /*!< GPI_MFPH PI11 setting for SC3_PWR \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1029
sahilmgandhi 18:6a4db94011d3 1030 //GPI_MFPH_PI12MFP
sahilmgandhi 18:6a4db94011d3 1031 #define SYS_GPI_MFPH_PI12MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI12MFP_Pos) /*!< GPI_MFPH PI12 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1032 #define SYS_GPI_MFPH_PI12MFP_SPI2_MISO1 (0x1UL<<SYS_GPI_MFPH_PI12MFP_Pos) /*!< GPI_MFPH PI12 setting for SPI2_MISO1 \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1033 #define SYS_GPI_MFPH_PI12MFP_I2S1_LRCK (0x2UL<<SYS_GPI_MFPH_PI12MFP_Pos) /*!< GPI_MFPH PI12 setting for I2S1_LRCK \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1034 #define SYS_GPI_MFPH_PI12MFP_I2C4_SDA (0x3UL<<SYS_GPI_MFPH_PI12MFP_Pos) /*!< GPI_MFPH PI12 setting for I2C4_SDA \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1035 #define SYS_GPI_MFPH_PI12MFP_SC3_CD (0x4UL<<SYS_GPI_MFPH_PI12MFP_Pos) /*!< GPI_MFPH PI12 setting for SC3_CD \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1036
sahilmgandhi 18:6a4db94011d3 1037 //GPI_MFPH_PI13MFP
sahilmgandhi 18:6a4db94011d3 1038 #define SYS_GPI_MFPH_PI13MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI13MFP_Pos) /*!< GPI_MFPH PI13 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1039
sahilmgandhi 18:6a4db94011d3 1040 //GPI_MFPH_PI14MFP
sahilmgandhi 18:6a4db94011d3 1041 #define SYS_GPI_MFPH_PI14MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI14MFP_Pos) /*!< GPI_MFPH PI14 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1042
sahilmgandhi 18:6a4db94011d3 1043 //GPI_MFPH_PI15MFP
sahilmgandhi 18:6a4db94011d3 1044 #define SYS_GPI_MFPH_PI15MFP_GPIO (0x0UL<<SYS_GPI_MFPH_PI15MFP_Pos) /*!< GPI_MFPH PI15 setting for GPIO \hideinitializer */
sahilmgandhi 18:6a4db94011d3 1045
sahilmgandhi 18:6a4db94011d3 1046 /*@}*/ /* end of group NUC472_442_SYS_EXPORTED_CONSTANTS */
sahilmgandhi 18:6a4db94011d3 1047
sahilmgandhi 18:6a4db94011d3 1048 /** @addtogroup NUC472_442_SYS_EXPORTED_FUNCTIONS SYS Exported Functions
sahilmgandhi 18:6a4db94011d3 1049 @{
sahilmgandhi 18:6a4db94011d3 1050 */
sahilmgandhi 18:6a4db94011d3 1051
sahilmgandhi 18:6a4db94011d3 1052 /**
sahilmgandhi 18:6a4db94011d3 1053 * @brief Clear Brown-out detector interrupt flag
sahilmgandhi 18:6a4db94011d3 1054 * @param None
sahilmgandhi 18:6a4db94011d3 1055 * @return None
sahilmgandhi 18:6a4db94011d3 1056 * @details This macro clear Brown-out detector interrupt flag.
sahilmgandhi 18:6a4db94011d3 1057 */
sahilmgandhi 18:6a4db94011d3 1058 #define SYS_CLEAR_BOD_INT_FLAG() (SYS->BODCTL |= SYS_BODCTL_BODINTF_Msk)
sahilmgandhi 18:6a4db94011d3 1059
sahilmgandhi 18:6a4db94011d3 1060 /**
sahilmgandhi 18:6a4db94011d3 1061 * @brief Set Brown-out detector function to normal mode
sahilmgandhi 18:6a4db94011d3 1062 * @param None
sahilmgandhi 18:6a4db94011d3 1063 * @return None
sahilmgandhi 18:6a4db94011d3 1064 * @details This macro set Brown-out detector to normal mode.
sahilmgandhi 18:6a4db94011d3 1065 */
sahilmgandhi 18:6a4db94011d3 1066 #define SYS_CLEAR_BOD_LPM() (SYS->BODCTL &= ~SYS_BODCTL_BODLPM_Msk)
sahilmgandhi 18:6a4db94011d3 1067
sahilmgandhi 18:6a4db94011d3 1068 /**
sahilmgandhi 18:6a4db94011d3 1069 * @brief Disable Brown-out detector function
sahilmgandhi 18:6a4db94011d3 1070 * @param None
sahilmgandhi 18:6a4db94011d3 1071 * @return None
sahilmgandhi 18:6a4db94011d3 1072 * @details This macro disable Brown-out detector function.
sahilmgandhi 18:6a4db94011d3 1073 */
sahilmgandhi 18:6a4db94011d3 1074 #define SYS_DISABLE_BOD() (SYS->BODCTL &= ~SYS_BODCTL_BODEN_Msk)
sahilmgandhi 18:6a4db94011d3 1075
sahilmgandhi 18:6a4db94011d3 1076 /**
sahilmgandhi 18:6a4db94011d3 1077 * @brief Enable Brown-out detector function
sahilmgandhi 18:6a4db94011d3 1078 * @param None
sahilmgandhi 18:6a4db94011d3 1079 * @return None
sahilmgandhi 18:6a4db94011d3 1080 * @details This macro enable Brown-out detector function.
sahilmgandhi 18:6a4db94011d3 1081 */
sahilmgandhi 18:6a4db94011d3 1082 #define SYS_ENABLE_BOD() (SYS->BODCTL |= SYS_BODCTL_BODEN_Msk)
sahilmgandhi 18:6a4db94011d3 1083 /**
sahilmgandhi 18:6a4db94011d3 1084 * @brief Get Brown-out detector interrupt flag
sahilmgandhi 18:6a4db94011d3 1085 * @param None
sahilmgandhi 18:6a4db94011d3 1086 * @retval 0 Brown-out detect interrupt flag is not set.
sahilmgandhi 18:6a4db94011d3 1087 * @retval >=1 Brown-out detect interrupt flag is set.
sahilmgandhi 18:6a4db94011d3 1088 * @details This macro get Brown-out detector interrupt flag.
sahilmgandhi 18:6a4db94011d3 1089 */
sahilmgandhi 18:6a4db94011d3 1090 #define SYS_GET_BOD_INT_FLAG() (SYS->BODCTL & SYS_BODCTL_BODINTF_Msk)
sahilmgandhi 18:6a4db94011d3 1091
sahilmgandhi 18:6a4db94011d3 1092 /**
sahilmgandhi 18:6a4db94011d3 1093 * @brief Get Brown-out detector status
sahilmgandhi 18:6a4db94011d3 1094 * @param None
sahilmgandhi 18:6a4db94011d3 1095 * @retval 0 System voltage is higher than BOD_VL setting or BOD_EN is 0.
sahilmgandhi 18:6a4db94011d3 1096 * @retval >=1 System voltage is lower than BOD_VL setting.
sahilmgandhi 18:6a4db94011d3 1097 * @details This macro get Brown-out detector output status.
sahilmgandhi 18:6a4db94011d3 1098 * If the BOD_EN is 0, this function always return 0.
sahilmgandhi 18:6a4db94011d3 1099 */
sahilmgandhi 18:6a4db94011d3 1100 #define SYS_GET_BOD_OUTPUT() (SYS->BODCTL & SYS_BODCTL_BODOUT_Msk)
sahilmgandhi 18:6a4db94011d3 1101
sahilmgandhi 18:6a4db94011d3 1102 /**
sahilmgandhi 18:6a4db94011d3 1103 * @brief Disable Brown-out detector interrupt function
sahilmgandhi 18:6a4db94011d3 1104 * @param None
sahilmgandhi 18:6a4db94011d3 1105 * @return None
sahilmgandhi 18:6a4db94011d3 1106 * @details This macro enable Brown-out detector interrupt function.
sahilmgandhi 18:6a4db94011d3 1107 */
sahilmgandhi 18:6a4db94011d3 1108 #define SYS_DISABLE_BOD_RST() (SYS->BODCTL &= ~SYS_BODCTL_BODRSTEN_Msk)
sahilmgandhi 18:6a4db94011d3 1109
sahilmgandhi 18:6a4db94011d3 1110 /**
sahilmgandhi 18:6a4db94011d3 1111 * @brief Enable Brown-out detector reset function
sahilmgandhi 18:6a4db94011d3 1112 * @param None
sahilmgandhi 18:6a4db94011d3 1113 * @return None
sahilmgandhi 18:6a4db94011d3 1114 * @details This macro enable Brown-out detect reset function.
sahilmgandhi 18:6a4db94011d3 1115 */
sahilmgandhi 18:6a4db94011d3 1116 #define SYS_ENABLE_BOD_RST() (SYS->BODCTL |= SYS_BODCTL_BODRSTEN_Msk)
sahilmgandhi 18:6a4db94011d3 1117
sahilmgandhi 18:6a4db94011d3 1118
sahilmgandhi 18:6a4db94011d3 1119 /**
sahilmgandhi 18:6a4db94011d3 1120 * @brief Set Brown-out detector function low power mode
sahilmgandhi 18:6a4db94011d3 1121 * @param None
sahilmgandhi 18:6a4db94011d3 1122 * @return None
sahilmgandhi 18:6a4db94011d3 1123 * @details This macro set Brown-out detector to low power mode.
sahilmgandhi 18:6a4db94011d3 1124 */
sahilmgandhi 18:6a4db94011d3 1125 #define SYS_SET_BOD_LPM() (SYS->BODCTL |= SYS_BODCTL_BODLPM_Msk)
sahilmgandhi 18:6a4db94011d3 1126
sahilmgandhi 18:6a4db94011d3 1127 /**
sahilmgandhi 18:6a4db94011d3 1128 * @brief Set Brown-out detector voltage level
sahilmgandhi 18:6a4db94011d3 1129 * @param[in] u32Level is Brown-out voltage level. Including :
sahilmgandhi 18:6a4db94011d3 1130 * - \ref SYS_BODCTL_BODVL_4_5V
sahilmgandhi 18:6a4db94011d3 1131 * - \ref SYS_BODCTL_BODVL_3_8V
sahilmgandhi 18:6a4db94011d3 1132 * - \ref SYS_BODCTL_BODVL_2_7V
sahilmgandhi 18:6a4db94011d3 1133 * - \ref SYS_BODCTL_BODVL_2_2V
sahilmgandhi 18:6a4db94011d3 1134 * @return None
sahilmgandhi 18:6a4db94011d3 1135 * @details This macro set Brown-out detector voltage level.
sahilmgandhi 18:6a4db94011d3 1136 */
sahilmgandhi 18:6a4db94011d3 1137 #define SYS_SET_BOD_LEVEL(u32Level) (SYS->BODCTL = (SYS->BODCTL & ~SYS_BODCTL_BODVL_Msk) | u32Level)
sahilmgandhi 18:6a4db94011d3 1138
sahilmgandhi 18:6a4db94011d3 1139 /**
sahilmgandhi 18:6a4db94011d3 1140 * @brief Get reset source is from Brown-out detector reset
sahilmgandhi 18:6a4db94011d3 1141 * @param None
sahilmgandhi 18:6a4db94011d3 1142 * @retval 0 Previous reset source is not from Brown-out detector reset
sahilmgandhi 18:6a4db94011d3 1143 * @retval >=1 Previous reset source is from Brown-out detector reset
sahilmgandhi 18:6a4db94011d3 1144 * @details This macro get previous reset source is from Brown-out detect reset or not.
sahilmgandhi 18:6a4db94011d3 1145 */
sahilmgandhi 18:6a4db94011d3 1146 #define SYS_IS_BOD_RST() (SYS->RSTSTS & SYS_RSTSTS_BODRF_Msk)
sahilmgandhi 18:6a4db94011d3 1147
sahilmgandhi 18:6a4db94011d3 1148 /**
sahilmgandhi 18:6a4db94011d3 1149 * @brief Get reset source is from CPU reset
sahilmgandhi 18:6a4db94011d3 1150 * @param None
sahilmgandhi 18:6a4db94011d3 1151 * @retval 0 Previous reset source is not from CPU reset
sahilmgandhi 18:6a4db94011d3 1152 * @retval >=1 Previous reset source is from CPU reset
sahilmgandhi 18:6a4db94011d3 1153 * @details This macro get previous reset source is from CPU reset.
sahilmgandhi 18:6a4db94011d3 1154 */
sahilmgandhi 18:6a4db94011d3 1155 #define SYS_IS_CPU_RST() (SYS->RSTSTS & SYS_RSTSTS_CPURF_Msk)
sahilmgandhi 18:6a4db94011d3 1156
sahilmgandhi 18:6a4db94011d3 1157 /**
sahilmgandhi 18:6a4db94011d3 1158 * @brief Get reset source is from LVR Reset
sahilmgandhi 18:6a4db94011d3 1159 * @param None
sahilmgandhi 18:6a4db94011d3 1160 * @retval 0 Previous reset source is not from LVR Reset
sahilmgandhi 18:6a4db94011d3 1161 * @retval >=1 Previous reset source is from LVR Reset
sahilmgandhi 18:6a4db94011d3 1162 * @details This macro get previous reset source is from Power-on Reset.
sahilmgandhi 18:6a4db94011d3 1163 */
sahilmgandhi 18:6a4db94011d3 1164 #define SYS_IS_LVR_RST() (SYS->RSTSTS & SYS_RSTSTS_LVRF_Msk)
sahilmgandhi 18:6a4db94011d3 1165
sahilmgandhi 18:6a4db94011d3 1166 /**
sahilmgandhi 18:6a4db94011d3 1167 * @brief Get reset source is from Power-on Reset
sahilmgandhi 18:6a4db94011d3 1168 * @param None
sahilmgandhi 18:6a4db94011d3 1169 * @retval 0 Previous reset source is not from Power-on Reset
sahilmgandhi 18:6a4db94011d3 1170 * @retval >=1 Previous reset source is from Power-on Reset
sahilmgandhi 18:6a4db94011d3 1171 * @details This macro get previous reset source is from Power-on Reset.
sahilmgandhi 18:6a4db94011d3 1172 */
sahilmgandhi 18:6a4db94011d3 1173 #define SYS_IS_POR_RST() (SYS->RSTSTS & SYS_RSTSTS_PORF_Msk)
sahilmgandhi 18:6a4db94011d3 1174
sahilmgandhi 18:6a4db94011d3 1175 /**
sahilmgandhi 18:6a4db94011d3 1176 * @brief Get reset source is from reset pin reset
sahilmgandhi 18:6a4db94011d3 1177 * @param None
sahilmgandhi 18:6a4db94011d3 1178 * @retval 0 Previous reset source is not from reset pin reset
sahilmgandhi 18:6a4db94011d3 1179 * @retval >=1 Previous reset source is from reset pin reset
sahilmgandhi 18:6a4db94011d3 1180 * @details This macro get previous reset source is from reset pin reset.
sahilmgandhi 18:6a4db94011d3 1181 */
sahilmgandhi 18:6a4db94011d3 1182 #define SYS_IS_RSTPIN_RST() (SYS->RSTSTS & SYS_RSTSTS_PINRF_Msk)
sahilmgandhi 18:6a4db94011d3 1183
sahilmgandhi 18:6a4db94011d3 1184 /**
sahilmgandhi 18:6a4db94011d3 1185 * @brief Get reset source is from system reset
sahilmgandhi 18:6a4db94011d3 1186 * @param None
sahilmgandhi 18:6a4db94011d3 1187 * @retval 0 Previous reset source is not from system reset
sahilmgandhi 18:6a4db94011d3 1188 * @retval >=1 Previous reset source is from system reset
sahilmgandhi 18:6a4db94011d3 1189 * @details This macro get previous reset source is from system reset.
sahilmgandhi 18:6a4db94011d3 1190 */
sahilmgandhi 18:6a4db94011d3 1191 #define SYS_IS_SYSTEM_RST() (SYS->RSTSTS & SYS_RSTSTS_SYSRF_Msk)
sahilmgandhi 18:6a4db94011d3 1192
sahilmgandhi 18:6a4db94011d3 1193 /**
sahilmgandhi 18:6a4db94011d3 1194 * @brief Get reset source is from window watch dog reset
sahilmgandhi 18:6a4db94011d3 1195 * @param None
sahilmgandhi 18:6a4db94011d3 1196 * @retval 0 Previous reset source is not from window watch dog reset
sahilmgandhi 18:6a4db94011d3 1197 * @retval >=1 Previous reset source is from window watch dog reset
sahilmgandhi 18:6a4db94011d3 1198 * @details This macro get previous reset source is from window watch dog reset.
sahilmgandhi 18:6a4db94011d3 1199 */
sahilmgandhi 18:6a4db94011d3 1200 #define SYS_IS_WDT_RST() (SYS->RSTSTS & SYS_RSTSTS_WDTRF_Msk)
sahilmgandhi 18:6a4db94011d3 1201
sahilmgandhi 18:6a4db94011d3 1202 /**
sahilmgandhi 18:6a4db94011d3 1203 * @brief Disable Low-Voltage-Reset function
sahilmgandhi 18:6a4db94011d3 1204 * @param None
sahilmgandhi 18:6a4db94011d3 1205 * @return None
sahilmgandhi 18:6a4db94011d3 1206 * @details This macro disable Low-Voltage-Reset function.
sahilmgandhi 18:6a4db94011d3 1207 */
sahilmgandhi 18:6a4db94011d3 1208 #define SYS_DISABLE_LVR() (SYS->BODCTL &= ~SYS_BODCTL_LVREN_Msk)
sahilmgandhi 18:6a4db94011d3 1209
sahilmgandhi 18:6a4db94011d3 1210 /**
sahilmgandhi 18:6a4db94011d3 1211 * @brief Enable Low-Voltage-Reset function
sahilmgandhi 18:6a4db94011d3 1212 * @param None
sahilmgandhi 18:6a4db94011d3 1213 * @return None
sahilmgandhi 18:6a4db94011d3 1214 * @details This macro enable Low-Voltage-Reset function.
sahilmgandhi 18:6a4db94011d3 1215 */
sahilmgandhi 18:6a4db94011d3 1216 #define SYS_ENABLE_LVR() (SYS->BODCTL |= SYS_BODCTL_LVREN_Msk)
sahilmgandhi 18:6a4db94011d3 1217
sahilmgandhi 18:6a4db94011d3 1218 /**
sahilmgandhi 18:6a4db94011d3 1219 * @brief Disable Power-on Reset function
sahilmgandhi 18:6a4db94011d3 1220 * @param None
sahilmgandhi 18:6a4db94011d3 1221 * @return None
sahilmgandhi 18:6a4db94011d3 1222 * @details This macro disable Power-on Reset function.
sahilmgandhi 18:6a4db94011d3 1223 */
sahilmgandhi 18:6a4db94011d3 1224 #define SYS_DISABLE_POR() (SYS->PORCTL = 0x5AA5)
sahilmgandhi 18:6a4db94011d3 1225
sahilmgandhi 18:6a4db94011d3 1226 /**
sahilmgandhi 18:6a4db94011d3 1227 * @brief Enable Power-on Reset function
sahilmgandhi 18:6a4db94011d3 1228 * @param None
sahilmgandhi 18:6a4db94011d3 1229 * @return None
sahilmgandhi 18:6a4db94011d3 1230 * @details This macro enable Power-on Reset function.
sahilmgandhi 18:6a4db94011d3 1231 */
sahilmgandhi 18:6a4db94011d3 1232 #define SYS_ENABLE_POR() (SYS->PORCTL = 0)
sahilmgandhi 18:6a4db94011d3 1233
sahilmgandhi 18:6a4db94011d3 1234
sahilmgandhi 18:6a4db94011d3 1235 /**
sahilmgandhi 18:6a4db94011d3 1236 * @brief Clear reset source flag
sahilmgandhi 18:6a4db94011d3 1237 * @param[in] u32RstSrc is reset source. Including:
sahilmgandhi 18:6a4db94011d3 1238 * - \ref SYS_RSTSTS_PORF_Msk
sahilmgandhi 18:6a4db94011d3 1239 * - \ref SYS_RSTSTS_PINRF_Msk
sahilmgandhi 18:6a4db94011d3 1240 * - \ref SYS_RSTSTS_WDTRF_Msk
sahilmgandhi 18:6a4db94011d3 1241 * - \ref SYS_RSTSTS_LVRF_Msk
sahilmgandhi 18:6a4db94011d3 1242 * - \ref SYS_RSTSTS_BODRF_Msk
sahilmgandhi 18:6a4db94011d3 1243 * - \ref SYS_RSTSTS_SYSRF_Msk
sahilmgandhi 18:6a4db94011d3 1244 * - \ref SYS_RSTSTS_CPURF_Msk
sahilmgandhi 18:6a4db94011d3 1245 * @return None
sahilmgandhi 18:6a4db94011d3 1246 * @details This macro clear reset source flag.
sahilmgandhi 18:6a4db94011d3 1247 */
sahilmgandhi 18:6a4db94011d3 1248 #define SYS_CLEAR_RST_SOURCE(u32RstSrc) (SYS->RSTSTS = u32RstSrc )
sahilmgandhi 18:6a4db94011d3 1249
sahilmgandhi 18:6a4db94011d3 1250 void SYS_ClearResetSrc(uint32_t u32Src);
sahilmgandhi 18:6a4db94011d3 1251 uint32_t SYS_GetBODStatus(void);
sahilmgandhi 18:6a4db94011d3 1252 uint32_t SYS_GetResetSrc(void);
sahilmgandhi 18:6a4db94011d3 1253 uint32_t SYS_IsRegLocked(void);
sahilmgandhi 18:6a4db94011d3 1254 void SYS_LockReg(void);
sahilmgandhi 18:6a4db94011d3 1255 void SYS_UnlockReg(void);
sahilmgandhi 18:6a4db94011d3 1256 uint32_t SYS_ReadPDID(void);
sahilmgandhi 18:6a4db94011d3 1257 void SYS_ResetChip(void);
sahilmgandhi 18:6a4db94011d3 1258 void SYS_ResetCPU(void);
sahilmgandhi 18:6a4db94011d3 1259 void SYS_ResetModule(uint32_t u32ModuleIndex);
sahilmgandhi 18:6a4db94011d3 1260 void SYS_EnableBOD(int32_t i32Mode, uint32_t u32BODLevel);
sahilmgandhi 18:6a4db94011d3 1261 void SYS_DisableBOD(void);
sahilmgandhi 18:6a4db94011d3 1262
sahilmgandhi 18:6a4db94011d3 1263 /*@}*/ /* end of group NUC472_442_SYS_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 1264
sahilmgandhi 18:6a4db94011d3 1265 /*@}*/ /* end of group NUC472_442_SYS_Driver */
sahilmgandhi 18:6a4db94011d3 1266
sahilmgandhi 18:6a4db94011d3 1267 /*@}*/ /* end of group NUC472_442_Device_Driver */
sahilmgandhi 18:6a4db94011d3 1268
sahilmgandhi 18:6a4db94011d3 1269 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 1270 }
sahilmgandhi 18:6a4db94011d3 1271 #endif
sahilmgandhi 18:6a4db94011d3 1272
sahilmgandhi 18:6a4db94011d3 1273 #endif //__SYS_H__
sahilmgandhi 18:6a4db94011d3 1274
sahilmgandhi 18:6a4db94011d3 1275 /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/